TWI420588B - Plasma etching method - Google Patents
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- TWI420588B TWI420588B TW094143030A TW94143030A TWI420588B TW I420588 B TWI420588 B TW I420588B TW 094143030 A TW094143030 A TW 094143030A TW 94143030 A TW94143030 A TW 94143030A TW I420588 B TWI420588 B TW I420588B
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- 238000000034 method Methods 0.000 title claims description 58
- 238000001020 plasma etching Methods 0.000 title claims description 58
- 239000007789 gas Substances 0.000 claims description 84
- 238000005530 etching Methods 0.000 claims description 62
- 238000012545 processing Methods 0.000 claims description 49
- 238000004140 cleaning Methods 0.000 claims description 29
- 238000009832 plasma treatment Methods 0.000 claims description 16
- 150000002222 fluorine compounds Chemical class 0.000 claims description 10
- 150000001875 compounds Chemical class 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 238000005108 dry cleaning Methods 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 239000010936 titanium Substances 0.000 description 47
- 235000012431 wafers Nutrition 0.000 description 43
- 230000008569 process Effects 0.000 description 20
- 230000000694 effects Effects 0.000 description 13
- 239000010408 film Substances 0.000 description 13
- 230000001965 increasing effect Effects 0.000 description 6
- 239000002245 particle Substances 0.000 description 6
- 239000010419 fine particle Substances 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910010342 TiF4 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000005672 electromagnetic field Effects 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 230000005415 magnetization Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- XROWMBWRMNHXMF-UHFFFAOYSA-J titanium tetrafluoride Chemical compound [F-].[F-].[F-].[F-].[Ti+4] XROWMBWRMNHXMF-UHFFFAOYSA-J 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000003085 diluting agent Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
本發明係關於電漿蝕刻方法,詳細為關於利用反應性氣體之電漿,來對Ti等之金屬膜進行蝕刻之電漿蝕刻方法。The present invention relates to a plasma etching method, and in particular to a plasma etching method for etching a metal film of Ti or the like using a plasma of a reactive gas.
於半導體裝置中,鈦(Ti)等之金屬,例如被當成配線材料使用外,以降低MOS電晶體等之寄生電阻的目的,被矽化合金化來使用。例如,在MOS電晶體之製造過程中,實施有:於閘極電極與擴散層之表面形成Ti膜後,施以熱處理,使其矽化合金化,將未反應的Ti膜加以除去之工程。藉由蝕刻將形成於基板上之Ti膜予以除去之技術,提出有藉由CF4 系蝕刻氣體之電漿來進行乾蝕刻之方法(例如,專利文獻1、專利文獻2)。In the semiconductor device, a metal such as titanium (Ti) is used as a wiring material, for the purpose of reducing parasitic resistance of a MOS transistor or the like, and is used for alloying. For example, in the manufacturing process of the MOS transistor, a process of forming a Ti film on the surface of the gate electrode and the diffusion layer, heat-treating the alloy, and removing the unreacted Ti film is performed. In the technique of removing the Ti film formed on the substrate by etching, a method of dry etching by a plasma of a CF 4 -based etching gas has been proposed (for example, Patent Document 1 and Patent Document 2).
[專利文獻1]日本專利特開昭53-118372號公報(第1圖~第5圖等)[專利文獻2]日本專利特開昭56-66040號公報(申請專利範圍等)[Patent Document 1] Japanese Laid-Open Patent Publication No. SHO-53-118372 (Patent Document No. 5)
一般,從產出提升的觀點而言,蝕刻速率以高者為佳,於對於Ti膜進行蝕刻之情形,也被要求實現高蝕刻速率之處理。可是,前述以往技術之方法,完全未對於使蝕刻速率變快一事做考慮。例如,在專利文獻2之方法中,為了使建立速度變快,於實施預先蝕刻後之蝕刻中,甚至只能獲得30~40nm/min程度的蝕刻速率(參照該文獻,第1圖),畢竟無法因應現在之高速蝕刻的要求。Generally, from the viewpoint of output improvement, the etching rate is preferably higher, and in the case of etching the Ti film, high etching rate processing is also required. However, the above-described prior art method does not consider the fact that the etching rate is made faster. For example, in the method of Patent Document 2, in order to make the build speed faster, in the etching after performing the pre-etching, even an etching rate of about 30 to 40 nm/min can be obtained (refer to the document, Fig. 1), after all, Can not meet the requirements of the current high-speed etching.
另一方面,如藉由前述專利文獻1、2所記載之CF系氣體的電漿來高速蝕刻Ti膜時,會發生被稱為籬笆之蝕刻殘渣的再附著現象。此現象係基於高速蝕刻時之強烈的濺鍍作用,Ti等之蝕刻殘渣飛散,再附著於光阻與其他的金屬材料之側面者。此籬笆係成為造成因Ti所致之污染的原因,要求儘可能可以避免。On the other hand, when the Ti film is etched at a high speed by the plasma of the CF-based gas described in Patent Documents 1 and 2, a re-adhesion phenomenon called an etching residue of a fence occurs. This phenomenon is based on the strong sputtering effect at the time of high-speed etching, and the etching residue such as Ti scatters and adheres to the side of the photoresist and other metal materials. This fence is responsible for the pollution caused by Ti and is required to be avoided as much as possible.
另外,在電漿蝕刻Ti膜時,會形成多量的腔內堆積物。此堆積物係成為粒子污染的原因,有礙可靠性高的半導體裝置之製造。因此,於Ti膜之電漿蝕刻中,需要對於腔內堆積物採取對策。In addition, when the plasma is etched into the Ti film, a large amount of intracavity deposits are formed. This deposit is a cause of particle contamination and hinders the manufacture of a highly reliable semiconductor device. Therefore, in the plasma etching of the Ti film, it is necessary to take countermeasures against the deposit in the cavity.
因此,本發明的目的在於提供:首先,避免籬笆之產生,而且,能以高蝕刻速率來蝕刻Ti之電漿蝕刻方法,進而在於提供:於蝕刻過程中,能抑制腔內堆積物之產生,防止粒子污染於未然之電漿蝕刻方法。Accordingly, it is an object of the present invention to provide: first, to avoid the generation of a fence, and to etch a plasma etching method of Ti at a high etching rate, and further to provide for suppressing the generation of deposits in the cavity during the etching process. A plasma etching method that prevents particles from being contaminated.
為了解決前述課題,如依據本發明之第1觀點,為提供一種電漿蝕刻方法,係在可保持為真空之處理容器內,至少藉由使蝕刻氣體之電漿作用於形成有形成特定形狀之圖案的光罩層、及作為形成於前述光罩層之下的被蝕刻層之Ti層之被處理體,來蝕刻前述Ti層,其特徵為:使用含有氟化合物之蝕刻氣體,於腔內壓力4Pa以下進行蝕刻。In order to solve the above problems, according to a first aspect of the present invention, in order to provide a plasma etching method, in a processing container which can be kept in a vacuum, at least a plasma of an etching gas is applied to form a specific shape. The patterned mask layer and the object to be treated as the Ti layer of the layer to be etched under the mask layer are etched to form the Ti layer, which is characterized by using an etching gas containing a fluorine compound in the chamber pressure Etching is performed below 4Pa.
在第1觀點之電漿蝕刻方法中,含有氟化合物,以CF4 為佳。另外,蝕刻速率以90~140nm/min為佳。In the plasma etching method of the first aspect, the fluorine compound is contained, and CF 4 is preferred. In addition, the etching rate is preferably from 90 to 140 nm/min.
如依據本發明之第2觀點,為提供一種電漿蝕刻方法,其特徵為:含有,在可保持為真空之處理容器內,至少對形成有形成特定形狀之圖案的光罩層、及作為形成於前述光罩層之下的被蝕刻層之Ti層之被處理體,於腔內壓力4Pa以下,使含有氟化合物之蝕刻氣體的電漿產生作用,來蝕刻前述Ti層之第1電漿處理工程;及於第1電漿處理工程結束後,藉由清潔氣體之電漿,導入前述處理腔內,來進行乾式清潔之第2電漿處理工程,在前述第2電漿處理工程中,將包含藉由前述第1電漿處理工程所產生的Ti化合物的堆積物加以除去。According to a second aspect of the present invention, there is provided a plasma etching method comprising: forming, in a processing container which can be kept in a vacuum, at least a mask layer on which a pattern having a specific shape is formed, and forming The object to be treated of the Ti layer under the mask layer is subjected to a plasma having a fluorine compound-containing etching gas at a pressure of 4 Pa or less in the chamber to etch the first plasma treatment of the Ti layer. After the completion of the first plasma treatment project, the second plasma treatment project for dry cleaning is introduced into the processing chamber by the plasma of the cleaning gas, and in the second plasma treatment project, The deposit of the Ti compound produced by the first plasma treatment project is removed.
於第2觀點之電漿蝕刻方法中,以交互重複實施前述第1電漿處理工程與前述第2電漿處理工程為佳。另外,前述第2電漿處理工程所使用之清潔氣體,以含有氟化合物或氧氣之氣體為佳。此處,前述氟化合物以NF3 或CF4 為佳。In the plasma etching method of the second aspect, it is preferable to repeatedly perform the first plasma treatment process and the second plasma treatment process. Further, the cleaning gas used in the second plasma treatment project is preferably a gas containing a fluorine compound or oxygen. Here, the fluorine compound is preferably NF 3 or CF 4 .
另外,前述第2電漿處理工程中之腔內壓力,以6.7Pa以下為佳。Further, the pressure in the chamber in the second plasma treatment project is preferably 6.7 Pa or less.
如依據本發明之第3觀點,為提供一種控制程式,其特徵為:於電腦上動作,在實行時,控制電漿處理裝置,使進行前述第1觀點或第2觀點之電漿蝕刻方法。According to a third aspect of the present invention, a control program is provided which is characterized in that it operates on a computer and, when executed, controls the plasma processing apparatus to perform the plasma etching method of the first aspect or the second aspect.
如依據本發明之第4觀點,為提供一種電腦記憶媒體,係記憶有於電腦上動作之控制程式,其特徵為:前述控制程式,於實行時,係控制前述第1觀點或第2觀點之電漿蝕刻方法所使用的電漿處理裝置。According to a fourth aspect of the present invention, in a computer memory medium, a control program for storing an operation on a computer is provided, wherein the control program controls the first viewpoint or the second viewpoint when the control program is executed. A plasma processing apparatus used in a plasma etching method.
如依據本發明之第5觀點,為提供一種電漿蝕刻裝置,其特徵為具備:使產生電漿之電漿供給源、及區分藉由前述電漿,對被處理體進行蝕刻處理之處理室之處理容器、及於前述處理容器內,載置前述被處理體之支撐體、及將前述處理容器內加以減壓之排氣手段、及對前述處理容器內供給氣體之氣體供給手段、及控制進行前述第1觀點或第2觀點之電漿蝕刻方法的控制部。According to a fifth aspect of the present invention, there is provided a plasma etching apparatus comprising: a plasma supply source for generating a plasma; and a processing chamber for separating an object to be processed by the plasma a processing container, a support body on which the object to be processed is placed, an exhaust means for decompressing the inside of the processing container, a gas supply means for supplying a gas into the processing container, and a control in the processing container The control unit of the plasma etching method of the first aspect or the second aspect is performed.
如依據本發明之電漿蝕刻方法,蝕刻氣體係使用含有氟化合物之氣體,而且,以特定的低壓條件來進行電漿蝕刻,藉此,可一面維持高的蝕刻速率,一面來蝕刻Ti膜,而且,可以有效地防止籬笆之產生。According to the plasma etching method of the present invention, the etching gas system uses a gas containing a fluorine compound, and plasma etching is performed under a specific low pressure condition, whereby the Ti film can be etched while maintaining a high etching rate. Moreover, it is possible to effectively prevent the occurrence of a fence.
另外,藉由將電漿蝕刻處理、及藉由特定條件之電漿清潔處理加以組合而實施,可以抑制腔內堆積物之蓄積,能預防粒子污染,因此,可以提高半導體裝置的可靠度。Further, by combining the plasma etching treatment and the plasma cleaning treatment under specific conditions, accumulation of deposits in the cavity can be suppressed, and particle contamination can be prevented, so that the reliability of the semiconductor device can be improved.
以下,一面參照圖面一面說明本發明之實施形態。第1圖係表示於實施本發明方法之目的下,可以適當地使用之磁控管RIE方式之電漿蝕刻裝置100的概要剖面圖。此蝕刻裝置100係氣密地構成,形成為由小徑的上部1a與大徑的下部1b所形成之含階段圓筒狀,壁部例如具有鋁製的腔(處理容器)1。Hereinafter, embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a schematic cross-sectional view showing a plasma etching apparatus 100 of a magnetron RIE type which can be suitably used for the purpose of carrying out the method of the present invention. The etching apparatus 100 is configured to be airtight, and is formed in a cylindrical shape including a small diameter upper portion 1a and a large diameter lower portion 1b. The wall portion has, for example, a cavity (processing container) 1 made of aluminum.
於此腔1內設置有水平支撐作為被處理體而形成有Ti膜之矽基板的半導體晶圓(以下,單單記載為「晶圓」)W之支撐載置台2。支撐載置台2例如以鋁構成,介由絕緣板3而支撐於導體之支撐台4。另外,於支撐載置台2之上方的外周,例如設置有以Si或石英等所形成的聚焦環5。前述支撐載置台2與支撐台4係介由包含滾珠螺桿7之滾珠螺桿機構而可以升降,支撐台4之下方的驅動部份係以不銹鋼(SUS)製之波紋管8所覆蓋,於波紋管8的外側設置有波紋管蓋9。另外,於前述聚焦環5之外側設置有擋板10。另外,腔1係被接地。In the cavity 1, a support stage 2 for supporting a semiconductor wafer (hereinafter, simply referred to as "wafer") W having a substrate of a Ti film as a target to be processed is provided. The support stage 2 is made of, for example, aluminum, and is supported by the support base 4 of the conductor via the insulating plate 3. Further, on the outer circumference above the support stage 2, for example, a focus ring 5 formed of Si or quartz or the like is provided. The support mounting table 2 and the support table 4 can be lifted and lowered by a ball screw mechanism including a ball screw 7, and the driving portion below the support table 4 is covered with a bellows 8 made of stainless steel (SUS). A bellows cover 9 is provided on the outer side of the 8. Further, a baffle 10 is provided on the outer side of the focus ring 5 described above. In addition, the cavity 1 is grounded.
於腔1之下部1b的側壁形成有排氣口11,於此排氣口11連接有排氣系統12。而且,藉由使排氣系統12的真空泵動作,可將腔1內減壓至特定的真空度。另一方面,於腔1的下部1b之側壁上側設置有開關晶圓W的搬入搬出口之閘門閥13。An exhaust port 11 is formed in a side wall of the lower portion 1b of the chamber 1, and an exhaust system 12 is connected to the exhaust port 11. Further, by operating the vacuum pump of the exhaust system 12, the inside of the chamber 1 can be decompressed to a specific degree of vacuum. On the other hand, a gate valve 13 for loading and unloading the switch wafer W is provided on the upper side of the side wall of the lower portion 1b of the chamber 1.
介由匹配器14而於支撐載置台2連接有電漿形成用之第1高頻電源15,特定頻率之高頻電力從此第1高頻電源15而被供給至支撐載置台2。另一方面,面對支撐載置台2,於其之上方相互平行地設置有之後詳細說明之蓮蓬頭20,此蓮蓬頭20係被接地。因此,支撐載置台2及蓮蓬頭20係作用為一對的電極。The first high-frequency power source 15 for forming a plasma is connected to the support stage 2 via the matching unit 14, and high-frequency power of a specific frequency is supplied from the first high-frequency power source 15 to the support stage 2. On the other hand, facing the support stage 2, the shower head 20 which will be described later in detail is provided in parallel with each other, and the shower head 20 is grounded. Therefore, the support stage 2 and the shower head 20 function as a pair of electrodes.
於支撐載置台2的表面上設置有靜電吸附晶圓W而加以保持之靜電夾頭6。此靜電夾頭6係於絕緣體6b之間存在有電極6a而構成,於電極6a連接有直流電源16。而且,藉由對電極6a施加來自電源16之電壓,晶圓W藉由靜電力例如庫倫力而被吸附。An electrostatic chuck 6 for holding and holding the electrostatically adsorbed wafer W is provided on the surface of the support stage 2. The electrostatic chuck 6 is formed by the presence of an electrode 6a between the insulators 6b, and a DC power source 16 is connected to the electrode 6a. Further, by applying a voltage from the power source 16 to the electrode 6a, the wafer W is adsorbed by an electrostatic force such as a Coulomb force.
於支撐載置台2的內部設置有溫度調節媒體室17,於此溫度調節媒體室17中,溫度調節媒體係介由導入管17a而被導入,從排出管17b而被排出而進行循環,該熱(溫熱、冷熱)為介由支撐載置台2而被傳達於晶圓W,藉此,晶圓W的處理面被控制為所期望之溫度。A temperature adjustment medium chamber 17 is provided inside the support stage 2, and in the temperature adjustment medium chamber 17, the temperature adjustment medium is introduced through the introduction tube 17a, and is discharged from the discharge tube 17b to circulate the heat. (warm, hot and cold) is transmitted to the wafer W via the support stage 2, whereby the processing surface of the wafer W is controlled to a desired temperature.
另外,即使腔1藉由排氣系統12而被排氣,保持為真空,為了藉由循環於溫度調節媒體室17之溫度調節媒體,也能有效地溫度調節晶圓W,作為傳熱媒體之氣體係藉由氣體導入機構18,透過該氣體供給管線19而以特定壓力(背壓)被導入靜電夾頭6的表面與晶圓W的背面之間。如此,藉由導入作為傳熱媒體之氣體,溫度調節媒體之熱被有效傳達於晶圓W,可使晶圓W之溫度調節效率提高。Further, even if the chamber 1 is exhausted by the exhaust system 12 and kept in a vacuum, the wafer W can be efficiently temperature-regulated by circulating the temperature regulating medium in the temperature adjusting medium chamber 17, as a heat transfer medium. The gas system is introduced into the surface of the electrostatic chuck 6 and the back surface of the wafer W at a specific pressure (back pressure) by the gas introduction mechanism 18 through the gas supply line 19. As described above, by introducing the gas as the heat transfer medium, the heat of the temperature adjustment medium is efficiently transmitted to the wafer W, and the temperature adjustment efficiency of the wafer W can be improved.
前述蓮蓬頭20係設置於腔1的天壁部份而和支撐載置台2面對。此蓮蓬頭20係於其之下面設置有多數的氣體吐出孔22,而且,於其之上部具有氣體導入部20a。然後,於其內部形成有空間21。於氣體導入部20a連接有氣體供給配管23a,於此氣體供給配管23a的另一端連接有供給蝕刻氣體與清潔氣體等之處理氣體的處理氣體供給系統23。The aforementioned shower head 20 is disposed on the wall portion of the cavity 1 and faces the support stage 2. The shower head 20 is provided with a plurality of gas discharge holes 22 on the lower side thereof, and a gas introduction portion 20a at the upper portion thereof. Then, a space 21 is formed inside thereof. A gas supply pipe 23a is connected to the gas introduction portion 20a, and a processing gas supply system 23 that supplies a processing gas such as an etching gas and a cleaning gas is connected to the other end of the gas supply pipe 23a.
此種處理氣體,係從處理氣體供給系統23經過氣體供給配管23a、氣體導入部20a而到達蓮蓬頭20的空間21,從氣體吐出孔22被吐出。The processing gas is supplied from the processing gas supply system 23 to the space 21 of the shower head 20 through the gas supply pipe 23a and the gas introduction portion 20a, and is discharged from the gas discharge hole 22.
另一方面,於腔1的上部1a之周圍,同心狀地配置有上下一對的雙極子環狀磁鐵24a、24b。雙極子環狀磁鐵24a、24b係個別如第2圖之水平剖面圖所示般,由複數的不等向性片段柱狀磁鐵31安裝於環狀的磁性體之殼體32所構成。在此粒中,成為圓狀狀之16個不等向性片段柱狀磁鐵31配置為環狀。第2圖中,於不等向性片段柱狀磁鐵31中所示之箭頭,係表示磁化的方向,如此圖所示般,使複數的不等向性片段柱狀磁鐵31之磁化方向稍微錯開,形成整體朝向一個方向之水平磁場B。On the other hand, a pair of upper and lower bipolar annular magnets 24a and 24b are arranged concentrically around the upper portion 1a of the chamber 1. The two-pole annular magnets 24a and 24b are each formed by a plurality of anisotropic segment columnar magnets 31 attached to a ring-shaped magnetic body casing 32 as shown in the horizontal cross-sectional view of Fig. 2 . Among the particles, 16 anisotropic segment columnar magnets 31 having a circular shape are arranged in a ring shape. In Fig. 2, the arrow shown in the anisotropic segment columnar magnet 31 indicates the direction of magnetization, and as shown in the figure, the magnetization directions of the plurality of anisotropic segment columnar magnets 31 are slightly shifted. Forming a horizontal magnetic field B that is oriented in one direction as a whole.
因此,如第3圖之模型圖所示般,於支撐載置台2和蓮蓬頭20之間的空間,藉由第1高頻電源15而形成有垂直方向之電場EL,且藉由雙極子環狀磁鐵24a、24b而形成有水平磁場B,藉由如此形成之正交電磁場而產生磁控管放電。藉此,可形成高能量狀態之蝕刻氣體的電漿,得以蝕刻晶圓W。Therefore, as shown in the model diagram of Fig. 3, in the space between the support stage 2 and the shower head 20, the electric field EL in the vertical direction is formed by the first high-frequency power source 15, and is ring-shaped by the dipole. The magnets 24a, 24b are formed with a horizontal magnetic field B, and the magnetron discharge is generated by the orthogonal electromagnetic field thus formed. Thereby, a plasma of an etching gas of a high energy state can be formed, and the wafer W can be etched.
另外,電漿蝕刻裝置100之各構成部,係構成為連接於具備有CPU之製程控制器50而被控制。於製程控制器50連接有由:工程管理員為了管理電漿蝕刻裝置100,而進行指令之輸入操作等之鍵盤、與使電漿蝕刻裝置100的稼動狀況可視化而表示之顯示器等所形成之使用者介面51。Further, each component of the plasma etching apparatus 100 is configured to be connected to a process controller 50 including a CPU and controlled. The process controller 50 is connected to a display formed by a keyboard that the engineering administrator performs a command input operation for managing the plasma etching apparatus 100, and a display that visualizes the state of the plasma etching apparatus 100. Interface 51.
另外,於製程控制器50連接有儲存記錄有以製程控制器50之控制來實現於電漿蝕刻裝置100所執行之各種處理之控制程式與處理條件資料等之處理程序的記憶部52。Further, the process controller 50 is connected to a memory unit 52 that stores a processing program for recording control programs and processing condition data and the like which are executed by the process controller 50 to realize various processes executed by the plasma etching apparatus 100.
而且,因應需要,藉由以來自使用者介面51之指示等,從記憶部52呼叫出任意的處理程序,而使製程控制器50來執行,以在製程控制器50之控制下,進行在電漿蝕刻裝置100之所期望的處理。另外,前述處理程序例如可以使用儲存於CD-ROM、硬碟機、軟碟機、非揮發性記憶體等之可讀出的記憶媒體的狀態者,或者,從其他裝置例如透過專用線路隨時傳送而利用。Further, if necessary, the arbitrary processing program is called from the memory unit 52 by an instruction from the user interface 51 or the like, and the process controller 50 is executed to perform the power control under the control of the process controller 50. The desired processing of the slurry etching apparatus 100. Further, the processing program may be, for example, a state of a readable memory stored in a CD-ROM, a hard disk drive, a floppy disk drive, a non-volatile memory, or the like, or may be transmitted from another device, for example, through a dedicated line. And use.
接著,適當地參照第4圖來說明使用如此所構成之電漿蝕刻裝置100的本發明方法之第1實施形態的電漿蝕刻方法。Next, a plasma etching method according to the first embodiment of the method of the present invention using the plasma etching apparatus 100 thus constructed will be described with reference to Fig. 4 as appropriate.
首先,打開第1圖之閘門閥13,將晶圓W搬入腔1內,載置於支撐載置台2後,使支撐載置台2上升至圖示之位置,藉由排氣系統12之真空泵,透過排氣口11而將腔1內加以排氣。此狀態之晶圓W係如第4(a)圖所示般,構成為於Si基板101上層積有:絕緣氧化膜之SiO2 層102、作為被蝕刻層之Ti層103及光罩層104。光罩層104為具有與Ti層103之蝕刻選擇性者,並無特別限制,例如可以使用藉由金屬等之硬光罩、或藉由其他工程所形成之上層等。另外,於光罩層104形成有特定形狀之圖案。First, the gate valve 13 of Fig. 1 is opened, the wafer W is carried into the chamber 1, and after being placed on the support stage 2, the support stage 2 is raised to the position shown in the figure, and the vacuum pump of the exhaust system 12 is used. The chamber 1 is evacuated through the exhaust port 11. As shown in FIG. 4(a), the wafer W in this state is formed by laminating an SiO 2 layer 102 of an insulating oxide film, a Ti layer 103 as an etched layer, and a mask layer 104 on the Si substrate 101. . The mask layer 104 is not particularly limited as long as it has etching selectivity with the Ti layer 103. For example, a hard mask made of metal or the like, or an upper layer formed by other processes may be used. Further, a pattern of a specific shape is formed on the mask layer 104.
然後包含蝕刻氣體及稀釋氣體之處理氣體從處理氣體供給系統23以特定的流量被導入腔1內,將腔1內的壓力設為4Pa(30mTorr)以下,將晶圓W(支撐載置台2)的溫度設為50~80℃,在該狀態下,從第1高頻電源15對支撐載置台2供給特定的高頻電力。作為產生電漿之高頻電力,從提高蝕刻速率之觀點而言,例如以設為2000W以上為佳,以3000~5000W程度更佳。此時,晶圓W係藉由從直流電源16對靜電夾頭6之電極6a施加特定的電壓,例如藉由庫倫力而被吸附保持於靜電夾頭6,而且,於上部電極之蓮蓬頭20和下部電極之支撐載置台2之間形成有高頻電場。於蓮蓬頭20和支撐載置台2之間,藉由雙極子環狀磁鐵24a、24b而形成有水平磁場B,所以,於晶圓W存在之電極間的處理空間形成有正交電磁場,藉此所產生的電子之漂移,而產生磁控管放電。然後,藉由此磁控管放電所形成之蝕刻氣體的電漿,晶圓W被蝕刻。在此情形,於通常之蝕刻中,藉由將腔1內的壓力設定為高些,不單離子及電子之帶電粒子,也可使產生充分量之活性基,此活性基有效地作用,可使蝕刻速率提升。另外,壓力如低,濺鍍作用增強,容易產生籬笆,由此觀點,於通常的蝕刻中,採用6.7Pa(50mTorr)以上之比較高壓的條件。但是,於本實施形態中,在Ti層103之電漿蝕刻中,如後述般,藉由特意使用4Pa以下(即0~4Pa之範圍)的低壓力條件,可一面防止籬笆之產生,例如一面實現90~140nm/min之高速的蝕刻。Then, the processing gas containing the etching gas and the diluent gas is introduced into the chamber 1 from the processing gas supply system 23 at a specific flow rate, and the pressure in the chamber 1 is set to 4 Pa (30 mTorr) or less, and the wafer W (supporting table 2) is placed. The temperature is set to 50 to 80 ° C. In this state, the specific high-frequency power is supplied from the first high-frequency power source 15 to the support stage 2 . The high-frequency power to generate the plasma is preferably 2,000 W or more, and more preferably 3,000 to 5,000 W, from the viewpoint of increasing the etching rate. At this time, the wafer W is applied to the electrode 6a of the electrostatic chuck 6 from the DC power source 16 by a specific voltage, for example, by the Coulomb force, and is held by the electrostatic chuck 6, and the shower head 20 of the upper electrode and A high-frequency electric field is formed between the support stages 2 of the lower electrodes. Between the shower head 20 and the support stage 2, the horizontal magnetic field B is formed by the bipolar annular magnets 24a and 24b. Therefore, an orthogonal electromagnetic field is formed in the processing space between the electrodes in which the wafer W exists. The resulting electron drift causes a magnetron discharge. Then, the wafer W is etched by the plasma of the etching gas formed by the discharge of the magnetron. In this case, in the usual etching, by setting the pressure in the chamber 1 to be higher, not only the charged particles of the single ions and the electrons, a sufficient amount of active groups can be generated, and the active group can effectively act. The etch rate is increased. Further, if the pressure is low, the sputtering effect is enhanced, and a fence is easily generated. From the viewpoint of the conventional etching, a relatively high pressure condition of 6.7 Pa (50 mTorr) or more is employed. However, in the present embodiment, in the plasma etching of the Ti layer 103, as will be described later, by using a low pressure condition of 4 Pa or less (that is, a range of 0 to 4 Pa), it is possible to prevent the occurrence of a fence, for example, one side. A high-speed etching of 90 to 140 nm/min is achieved.
於本實施形態中,使用REI形式之電漿生成機構,對載置晶圓W之下部電極之支撐載置台2施加高頻電力,可於被處理體的正上方形成電漿。另外,藉由一面於電極間形成和電場正交之磁場,一面進行蝕刻,使電子描繪螺旋軌道,可以增加與氣體分子的衝擊之機會,所以,可在被處理體之正上方實現高電漿密度。藉這些,可更高速地蝕刻。In the present embodiment, the plasma generating mechanism of the REI type is used to apply high-frequency power to the support stage 2 on which the lower electrode of the wafer W is placed, and plasma can be formed directly above the object to be processed. Further, by forming a magnetic field orthogonal to the electric field between the electrodes, etching is performed to cause the electrons to trace the spiral orbit, and the chance of impact with the gas molecules can be increased. Therefore, high plasma can be realized directly above the object to be processed. density. With this, it can be etched at a higher speed.
作為於第1蝕刻工程所使用的處理氣體,從以高速來蝕刻晶圓W之觀點而言,以使用反應性高之含有氟化合物氣體為佳。此處,氟化合物例如可舉:CF4 、C3 F8 、SF6 、S2 F1 0 、CHF3 、CH2 F2 、C4 F8 等。另外,也可以與這些氟化合物一同地例如使用Ar、Xe、Kr等之稀有氣體與N2 等之惰性氣體。As the processing gas used in the first etching process, it is preferable to use a fluorine-containing compound gas having high reactivity from the viewpoint of etching the wafer W at a high speed. Here, examples of the fluorine compound include CF 4 , C 3 F 8 , SF 6 , S 2 F 1 0 , CHF 3 , CH 2 F 2 , C 4 F 8 and the like. Further, as the fluorine compound, for example, a rare gas such as Ar, Xe or Kr or an inert gas such as N 2 may be used.
另外,藉由氣體導入機構18而透過氣體供給管線19,對晶圓W有效地供給熱(溫熱或冷熱)之傳熱媒體之氣體,係以特定壓力(背壓)被導入靜電夾頭6的表面與晶圓W的背面之間。此氣體例如可以使用He等。Further, the gas introduction means 18 passes through the gas supply line 19, and the gas of the heat medium (warm or cold) which is efficiently supplied to the wafer W is introduced into the electrostatic chuck 6 at a specific pressure (back pressure). Between the surface and the back of the wafer W. For this gas, for example, He or the like can be used.
電漿生成用之第1高頻電源15,為了形成所期望之電漿,其頻率及輸出被適當地設定。從提高晶圓W之正上方的電漿密度之觀點,以頻率為10MHz以上為佳。The first high-frequency power source 15 for plasma generation is appropriately set in order to form a desired plasma. From the viewpoint of increasing the density of the plasma directly above the wafer W, it is preferable that the frequency is 10 MHz or more.
為了使晶圓W之正上方的電漿密度提高,雙極子環狀磁鐵24a、24b雖對對向電極之支撐載置台2及蓮蓬頭20之間的處理空間施加磁場,但是,為了使其效果有效地發揮,以對處理空間能形成10000 μ T(100G)以上之磁場的強力磁鐵為佳。磁場愈強,雖認為可以愈增加提高電漿密度的效果,但是,從安全性的觀點而言,以100000 μ T(1kG)以下為佳。In order to increase the density of the plasma directly above the wafer W, the bipolar annular magnets 24a and 24b apply a magnetic field to the processing space between the support stage 2 and the shower head 20 of the counter electrode, but in order to make the effect effective. It is preferable to use a strong magnet that can form a magnetic field of 10000 μT (100 G) or more in the processing space. The stronger the magnetic field, the more the effect of increasing the plasma density can be increased, but from the viewpoint of safety, it is preferably 100000 μT (1 kG) or less.
在蝕刻工程中,如第4(a)圖所示般,例如藉由CF4 氣體電漿,進行Ti層103之蝕刻。此時,於本發明方法中,例如可進行90~140nm/min之高蝕刻速率的高速蝕刻。於4Pa以上之低壓的電漿蝕刻處理時,構成Ti層103之Ti,成為TiF4,藉由該低蒸汽壓而蒸發。藉由此低壓蝕刻機構,可防止籬笆之產生。然後,藉由蝕刻,形成Ti層103之Ti,除了以光罩層104而被遮住之區域,從SiO2 層102被除去。剩餘之Ti層103以和光罩層104同樣的圖案,如第4(b)圖所示般,被圖案化。In the etching process, as shown in Fig. 4(a), the Ti layer 103 is etched, for example, by CF 4 gas plasma. At this time, in the method of the present invention, for example, high-speed etching at a high etching rate of 90 to 140 nm/min can be performed. At a low-voltage plasma etching treatment of 4 Pa or more, Ti constituting the Ti layer 103 becomes TiF4, and is evaporated by the low vapor pressure. With this low-pressure etching mechanism, the occurrence of a fence can be prevented. Then, Ti which is formed into the Ti layer 103 by etching is removed from the SiO 2 layer 102 except for the region which is covered by the mask layer 104. The remaining Ti layer 103 is patterned in the same pattern as the mask layer 104 as shown in Fig. 4(b).
此處,說明確認本發明之效果的試驗結果。Here, the test results confirming the effects of the present invention will be described.
藉由和第1圖同樣構造之電漿蝕刻裝置100,對於具有和第4圖同樣構成之Ti層103的晶圓W,作為蝕刻氣體係使用CF4 與Ar,以下述所示條件,來實施Ti層103的電漿蝕刻。The wafer W having the Ti layer 103 having the same configuration as that of Fig. 4 is subjected to CF 4 and Ar as an etching gas system under the following conditions, using the plasma etching apparatus 100 having the same structure as that of Fig. 1 . Plasma etching of the Ti layer 103.
<條件1>磁場強度=12000 μ T(120G)斜度磁鐵;磁場傾斜=8.53deg;腔1內的壓力=4Pa(30mTorr);高頻電力=4000W;CF4 /Ar流量=300/600ml/min(sccm);上下部電極間距離(蓮蓬頭20的下面與支撐載置台2的上面之距離,以下相同)=40mm;He背壓(中心部/邊緣部)=1333/3332.5Pa(10/25Torr);蓮蓬頭20的溫度=60℃;腔1側壁的溫度=60℃;支撐載置台2的溫度=50℃;處理時間=53.7秒<Condition 1> Magnetic field strength = 12000 μ T (120 G) slope magnet; magnetic field tilt = 8.53 deg; pressure in chamber 1 = 4 Pa (30 mTorr); high frequency power = 4000 W; CF 4 / Ar flow = 300 / 600 ml / Min (sccm); distance between upper and lower electrodes (the distance between the lower surface of the shower head 20 and the upper surface of the support stage 2, the same below) = 40 mm; He back pressure (center/edge portion) = 1333/3332.5 Pa (10/25 Torr) ); the temperature of the shower head 20 = 60 ° C; the temperature of the side wall of the chamber 1 = 60 ° C; the temperature of the support table 2 = 50 ° C; processing time = 53.7 seconds
<條件2>將腔內壓力設為6.7Pa、處理時間94.8秒以外,和實施例1相同,實施電漿蝕刻。<Condition 2> Plasma etching was performed in the same manner as in Example 1 except that the pressure in the chamber was 6.7 Pa and the treatment time was 94.8 seconds.
電漿蝕刻處理後,藉由掃描型電子顯微鏡(SEM)來觀察條件1及條件2之個別的晶圓W,於條件2之情形,和條件1相比,濺鍍力較弱,儘管為高壓處理,於光罩層104的側壁觀察到縱條紋模樣之籬笆。相對於此,條件1的情形,沒有觀察到籬笆的產生(兩者之結果都省略圖示)。After the plasma etching treatment, the individual wafers W of Condition 1 and Condition 2 were observed by a scanning electron microscope (SEM). In the case of Condition 2, the sputtering force was weaker than Condition 1, although it was a high voltage. In the treatment, a vertical stripe pattern of the fence is observed on the side wall of the mask layer 104. On the other hand, in the case of Condition 1, no occurrence of a fence was observed (both of which are omitted from the results).
另外,在條件1之蝕刻後,將腔1內的堆積物做XPS分析,檢測到Ti之峰值。第5圖係表示將此Ti峰值予以波形分離之結果。由此第5圖,證明了包含於堆積物中的Ti,多數以TiF4 形式存在。Further, after the etching of Condition 1, the deposit in the chamber 1 was subjected to XPS analysis, and the peak of Ti was detected. Fig. 5 shows the result of waveform separation of this Ti peak. From Fig. 5, it is proved that Ti contained in the deposit is mostly present in the form of TiF 4 .
在6.7Pa之高壓處理之條件2中,蝕刻速率雖高至140nm/min,但是,如前述般,由於產生籬笆,係以含有氟氣體電漿來蝕刻Ti層103時所特有的現象,確認到蝕刻速率提升及籬笆抑制具有妥協之關係。相對於此,在條件1中,可一面防止籬笆之產生,該蝕刻速率為90nm/min,能以實用上很足夠之蝕刻速率來實現高速蝕刻。In the condition 2 of the high pressure treatment of 6.7 Pa, the etching rate was as high as 140 nm/min. However, as described above, it was confirmed that a fence was formed by etching a Ti layer 103 containing a fluorine gas plasma. The etch rate increase and fence suppression have a compromise relationship. On the other hand, in the condition 1, the occurrence of the fence can be prevented, and the etching rate is 90 nm/min, and high-speed etching can be realized at a practically sufficient etching rate.
由以上,藉由含有氟氣體之電漿,藉由以4Pa以下之低壓條件來進行蝕刻處理,將構成Ti層103之Ti改變為TiF4,使其蒸發而予以除去。藉由此方法之蝕刻中,確認到可以防止Ti由於濺鍍而附著於光阻與其他之金屬膜之籬笆的產生。From the above, the plasma containing the fluorine gas is subjected to an etching treatment under a low pressure condition of 4 Pa or less, and Ti which constitutes the Ti layer 103 is changed to TiF4, and is evaporated and removed. In the etching by this method, it was confirmed that the occurrence of the barrier of Ti adhering to the photoresist and other metal films due to sputtering can be prevented.
接著,說明於前述第1實施形態之電漿蝕刻方法組合腔1之清潔處理之本發明的第2實施形態之電漿蝕刻方法。如實施第1實施形態之電漿蝕刻處理時,會於腔1內產生多量的堆積物。將此堆積物做XPS分析時,知道TiF4 與CF系化合物混合存在著。此堆積物為粉體狀,如附著於晶圓W的周圍之零件,特別是上部頂板(配置於第1圖之蓮蓬頭20的下部之構件,省略圖示)而堆積時,成為微粒子的原因。因此,藉由於電漿蝕刻處理組合乾清潔處理而實施,可進行穩定之電漿蝕刻處理。Next, a plasma etching method according to a second embodiment of the present invention in which the plasma etching method is combined with the cleaning process of the plasma etching method according to the first embodiment will be described. When the plasma etching treatment of the first embodiment is carried out, a large amount of deposits are generated in the chamber 1. When this deposit was subjected to XPS analysis, it was known that TiF 4 and CF compound were mixed. This deposit is in the form of a powder, and is a member attached to the periphery of the wafer W, particularly when the upper top plate (the member disposed at the lower portion of the shower head 20 in FIG. 1 is omitted) is deposited as a fine particle. Therefore, by performing a combination of the plasma etching treatment and the dry cleaning treatment, a stable plasma etching treatment can be performed.
第6圖矽表示關於第2實施形態之電漿蝕刻方法的處理步驟之流程圖。首先,在步驟S101中,將形成有Ti層103之Ti一般晶圓搬入腔1內,在步驟S102中,實施電漿蝕刻處理。此步驟S101、步驟S102中之電漿蝕刻處理,係與前述第1實施形態同樣地進行。Fig. 6 is a flow chart showing the processing procedure of the plasma etching method of the second embodiment. First, in step S101, the Ti general wafer on which the Ti layer 103 is formed is carried into the chamber 1, and in step S102, a plasma etching process is performed. The plasma etching treatment in the steps S101 and S102 is performed in the same manner as in the first embodiment.
電漿蝕刻處理結束後,在步驟S103中,於蝕刻後進行壓力調整等之所需要的處理後,打開第1圖之閘門閥13,將晶圓W從腔1搬出。接著,在步驟S104中,將裸Si晶圓搬入腔1內。裸Si晶圓係沒有形成薄膜等之乾淨晶圓。After the plasma etching process is completed, in step S103, after the necessary processing such as pressure adjustment after etching, the gate valve 13 of Fig. 1 is opened, and the wafer W is carried out from the chamber 1. Next, in step S104, the bare Si wafer is carried into the chamber 1. A bare Si wafer does not have a clean wafer such as a thin film.
在步驟S105中,對於裸Si晶圓實施電漿清潔處理。電漿清潔中之處理氣體例如可以適當地使用包含NF3 、CF4 等之氟化合物與O2 等之氣體。另外,處理氣體中,例如可以包含Ar、Xe、Kr、He等之稀有氣體與N2 等之惰性氣體。步驟S105中之清潔處理的壓力,由提高清潔效率之觀點而言,以6.7Pa以下(即0~6.7Pa之範圍)為佳,4Pa以下更佳,期望在2Pa以下。另外,清潔處理之溫度以50℃以上為佳,80℃以上更佳。In step S105, a plasma cleaning process is performed on the bare Si wafer. For the processing gas in the plasma cleaning, for example, a fluorine compound containing NF 3 , CF 4 or the like and a gas such as O 2 may be suitably used. Further, the processing gas may contain, for example, a rare gas such as Ar, Xe, Kr, or He or an inert gas such as N 2 . The pressure of the cleaning treatment in the step S105 is preferably 6.7 Pa or less (that is, a range of 0 to 6.7 Pa) from the viewpoint of improving the cleaning efficiency, more preferably 4 Pa or less, and desirably 2 Pa or less. Further, the temperature of the cleaning treatment is preferably 50 ° C or more, more preferably 80 ° C or more.
此處,說明就處理氣體之種類對清潔效果之影響進行檢討的結果。處理氣體係就CF4 /Ar之混合氣體、NF3 /Ar之混合氣體、O2 氣體(單獨)之三種,以以下所示條件實施清潔,測定上部頂板中之堆積物的厚度。Here, the results of reviewing the influence of the type of the treatment gas on the cleaning effect will be described. The treatment gas system was cleaned by three kinds of a mixed gas of CF 4 /Ar, a mixed gas of NF 3 /Ar, and O 2 gas (separate) under the conditions shown below, and the thickness of the deposit in the upper top plate was measured.
CF4 /Ar氣體:磁場強度=12000 μ T(120G)斜度磁鐵;磁場傾斜=8.53deg;腔1內的壓力=4Pa(30mTorr);高頻電力=4000W;CF4 /Ar流量=300/600ml/min(sccm);上下部電極間距離=40mm;He背壓(中心部/邊緣部)=1333/3332.5Pa(10/25Torr);蓮蓬頭20的溫度=80℃;腔1側壁的溫度=60℃;支撐載置台2的溫度=50℃;處理時間=90秒NF3 /Ar氣體:除了使用NF3 /Ar氣體以外,以和CF4 /Ar氣體相同之條件來實施。CF 4 /Ar gas: magnetic field strength = 12000 μ T (120G) slope magnet; magnetic field tilt = 8.53 deg; pressure in chamber 1 = 4 Pa (30 mTorr); high frequency power = 4000 W; CF 4 / Ar flow = 300 / 600ml/min (sccm); distance between upper and lower electrodes = 40mm; He back pressure (center/edge) = 1333/3332.5Pa (10/25Torr); temperature of shower head 20 = 80 °C; temperature of side wall of cavity 1 = 60 ° C; temperature of support table 2 = 50 ° C; treatment time = 90 seconds NF 3 /Ar gas: Except that NF 3 /Ar gas was used, it was carried out under the same conditions as CF 4 /Ar gas.
O2 氣體:O2 流量=900ml/min(sccm)、磁場傾斜=12.88deg以外,以和CF4 /Ar氣體相同之條件來實施。O 2 gas: O 2 flow rate = 900 ml/min (sccm), magnetic field tilt = 12.88 deg, and was carried out under the same conditions as CF 4 /Ar gas.
堆積物之測定點,設為上部頂板的中央部(C)以及最邊緣部(E3)、及這些之間,從中央部(C)側以略等間隔依序為中間部(M)、第1邊緣部(E1)、第2邊緣部(E2)(以下,相同)。第7圖係表示該結果。The measurement point of the deposit is defined as the center portion (C) and the edge portion (E3) of the upper top plate, and between the middle portion (C) and the intermediate portion (M), at a slight interval from the center portion (C) side. 1 edge portion (E1) and second edge portion (E2) (the same applies hereinafter). Figure 7 shows the result.
由第7圖,效果最高的氣體為NF3 /Ar,O2 具有將上部頂板幾乎全部清潔之作用,CF4 /Ar係和其他二種氣體系相比,知道第1邊緣部(E1)的清潔效果比較薄弱。由此結果,例如,在NF3 /Ar氣體中,以單獨處理,另外,在CF4 /Ar氣體處理中,和O2 氣體處理組合,例如,藉由在CF4 /Ar氣體處理之後,實施O2 氣體處理,可以期待充分之清潔效果。From Fig. 7, the gas with the highest effect is NF 3 /Ar, and O 2 has the effect of almost completely cleaning the upper top plate. The CF 4 /Ar system knows the first edge portion (E1) compared with the other two gas systems. The cleaning effect is weak. As a result, for example, in the NF 3 /Ar gas, it is treated separately, and in the CF 4 /Ar gas treatment, in combination with the O 2 gas treatment, for example, after the CF 4 /Ar gas treatment, O 2 gas treatment can be expected to have sufficient cleaning effect.
接著,第8圖係表示就處理壓力對清潔效果之影響所進行檢討之結果。使用O2 氣體(單獨),以以下所示條件改變壓力(氣體流量),實施清潔,測定上部頂板中之堆積物的厚度。Next, Fig. 8 shows the results of a review of the effect of the treatment pressure on the cleaning effect. The pressure (gas flow rate) was changed using O 2 gas (separate) under the conditions shown below, and cleaning was performed to measure the thickness of the deposit in the upper top plate.
清潔條件:磁場強度=12000 μ T(120G)斜度磁鐵;磁場傾斜=12.88deg;腔1內的壓力=4Pa(30mTorr)或2Pa(15mTorr);高頻電力=4000W;O2 流量=900ml/min(sccm)或450ml/min(sccm);上下部電極間距離=40mm;He背壓(中心部/邊緣部)=1333/3332.5Pa(10/25Torr);蓮蓬頭20的溫度=80℃;腔1側壁的溫度=60℃;支撐載置台2的溫度=50℃;處理時間=90秒Cleaning conditions: magnetic field strength = 12000 μ T (120G) slope magnet; magnetic field tilt = 12.88 deg; pressure in chamber 1 = 4 Pa (30 mTorr) or 2 Pa (15 mTorr); high frequency power = 4000 W; O 2 flow = 900 ml / Min (sccm) or 450ml/min (sccm); distance between upper and lower electrodes = 40mm; He back pressure (center/edge) = 1333/3332.5Pa (10/25Torr); temperature of shower head 20 = 80 °C; cavity 1 side wall temperature = 60 ° C; support table 2 temperature = 50 ° C; processing time = 90 seconds
由第8圖,藉由將腔內壓力從4Pa(30mTorr)降低為2Pa(15mTorr),在上部頂板之幾乎全部區域中,堆積物的膜厚變得更薄,顯示清潔效果獲得提升。From Fig. 8, by reducing the pressure in the chamber from 4 Pa (30 mTorr) to 2 Pa (15 mTorr), the film thickness of the deposit becomes thinner in almost the entire area of the upper top plate, and the cleaning effect is improved.
在第6圖之處理步驟中,清潔結束後,進行壓力調整等之所需要的處理後,在步驟S106中,打開第1圖之閘門閥13,將晶圓W從腔1搬出。接著,再度回到步驟S101,進行新的Ti一般晶圓之處理。清潔雖也可在蝕刻處理一定片數(例如,1批)的晶圓W後才進行,但是,如第6圖般,每次電漿蝕刻處理1片的Ti一般晶圓後,便實施腔1之電漿清潔為佳。藉此,可除去腔1中之堆積物,一面防止微粒子污染,一面可進行穩定的電漿蝕刻處理。In the processing step of Fig. 6, after the cleaning is completed, the necessary processing such as pressure adjustment is performed, and in step S106, the gate valve 13 of Fig. 1 is opened to carry out the wafer W from the chamber 1. Next, the process returns to step S101 again to perform processing of a new Ti general wafer. Cleaning can also be performed after etching a certain number of wafers (for example, one batch) of wafer W. However, as shown in Fig. 6, each time the plasma is etched to treat one piece of Ti wafer, the cavity is implemented. 1 plasma cleaning is better. Thereby, the deposit in the chamber 1 can be removed, and a stable plasma etching treatment can be performed while preventing the contamination of the particles.
第9圖係表示以微粒子計數器來測定依據第6圖之流程圖,以以下之條件來電漿蝕刻處理Ti一般晶圓時之0.5 μ m以上的微粒子數之結果。另外,為了比較,也一併記載不實施清潔時的結果。Fig. 9 is a view showing the result of measuring the number of fine particles of 0.5 μm or more in the case where the Ti general wafer is plasma-etched by the microparticle counter according to the flow chart of Fig. 6 under the following conditions. In addition, for comparison, the results when cleaning is not performed are also described together.
蝕刻條件:磁場強度=12000 μ T(120G)斜度磁鐵;磁場傾斜=8.53deg;腔1內的壓力=4Pa(30mTorr);高頻電力=4000W;CF4 /Ar流量=300/600ml/min(sccm);上下部電極間距離=40mm;He背壓(中心部/邊緣部)=1333/3332.5Pa(10/25Torr);蓮蓬頭20的溫度=60℃;腔1側壁的溫度=60℃;支撐載置台2的溫度=50℃;處理時間=90秒清潔條件:磁場強度=12000 μ T(120G)斜度磁鐵;磁場傾斜=8.53deg;腔1內的壓力=4Pa(30mTorr);高頻電力=4000W;NF3 /Ar流量=300/600ml/min(sccm);上下部電極間距離=40mm;He背壓(中心部/邊緣部)=1333/3332.5Pa(10/25Torr);蓮蓬頭20的溫度=80℃;腔1側壁的溫度=60℃;支撐載置台2的溫度=50℃;處理時間=90秒Etching conditions: magnetic field strength = 12000 μ T (120G) slope magnet; magnetic field tilt = 8.53 deg; pressure in chamber 1 = 4 Pa (30 mTorr); high frequency power = 4000 W; CF 4 / Ar flow = 300 / 600 ml / min (sccm); distance between upper and lower electrodes = 40 mm; He back pressure (center/edge portion) = 1333/3332.5 Pa (10/25 Torr); temperature of shower head 20 = 60 ° C; temperature of side wall of chamber 1 = 60 ° C; Supporting the temperature of the mounting table 2 = 50 ° C; processing time = 90 seconds Cleaning conditions: magnetic field strength = 12000 μ T (120G) slope magnet; magnetic field tilt = 8.53 deg; pressure in chamber 1 = 4 Pa (30 mTorr); Power = 4000W; NF 3 /Ar flow = 300/600ml/min (sccm); distance between upper and lower electrodes = 40mm; He back pressure (center/edge) = 1333/3332.5Pa (10/25Torr); shower head 20 Temperature = 80 ° C; temperature of the side wall of the chamber 1 = 60 ° C; temperature of the support table 2 = 50 ° C; processing time = 90 seconds
由第9圖,在不實施電漿清潔時,隨著Ti一般晶圓之處理片數增加,微粒子數增加。相對於此,藉由蝕刻批次式之電漿清潔,微粒子幾乎不會發生,顯示可以製造可靠性高的半導體裝置。According to Fig. 9, when the plasma cleaning is not performed, the number of processed wafers increases with the number of wafers of Ti, and the number of fine particles increases. On the other hand, by the plasmon type plasma cleaning, the fine particles hardly occur, and it is revealed that a highly reliable semiconductor device can be manufactured.
以上,雖說明本發明之實施形態,但是,本發明並不受限於前述實施形態,可以有種種變形之可能。Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications are possible.
例如,在前述實施形態中,作為磁控管RIE電漿蝕刻裝置100之磁場形成手段,雖使用雙極子磁鐵,但是,並不受限於此,只要在本發明之範圍的壓力下可以形成電漿,也可以使用不利用磁場之容量耦合型與感應耦合型等之種種的電漿蝕刻裝置100。For example, in the above-described embodiment, the magnetic field forming means of the magnetron RIE plasma etching apparatus 100 uses a dipole magnet, but is not limited thereto, and may be formed under the pressure of the range of the present invention. As the slurry, various plasma etching apparatuses 100 such as a capacity coupling type and an inductive coupling type which do not use a magnetic field can be used.
另外,於前述實施形態中,雖舉依據光罩104之圖案來蝕刻Ti層103之例子,但是,並不受限於此,可以適用於Ti層之蝕刻全體。Further, in the above embodiment, the Ti layer 103 is etched according to the pattern of the mask 104. However, the present invention is not limited thereto, and can be applied to the entire etching of the Ti layer.
1...腔(處理容器)1. . . Cavity (processing container)
2...支撐載置台(電極)2. . . Supporting table (electrode)
12...排氣系統12. . . Exhaust system
15...第1高頻電源15. . . First high frequency power supply
17...溫度調節媒體室17. . . Temperature regulation media room
18...氣體導入機構18. . . Gas introduction mechanism
20...蓮蓬頭(電極)20. . . Shower head (electrode)
23...處理氣體供給系統twenty three. . . Process gas supply system
24a、24b...雙極子環狀磁鐵24a, 24b. . . Bipolar ring magnet
100...電漿蝕刻裝置100. . . Plasma etching device
101...Si基板101. . . Si substrate
102...SiO2 層102. . . SiO 2 layer
103...Ti層103. . . Ti layer
104...光罩層104. . . Mask layer
W...晶圓W. . . Wafer
第1圖係表示實施關於本發明之方法之磁控管RIE電漿蝕刻裝置的概略構造剖面圖。Fig. 1 is a schematic cross-sectional view showing a magnetron RIE plasma etching apparatus for carrying out the method of the present invention.
第2圖係模型地表示配置於第1圖之裝置的腔之周圍的狀態之雙極子環型磁鐵之水平剖面圖。Fig. 2 is a horizontal sectional view schematically showing a bipolar ring magnet arranged in a state around the cavity of the apparatus of Fig. 1.
第3圖係說明形成於腔內之電場及磁場之模型圖。Figure 3 is a model diagram showing the electric and magnetic fields formed in the cavity.
第4圖係表示關於本發明之第1實施形態之電極蝕刻方法的步驟,(a)係蝕刻時,(b)係表示蝕刻工程結束後之狀態圖。Fig. 4 is a view showing the steps of the electrode etching method according to the first embodiment of the present invention, wherein (a) is etching, and (b) is a state diagram after completion of etching.
第5圖係表示電漿蝕刻處理後之腔內堆積物的XPS分析所致之波形分離結果曲線圖。Fig. 5 is a graph showing the results of waveform separation results by XPS analysis of the deposits in the cavity after the plasma etching treatment.
第6圖係表示關於本發明之第2實施形態之電漿蝕刻方法的處理步驟之流程圖。Fig. 6 is a flow chart showing the processing procedure of the plasma etching method according to the second embodiment of the present invention.
第7圖係表示改變處理氣體而施以清潔處理後之上部頂板中之堆積物的厚度之測定結果曲線圖。Fig. 7 is a graph showing the measurement results of the thickness of the deposit in the top plate after the cleaning treatment is performed by changing the processing gas.
第8圖係表示改變壓力而施以清潔處理後之上部頂板中之堆積物的厚度之測定結果曲線圖。Fig. 8 is a graph showing the measurement results of the thickness of the deposit in the top plate after the cleaning treatment is performed by changing the pressure.
第9圖係表示電漿蝕刻中之晶圓處理片數和微粒子之關係曲線圖。Fig. 9 is a graph showing the relationship between the number of wafer processed sheets and the fine particles in plasma etching.
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KR101139189B1 (en) * | 2007-03-29 | 2012-04-26 | 도쿄엘렉트론가부시키가이샤 | Plasma etching method, plasma processing apparatus, control program and computer redable storage medium |
KR20120014699A (en) * | 2010-08-10 | 2012-02-20 | 주식회사 하이닉스반도체 | Manufacturing method of semiconductor device |
CN102820224A (en) * | 2011-06-09 | 2012-12-12 | 上海中科高等研究院 | Interface layer treatment method for TFT (thin film transistor) dry etching process |
JP5982223B2 (en) * | 2012-08-27 | 2016-08-31 | 東京エレクトロン株式会社 | Plasma processing method and plasma processing apparatus |
JP6422262B2 (en) | 2013-10-24 | 2018-11-14 | 東京エレクトロン株式会社 | Plasma processing method and plasma processing apparatus |
JP6504827B2 (en) * | 2015-01-16 | 2019-04-24 | 東京エレクトロン株式会社 | Etching method |
JP2016157793A (en) * | 2015-02-24 | 2016-09-01 | 東京エレクトロン株式会社 | Etching method |
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TW434723B (en) * | 1997-03-17 | 2001-05-16 | Matsushita Electric Ind Co Ltd | Method and apparatus for plasma processing |
JP3626833B2 (en) * | 1997-05-22 | 2005-03-09 | 東京エレクトロン株式会社 | Film forming apparatus and film forming method |
JPH11140675A (en) * | 1997-11-14 | 1999-05-25 | Sony Corp | Method of cleaning vacuum chamber |
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JP4815724B2 (en) * | 2000-09-08 | 2011-11-16 | 東京エレクトロン株式会社 | Shower head structure and film forming apparatus |
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JP2004200378A (en) * | 2002-12-18 | 2004-07-15 | Semiconductor Energy Lab Co Ltd | Manufacturing method of semiconductor device |
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US5356478A (en) * | 1992-06-22 | 1994-10-18 | Lam Research Corporation | Plasma cleaning method for removing residues in a plasma treatment chamber |
US6635185B2 (en) * | 1997-12-31 | 2003-10-21 | Alliedsignal Inc. | Method of etching and cleaning using fluorinated carbonyl compounds |
US20020014625A1 (en) * | 2000-08-02 | 2002-02-07 | Taketomi Asami | Semiconductor device and method of manufacturing the same |
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