TWI416493B - Liquid crystal display - Google Patents
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Description
本發明係關於一種液晶顯示器。The present invention relates to a liquid crystal display.
液晶顯示器之液晶分子具有這樣一種特性:如果加載於液晶層兩端之電場方向長時間保持不變,那麼液晶分子之特性便會遭到破壞,即無法再因應電場之變化來轉動而形成不同之灰階。因此,每隔一定時間就必須改變電場方向以使液晶分子反轉,從而避免液晶分子之特性遭到破壞。為此,業界發展了多種技術來實現液晶分子之反轉。其中,以多列反轉之驅動方式之效果較好。The liquid crystal molecules of the liquid crystal display have such a characteristic that if the direction of the electric field applied to both ends of the liquid crystal layer remains unchanged for a long time, the characteristics of the liquid crystal molecules are destroyed, that is, they cannot be rotated in response to the change of the electric field to form a different one. Grayscale. Therefore, it is necessary to change the direction of the electric field at regular intervals to invert the liquid crystal molecules, thereby preventing the characteristics of the liquid crystal molecules from being destroyed. To this end, the industry has developed a variety of techniques to achieve the reversal of liquid crystal molecules. Among them, the effect of the multi-column inversion driving method is better.
現以多列反轉驅動方式中之二列反轉驅動方式為例來說明,即液晶顯示器之第1列與第2列中各相同列之畫素所加載電壓之極性一致,第3列與第4列中各相同列之畫素所加載電壓之極性一致,且第2列與第3列中各相同列之畫素所加載電壓之極性相反,其他各列畫素所加載電壓極性之規律與第1列至第4列之規律相同。各畫素所加載電壓之極性逐幀反轉。其中,液晶顯示器之畫素所加載電壓為灰階電壓與公共電壓之差,且定義當灰階電壓大於公共電壓時,畫素所加載電壓為正極性,並定義該灰階電壓為正極性灰階電壓;而當灰階電壓小於公共電壓時,畫素所加載電壓為負極性,並定義該灰階電壓為負極性灰階電壓。Now, the two-column inversion driving method of the multi-column inversion driving method is taken as an example, that is, the polarities of the voltages applied to the pixels of the same column in the first column and the second column of the liquid crystal display are the same, and the third column and The polarities of the voltages applied to the pixels in the same column in the fourth column are the same, and the polarities of the voltages applied to the pixels in the same column in the second column and the third column are opposite, and the polarities of the voltages of the other columns are loaded. The same rules as in the first column to the fourth column. The polarity of the voltage applied to each pixel is inverted frame by frame. Wherein, the voltage applied to the pixel of the liquid crystal display is the difference between the gray scale voltage and the common voltage, and the voltage applied to the pixel is positive when the gray scale voltage is greater than the common voltage, and the gray scale voltage is defined as the positive gray. The step voltage; when the gray scale voltage is less than the common voltage, the voltage applied to the pixel is negative, and the gray scale voltage is defined as the negative gray scale voltage.
然而,當顯示相同之灰階時,液晶顯示器之資料線在傳輸灰階電壓之過程中會有所損耗,且灰階電壓被傳輸之越遠,其損耗越多。故該灰階電壓在傳輸過程中並非理想之方波訊號,即灰階電壓在實際傳輸過程中不能從負極性灰階電壓立即變為正極性灰階電壓,或者從正極性灰階電壓立即變為負極性灰階電壓,而是逐漸變化到所需極性之 灰階電壓。從而,當第i列之畫素所加載電壓之極性與第i+1列之畫素所加載電壓之極性相同,且與第i-1列之畫素所加載電壓之極性相反時,則該第i列畫素所加載之電壓小於該第i+1列畫素所加載之電壓。故該液晶顯示器所顯示之圖像會出現亮線與暗線,即奇偶線現象,且對於該液晶顯示器之液晶面板之中部及下部之圖像,該奇偶線現象更加嚴重。其中,i為自然數,且2≦i≦L,L為該液晶顯示器之畫素之總列數,且亦為自然數。However, when the same gray scale is displayed, the data line of the liquid crystal display will be lost in the process of transmitting the gray scale voltage, and the farther the gray scale voltage is transmitted, the more the loss is. Therefore, the gray scale voltage is not an ideal square wave signal during the transmission process, that is, the gray scale voltage cannot immediately change from the negative gray scale voltage to the positive gray scale voltage during the actual transmission process, or immediately changes from the positive gray scale voltage. Is the negative gray scale voltage, but gradually changes to the desired polarity Gray scale voltage. Therefore, when the polarity of the voltage applied to the pixel of the i-th column is the same as the polarity of the voltage applied to the pixel of the (i+1)th column, and the polarity of the voltage applied to the pixel of the i-1th column is opposite, then The voltage loaded by the i-th column is less than the voltage loaded by the i+1th column of pixels. Therefore, the image displayed on the liquid crystal display may have a bright line and a dark line, that is, an even line phenomenon, and the parity line phenomenon is more serious for the image of the middle portion and the lower portion of the liquid crystal panel of the liquid crystal display. Where i is a natural number, and 2≦i≦L, L is the total number of pixels of the liquid crystal display, and is also a natural number.
有鑑於此,提供一種能夠改善顯示圖像時奇偶線現象之液晶顯示器實為必需。In view of the above, it is necessary to provide a liquid crystal display capable of improving the phenomenon of the odd-even line when displaying an image.
一種液晶顯示器,其包括一液晶面板及一資料,驅動電路。該液晶面板包括複數畫素。對於同一灰階,該資料驅動電路輸出複數第一灰階電壓以驅動無極性反轉列之畫素,並輸出複數第二灰階電壓以驅動極性反轉列之畫素。每一該些第二灰階電壓包括一第一子灰階電壓及一第二子灰階電壓,該些第一子灰階電壓及該些第二子灰階電壓被連續輸出以驅動該極性反轉列之同一畫素。其中,該些第一子灰階電壓之絕對值大於該第些二子灰階電壓之絕對值,且該些第二子灰階電壓之絕對值與該些第一灰階電壓之絕對值相等。A liquid crystal display includes a liquid crystal panel and a data and driving circuit. The liquid crystal panel includes a plurality of pixels. For the same gray level, the data driving circuit outputs a complex first gray scale voltage to drive the pixels of the polarity inversion reverse column, and outputs a plurality of second gray scale voltages to drive the pixels of the polarity inversion column. Each of the second gray scale voltages includes a first sub-gray voltage and a second sub-gray voltage, and the first sub-gray voltage and the second sub-gray voltage are continuously output to drive the polarity Reverse the same pixel in the column. The absolute value of the first sub-gray voltages is greater than the absolute values of the second sub-gray voltages, and the absolute values of the second sub-gray voltages are equal to the absolute values of the first gray-scale voltages.
一種液晶顯示器,其包括一液晶面板及一資料驅動電路。該液晶面板包括至少二顯示區。每一該些顯示區包括至少一列畫素。對於同一灰階,該資料驅動電路輸出複數第一灰階電壓以驅動無極性反轉列之畫素,並輸出複數第二灰階電壓對極性反轉列之畫素進行過電壓驅動。且對於同一顯示區,該些第二灰階電壓對極性反轉列畫素之過驅動程度相同,而對於不同之顯示區,該些第二灰階電壓對極性反轉列畫素之過驅動程度隨該顯示區與該資料驅動電 路之間之距離的增加而增加。A liquid crystal display includes a liquid crystal panel and a data driving circuit. The liquid crystal panel includes at least two display areas. Each of the display areas includes at least one column of pixels. For the same gray level, the data driving circuit outputs a complex first gray scale voltage to drive the pixels of the polarity inversion reverse column, and outputs a complex second gray scale voltage to drive the pixels of the polarity inversion column to be overvoltage driven. And for the same display area, the second gray scale voltages are driven to the same extent by the polarity inversion column pixels, and for the different display areas, the second gray scale voltages are overdriven by the polarity inversion column pixels. Degree with the display area and the data drive The distance between the roads increases as the distance increases.
相較於先前技術,在本發明之液晶顯示器中,由於該資料驅動電路輸出該第二灰階電壓以驅動該極性反轉列之同一畫素,故,當該第二灰階電壓之第一子灰階電壓經過傳輸衰減輸出後,其實際加載於該畫素之灰階電壓能夠達到與該第一灰階電壓基本相同。從而,當該液晶顯示器顯示同一灰階時,該極性反轉列之畫素所加載之電壓與該無極性反轉列之畫素所加載之電壓之絕對值基本一致,進而能夠改善該液晶顯示器顯示圖像時所出現之奇偶線現象。Compared with the prior art, in the liquid crystal display of the present invention, since the data driving circuit outputs the second gray scale voltage to drive the same pixel of the polarity inversion column, when the second gray scale voltage is the first After the sub-gray voltage is transmitted and attenuated, the gray scale voltage actually applied to the pixel can be substantially the same as the first gray scale voltage. Therefore, when the liquid crystal display displays the same gray scale, the voltage loaded by the pixel of the polarity inversion column substantially coincides with the absolute value of the voltage applied by the pixel of the polarity inversion column, thereby improving the liquid crystal display. The parity line phenomenon that occurs when an image is displayed.
相較於先前技術,在本發明之液晶顯示器中,由於該資料驅動電路輸出複數第二灰階電壓對該極性反轉列之畫素進行過電壓驅動,從而能夠改善該液晶顯示器顯示圖像時所出現之奇偶線現象。此外,因為該第二灰階電壓對該極性反轉列畫素之過驅動程度係隨該顯示區與該資料驅動電路之間之距離的增加而增加的,從而亦能夠改善該第二灰階電壓在傳輸之過程中衰減越來越多之問題。Compared with the prior art, in the liquid crystal display of the present invention, since the data driving circuit outputs a plurality of second gray scale voltages to overvoltage driving the pixels of the polarity inversion column, the liquid crystal display can be improved when the image is displayed. The occurrence of the parity line phenomenon. In addition, since the degree of overdrive of the polarity inversion column pixel of the second gray scale voltage increases as the distance between the display region and the data driving circuit increases, the second gray scale can also be improved. The voltage is attenuating more and more during the transmission process.
請參閱圖1,其係本發明液晶顯示器一較佳實施方式之示意圖。該液晶顯示器2包括一液晶面板20、一時序控制電路21、一掃描驅動電路22、一資料驅動電路23、一公共電壓產生電路24、一伽瑪電壓產生電路25、多列相互平行之掃描線G1 ~GL (L>1)、多行相互平行並分別與該多列掃描線G1 ~GL 絕緣相交之資料線D1 ~DM (M>1)。該多列掃描線G1 ~GL 與該多行資料線D1 ~DM 將該液晶面板20劃分為複數畫素205,每一畫素205包括一鄰近該掃描線GL 與該資料線DM 交叉處之薄膜電晶體201、一畫素電極202、一與該畫素電極202相對設置之公共電極203及夾於該二電極202、203之間的液晶分子,該薄膜電晶體201之閘極g與該掃描線GL 連接,該薄膜電晶體201之源極s與該資 料線DM 連接,該薄膜電晶體201之汲極d與該畫素電極202連接,該複數畫素205之公共電極203係共用的。且沿平行於該資料線DM 之方向,對該液晶面板20進行三等分,並分別定義為一第一顯示區210、一第二顯示區220及一第三顯示區230。其中,該第一顯示區210臨近該資料驅動電路23,該第三顯示區230遠離該資料驅動電路23,該第二顯示區220介於該第一顯示區210與該第三顯示區230之間。Please refer to FIG. 1, which is a schematic diagram of a preferred embodiment of a liquid crystal display of the present invention. The liquid crystal display 2 includes a liquid crystal panel 20, a timing control circuit 21, a scan driving circuit 22, a data driving circuit 23, a common voltage generating circuit 24, a gamma voltage generating circuit 25, and a plurality of columns parallel to each other. G 1 to G L (L>1), a plurality of lines parallel to each other and insulated from the multi-column scanning lines G 1 to G L by data lines D 1 to D M (M>1). The multi-column scan lines G 1 -G L and the multi-row data lines D 1 -D M divide the liquid crystal panel 20 into a plurality of pixels 205, and each pixel 205 includes a neighboring scan line G L and the data line a thin film transistor 201 at a D M intersection, a pixel electrode 202, a common electrode 203 disposed opposite the pixel electrode 202, and liquid crystal molecules sandwiched between the two electrodes 202, 203, the thin film transistor 201 The gate electrode g is connected to the scan line G L , the source s of the thin film transistor 201 is connected to the data line D M , and the drain d of the thin film transistor 201 is connected to the pixel electrode 202 , the complex pixel 205 The common electrode 203 is common. The liquid crystal panel 20 is halved in a direction parallel to the data line D M , and is defined as a first display area 210 , a second display area 220 , and a third display area 230 . The first display area 210 is adjacent to the data driving circuit 23, and the third display area 230 is away from the data driving circuit 23. The second display area 220 is interposed between the first display area 210 and the third display area 230. between.
該公共電壓產生電路24用於向該公共電極203提供一公共電壓(Vcom)。該時序控制電路21用於接收一外部電路(如:視頻訊號處理電路)10所提供之圖像訊號及控制訊號,並輸出控制訊號控制該掃描驅動電路22、該伽瑪電壓產生電路25及該資料驅動電路23工作,並向該資料驅動電路23傳送相應之視頻訊號。該伽瑪電壓產生電路25用於輸出複數伽瑪電壓到該資料驅動電路23。該掃描驅動電路22輸出之掃描電壓藉由該多列掃描線GL加載於相應之薄膜電晶體201之閘極g上,將相應之薄膜電晶體201打開。該資料驅動電路23根據接收到之該視頻訊號及該伽瑪電壓對應輸出複數灰階電壓,該灰階電壓藉由該多行資料線DM 加載於相應之薄膜電晶體201之源極s上。如果此時該薄膜電晶體201處於打開狀態,則該灰階電壓可傳送到該薄膜電晶體201之汲極d並加載於該畫素電極202上。該畫素電極202與該公共電極203間會產生一電場以控制液晶分子之旋轉,從而使該液晶面板20顯示圖像。其中,該伽瑪電壓產生電路25輸出之伽瑪電壓係相對於該公共電壓之極性反轉訊號,大於該公共電壓之伽瑪電壓定義為正極性伽瑪電壓,小於該公共電壓之伽瑪電壓定義為負極性伽瑪電壓。The common voltage generating circuit 24 is for supplying a common voltage (Vcom) to the common electrode 203. The timing control circuit 21 is configured to receive an image signal and a control signal provided by an external circuit (eg, a video signal processing circuit) 10, and output a control signal to control the scan driving circuit 22, the gamma voltage generating circuit 25, and the The data driving circuit 23 operates and transmits a corresponding video signal to the data driving circuit 23. The gamma voltage generating circuit 25 is for outputting a complex gamma voltage to the data driving circuit 23. The scan voltage outputted by the scan driving circuit 22 is loaded on the gate g of the corresponding thin film transistor 201 by the multi-row scan line GL, and the corresponding thin film transistor 201 is turned on. The data driving circuit 23 outputs a complex gray scale voltage corresponding to the received video signal and the gamma voltage, and the gray scale voltage is loaded on the source s of the corresponding thin film transistor 201 by the multi-row data line D M . If the thin film transistor 201 is in an open state at this time, the gray scale voltage can be transmitted to the drain d of the thin film transistor 201 and loaded on the pixel electrode 202. An electric field is generated between the pixel electrode 202 and the common electrode 203 to control the rotation of the liquid crystal molecules, thereby causing the liquid crystal panel 20 to display an image. The gamma voltage outputted by the gamma voltage generating circuit 25 is opposite to the polarity inversion signal of the common voltage, and the gamma voltage greater than the common voltage is defined as a positive gamma voltage, which is smaller than the gamma voltage of the common voltage. Defined as the negative polarity gamma voltage.
為了保護液晶分子不會被損壞,該電場之方向需要週期性變化。為方便描述,當加載於該畫素電極202之灰階 電壓高於其公共電極203之公共電壓時,定義該畫素205所加載之電壓為正極性,且定義加載於該畫素電極202之灰階電壓為正極性灰階電壓;當加載於畫素電極202之灰階電壓低於其公共電極203之公共電壓時,定義該畫素205所加載之電壓為負極性,且定義加載於該畫素電極202之灰階電壓為負極性灰階電壓。當正極性電壓之絕對值與負極性電壓之絕對值相等時,該畫素205顯示相同灰階。In order to protect the liquid crystal molecules from being damaged, the direction of the electric field needs to be periodically changed. For convenience of description, when the gray scale is loaded on the pixel electrode 202 When the voltage is higher than the common voltage of the common electrode 203, the voltage applied to the pixel 205 is defined as positive polarity, and the gray scale voltage applied to the pixel electrode 202 is defined as a positive gray scale voltage; when loaded on the pixel When the gray scale voltage of the electrode 202 is lower than the common voltage of the common electrode 203, the voltage applied to the pixel 205 is defined as a negative polarity, and the gray scale voltage applied to the pixel electrode 202 is defined as a negative gray scale voltage. When the absolute value of the positive polarity voltage is equal to the absolute value of the negative polarity voltage, the pixel 205 displays the same gray scale.
請參閱圖2與圖3,圖2是該液晶顯示器2之畫素205所加載電壓極性之示意圖。圖3是與圖2相對應之該液晶顯示器2之工作時序圖。其中,為了簡便表示,圖2與圖3中僅分別畫出了該液晶顯示器2之第1行畫素205所加載電壓之極性與對應之工作時序。該液晶顯示器2採用二列反轉驅動方式工作,即該液晶顯示器2之第1列與第2列中各相同列之畫素205所加載電壓之極性一致,第3列與第4列中各相同列之畫素205所加載電壓之極性一致,且第2列與第3列中各相同列之畫素205所加載電壓之極性相反,其他各列畫素205所加載電壓極性之規律與第1列至第4列之規律相同。各畫素205所加載電壓之極性逐幀反轉。Please refer to FIG. 2 and FIG. 3. FIG. 2 is a schematic diagram showing the polarity of the voltage applied to the pixel 205 of the liquid crystal display 2. Fig. 3 is a timing chart showing the operation of the liquid crystal display 2 corresponding to Fig. 2. For the sake of simplicity, the polarities of the voltages applied to the first row of pixels 205 of the liquid crystal display 2 and the corresponding operational timings are shown in FIG. 2 and FIG. 3, respectively. The liquid crystal display 2 operates in a two-column inversion driving mode, that is, the polarities of the voltages applied to the pixels 205 of the same column in the first column and the second column of the liquid crystal display 2 are the same, and the third column and the fourth column are respectively The polarities of the voltages applied to the pixels 205 of the same column are the same, and the polarities of the voltages applied to the pixels 205 of the same column in the second column and the third column are opposite, and the polarity of the voltages of the other pixels 205 are the same. The rules from column 1 to column 4 are the same. The polarity of the voltage applied to each pixel 205 is inverted frame by frame.
當第i列之畫素205所加載電壓之極性與第i+1列之畫素205所加載電壓之極性相同、且與第i-1列之畫素205所加載電壓之極性相反時,則定義該第i列為極性反轉列。而對於該液晶面板20上除該極性反轉列之外之其他各列則定義為無極性反轉列。其中,i為自然數,且2≦i≦L,L為該畫素205之總列數,且亦為自然數。例如圖2中用圓圈所表示之畫素205所在之列均為極性反轉列,而無圓圈所表示之畫素205所在之列則均為無極性反轉列。When the polarity of the voltage applied to the pixel 205 of the i-th column is the same as the polarity of the voltage applied to the pixel 205 of the (i+1)th column, and is opposite to the polarity of the voltage applied to the pixel 205 of the i-1th column, then The i-th column is defined as a polarity inversion column. The other columns of the liquid crystal panel 20 except the polarity inversion column are defined as non-polarity inversion columns. Where i is a natural number, and 2≦i≦L, L is the total number of columns of the pixel 205, and is also a natural number. For example, the pixels of the pixel 205 represented by the circle in FIG. 2 are all the polarity inversion columns, and the columns of the pixels 205 represented by the circles are all the polarity inversion columns.
下面以第n幀圖像為例說明該液晶顯示器2顯示同一灰階圖像之工作原理,對於其他顯示同一灰階之任意一幀圖像,該液晶顯示器2之工作原理相同。該液晶顯示器2 顯示同一灰階之第n幀圖像之工作原理如下: 該公共電壓產生電路24首先提供一公共電壓到該公共電極203。該時序控制電路21根據接收之圖像訊號及控制訊號對應輸出低擺幅差分訊號(reduced swing differential signal,RSDS)、水平同步訊號、極性反轉訊號(POL)及資料更新同步訊號(TP)到該資料驅動電路23,輸出垂直同步訊號到該掃描驅動電路22,以及輸出該極性反轉訊號、該資料更新同步訊號及電壓控制訊號到該伽瑪電壓產生電路25。The operation principle of the liquid crystal display 2 displaying the same gray scale image is illustrated by taking the nth frame image as an example. The working principle of the liquid crystal display 2 is the same for any other frame image displaying the same gray scale. The liquid crystal display 2 The operation of displaying the nth frame image of the same gray level is as follows: The common voltage generating circuit 24 first supplies a common voltage to the common electrode 203. The timing control circuit 21 outputs a reduced swing differential signal (RSDS), a horizontal synchronization signal, a polarity inversion signal (POL), and a data update synchronization signal (TP) according to the received image signal and the control signal. The data driving circuit 23 outputs a vertical synchronization signal to the scan driving circuit 22, and outputs the polarity inversion signal, the data update synchronization signal and the voltage control signal to the gamma voltage generating circuit 25.
該極性反轉訊號為一週期變化之方波訊號,當該極性反轉訊號為邏輯高電平(如:1)時,定義其為正極性,當該極性反轉訊號為邏輯低電平(如:0)時,定義其為負極性。該資料更新同步訊號為一採樣訊號,用於採樣該極性反轉訊號之極性。該電壓控制訊號為一非週期變化之方波訊號,當電壓控制訊號為邏輯低電平(如:0)時,定義其為第一電壓控制訊號,當電壓控制訊號為邏輯高電平(如:1)時,定義其為第二電壓控制訊號。The polarity inversion signal is a square wave signal with a period change. When the polarity inversion signal is a logic high level (eg, 1), it is defined as a positive polarity, and when the polarity inversion signal is a logic low level ( For example: 0), it is defined as negative polarity. The data update synchronization signal is a sampling signal for sampling the polarity of the polarity inversion signal. The voltage control signal is a non-periodically changing square wave signal. When the voltage control signal is a logic low level (eg, 0), it is defined as a first voltage control signal, and when the voltage control signal is a logic high level (eg, When :1), it is defined as the second voltage control signal.
該掃描驅動電路22接收該垂直同步訊號,並輸出掃描電壓依序打開該第一顯示區210之薄膜電晶體201。其中,對於該極性反轉列之畫素205,該時序控制電路21依序輸出該第二電壓控制訊號及該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生電路25根據該第二電壓控制訊號、以及該資料更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之第二伽瑪電壓到該資料驅動電路23,並根據該第一電壓控制訊號輸出複數與所採樣之極性相同之第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及依序接收到之該複數第二伽瑪電壓及該複數第一伽瑪電壓,其對應輸出與該低擺幅差分訊號灰階值大小相同、且與採樣之極性相同 之第二灰階電壓到該多行資料線DM ,並經該薄膜電晶體201之源極s及汲極d後加載於該畫素電極202上,以對該第一顯示區210之極性反轉列之畫素205進行過電壓驅動。其中,該第二灰階電壓包括一第一子灰階電壓及一第二子灰階電壓,且對於相同灰階,該第一子灰階電壓之絕對值大於該第二子灰階電壓之絕對值。當該資料驅動電路23接收到該第二伽瑪電壓時,其對應輸出該第一子灰階電壓,而當該資料驅動電路23接收到該第一伽瑪電壓時,其對應輸出該第二子灰階電壓。The scan driving circuit 22 receives the vertical sync signal, and outputs a scan voltage to sequentially open the thin film transistor 201 of the first display area 210. The timing control circuit 21 sequentially outputs the second voltage control signal and the first voltage control signal to the gamma voltage generating circuit 25 for the pixel 205 of the polarity inversion column. The gamma voltage generating circuit 25 is configured to update the polarity of the polarity inversion signal according to the second voltage control signal and the data update signal, and correspondingly output a second gamma voltage having the same polarity as the sampled polarity to the The data driving circuit 23 outputs a plurality of first gamma voltages having the same polarity as the sampled voltage to the data driving circuit 23 according to the first voltage control signal. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and sequentially receives the complex second gamma voltage and the complex first gamma voltage, and the corresponding output is low. a second gray scale voltage having the same grayscale value and the same polarity as the sampling is applied to the multi-row data line D M and is applied to the source s and the drain d of the thin film transistor 201. On the pixel electrode 202, the pixel 205 of the polarity inversion column of the first display region 210 is over-voltage-driven. The second gray scale voltage includes a first sub-gray voltage and a second sub-gray voltage, and for the same gray level, the absolute value of the first sub-gray voltage is greater than the second sub-gray voltage Absolute value. When the data driving circuit 23 receives the second gamma voltage, it correspondingly outputs the first sub-gray voltage, and when the data driving circuit 23 receives the first gamma voltage, it correspondingly outputs the second Sub-gray voltage.
對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生電路25根據該第二電壓控制訊號、以及該資料更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之複數第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及接收到之該第一伽瑪電壓,其對應輸出複數與該低擺幅差分訊號灰階值大小相同、且與採樣之極性相同之第一灰階電壓到該無極性反轉列之畫素205。且對於相同灰階,該第一灰階電壓之絕對值等於該第二子灰階電壓之絕對值。For the non-polarity inverted column pixel 205, the timing control circuit 21 outputs the first voltage control signal to the gamma voltage generating circuit 25. The gamma voltage generating circuit 25 is configured to update the polarity of the polarity inversion signal according to the second voltage control signal and the data update signal, and correspondingly output the complex first gamma voltage with the same polarity as the sampled polarity This data drive circuit 23. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and the received first gamma voltage, and the corresponding output complex number is the same as the gray level value of the low swing differential signal. And the first gray scale voltage is the same as the polarity of the sampling to the pixel 205 of the polarity inversion reverse column. And for the same gray level, the absolute value of the first gray scale voltage is equal to the absolute value of the second sub gray scale voltage.
其中,在一個薄膜電晶體201開啟之時間T內,該時序控制電路21輸出該第二電壓控制訊號之總時間為T1,則該第一電壓控制訊號之總時間為T-T1,定義該時間T1與該時間T之比值為該第二電壓控制訊號在該第一顯示區220之佔空比,且該時序控制電路21輸出到該第一顯示區220之該第二電壓控制訊號之佔空比均相同。對應的,該資料驅動電路23在該第二電壓控制訊號控制下輸出之第一子灰階電壓之總時間為T1,輸出之該第二子灰階電壓為T-T1,則該第一子灰階電壓在該第一顯示區220之佔空比與該第二電壓控制訊號在該第一顯示區220之佔空比相 同。對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號之時間與一個薄膜電晶體201開啟之時間相同,即為T,故,該資料驅動電路23在該第一電壓控制訊號控制下輸出到該無極性反轉列之每一畫素205之第一灰階電壓之時間均為T。The total time of the second voltage control signal is T1, and the total time of the first voltage control signal is T-T1, which is defined during the time T when the thin film transistor 201 is turned on. The ratio of T1 to the time T is the duty ratio of the second voltage control signal in the first display area 220, and the timing control circuit 21 outputs the duty of the second voltage control signal to the first display area 220. The ratio is the same. Correspondingly, the total time of the first sub-gray voltage output by the data driving circuit 23 under the control of the second voltage control signal is T1, and the output of the second sub-gray voltage is T-T1, then the first sub- The duty ratio of the gray scale voltage in the first display area 220 and the duty ratio of the second voltage control signal in the first display area 220 with. For the pixel 205 of the non-polarity inversion column, the time when the timing control circuit 21 outputs the first voltage control signal is the same as the time when a thin film transistor 201 is turned on, that is, T, so the data driving circuit 23 is The time of the first gray scale voltage of each pixel 205 outputted to the non-polarity inversion column under the control of the first voltage control signal is T.
接著,該時序控制電路21根據輸出到該掃描驅動電路22之垂直同步訊號能夠判斷出該第二顯示區220之畫素205開始工作。其中,對於該極性反轉列之畫素205,該時序控制電路21依序輸出該第二電壓控制訊號及該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生電路25根據該第二電壓控制訊號、以及該資料更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之第二伽瑪電壓到該資料驅動電路23,並根據該第一電壓控制訊號輸出複數與所採樣之極性相同之第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及依序接收到之該複數第二伽瑪電壓及該複數第一伽瑪電壓,其對應輸出與該低擺幅差分訊號灰階值大小相同、且與採樣之極性相同之第二灰階電壓到該多行資料線DM ,並經該薄膜電晶體201之源極s及汲極d後加載於該畫素電極202上,以對該第二顯示區220之該極性反轉列之畫素205進行過電壓驅動。該第二灰階電壓包括一第一子灰階電壓及一第二子灰階電壓,且對於相同灰階,該第一子灰階電壓之絕對值大於該第二子灰階電壓之絕對值。當該資料驅動電路23接收到該第二伽瑪電壓時,其對應輸出該第一子灰階電壓,而當該資料驅動電路23接收到該第一伽瑪電壓時,其對應輸出該第二子灰階電壓。Then, the timing control circuit 21 can determine that the pixel 205 of the second display area 220 starts to operate according to the vertical synchronization signal outputted to the scan driving circuit 22. The timing control circuit 21 sequentially outputs the second voltage control signal and the first voltage control signal to the gamma voltage generating circuit 25 for the pixel 205 of the polarity inversion column. The gamma voltage generating circuit 25 is configured to update the polarity of the polarity inversion signal according to the second voltage control signal and the data update signal, and correspondingly output a second gamma voltage having the same polarity as the sampled polarity to the The data driving circuit 23 outputs a plurality of first gamma voltages having the same polarity as the sampled voltage to the data driving circuit 23 according to the first voltage control signal. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and sequentially receives the complex second gamma voltage and the complex first gamma voltage, and the corresponding output is low. a second gray scale voltage having the same grayscale value and the same polarity as the sampling is applied to the multi-row data line D M and is applied to the source s and the drain d of the thin film transistor 201. The pixel electrode 202 is over-voltage-driven by the pixel 205 of the polarity inversion column of the second display region 220. The second gray scale voltage includes a first sub-gray voltage and a second sub-gray voltage, and for the same gray level, the absolute value of the first sub-gray voltage is greater than the absolute value of the second sub-gray voltage . When the data driving circuit 23 receives the second gamma voltage, it correspondingly outputs the first sub-gray voltage, and when the data driving circuit 23 receives the first gamma voltage, it correspondingly outputs the second Sub-gray voltage.
對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生電路25根據該第二電壓控制訊號、以及該資料 更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之複數第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及接收到之該第一伽瑪電壓,其對應輸出複數與該低擺幅差分訊號灰階值大小相同、且與採樣之極性相同之第一灰階電壓到該無極性反轉列之畫素205。且對於相同灰階,該第一灰階電壓之絕對值等於該第二子灰階電壓之絕對值。For the non-polarity inverted column pixel 205, the timing control circuit 21 outputs the first voltage control signal to the gamma voltage generating circuit 25. The gamma voltage generating circuit 25 controls the signal according to the second voltage and the data The polarity of the polarity inversion signal is updated by the synchronization signal, and the complex first digital gamma voltage having the same polarity as the sampled polarity is output to the data driving circuit 23. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and the received first gamma voltage, and the corresponding output complex number is the same as the gray level value of the low swing differential signal. And the first gray scale voltage is the same as the polarity of the sampling to the pixel 205 of the polarity inversion reverse column. And for the same gray level, the absolute value of the first gray scale voltage is equal to the absolute value of the second sub gray scale voltage.
其中,在一個薄膜電晶體201開啟之時間T內,該時序控制電路21輸出該第二電壓控制訊號之總時間為T2,且T2大於T1,則該第一電壓控制訊號之總時間為T-T2,定義該時間T2與該時間T之比值為該第二電壓控制訊號在該第二顯示區220之佔空比,且該時序控制電路21輸出到該第二顯示區220之該第二電壓控制訊號之佔空比均相同。對應之,該資料驅動電路23在該第二電壓控制訊號控制下輸出之第一子灰階電壓之總時間為T2,輸出之該第二子灰階電壓為T-T2,則該第一子灰階電壓在該第二顯示區220之佔空比與該第二電壓控制訊號在該第二顯示區220之佔空比相同。對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號之時間與一個薄膜電晶體201開啟之時間相同,即為T,因此,該資料驅動電路23在該第一電壓控制訊號控制下輸出到該無極性反轉列之每一畫素205之第一灰階電壓之時間均為T。其中,對於相同灰階,該第二子灰階電壓之絕對值與該第一灰階電壓之絕對值相等。Wherein, in a time T when the thin film transistor 201 is turned on, the total time of the second voltage control signal outputted by the timing control circuit 21 is T2, and T2 is greater than T1, and the total time of the first voltage control signal is T- T2, the ratio of the time T2 to the time T is defined as the duty ratio of the second voltage control signal in the second display area 220, and the timing control circuit 21 outputs the second voltage to the second display area 220. The duty cycle of the control signals is the same. Correspondingly, the total time of the first sub-gray voltage output by the data driving circuit 23 under the control of the second voltage control signal is T2, and the output of the second sub-gray voltage is T-T2, then the first sub- The duty ratio of the gray scale voltage in the second display area 220 is the same as the duty ratio of the second voltage control signal in the second display area 220. For the pixel of the polarity-inverted column 205, the timing of the output of the first voltage control signal by the timing control circuit 21 is the same as the time when a thin film transistor 201 is turned on, that is, T, and therefore, the data driving circuit 23 is The time of the first gray scale voltage of each pixel 205 outputted to the non-polarity inversion column under the control of the first voltage control signal is T. Wherein, for the same gray level, the absolute value of the second sub-gray voltage is equal to the absolute value of the first gray level voltage.
最後,該時序控制電路21根據輸出到該掃描驅動電路22之垂直同步訊號判斷出該第三顯示區230之畫素205開始工作。其中,對於該極性反轉列相對應之畫素205,該時序控制電路21依序輸出該第二電壓控制訊號及該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生 電路25根據該第二電壓控制訊號、以及該資料更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之第二伽瑪電壓到該資料驅動電路23,並根據該第一電壓控制訊號輸出複數與所採樣之極性相同之第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及依序接收到之該複數第二伽瑪電壓及該複數第一伽瑪電壓,其對應輸出與該低擺幅差分訊號灰階值大小相同之第二灰階電壓到該多行資料線DM ,並經該薄膜電晶體201之源極s及汲極d後加載於該畫素電極202上,以對該第三顯示區230之該極性反轉列之畫素205進行過電壓驅動。其中,該第二灰階電壓包括一第一子灰階電壓及一第二子灰階電壓,且對於相同灰階,該第一子灰階電壓之絕對值大於該第二子灰階電壓之絕對值。當該資料驅動電路23接收到該第二伽瑪電壓時,其對應輸出該第一子灰階電壓,而當該資料驅動電路23接收到該第一伽瑪電壓時,其對應輸出該第二子灰階電壓。Finally, the timing control circuit 21 determines that the pixel 205 of the third display area 230 starts to operate according to the vertical synchronization signal outputted to the scan driving circuit 22. The timing control circuit 21 sequentially outputs the second voltage control signal and the first voltage control signal to the gamma voltage generating circuit 25 for the pixel 205 corresponding to the polarity inversion column. The gamma voltage generating circuit 25 is configured to update the polarity of the polarity inversion signal according to the second voltage control signal and the data update signal, and correspondingly output a second gamma voltage having the same polarity as the sampled polarity to the The data driving circuit 23 outputs a plurality of first gamma voltages having the same polarity as the sampled voltage to the data driving circuit 23 according to the first voltage control signal. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and sequentially receives the complex second gamma voltage and the complex first gamma voltage, and the corresponding output is low. a second gray scale voltage having the same grayscale value of the swing difference signal is applied to the multi-line data line D M , and is applied to the pixel electrode 202 via the source s and the drain d of the thin film transistor 201 to The pixel 205 of the polarity inversion column of the third display area 230 is over-voltage driven. The second gray scale voltage includes a first sub-gray voltage and a second sub-gray voltage, and for the same gray level, the absolute value of the first sub-gray voltage is greater than the second sub-gray voltage Absolute value. When the data driving circuit 23 receives the second gamma voltage, it correspondingly outputs the first sub-gray voltage, and when the data driving circuit 23 receives the first gamma voltage, it correspondingly outputs the second Sub-gray voltage.
對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號到該伽瑪電壓產生電路25。該伽瑪電壓產生電路25根據該第二電壓控制訊號、以及該資料更新同步訊號對該極性反轉訊號所採樣之極性,其對應輸出複數與所採樣之極性相同之複數第一伽瑪電壓到該資料驅動電路23。該資料驅動電路23根據該資料更新同步訊號對該極性反轉訊號之採樣之極性、以及接收到之該第一伽瑪電壓,其對應輸出複數與該低擺幅差分訊號灰階值大小相同、且與採樣之極性相同之第一灰階電壓到該無極性反轉列之畫素205。且對於相同灰階,該第一灰階電壓之絕對值等於該第二子灰階電壓之絕對值。For the non-polarity inverted column pixel 205, the timing control circuit 21 outputs the first voltage control signal to the gamma voltage generating circuit 25. The gamma voltage generating circuit 25 is configured to update the polarity of the polarity inversion signal according to the second voltage control signal and the data update signal, and correspondingly output the complex first gamma voltage with the same polarity as the sampled polarity This data drive circuit 23. The data driving circuit 23 updates the polarity of the sampling of the polarity inversion signal by the synchronization signal according to the data, and the received first gamma voltage, and the corresponding output complex number is the same as the gray level value of the low swing differential signal. And the first gray scale voltage is the same as the polarity of the sampling to the pixel 205 of the polarity inversion reverse column. And for the same gray level, the absolute value of the first gray scale voltage is equal to the absolute value of the second sub gray scale voltage.
其中,在一個薄膜電晶體201開啟之時間T內,該時序控制電路21輸出該第二電壓控制訊號之時間為T3,且 T3大於T2,則輸出該第一電壓控制訊號之時間為T-T3,定義該時間T3與該時間T之比值為該第二電壓控制訊號在該第三顯示區230之佔空比,且該第二電壓控制訊號在該第三顯示區230之佔空比相同。對應之,該資料驅動電路23在該第二電壓控制訊號之控制下輸出之第一子灰階電壓之時間為T3,而輸出之第二子灰階電壓之時間為T-T3,即該第一子灰階電壓在該第三顯示區230之佔空比與該第二電壓控制訊號在該第三顯示區230之佔空比相同。對於該無極性反轉列之畫素205,該時序控制電路21輸出該第一電壓控制訊號之時間與一個薄膜電晶體201開啟之時間相同,即為T,因此,該資料驅動電路23在該第一電壓控制訊號控制下輸出到該無極性反轉列之每一畫素205之第一灰階電壓之時間均為T。其中,對於相同灰階,該第二子灰階電壓之絕對值與該第一灰階電壓之絕對值相等。藉由該資料驅動電路23輸出該第二灰階電壓,能夠實現對該極性反轉列之畫素205進行過電壓驅動。且依序輸出之該第一子灰階電壓與該第二子灰階電壓之差值之絕對值與該第二子灰階電壓之比值均相同,並優選為20%。The time during which the timing control circuit 21 outputs the second voltage control signal is T3 during the time T when the thin film transistor 201 is turned on, and When T3 is greater than T2, the time for outputting the first voltage control signal is T-T3, and the ratio of the time T3 to the time T is defined as the duty ratio of the second voltage control signal in the third display area 230, and the The duty ratio of the second voltage control signal in the third display area 230 is the same. Correspondingly, the time of the first sub-gray voltage output by the data driving circuit 23 under the control of the second voltage control signal is T3, and the time of outputting the second sub-gray voltage is T-T3, that is, the The duty ratio of a sub-gray voltage in the third display area 230 is the same as the duty ratio of the second voltage control signal in the third display area 230. For the pixel of the polarity-inverted column 205, the timing of the output of the first voltage control signal by the timing control circuit 21 is the same as the time when a thin film transistor 201 is turned on, that is, T, and therefore, the data driving circuit 23 is The time of the first gray scale voltage of each pixel 205 outputted to the non-polarity inversion column under the control of the first voltage control signal is T. Wherein, for the same gray level, the absolute value of the second sub-gray voltage is equal to the absolute value of the first gray level voltage. By outputting the second gray scale voltage by the data driving circuit 23, overvoltage driving of the pixel 205 of the polarity inversion column can be realized. And the ratio of the absolute value of the difference between the first sub-gray voltage and the second sub-gray voltage sequentially outputted is the same as the ratio of the second sub-gray voltage, and is preferably 20%.
綜上所述,對於該液晶顯示器2,由於該資料驅動電路23依序輸出較大之該第一子灰階電壓及正常之該第二子灰階電壓到該該極性反轉列之畫素205,進而對該極性反轉列之畫素205進行過電壓驅動,並且隨著該畫素205與該資料驅動電路23之間距離之增加,該資料驅動電路23輸出到該第一顯示區210、第二顯示區220及第三顯示區230之畫素205之第一子灰階電壓之佔空比逐漸增加,從而該第二灰階電壓對該極性反轉列畫素205之過驅動程度隨該顯示區與該資料驅動電路23之間距離的增加而增加。故,選擇適當之該第一子灰階電壓之大小及其佔空比,能夠使得該第一子灰階電壓經該多行資料線DM 傳輸衰減後,實際上輸出到該畫素電極202之灰階電壓經疊加後能 夠達到與該第二子灰階電壓之大小基本相同。從而,當該液晶顯示器2顯示同一灰階時,該極性反轉列之畫素205所加載之電壓與該無極性反轉列之畫素205所加載之電壓之絕對值基本一致,進而能夠改善該液晶顯示器2顯示圖像時出現之奇偶線現象。In summary, for the liquid crystal display 2, the data driving circuit 23 sequentially outputs the larger first sub-gray voltage and the normal second sub-gray voltage to the pixel of the polarity inversion column. 205. The pixel 205 of the polarity inversion column is further subjected to overvoltage driving, and the data driving circuit 23 outputs to the first display area 210 as the distance between the pixel 205 and the data driving circuit 23 increases. The duty ratios of the first sub-gray voltages of the pixels 205 of the second display area 220 and the third display area 230 are gradually increased, so that the second gray scale voltage is overdriven by the polarity inversion column pixels 205. The distance increases as the distance between the display area and the data driving circuit 23 increases. Therefore, selecting the appropriate size of the gray scale voltage and a first sub-duty ratio enables the first sub-row of the multi-gray scale voltage via the data line D M transmission attenuation is actually output to the pixel electrode 202 The gray scale voltage is superimposed to be substantially the same as the second sub-gray voltage. Therefore, when the liquid crystal display 2 displays the same gray scale, the voltage loaded by the pixel 205 of the polarity inversion column substantially matches the absolute value of the voltage applied to the pixel 205 of the polarity inversion column, thereby improving The parity line phenomenon that occurs when the liquid crystal display 2 displays an image.
此外,因為該第二灰階電壓對該極性反轉列畫素205之過驅動程度係隨該顯示區與該資料驅動電路23之間距離的增加而增加的,從而亦能夠改善該第二灰階電壓在傳輸之過程中衰減越來越多之問題。In addition, since the degree of overdrive of the second gray scale voltage to the polarity inversion column pixel 205 increases as the distance between the display area and the data driving circuit 23 increases, the second gray can also be improved. The step voltage is attenuating more and more during the transmission process.
本發明並不限於上述實施方式,實現該第二灰階電壓對該極性反轉列畫素205之過驅動程度隨該顯示區與該資料驅動電路之間距離的增加而增加之方式還可以藉由控制該第一子灰階電壓之幅值,進而改變作用於該顯示區上之第二灰階電壓之平均電壓值。The present invention is not limited to the above embodiment, and the manner in which the degree of overdrive of the second gray scale voltage to the polarity inversion column pixel 205 increases as the distance between the display area and the data driving circuit increases may be borrowed. The average voltage value of the second gray scale voltage acting on the display area is changed by controlling the amplitude of the first sub-gray voltage.
該液晶面板20亦可以分為4個或更複數顯示區,且每個顯示區沿平行於該資料線DM 方向之長度亦可以係不同的。其中,每一顯示區至少包括一列畫素205。對於同一顯示區之第一子灰階電壓之佔空比相同,而對於不同顯示區之第一子灰階電壓之佔空比隨該顯示區與該資料驅動電路23之間距離的增加而增加,且該第二子灰階電壓之絕對值與該第二灰階電壓之絕對值相等。該第一子灰階電壓之佔空比之變化範圍可為0~100%。The liquid crystal panel 20 can also be divided into four or more display areas, and the length of each display area along the direction parallel to the data line D M can also be different. Each display area includes at least one column of pixels 205. The duty ratios of the first sub-gray voltages of the same display area are the same, and the duty ratio of the first sub-gray voltages for different display areas increases as the distance between the display area and the data driving circuit 23 increases. And the absolute value of the second sub-gray voltage is equal to the absolute value of the second gray-scale voltage. The duty ratio of the first sub-gray voltage may vary from 0 to 100%.
該液晶顯示器之驅動方式可以為極性每兩列反轉之列反轉驅動方式,或者可以為極性每兩列反轉之點反轉驅動方式,或者還可以為一列加兩列之反轉驅動方式等。其中,該一列加兩列之反轉驅動方式為:該液晶顯示器2之第2列與第3列中各相同列之畫素205所加載電壓之極性一致,且第1列與第2列中各相同列之畫素205所加載電壓之極性相反,其他各列畫素205所加載電壓極性之規律與第1列至第3列之規律相同。各畫素205所加載電壓之極 性逐幀反轉。The driving mode of the liquid crystal display may be a reverse polarity driving mode of polarity inversion of two columns, or a dot inversion driving mode of polarity inversion of two columns, or an inversion driving mode of one column plus two columns. Wait. The reverse driving manner of the one column plus two columns is: the polarity of the voltage applied to the pixel 205 of the same column in the second column and the third column of the liquid crystal display 2 is the same, and the first column and the second column are The polarities of the voltages applied to the pixels 205 of the same column are opposite, and the laws of the polarity of the voltages applied to the other columns 205 are the same as those of the first to third columns. The maximum voltage of each pixel 205 The sex is inverted frame by frame.
此外,該一列加兩列之反轉驅動方式還可以為:該液晶顯示器2之第1列與第2列中各相同列之畫素205所加載電壓之極性一致,且第3列與第2列中各相同列之畫素205所加載電壓之極性相反,其他各列畫素205所加載電壓極性之規律與第1列至第3列之規律相同。In addition, the reverse driving method of the column and the two columns may be: the polarity of the voltage applied to the pixels 205 of the same column in the first column and the second column of the liquid crystal display 2 is the same, and the third column and the second column are The polarities of the voltages applied to the pixels 205 of the same column in the column are opposite, and the laws of the polarity of the voltages applied to the other columns 205 are the same as those of the first column to the third column.
該液晶顯示器2可以採用極性每三列或更多列反轉之驅動方式。該液晶顯示器2亦可以採用一列加三列或者一列加更多列之反轉驅動方式。The liquid crystal display 2 can be driven in such a manner that the polarity is reversed every three or more columns. The liquid crystal display 2 can also adopt an inverted driving mode of three columns or three columns or more columns.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神及範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
2‧‧‧液晶顯示器2‧‧‧LCD display
20‧‧‧液晶面板20‧‧‧LCD panel
21‧‧‧時序控制電路21‧‧‧Sequence Control Circuit
22‧‧‧掃描驅動電路22‧‧‧Scan drive circuit
23‧‧‧資料驅動電路23‧‧‧Data Drive Circuit
24‧‧‧公共電壓產生電路24‧‧‧Common voltage generating circuit
25‧‧‧伽瑪電壓產生電路25‧‧‧Gamma voltage generation circuit
G1 ~GL ‧‧‧掃描線G 1 ~G L ‧‧‧ scan line
D1 ~DM ‧‧‧資料線D 1 ~D M ‧‧‧ data line
205‧‧‧畫素205‧‧‧ pixels
201‧‧‧薄膜電晶體201‧‧‧film transistor
202‧‧‧畫素電極202‧‧‧ pixel electrodes
203‧‧‧公共電極203‧‧‧Common electrode
g‧‧‧閘極G‧‧‧ gate
s‧‧‧源極S‧‧‧ source
d‧‧‧汲極D‧‧‧汲
210‧‧‧第一顯示區210‧‧‧First display area
220‧‧‧第二顯示區220‧‧‧Second display area
230‧‧‧第三顯示區230‧‧‧ Third display area
圖1為本發明液晶顯示器一較佳實施方式之示意圖。1 is a schematic view of a preferred embodiment of a liquid crystal display of the present invention.
圖2為圖1所示液晶顯示器之畫素所加載電壓極性之示意圖。2 is a schematic view showing the polarity of a voltage applied to a pixel of the liquid crystal display shown in FIG. 1.
圖3為圖1所示液晶顯示器之工作時序圖。3 is a timing chart showing the operation of the liquid crystal display shown in FIG. 1.
Claims (17)
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TW98141699A TWI416493B (en) | 2009-12-07 | 2009-12-07 | Liquid crystal display |
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TW98141699A TWI416493B (en) | 2009-12-07 | 2009-12-07 | Liquid crystal display |
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TW201120855A TW201120855A (en) | 2011-06-16 |
TWI416493B true TWI416493B (en) | 2013-11-21 |
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TW98141699A TWI416493B (en) | 2009-12-07 | 2009-12-07 | Liquid crystal display |
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US5995073A (en) * | 1996-04-09 | 1999-11-30 | Hitachi, Ltd. | Method of driving a liquid crystal display device with voltage polarity reversal |
TW530291B (en) * | 2001-06-19 | 2003-05-01 | Samsung Electronics Co Ltd | Liquid crystal display and method of driving same |
TW200501029A (en) * | 2003-02-06 | 2005-01-01 | Samsung Electronics Co Ltd | Method and apparatus for driving a liquid crystal display by generating color-specific gray voltages |
US20060152462A1 (en) * | 2005-01-13 | 2006-07-13 | Nec Electronics Corporation | Liquid crystal driving device, liquid crystal display device, and liquid crystal driving method |
TW200710790A (en) * | 2005-07-18 | 2007-03-16 | Samsung Electronics Co Ltd | Liquid crystal display and driving method therefor |
TWI277055B (en) * | 2005-06-28 | 2007-03-21 | Lg Philips Lcd Co Ltd | Liquid crystal display and corresponding driving method |
US20080150871A1 (en) * | 2006-12-20 | 2008-06-26 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display device |
US20080186421A1 (en) * | 2007-02-01 | 2008-08-07 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display device |
US20080218647A1 (en) * | 2007-03-07 | 2008-09-11 | Park Chang Keun | Liquid crystal display device |
TW200949813A (en) * | 2008-05-23 | 2009-12-01 | Innolux Display Corp | Method for driving liquid crystal display |
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2009
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US5995073A (en) * | 1996-04-09 | 1999-11-30 | Hitachi, Ltd. | Method of driving a liquid crystal display device with voltage polarity reversal |
TW530291B (en) * | 2001-06-19 | 2003-05-01 | Samsung Electronics Co Ltd | Liquid crystal display and method of driving same |
TW200501029A (en) * | 2003-02-06 | 2005-01-01 | Samsung Electronics Co Ltd | Method and apparatus for driving a liquid crystal display by generating color-specific gray voltages |
US20060152462A1 (en) * | 2005-01-13 | 2006-07-13 | Nec Electronics Corporation | Liquid crystal driving device, liquid crystal display device, and liquid crystal driving method |
TWI277055B (en) * | 2005-06-28 | 2007-03-21 | Lg Philips Lcd Co Ltd | Liquid crystal display and corresponding driving method |
TW200710790A (en) * | 2005-07-18 | 2007-03-16 | Samsung Electronics Co Ltd | Liquid crystal display and driving method therefor |
US20080150871A1 (en) * | 2006-12-20 | 2008-06-26 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display device |
US20080186421A1 (en) * | 2007-02-01 | 2008-08-07 | Lg.Philips Lcd Co., Ltd. | Liquid crystal display device |
US20080218647A1 (en) * | 2007-03-07 | 2008-09-11 | Park Chang Keun | Liquid crystal display device |
TW200949813A (en) * | 2008-05-23 | 2009-12-01 | Innolux Display Corp | Method for driving liquid crystal display |
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TW201120855A (en) | 2011-06-16 |
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