TWI413084B - Liquid crystal display power supplying circuit - Google Patents

Liquid crystal display power supplying circuit Download PDF

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TWI413084B
TWI413084B TW98134703A TW98134703A TWI413084B TW I413084 B TWI413084 B TW I413084B TW 98134703 A TW98134703 A TW 98134703A TW 98134703 A TW98134703 A TW 98134703A TW I413084 B TWI413084 B TW I413084B
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power supply
coupled
power
liquid crystal
crystal display
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TW98134703A
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TW201113858A (en
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He-Kang Zhou
Ching Chung Lin
Em-Ily Yang
Jin-Ming Liu
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Innolux Corp
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Abstract

Under a sleep mode of a display, a liquid crystal display power supplying circuit prohibits power from a liquid crystal display power, and proceeds supplying power with a motherboard, which supplies power all the time, instead. Therefore, power of the liquid crystal display power under the sleep mode of the display is replaced by retrieving the power supplied from the motherboard instead, so that unnecessary power consumption of the liquid crystal display power under the sleep mode is prevented.

Description

液晶顯示器供電電路Liquid crystal display power supply circuit

本發明係揭露一種顯示器供電電路,尤指一種減少功率消耗的顯示器供電電路。The present invention discloses a display power supply circuit, and more particularly to a display power supply circuit that reduces power consumption.

一般的液晶顯示器會以進入睡眠模式的方式來節省功率消耗,並以單一顯示器電源來供應液晶顯示器在正常運作模式下與睡眠模式下的所需電源。液晶顯示器需要被供應電源的元件主要包括有顯示面板、微處理器及運算積體電路;且該顯示器電源之電位約為5伏特,顯示面板需要之電源約為5伏特,微處理器需要之電源約為3.3伏特,且運算積體電路需要之電源約為1.8伏特。A typical liquid crystal display saves power consumption by entering a sleep mode, and supplies a power supply of the liquid crystal display in a normal operation mode and a sleep mode with a single display power supply. The components of the liquid crystal display that need to be supplied with power mainly include a display panel, a microprocessor and a computing integrated circuit; and the potential of the display power supply is about 5 volts, and the power required by the display panel is about 5 volts, and the power required by the microprocessor It is about 3.3 volts, and the power required to calculate the integrated circuit is about 1.8 volts.

請參閱圖1,其為一般液晶顯示器供電電路100的示意圖。如圖1所示,液晶顯示器供電電路100包含一液晶顯示器電源110、一第一電源供應單元150、一第二電源供應單元160、一第一濾波模組170、一第二濾波模組180及一二極體D120。液晶顯示器供電電路100主要係透過液晶顯示器電源110直接輸出之電源VO1(約為5伏特)來直接供應顯示面板120的所需電源,透過第一電源供應單元150所產生之電源VO2(約為3.3伏特)來提供微處理器130的所需電源,並透過第二電源供應單元160所產生之電源VO3(約為1.8伏特)來提供運算積體電路140的所需電源。當顯示器需要進入睡眠模式時,微處理器130會發出訊號通知顯示面板120及運算積體電路140關閉,並在維持最低限度可運作機能的情況下關閉其本身大部份的機能,以分別停止接收電源VO1、VO2、VO3;反之,當顯示器需要由睡眠狀態進入正常運作模式時,亦 由微處理器130發出訊號通知顯示面板120及運算積體電路140開起,以分別繼續接收電源VO1、VO2、VO3。然而在顯示器進入睡眠模式時,仍會有相當小的電流通過二極體D120,使得液晶顯示器電源110處於低效率工作狀態,並且仍然會產生無法被忽略的功率消耗。Please refer to FIG. 1 , which is a schematic diagram of a general liquid crystal display power supply circuit 100 . As shown in FIG. 1 , the liquid crystal display power supply circuit 100 includes a liquid crystal display power supply 110 , a first power supply unit 150 , a second power supply unit 160 , a first filter module 170 , a second filter module 180 , and A diode D120. The liquid crystal display power supply circuit 100 mainly supplies the power supply VO1 (about 5 volts) directly outputted through the liquid crystal display power supply 110 to directly supply the required power of the display panel 120, and the power supply VO2 generated by the first power supply unit 150 (about 3.3). The volts are provided to provide the required power to the microprocessor 130 and to provide the required power to the integrated circuit 140 through the power source VO3 (about 1.8 volts) generated by the second power supply unit 160. When the display needs to enter the sleep mode, the microprocessor 130 will send a signal to notify the display panel 120 and the computing integrated circuit 140 to be turned off, and turn off most of its functions to maintain the minimum operable function to stop respectively. Receiving power supplies VO1, VO2, VO3; conversely, when the display needs to enter the normal operating mode from sleep state, The microprocessor 130 sends a signal to notify the display panel 120 and the arithmetic integrated circuit 140 to continue to receive the power sources VO1, VO2, and VO3, respectively. However, when the display enters the sleep mode, there is still a relatively small current flowing through the diode D120, causing the liquid crystal display power supply 110 to be in an inefficient operating state and still producing power consumption that cannot be ignored.

本發明係揭露一種液晶顯示器供電電路。該液晶顯示器供電電路係包含一主機板開關電路、一液晶顯示器電源、一電源開關電路及一第一電源供應單元。該主機板開關電路之一輸入端係耦接於一主機板之一電源輸出端。該電源開關電路之一輸入端係耦接於該液晶顯示器電源。該第一電源供應單元係耦接於該主機板開關電路之一輸出端、該電源開關電路之一輸出端及一微處理器,用來將該主機板或該液晶顯示器電源之電源供應給該微處理器。The invention discloses a liquid crystal display power supply circuit. The liquid crystal display power supply circuit comprises a motherboard switch circuit, a liquid crystal display power supply, a power switch circuit and a first power supply unit. One of the input terminals of the motherboard switch circuit is coupled to a power output of a motherboard. An input end of the power switch circuit is coupled to the liquid crystal display power supply. The first power supply unit is coupled to an output end of the motherboard switch circuit, an output end of the power switch circuit, and a microprocessor for supplying power to the motherboard or the power of the liquid crystal display. microprocessor.

本發明之實施例所揭露之液晶顯示器供電電路係在顯示器之睡眠模式下隔絕液晶顯示器電源之供電,並改由需要隨時被供電的主機板來進行睡眠模式下的供電,使得液晶顯示器電源在顯示器之睡眠模式下原本會被消耗但不需要消耗的功率會被轉嫁至原本即需隨時被供電的主機板,而省下了液晶顯示器電源在睡眠模式下的不必要功率消耗。The liquid crystal display power supply circuit disclosed in the embodiment of the present invention isolates the power supply of the liquid crystal display power supply in the sleep mode of the display, and changes the power supply in the sleep mode by the motherboard that needs to be powered at any time, so that the liquid crystal display power supply is on the display. In the sleep mode, the power that would otherwise be consumed but not consumed will be passed on to the motherboard that needs to be powered at any time, and the unnecessary power consumption of the LCD monitor power supply in the sleep mode is saved.

為了解決上述先前技術中所述睡眠模式中仍會有無法忽略之功率消耗的問題,本發明之實施例係揭露一種用來減少功率消耗 的顯示器供電電路。所揭露之顯示器供電電路主要係在顯示器進入睡眠模式時,將液晶顯示器電源所輸出之電源完全截止,並另行以顯示器之主機板來供應顯示器在睡眠模式中的電源。如此一來,由於顯示器之主機板本身即隨時都會提供電源,因此可利用此特性將先前技術中液晶顯示器電源應消耗的功率轉嫁給原本就會被消耗掉的主機板輸出功率,因此阻止了液晶顯示器電源消耗多餘的功率。In order to solve the problem that there is still power consumption that cannot be ignored in the sleep mode described in the prior art, an embodiment of the present invention discloses a method for reducing power consumption. Display power supply circuit. The disclosed display power supply circuit mainly cuts off the power output of the liquid crystal display power supply when the display enters the sleep mode, and separately supplies the power supply of the display in the sleep mode by using the motherboard of the display. In this way, since the motherboard of the display itself provides power at any time, this feature can be used to pass the power consumed by the power supply of the liquid crystal display in the prior art to the output power of the motherboard which would otherwise be consumed, thereby preventing the liquid crystal. The display power consumes excess power.

請參閱圖2與圖3,其為本發明之一第一及第二實施例所揭露之一液晶顯示器供電電路200的示意圖,其中圖2係為該第一實施例所揭露液晶顯示器供電電路200的示意圖,而圖3係為該第二實施例所揭露液晶顯示器200的示意圖。Please refer to FIG. 2 and FIG. 3 , which are schematic diagrams of a liquid crystal display power supply circuit 200 according to the first and second embodiments of the present invention. FIG. 2 is a liquid crystal display power supply circuit 200 according to the first embodiment. FIG. 3 is a schematic diagram of the liquid crystal display 200 disclosed in the second embodiment.

如圖2所示,在該第一實施例中,液晶顯示器供電電路200係包含一主機板開關電路230、一電源開關電路240及圖1所示之液晶顯示器電源110與第一電源供應單元150。第一電源供應單元150係用來透過主機板開關電路230或電源開關電路240將一主機板之電源或液晶顯示器電源110之電源供應給微處理器130。當顯示器進入正常運作模式時,液晶顯示器供電電路200係關閉主機板開關電路230並開啟電源開關電路240,使得主機板之電源無法透過主機板開關電路230供應給第一電源供應單元150,並使得液晶顯示器電源110之電源可透過電源開關電路240供應給微處理器130。同理,當顯示器進入睡眠模式時,液晶顯示器供電電路200係開啟主機板開關電路230並關閉電源開關電路240,使得主機板之電源可透過主機板開關電路230供應給第一電源供應單元150,並使得液晶顯示器電源110之電源無法透過電源開關電路240供應給第一電源供應單元150。As shown in FIG. 2, in the first embodiment, the liquid crystal display power supply circuit 200 includes a motherboard switch circuit 230, a power switch circuit 240, and the liquid crystal display power supply 110 and the first power supply unit 150 shown in FIG. . The first power supply unit 150 is configured to supply the power of a motherboard or the power of the liquid crystal display power supply 110 to the microprocessor 130 through the motherboard switch circuit 230 or the power switch circuit 240. When the display enters the normal operation mode, the liquid crystal display power supply circuit 200 turns off the motherboard switch circuit 230 and turns on the power switch circuit 240, so that the power of the motherboard cannot be supplied to the first power supply unit 150 through the motherboard switch circuit 230, and The power of the liquid crystal display power supply 110 can be supplied to the microprocessor 130 through the power switch circuit 240. Similarly, when the display enters the sleep mode, the liquid crystal display power supply circuit 200 turns on the motherboard switch circuit 230 and turns off the power switch circuit 240, so that the power of the motherboard can be supplied to the first power supply unit 150 through the motherboard switch circuit 230. The power of the liquid crystal display power source 110 cannot be supplied to the first power supply unit 150 through the power switch circuit 240.

如圖3所示,在該第二實施例中,液晶顯示器供電電路200係耦接於一主機板210,並用來提供圖1所示之微處理器130、顯示面板120及運算積體電路140之三種不同電位的電源。如圖3所示,液晶顯示器供電電路200係包含主機板開關電路230、電源開關電路240及圖1所示之液晶顯示器電源110、第一電源供應單元150、第二電源供應單元160、第一濾波模組170與第二濾波模組180。As shown in FIG. 3, in the second embodiment, the liquid crystal display power supply circuit 200 is coupled to a motherboard 210, and is used to provide the microprocessor 130, the display panel 120, and the arithmetic integrated circuit 140 shown in FIG. Three different potentials for the power supply. As shown in FIG. 3, the liquid crystal display power supply circuit 200 includes a motherboard switch circuit 230, a power switch circuit 240, and a liquid crystal display power supply 110 shown in FIG. 1, a first power supply unit 150, a second power supply unit 160, and a first The filter module 170 and the second filter module 180.

在顯示器之正常運作模式中,液晶顯示器供電電路200係由液晶顯示器電源110取得電源VO1,以供顯示面板120運作,並開啟電源開關電路240,使電源VO1可輸入於第一電源供應單元150;此時,位於第一電源供應單元150之輸入端的電源VOS係根據電源VO1所產生,且液晶顯示器供電電路200會關閉主機板開關電路230,以隔絕由主機板210產生之一主機板輸出電源VOM的供應。如此一來,第一電源供應單元150會將電源VOS轉換為電源VO2,提供給微處理器130運作,且第二電源供應單元160會根據電源VO2產生電源VO3,提供給運算積體電路140。In the normal operation mode of the display, the liquid crystal display power supply circuit 200 receives the power supply VO1 from the liquid crystal display power supply 110 for the display panel 120 to operate, and turns on the power switch circuit 240, so that the power supply VO1 can be input to the first power supply unit 150; At this time, the power supply VOS located at the input end of the first power supply unit 150 is generated according to the power source VO1, and the liquid crystal display power supply circuit 200 turns off the motherboard switch circuit 230 to isolate one of the motherboard output powers VOM generated by the motherboard 210. Supply. In this way, the first power supply unit 150 converts the power supply VOS into the power supply VO2, and supplies it to the microprocessor 130 for operation, and the second power supply unit 160 generates the power supply VO3 according to the power supply VO2, and supplies it to the arithmetic integrated circuit 140.

而在顯示器之睡眠模式中,微處理器130會產生控制訊號來關閉運算積體電路140及顯示面板120,使得此時顯示面板120不會消耗液晶顯示器電源110所供給之電源VO1。再者,液晶顯示器供電電路200會關閉電源開關電路240並開啟主機板開關電路230,使得此時第一電源供應單元150所接收之電源VOS係根據主機板210所提供之主機板輸出電源VOM而產生,而非根據液晶顯示器電源110所提供之電源VO1所產生。此時,液晶顯示器電源110處於完全不消耗電能的狀態,因為其消耗電能的路徑完全被封鎖而達成在睡眠模式下節省液晶顯示器電源110的目的。In the sleep mode of the display, the microprocessor 130 generates a control signal to turn off the integrated integrated circuit 140 and the display panel 120, so that the display panel 120 does not consume the power supply VO1 supplied from the liquid crystal display power supply 110. Moreover, the liquid crystal display power supply circuit 200 turns off the power switch circuit 240 and turns on the motherboard switch circuit 230, so that the power supply VOS received by the first power supply unit 150 is based on the motherboard output power VOM provided by the motherboard 210. It is generated instead of the power source VO1 provided by the liquid crystal display power supply 110. At this time, the liquid crystal display power source 110 is in a state in which no power is consumed at all, because the path of its power consumption is completely blocked to achieve the purpose of saving the liquid crystal display power source 110 in the sleep mode.

請參閱圖4,其為本發明之一第三實施例所揭露圖2所示之液晶顯示器供電電路200的示意圖。圖4主要揭露了圖2所示之電源開關電路240與主機板開關電路230的實施方式。如圖4所示,主機板開關電路230係包含一第一二極體D103、一電阻R103、一齊納二極體(Zenar Diode)ZD102及一電容C100。第一二極體D103之一第一端係耦接於主機板210之一電源輸出端,以接收主機板輸出電源VOM。電阻R103之一第一端係耦接於第一二極體D103之一第二端,且電阻R103之一第二端係耦接於第一電源供應單元150之一電源輸入端。齊納二極體ZD102之一第一端係耦接於主機板210之該電源輸出端,且齊納二極體ZD102之一第二端係接地。第一電容C100係並聯於齊納二極體ZD102。電源開關電路240係包含一第二二極體D101及一第三二極體D102。第二二極體D101之一第一端係耦接於液晶顯示器電源110。第三二極體D102之一第一端係耦接於第二二極體D101之一第二端,且第三二極體D102之一第二端係耦接於第一電源供應單元150之該電源輸入端。齊納二極體ZD102及電容C100主要係用來濾除主機板210所產生之主機板輸出電源VOM中所帶之雜訊。Please refer to FIG. 4 , which is a schematic diagram of a liquid crystal display power supply circuit 200 of FIG. 2 according to a third embodiment of the present invention. FIG. 4 primarily discloses an embodiment of the power switch circuit 240 and the motherboard switch circuit 230 shown in FIG. 2. As shown in FIG. 4, the motherboard switching circuit 230 includes a first diode D103, a resistor R103, a Zenar Diode ZD102, and a capacitor C100. The first end of the first diode D103 is coupled to one of the power supply outputs of the motherboard 210 to receive the output power VOM of the motherboard. The first end of the resistor R103 is coupled to one of the second ends of the first diode D103, and the second end of the resistor R103 is coupled to one of the power supply inputs of the first power supply unit 150. The first end of the Zener diode ZD102 is coupled to the power output end of the motherboard 210, and the second end of the Zener diode ZD102 is grounded. The first capacitor C100 is connected in parallel to the Zener diode ZD102. The power switch circuit 240 includes a second diode D101 and a third diode D102. The first end of the second diode D101 is coupled to the liquid crystal display power supply 110. The first end of the third diode D102 is coupled to the second end of the second diode D101, and the second end of the third diode D102 is coupled to the first power supply unit 150. The power input. The Zener diode ZD102 and the capacitor C100 are mainly used to filter out the noise contained in the VOM of the motherboard output power generated by the motherboard 210.

圖4所示之主機板開關電路230及電源開關電路240之運作方式係描述如下。The operation of the motherboard switching circuit 230 and the power switch circuit 240 shown in FIG. 4 is described below.

當顯示器處於正常運作模式時,第二及第三二極體D101及D102係因液晶顯示器電源110所提供之電源VO1而處於正偏壓並因而導通,使得電源開關電路240成開啟狀態;且此時因為顯示器處於正常運作模式,因此主機板210會產生出較大的電流,使得主機板輸出電源VOM經過第一二極體D103與電阻R103被傳輸時,在電阻R103上會產生大於一個二極體所產生之降壓;由 於二極體上的壓降係為一固定值,換言之,電源VO1僅會遭遇第二及第三二極體D101及D102所帶來之二個二極體的固定壓降,但電源VOS除了遭遇第一二極體D103所帶來之單一二極體的固定壓降以外,尚會遭遇到電阻R103上因主機板210之較大電流所產生大於單一二極體之固定壓降的一壓降,因此第一二極體D103此時係處於逆偏狀態,使得主機板210提供之主機板輸出電源VOM被隔絕於第一電源供應單元150之該電壓輸入端。總言之,此時第一電源供應單元150所接收之電源VOS僅由液晶顯示器電源110所提供之電源VO1所提供。When the display is in the normal operation mode, the second and third diodes D101 and D102 are positively biased and thus turned on due to the power supply VO1 provided by the liquid crystal display power supply 110, so that the power switch circuit 240 is turned on; Because the display is in the normal operation mode, the motherboard 210 generates a large current, so that when the motherboard output power VOM is transmitted through the first diode D103 and the resistor R103, a greater than one diode is generated on the resistor R103. Bucker produced by the body; The voltage drop across the diode is a fixed value. In other words, the power supply VO1 will only encounter the fixed voltage drop of the two diodes brought by the second and third diodes D101 and D102, but the power supply VOS In addition to the fixed voltage drop of the single diode brought by the first diode D103, the fixed voltage drop of the resistor R103 due to the larger current of the motherboard 210 is greater than that of the single diode. A voltage drop, so the first diode D103 is in a reverse bias state at this time, so that the motherboard output power VOM provided by the motherboard 210 is isolated from the voltage input terminal of the first power supply unit 150. In summary, the power supply VOS received by the first power supply unit 150 at this time is only provided by the power supply VO1 provided by the liquid crystal display power supply 110.

而當顯示器處於睡眠模式時,主機板210係產生較小之電流,因此電阻R103上所產生的壓降會小於單一二極體的固定壓降;換言之,此時主機板輸出電源VOM所遭遇之壓降僅包含第一二極體D103上的單一二極體的固定壓降及電阻R103上小於單一二極體固定壓降之一壓降。由於液晶顯示器電源110所提供之電源VO1所遭遇之壓降仍然為二個二極體D101、D102所帶來之固定壓降,因此此時第二與第三二極體D101及D102係處於逆偏狀態,且第一二極體D103係處於順偏狀態,使得電源開關電路240被關閉,而主機板開關電路230被開啟。如此一來,在顯示器之睡眠模式下,第一電源供應單元150所接收之電源VOS係根據主機板210所提供之主機板輸出電源VOM所產生。When the display is in the sleep mode, the motherboard 210 generates a small current, so the voltage drop generated on the resistor R103 is smaller than the fixed voltage drop of the single diode; in other words, the motherboard output power VOM is encountered at this time. The voltage drop only includes a fixed voltage drop of the single diode on the first diode D103 and a voltage drop on the resistor R103 that is less than the fixed voltage drop of the single diode. Since the voltage drop encountered by the power supply VO1 provided by the liquid crystal display power supply 110 is still a fixed voltage drop brought by the two diodes D101 and D102, the second and third diodes D101 and D102 are in the opposite state. The bias state, and the first diode D103 is in a forward state, such that the power switch circuit 240 is turned off and the motherboard switch circuit 230 is turned on. In this way, in the sleep mode of the display, the power supply VOS received by the first power supply unit 150 is generated according to the motherboard output power VOM provided by the motherboard 210.

請參閱圖5,其為本發明之一第四實施例所揭露圖2所示之液晶顯示器供電電路200的示意圖,且圖5主要係揭露在該第四實施例中電源開關電路240與主機板開關電路230的詳細實施方式。如圖5所示,主機板開關電路230係包含一N型金氧半電晶體Q1、一第一電阻R203及一第二電阻R151。電源開關電路240 係包含一二極體D201。N型金氧半電晶體Q1之一源極與一閘極係耦接於主機板210之該電源輸出端,以接收主機板輸出電源VOM。第一電阻R203之一第一端係耦接於N型金氧半電晶體Q1之一汲極,且第一電阻R203之一第二端係耦接於第一電源供應單元150之電壓輸入端。第二電阻R151之一第一端係耦接於N型金氧半電晶體Q1之一基極,且第二電阻R151之一第二端係接地。二極體D201之一第一端係耦接於液晶顯示器電源110,且二極體D201之一第二端係耦接於第一電源供應單元150之該電壓輸入端。第二電阻R151係用來調整N型金氧半電晶體Q1之偏壓電流。FIG. 5 is a schematic diagram of a liquid crystal display power supply circuit 200 of FIG. 2 according to a fourth embodiment of the present invention, and FIG. 5 mainly discloses a power switch circuit 240 and a motherboard in the fourth embodiment. A detailed implementation of the switch circuit 230. As shown in FIG. 5, the motherboard switching circuit 230 includes an N-type MOS transistor Q1, a first resistor R203, and a second resistor R151. Power switch circuit 240 The system includes a diode D201. A source and a gate of the N-type MOS transistor Q1 are coupled to the power output end of the motherboard 210 to receive the output power VOM of the motherboard. The first end of the first resistor R203 is coupled to one of the drains of the N-type MOS transistor Q1, and the second end of the first resistor R203 is coupled to the voltage input terminal of the first power supply unit 150. . The first end of one of the second resistors R151 is coupled to one of the bases of the N-type MOS transistor Q1, and the second end of the second resistor R151 is grounded. The first end of the diode D201 is coupled to the liquid crystal display power supply 110, and the second end of the diode D201 is coupled to the voltage input end of the first power supply unit 150. The second resistor R151 is used to adjust the bias current of the N-type MOS transistor Q1.

圖5所示之電源開關電路240及主機板開關電路230之運作方式係說明如下。The operation of the power switch circuit 240 and the motherboard switch circuit 230 shown in FIG. 5 is as follows.

當顯示器進入正常運作模式時,主機板210會產生較大的電流,因而使得主機板輸出電源VOM會在第一電阻R203上遭遇大於單一二極體固定壓降之一壓降(假設N型金氧半電晶體Q1上的壓降可忽略),而液晶顯示器電源110所提供之電源VO1係遭遇二極體D201上單一二極體的固定壓降,因此此時二極體D201係處於順偏,且N型金氧半電晶體Q1會被逆偏壓所關閉。此時,第一電源供應單元150所接收之電源VOS係根據液晶顯示器電源110所提供之電源VO1所產生,而非根據主機板210所提供之主機板輸出電源VOM所產生。When the display enters the normal operation mode, the motherboard 210 generates a large current, so that the motherboard output power VOM encounters a voltage drop greater than the single diode fixed voltage drop on the first resistor R203 (assuming N type) The voltage drop across the gold-oxide semi-transistor Q1 is negligible, and the power supply VO1 provided by the liquid crystal display power supply 110 encounters a fixed voltage drop of the single diode on the diode D201, so the diode D201 is at this time Conversely, the N-type MOS transistor Q1 is turned off by the reverse bias. At this time, the power source VOS received by the first power supply unit 150 is generated according to the power source VO1 provided by the liquid crystal display power source 110, and is not generated according to the motherboard output power source VOM provided by the motherboard 210.

當顯示器進入睡眠模式時,主機板210會產生較小的電流,因而使得主機板輸出電源VOM會在第一電阻R203上遭遇小於單一二極體固定壓降之一壓降,且液晶顯示器電源110所提供之電源VO1仍然僅遭遇二極體D201上單一二極體的固定壓降,因此 此時二極體D201係處於逆偏,且N型金氧半電晶體Q1會被正偏壓所開啟。此時,第一電源供應單元150所接收之電源VOS係根據主機板210所提供之主機板輸出電源VOM所產生,而非根據液晶顯示器電源110所提供之電源VO1所產生。When the display enters the sleep mode, the motherboard 210 generates a small current, so that the motherboard output power VOM will encounter a voltage drop lower than the single diode fixed voltage drop on the first resistor R203, and the liquid crystal display power supply The power supply VO1 provided by 110 still only encounters the fixed voltage drop of the single diode on the diode D201, so At this time, the diode D201 is reverse biased, and the N-type MOS transistor Q1 is turned on by a positive bias. At this time, the power supply VOS received by the first power supply unit 150 is generated according to the motherboard output power VOM provided by the motherboard 210, and is not generated according to the power supply VO1 provided by the liquid crystal display power supply 110.

本發明之實施例係另外揭露一種以主動切換顯示器之正常運作模式與睡眠模式之一控制訊號來切換液晶顯示器電源或主機板來供電的液晶顯示器供電電路,其中該液晶顯示器供電電路所包含之液晶顯示器電源亦需要以該控制訊號來操作,方能達成切換液晶顯示器電源或主機板來供電的機制。請參閱圖6及圖7,圖6與圖7為本發明之一第五實施例所揭露一液晶顯示器供電電路500的示意圖,且圖6主要係揭露在該第五實施例中一電源開關電路540與主機板開關電路530的詳細實施方式,且圖7主要係揭露在該第五實施例中一液晶顯示器電源410的實施方式。此外,圖6所示之液晶顯示器供電電路500與圖7所示之液晶顯示器電源410中皆需以一控制訊號ON/OFF來控制以觸發切換電源之機制;控制訊號ON/OFF在顯示器之正常運作模式時係為高電位,且控制訊號ON/OFF在顯示器之睡眠模式時係為低電位。The embodiment of the present invention further discloses a liquid crystal display power supply circuit for switching power supply of a liquid crystal display or a motherboard by actively switching one of a normal operation mode and a sleep mode of a display, wherein the liquid crystal display power supply circuit comprises a liquid crystal The display power supply also needs to operate with the control signal to achieve the mechanism of switching the power of the liquid crystal display or the motherboard to supply power. Referring to FIG. 6 and FIG. 7 , FIG. 6 and FIG. 7 are schematic diagrams of a liquid crystal display power supply circuit 500 according to a fifth embodiment of the present invention, and FIG. 6 mainly discloses a power switch circuit in the fifth embodiment. A detailed implementation of the 540 and motherboard switch circuit 530, and FIG. 7 primarily discloses an embodiment of a liquid crystal display power supply 410 in the fifth embodiment. In addition, the liquid crystal display power supply circuit 500 shown in FIG. 6 and the liquid crystal display power supply 410 shown in FIG. 7 all need to be controlled by a control signal ON/OFF to trigger the switching power supply; the control signal ON/OFF is normal in the display. The operating mode is high and the control signal ON/OFF is low during the sleep mode of the display.

如圖6所示,在液晶顯示器供電電路500中係包含有第一、第二電源供應單元150、160及對應之第一、第二濾波模組170、180,並另包含主機板開關電路530、電源開關電路540及液晶顯示器電源410。主機板開關電路530係包含一第一npn型雙載子接面電晶體(Bipolar Junction Transistor,BJT)Q303、一第二npn型雙載子接面電晶體Q302、一第一二極體D302、一電容C313及一電阻R356,而電源開關電路240係包含一第二二極體D301。第一npn型雙載子接面電晶體Q303之集極係耦接於主機板210之該電 源輸出端,以接收主機板輸出電源VOM,且第一npn型雙載子接面電晶體Q303之基極係耦接於一控制訊號ON/OFF,以對應於控制訊號ON/OFF的不同(亦即顯示器睡眠模式與正常運作模式的不同)來變更其開啟狀態。第二npn型雙載子接面電晶體Q302之集極係耦接於第一npn型雙載子接面電晶體Q303之基極,且第二npn型雙載子接面電晶體Q302之射極係接地。第一二極體D302之一第一端係耦接於第一npn型雙載子接面電晶體Q303之射極,且第一二極體D302之一第二端係耦接於第一電源供應單元150之該電壓輸入端。電阻R356之一第一端係耦接於第一npn型雙載子接面電晶體Q303之集極,且電阻R356之一第二端係耦接於第一npn型雙載子接面電晶體Q303之基極。電容C313之一第一端係耦接於第一二極體D302之該第二端,且電容C313之一第二端係耦接於第二npn型雙載子電晶體Q302之射極。第二二極體D301之一第一端係耦接於液晶顯示器電源110以接收電源VO1,且第二二極體D301之一第二端係耦接於第一電源供應單元150。As shown in FIG. 6, the liquid crystal display power supply circuit 500 includes first and second power supply units 150 and 160 and corresponding first and second filter modules 170 and 180, and further includes a motherboard switch circuit 530. The power switch circuit 540 and the liquid crystal display power source 410. The motherboard switching circuit 530 includes a first npn-type bipolar junction transistor (BJT) Q303, a second npn-type bipolar junction transistor Q302, and a first diode D302. A capacitor C313 and a resistor R356, and the power switch circuit 240 includes a second diode D301. The collector of the first npn-type bipolar junction transistor Q303 is coupled to the battery of the motherboard 210 The source output terminal receives the output power VOM of the motherboard, and the base of the first npn-type dual-carrier junction transistor Q303 is coupled to a control signal ON/OFF to correspond to the difference of the control signal ON/OFF ( That is, the display sleep mode is different from the normal operation mode to change its on state. The collector of the second npn-type bipolar junction transistor Q302 is coupled to the base of the first npn-type bipolar junction transistor Q303, and the second npn-type bipolar junction transistor Q302 is emitted. The pole is grounded. The first end of the first diode D302 is coupled to the emitter of the first npn-type bipolar junction transistor Q303, and the second end of the first diode D302 is coupled to the first power source. The voltage input of the supply unit 150. The first end of the resistor R356 is coupled to the collector of the first npn-type bipolar junction transistor Q303, and the second end of the resistor R356 is coupled to the first npn-type bipolar junction transistor. The base of Q303. The first end of the capacitor C313 is coupled to the second end of the first diode D302, and the second end of the capacitor C313 is coupled to the emitter of the second npn-type bipolar transistor Q302. The first end of the second diode D301 is coupled to the liquid crystal display power supply 110 to receive the power supply VO1, and the second end of the second diode D301 is coupled to the first power supply unit 150.

如圖7所示,液晶顯示器電源410係包含一第一開關模組460、一第一電源轉換模組430、一第二開關模組480、一電源供應單元450及一第二電源轉換模組420。第一開關模組460之一輸入端係耦接於主機板210之電源輸出端,亦即圖6中所示之電源PC5V,以由主機板210接收電源PC5V。第一開關模組460係用來根據控制訊號ON/OFF決定是否根據電源PC5V來產生一電源VP1,亦即根據顯示器係處於睡眠模式或正常運作模式來決定是否產生電源VP1;換言之,第一開關模組460係為決定是否輸出電源VP1的開關。第一電源轉換模組430之一輸入端係耦接於第一開關模組460之一輸出端。當第一電源轉換模組430接收到一高 電位之電源VP1而使得第一電源轉換模組430之輸入端S1與一接地之輸入端S2之間產生一正電位差時,第一電源轉換模組430之一輸出端S3與一接地之輸入端S4之間會被導通。第二開關模組480之一輸入端係耦接於第一電源轉換模組430之輸出端S3,且第二開關模組480亦另外外接於一直流電源VDD。第二開關模組480係根據第一電源轉換模組430中之輸出端S3與S4之間是否導通,並根據直流電源VDD來產生一電源VP3,換言之,第二開關模組480係為決定是否輸出電源VP3的開關;在本發明之一實施例中,輸出端S3與S4之間可設置一電晶體,且該電晶體係根據輸入端S1、S2之間是否有電位差來控制是否導通,以產生輸出端S3、S4之間的導通電流。電源供應單元450之一開關控制端Power係耦接於第二開關模組480之一輸出端,當開關控制端Power所接收之電源VP3係處於高電位時,電源供應單元450係供應一電源VCCO;當開關控制端Power所接收之電源VP3係處於低電位時,電源供應單元450不供應電源VCCO。第二電源轉換模組420之一輸入端係耦接於電源供應單元450之一輸出端,且第二電源轉換模組420之一輸出端係耦接於圖6所示液晶顯示器電源410之該輸出端,且第二電源轉換模組420係將電源VCCO轉換為圖6所示之電源VCC5V,以將電源VCC5V輸出於液晶顯示器電源410之輸出端並供應給電源開關電路540。As shown in FIG. 7, the liquid crystal display power supply 410 includes a first switch module 460, a first power conversion module 430, a second switch module 480, a power supply unit 450, and a second power conversion module. 420. The input end of the first switch module 460 is coupled to the power output end of the motherboard 210, that is, the power supply PC5V shown in FIG. 6, to receive the power supply PC5V from the motherboard 210. The first switch module 460 is configured to determine whether to generate a power source VP1 according to the power source PC5V according to the control signal ON/OFF, that is, whether to generate the power source VP1 according to whether the display system is in the sleep mode or the normal operation mode; in other words, the first switch The module 460 is a switch that determines whether or not to output the power source VP1. An input end of the first power conversion module 430 is coupled to an output end of the first switch module 460. When the first power conversion module 430 receives a high When the potential power source VP1 generates a positive potential difference between the input terminal S1 of the first power conversion module 430 and the grounded input terminal S2, the output terminal S3 of the first power conversion module 430 and a grounded input terminal S4 will be turned on. The input end of the second switch module 480 is coupled to the output end S3 of the first power conversion module 430, and the second switch module 480 is additionally connected to the DC power supply VDD. The second switch module 480 is based on whether the output terminals S3 and S4 of the first power conversion module 430 are turned on, and generates a power source VP3 according to the DC power source VDD. In other words, the second switch module 480 determines whether The switch of the output power source VP3; in an embodiment of the invention, a transistor can be disposed between the output terminals S3 and S4, and the electro-crystal system controls whether the conduction is based on whether there is a potential difference between the input terminals S1 and S2, An on current between the output terminals S3, S4 is generated. One of the power supply unit 450 is connected to one of the output terminals of the second switch module 480. When the power supply VP3 received by the switch control terminal Power is at a high potential, the power supply unit 450 supplies a power supply VCCO. When the power supply VP3 received by the switch control terminal Power is at a low potential, the power supply unit 450 does not supply the power supply VCCO. An input end of the second power conversion module 420 is coupled to an output end of the power supply unit 450, and an output end of the second power conversion module 420 is coupled to the liquid crystal display power supply 410 of FIG. The output terminal, and the second power conversion module 420 converts the power source VCCO into the power source VCC5V shown in FIG. 6 to output the power source VCC5V to the output end of the liquid crystal display power source 410 and supplies it to the power switch circuit 540.

第一開關模組460係包含一pnp型雙載子接面電晶體Q801及一電阻R847。pnp型雙載子接面電晶體Q801之一射極係耦接於主機板210之電源輸出端以接收電源PC5V,且pnp型雙載子接面電晶體Q801之一基極係耦接於控制訊號ON/OFF。電阻R847之一第一端係耦接於pnp型雙載子接面電晶體Q801之集極,且電 阻R847之一第二端係耦接於第一電源轉換模組430之輸入端S1。第二開關模組480係包含一npn型雙載子接面電晶體Q802及二電阻R804、R805。npn型雙載子接面電晶體Q802之一集極係耦接於直流電源VDD,且npn型雙載子接面電晶體Q802之一射極係耦接於電源供應單元450之開關控制端Power。電阻R804之一第一端係耦接於第一電源轉換模組430之輸出端S3,且電阻R804之一第二端係耦接於npn型雙載子接面電晶體Q802之一基極。電阻R805之一第一端係耦接於電阻R804之第二端,且電阻R805之一第二端係耦接於npn型雙載子接面電晶體Q802之集極。The first switch module 460 includes a pnp type bipolar junction transistor Q801 and a resistor R847. An emitter of the pnp type bipolar junction transistor Q801 is coupled to the power output end of the motherboard 210 to receive the power supply PC5V, and a base of the pnp type dual carrier junction transistor Q801 is coupled to the control. Signal ON/OFF. The first end of the resistor R847 is coupled to the collector of the pnp type bipolar junction transistor Q801, and is electrically The second end of the resistor R847 is coupled to the input end S1 of the first power conversion module 430. The second switch module 480 includes an npn-type bipolar junction transistor Q802 and two resistors R804 and R805. One of the collectors of the npn-type bipolar junction transistor Q802 is coupled to the DC power supply VDD, and one of the emitters of the npn-type bipolar junction transistor Q802 is coupled to the switching control terminal of the power supply unit 450. . The first end of the resistor R804 is coupled to the output end S3 of the first power conversion module 430, and the second end of the resistor R804 is coupled to one of the bases of the npn-type bipolar junction transistor Q802. The first end of the resistor R805 is coupled to the second end of the resistor R804, and the second end of the resistor R805 is coupled to the collector of the npn-type bipolar junction transistor Q802.

圖6所示之電源開關電路540及主機板開關電路530之運作方式係與圖7所示之液晶顯示器電源410共同說明如下。當顯示器進入正常運作模式時,控制訊號ON/OFF係為一高電位訊號,使得第二npn型雙載子接面電晶體Q302被開啟,且第一npn型雙載子接面電晶體Q303會被第二npn型雙載子接面電晶體Q302之導通電流拉低其基極電位而關閉。如此一來,電源PC5V傳遞至第一電源供應單元150之輸入端的剩餘電位會較電源VCC5V傳遞至第一電源供應單元150之輸入端的剩餘電位來的低,而使得電源VOS相對於第一二極體D302產生了逆偏壓,使得主機板210提供之電源PC5V將會被隔絕於第一電源供應單元150,而由液晶顯示器電源410供應之電源VCC5V透過第二二極體D301來產生電源VOS並供應給第一電源供應單元150。在此同時,在液晶顯示器電源410中,由於控制訊號ON/OFF係為高電位,因此pnp型雙載子接面電晶體Q801會被關閉,並進而使得圖7所示之電源VP1無法被產生出來。由於第一電源轉換模組430沒有接收到電源VP1,因此第一電源轉換模組430之輸出端S3、S4之間不會導 通而產生電流;如此一來,npn雙載子接面電晶體Q802不會因為輸出端S3、S4之間的電流而拉低其基極的電位,使得npn雙載子接面電晶體Q802呈現導通狀態,並使得電源VP3處於高電位。電源供應單元450在收到處於高電位的電源VP3後,會據以供應電源VCCO給第二電源轉換模組420,而在最後產生電源VCC5V,並將電源VCC5V據以供應給圖6所示之電源開關電路540。The operation mode of the power switch circuit 540 and the motherboard switch circuit 530 shown in FIG. 6 is explained in conjunction with the liquid crystal display power supply 410 shown in FIG. When the display enters the normal operation mode, the control signal ON/OFF is a high potential signal, so that the second npn type double carrier junction transistor Q302 is turned on, and the first npn type double carrier junction transistor Q303 will The on-current of the second npn-type bipolar junction transistor Q302 is turned off and its base potential is turned off. As a result, the remaining potential of the power supply PC5V to the input end of the first power supply unit 150 is lower than the remaining potential of the power supply VCC5V to the input end of the first power supply unit 150, so that the power supply VOS is relative to the first two poles. The body D302 generates a reverse bias so that the power supply PC5V provided by the motherboard 210 is to be isolated from the first power supply unit 150, and the power supply VCC5V supplied from the liquid crystal display power supply 410 transmits the power supply VOS through the second diode D301. It is supplied to the first power supply unit 150. At the same time, in the liquid crystal display power supply 410, since the control signal ON/OFF is high, the pnp type dual-carrier junction transistor Q801 is turned off, and thus the power supply VP1 shown in FIG. 7 cannot be generated. come out. Since the first power conversion module 430 does not receive the power supply VP1, the output terminals S3 and S4 of the first power conversion module 430 are not guided. Therefore, the current is generated; thus, the npn bipolar junction transistor Q802 does not pull down the potential of the base due to the current between the output terminals S3 and S4, so that the npn bipolar junction transistor Q802 is presented. The state is turned on and the power supply VP3 is at a high potential. After receiving the power supply VP3 at a high potential, the power supply unit 450 supplies the power supply VCCO to the second power conversion module 420, and finally generates the power supply VCC5V, and supplies the power supply VCC5V to the power supply shown in FIG. 6. Power switch circuit 540.

當顯示器進入睡眠模式時,控制訊號ON/OFF會處於一低電位,使得第二npn型雙載子接面電晶體Q302被關閉,且第一npn型雙載子接面電晶體Q303會因為基極電位未被拉低而開啟。如此一來,由於電源PC5V傳遞至第一電源供應單元150時的剩餘電位較電源VCC5V傳遞至第一電源供應單元150時的剩餘電位高,電源VOS會對第二二極體D301產生逆偏壓而將液晶顯示器電源410供應之電源VCC5V隔絕於第一電源供應單元150,並由主機板210提供之電源PC5V來產生電源VOS並供應給第一電源供應單元150。而在液晶顯示器電源410中,pnp型雙載子接面電晶體Q801會被位於其基極之低電位的控制訊號ON/OFF所開啟,因而使得第一開關模組460在第一電源轉換模組430之輸入端S1上產生了高電位之電源VP1。第一電源轉換模組430會根據高電位之電源VP1而使第一電源轉換模組430之輸出端S3、S4之間導通。在第二開關模組480中,npn型雙載子接面電晶體Q802之基極會因為輸出端S3、S4間的導通電流而被拉低電位,並進而使得npn型雙載子接面電晶體Q802被關閉,因此第二開關模組Q802所輸出之電源VP3此時係為低電位。電源供應單元450之開關控制端Power接收到低電位的電源VP3後,會停止供應電源VCCO,因 此第二電源轉換模組420亦無法據以產生電源VCC5V,使得圖6中液晶顯示器電源410亦無法提供電源VCC5V給電源開關電路540。When the display enters the sleep mode, the control signal ON/OFF will be at a low potential, so that the second npn-type bipolar junction transistor Q302 is turned off, and the first npn-type bipolar junction transistor Q303 will be based on the base. The pole potential is turned on without being pulled low. In this way, since the residual potential when the power source PC5V is transmitted to the first power supply unit 150 is higher than the residual potential when the power source VCC5V is transmitted to the first power supply unit 150, the power supply VOS generates a reverse bias to the second diode D301. The power supply VCC5V supplied from the liquid crystal display power supply 410 is isolated from the first power supply unit 150, and the power supply VOB supplied from the motherboard 210 is used to generate the power supply VOS and supplied to the first power supply unit 150. In the liquid crystal display power supply 410, the pnp type dual-carrier junction transistor Q801 is turned on by the low-level control signal ON/OFF of the base thereof, thereby causing the first switching module 460 to be in the first power conversion mode. A high potential power supply VP1 is developed at input S1 of group 430. The first power conversion module 430 turns on between the output terminals S3 and S4 of the first power conversion module 430 according to the high-potential power source VP1. In the second switch module 480, the base of the npn-type bipolar junction transistor Q802 is pulled low due to the conduction current between the output terminals S3 and S4, and thus the npn-type dual carrier junction is electrically The crystal Q802 is turned off, so the power supply VP3 outputted by the second switching module Q802 is low at this time. After the switch control terminal Power of the power supply unit 450 receives the low-level power supply VP3, the power supply VCCO is stopped, because The second power conversion module 420 is also unable to generate the power source VCC5V, so that the liquid crystal display power source 410 in FIG. 6 cannot supply the power source VCC5V to the power switch circuit 540.

藉由圖6與圖7中以控制訊號ON/OFF主動根據顯示器之正常運作模式與睡眠模式下所使用之電源的方式,除了可以如之前各實施例般將需被隔絕之電源以逆偏壓的方式隔絕於供電路徑之外,尚可藉由直接關閉液晶顯示器電源410之供電來進一步確保液晶顯示器供電電路500在睡眠模式下的功率消耗。In FIG. 6 and FIG. 7, the control signal ON/OFF is actively activated according to the normal operation mode of the display and the power source used in the sleep mode, except that the power supply to be isolated can be reverse biased as in the previous embodiments. The manner of isolation from the power supply path further ensures power consumption of the liquid crystal display power supply circuit 500 in the sleep mode by directly turning off the power supply of the liquid crystal display power supply 410.

本發明之實施例揭露之液晶顯示器供電電路係在顯示器之睡眠模式下隔絕液晶顯示器電源之供電,並改由需要隨時被供電的主機板來進行睡眠模式下的供電。如此一來,液晶顯示器電源在顯示器之睡眠模式下原本會被消耗但不需要消耗的功率會被轉嫁至原本即需隨時被供電的主機板,而省下了液晶顯示器電源在睡眠模式下的不必要功率消耗。The liquid crystal display power supply circuit disclosed in the embodiment of the present invention isolates the power supply of the liquid crystal display power supply in the sleep mode of the display, and replaces the power supply in the sleep mode by the motherboard that needs to be powered at any time. In this way, the power of the liquid crystal display will be consumed in the sleep mode of the display, but the power that does not need to be consumed will be transferred to the motherboard that needs to be powered at any time, and the power of the liquid crystal display in the sleep mode is saved. Necessary power consumption.

雖然本發明以前述之較佳實施例揭露如上,然其並非用以限定本發明,任何熟習相像技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The patent protection scope of the invention is subject to the definition of the scope of the patent application attached to the specification.

100、200、500‧‧‧液晶顯示器供電電路100, 200, 500‧‧‧ liquid crystal display power supply circuit

110、410‧‧‧液晶顯示器電源110,410‧‧‧LCD power supply

120‧‧‧顯示面板120‧‧‧ display panel

130‧‧‧微處理器130‧‧‧Microprocessor

140‧‧‧運算積體電路140‧‧‧Computed integrated circuit

150、160、450‧‧‧電源供應單元150, 160, 450‧‧‧ power supply unit

170、180‧‧‧濾波模組170, 180‧‧‧ Filter Module

210‧‧‧主機板210‧‧‧ motherboard

230、530‧‧‧主機板開關電路230, 530‧‧‧ motherboard switch circuit

240、540‧‧‧電源開關電路240, 540‧‧‧ power switch circuit

420、430‧‧‧電源轉換模組420, 430‧‧‧ power conversion module

460、480‧‧‧開關模組460, 480‧‧‧ switch module

D101、D102、D103、D201、 D301、D302‧‧‧二極體D101, D102, D103, D201, D301, D302‧‧‧ diode

ZD102‧‧‧齊納二極體ZD102‧‧‧Zina diode

C100、C313‧‧‧電容C100, C313‧‧‧ capacitor

Q1、Q302、Q303、Q801、Q802‧‧‧電晶體Q1, Q302, Q303, Q801, Q802‧‧‧O crystal

R151、R203、R356、R847、R805、 R804‧‧‧電阻R151, R203, R356, R847, R805, R804‧‧‧resistance

圖1為一般液晶顯示器供電電路的示意圖。FIG. 1 is a schematic diagram of a power supply circuit of a general liquid crystal display.

圖2及圖3分別為本發明之第一及第二實施例所揭露之液晶顯示器供電電路的示意圖,其中液晶顯示器供電電路係耦接於主機板,並用來提供圖1所示之微處理器、顯示面板及運算積體電路之三種不同電位的電源。FIG. 2 and FIG. 3 are schematic diagrams showing the power supply circuit of the liquid crystal display according to the first and second embodiments of the present invention, wherein the liquid crystal display power supply circuit is coupled to the motherboard and used to provide the microprocessor shown in FIG. The power supply of the display panel and the three different potentials of the integrated circuit.

圖4及圖5分別為本發明之第三及第四實施例所揭露圖2所示之液晶顯示器供電電路的示意圖。4 and FIG. 5 are schematic diagrams showing the power supply circuit of the liquid crystal display device of FIG. 2 according to the third and fourth embodiments of the present invention.

圖6與圖7為本發明之第五實施例所揭露液晶顯示器供電電路的示意圖,其中圖6所示之液晶顯示器供電電路與圖7所示之液晶顯示器電源中皆需以一控制訊號來控制以觸發切換電源之機制。FIG. 6 and FIG. 7 are schematic diagrams showing a power supply circuit of a liquid crystal display according to a fifth embodiment of the present invention, wherein the power supply circuit of the liquid crystal display shown in FIG. 6 and the power supply of the liquid crystal display shown in FIG. 7 are controlled by a control signal. To trigger the mechanism of switching power.

200‧‧‧液晶顯示器供電電路200‧‧‧LCD display power supply circuit

110‧‧‧液晶顯示器電源110‧‧‧LCD power supply

120‧‧‧顯示面板120‧‧‧ display panel

130‧‧‧微處理器130‧‧‧Microprocessor

140‧‧‧運算積體電路140‧‧‧Computed integrated circuit

150、160‧‧‧電源供應單元150, 160‧‧‧Power supply unit

170、180‧‧‧濾波模組170, 180‧‧‧ Filter Module

210‧‧‧主機板210‧‧‧ motherboard

230‧‧‧主機板開關電路230‧‧‧ motherboard switch circuit

240‧‧‧電源開關電路240‧‧‧Power switch circuit

Claims (18)

一種液晶顯示器供電電路,包含:一主機板開關電路,其一輸入端係耦接於一主機板之一電源輸出端;一液晶顯示器電源;一電源開關電路,其一輸入端係耦接於該液晶顯示器電源;及一第一電源供應單元,耦接於該主機板開關電路之一輸出端、該電源開關電路之一輸出端及一微處理器,用來將該主機板或該液晶顯示器電源之電源供應給該微處理器。 A liquid crystal display power supply circuit comprises: a motherboard switching circuit, wherein an input end is coupled to a power output end of a motherboard; a liquid crystal display power supply; and a power switch circuit, an input end of which is coupled to the a power supply unit of the liquid crystal display; and a first power supply unit coupled to an output end of the switch circuit of the motherboard, an output end of the power switch circuit, and a microprocessor for powering the motherboard or the liquid crystal display The power is supplied to the microprocessor. 如申請專利範圍第1項所述之液晶顯示器供電電路,其中,當一顯示器進入一正常運作模式時,該主機板開關電路係關閉,且該電源開關電路係開啟,使得該液晶顯示器電源之該電源係通過該電源開關電路而被供應於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 1, wherein when a display enters a normal operation mode, the motherboard switch circuit is turned off, and the power switch circuit is turned on, so that the liquid crystal display power supply is A power source is supplied to the first power supply unit through the power switch circuit. 如申請專利範圍第1項所述之液晶顯示器供電電路,其中,當一顯示器進入一睡眠模式時,該主機板開關電路係開啟,且該電源開關電路係關閉,使得該主機板之一主機板輸出電源係通過該主機板開關電路而被供應於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 1, wherein when a display enters a sleep mode, the motherboard switch circuit is turned on, and the power switch circuit is turned off, so that one of the motherboards of the motherboard The output power source is supplied to the first power supply unit through the motherboard switch circuit. 如申請專利範圍第1項所述之液晶顯示器供電電路,其中,該主機板開關電路係包含:一第一二極體,其一第一端係耦接於該主機板之該電源輸出端;及 一電阻,其一第一端係耦接於該第一二極體之一第二端,且該電阻之一第二端係耦接於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 1, wherein the motherboard switching circuit comprises: a first diode, a first end of which is coupled to the power output end of the motherboard; and And a first end of the resistor is coupled to the second end of the first diode, and the second end of the resistor is coupled to the first power supply unit. 如申請專利範圍第4項所述之液晶顯示器供電電路,其中,該主機板開關電路係更包含:一齊納二極體(Zenar Diode),其一第一端係耦接於該主機板之該電源輸出端,且該齊納二極體之一第二端係接地;及一第一電容,並聯於該齊納二極體。 The liquid crystal display power supply circuit of claim 4, wherein the motherboard switching circuit further comprises: a Zenar Diode, wherein a first end is coupled to the motherboard a power output end, and a second end of the Zener diode is grounded; and a first capacitor is connected in parallel to the Zener diode. 如申請專利範圍第4項所述之液晶顯示器供電電路,其中,該電源開關電路係包含:一第二二極體,其一第一端係耦接於該液晶顯示器電源;及一第三二極體,其一第一端係耦接於該第二二極體之一第二端,且該第三二極體之一第二端係耦接於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 4, wherein the power switch circuit comprises: a second diode, a first end of which is coupled to the liquid crystal display power supply; and a third The first end of the second diode is coupled to the second end of the second diode, and the second end of the third diode is coupled to the first power supply unit. 如申請專利範圍第1項所述之液晶顯示器供電電路,其中,該主機板開關電路係包含:一N型金氧半電晶體,其一源極與一閘極係耦接於該主機板之該電源輸出端;及一第一電阻,其一第一端係耦接於該N型金氧半電晶體之一汲極,且該第一電阻之一第二端係耦接於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 1, wherein the motherboard switching circuit comprises: an N-type MOS transistor, wherein a source and a gate are coupled to the motherboard The first output of the first resistor is coupled to one of the N-type MOS transistors, and the second end of the first resistor is coupled to the first Power supply unit. 如申請專利範圍第7項所述之液晶顯示器供電電路,其中,該主機板開關電路更包含:一第二電阻,其一第一端係耦接於該N型金氧半電晶體之一基極,且該第二電阻之一第二端係接地。 The liquid crystal display power supply circuit of claim 7, wherein the motherboard switching circuit further comprises: a second resistor, a first end of which is coupled to one of the N-type MOS transistors And a second end of the second resistor is grounded. 如申請專利範圍第7項所述之液晶顯示器供電電路,其中, 該電源開關電路係包含:一第四二極體,其一第一端係耦接於該液晶顯示器電源,且該第四二極體之一第二端係耦接於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 7, wherein The power switch circuit includes a fourth diode, a first end of which is coupled to the liquid crystal display power source, and a second end of the fourth diode is coupled to the first power supply unit . 如申請專利範圍第1項所述之液晶顯示器供電電路,其中,該主機板開關電路係包含:一第一npn型雙載子接面電晶體,其集極係耦接於該主機板之該電源輸出端,且該第一npn型雙載子接面電晶體之基極係耦接於一控制訊號;一第二npn型雙載子接面電晶體,其集極係耦接於該第一npn型雙載子接面電晶體之基極,且該第二npn型雙載子接面電晶體之射極係接地;及一第五二極體,其一第一端係耦接於該第一npn型雙載子接面電晶體之射極,且該第五二極體之一第二端係耦接於該第一電源供應單元;其中當包含該顯示器供電電路之一顯示器係進入睡眠模式時,該控制訊號之電位係為一低電位。 The liquid crystal display power supply circuit of claim 1, wherein the motherboard switching circuit comprises: a first npn-type dual-carrier junction transistor, wherein the collector is coupled to the motherboard a power supply output end, and a base of the first npn-type bipolar-substrate transistor is coupled to a control signal; a second npn-type dual-carrier junction transistor, the collector of which is coupled to the first An anode of the npn-type bipolar junction transistor, and an emitter of the second npn-type bipolar junction transistor is grounded; and a fifth diode, a first end of which is coupled to An emitter of the first npn-type bipolar junction transistor, and a second end of the fifth diode is coupled to the first power supply unit; wherein the display system includes one of the display power supply circuits When entering the sleep mode, the potential of the control signal is a low potential. 如申請專利範圍第10項所述之液晶顯示器供電電路,其中,該主機板開關電路係更包含:一電阻,其一第一端係耦接於該第一npn型雙載子接面電晶體之該集極,且該電阻之一第二端係耦接於該第一npn型雙載子接面電晶體之該基極;一電容,其一第一端係耦接於該第五二極體之該第二端,且該電容之一第二端係耦接於該第二npn型雙載子電晶體之該射極。 The liquid crystal display power supply circuit of claim 10, wherein the motherboard switching circuit further comprises: a resistor, a first end of which is coupled to the first npn type dual carrier junction transistor The collector is coupled to the base of the first npn-type bipolar junction transistor; a capacitor having a first end coupled to the fifth The second end of the capacitor is coupled to the emitter of the second npn-type bipolar transistor. 如申請專利範圍第10項所述之液晶顯示器供電電路,其中, 該電源開關電路係包含:一第六二極體,其一第一端係耦接於該液晶顯示器電源,且該第六二極體之一第二端係耦接於該第一電源供應單元。 The liquid crystal display power supply circuit of claim 10, wherein The power switch circuit includes a sixth diode, a first end of which is coupled to the liquid crystal display power source, and a second end of the sixth diode is coupled to the first power supply unit . 如申請專利範圍第10項所述之液晶顯示器供電電路,其中,該液晶顯示器電源係包含:一第一開關模組,其一輸入端係耦接於該主機板之該電源輸出端,該第一開關模組係用來根據該控制訊號決定是否根據該主機板所產生之一第一電源來產生一第二電源;一第一電源轉換模組,其一輸入端係耦接於該第一開關模組之一輸出端,該第一電源轉換模組係根據該第二電源是否處於一高電位來導通其一第一輸出端與一第二輸出端之間的電流;一第二開關模組,其一輸入端係耦接於該第一電源轉換模組之該第一輸出端,該第二開關模組係用來根據該第一電源轉換模組之該第一輸出端與該第二輸出端之間是否產生導通電流來產生一第三電源;一第二電源供應單元,其一開關控制端係耦接於該第二開關模組之一輸出端,該第二電源供應單元係根據該第三電源是否處於一高電位來產生一第四電源;及一第二電源轉換模組,其一輸入端係耦接於該第二電源供應單元之一輸出端,該第二電源轉換模組之一輸出端係耦接於該電源開關電路之該輸出端,且該第二電源轉換模組係將該第四電源轉換為一第五電源,並將該第五電源輸出於該電源開關電路之該輸出端。 The liquid crystal display power supply circuit of claim 10, wherein the liquid crystal display power supply comprises: a first switch module, wherein an input end is coupled to the power output end of the motherboard, the first a switch module is configured to determine whether to generate a second power source according to the first power source generated by the motherboard according to the control signal; a first power conversion module, an input end of which is coupled to the first An output terminal of the switch module, the first power conversion module is configured to conduct current between a first output end and a second output end according to whether the second power source is at a high potential; a second switch mode An input end is coupled to the first output end of the first power conversion module, and the second switch module is configured to be configured according to the first output end of the first power conversion module A second power supply is generated between the two output terminals; a second power supply unit has a switch control end coupled to an output end of the second switch module, the second power supply unit According to whether the third power source is And generating a fourth power source at a high potential; and a second power conversion module, wherein an input end is coupled to an output end of the second power supply unit, and an output end of the second power conversion module Is coupled to the output end of the power switch circuit, and the second power conversion module converts the fourth power source into a fifth power source, and outputs the fifth power source to the output end of the power switch circuit . 如申請專利範圍第13項所述之液晶顯示器供電電路,其中,該第一開關模組係包含: 一pnp型雙載子接面電晶體,其一射極係耦接於該主機板之該電源輸出端,且該pnp型雙載子接面電晶體之一基極係耦接於該控制訊號;及一第一電阻,其一第一端係耦接於該pnp型雙載子接面電晶體之集極,且該第一電阻之一第二端係耦接於該第一電源轉換模組。 The liquid crystal display power supply circuit of claim 13, wherein the first switch module comprises: a pnp type dual-carrier junction transistor, wherein an emitter is coupled to the power output of the motherboard, and a base of the pnp-type dual-carrier transistor is coupled to the control signal And a first resistor coupled to the collector of the pnp-type bipolar junction transistor, and the second end of the first resistor is coupled to the first power conversion mode group. 如申請專利範圍第13項所述之液晶顯示器供電電路,其中,該第二開關模組係包含:一第三npn型雙載子接面電晶體,其一集極係耦接於一直流電源,且該第三npn型雙載子接面電晶體之一射極係耦接於該第二電源供應單元之該開關控制端;一第二電阻,其一第一端係耦接於該第一電源轉換模組之該第一輸出端,且該第二電阻之一第二端係耦接於該第三npn型雙載子接面電晶體之一基極;及一第三電阻,其一第一端係耦接於該第二電阻之該第二端,且該第三電阻之一第二端係耦接於該第三npn型雙載子接面電晶體之該集極。 The liquid crystal display power supply circuit of claim 13, wherein the second switch module comprises: a third npn type double carrier junction transistor, wherein a collector is coupled to the DC power supply And an emitter of the third npn-type bipolar junction transistor is coupled to the switch control end of the second power supply unit; a second resistor coupled to the first end of the second resistor a first output end of the power conversion module, and a second end of the second resistor is coupled to one of the bases of the third npn-type bipolar junction transistor; and a third resistor A first end is coupled to the second end of the second resistor, and a second end of the third resistor is coupled to the collector of the third npn-type bipolar junction transistor. 如申請專利範圍第1項所述之液晶顯示器供電電路,更包含:一第一濾波模組,用來濾除該電源供應單元所接收之一電源中所包含之雜訊。 The liquid crystal display power supply circuit of claim 1, further comprising: a first filter module for filtering noise contained in one of the power sources received by the power supply unit. 如申請專利範圍第1項所述之液晶顯示器供電電路,其中一顯示面板係耦接於該液晶顯示器電源,該微處理器係耦接於該第一電源供應單元,以接收該第一電源供應單元提供之一第一輸出電源。 The liquid crystal display power supply circuit of claim 1, wherein a display panel is coupled to the liquid crystal display power supply, the microprocessor is coupled to the first power supply unit to receive the first power supply. The unit provides one of the first output power sources. 如申請專利範圍第17項所述之液晶顯示器供電電路,更包含: 一第二電源供應單元,用來將該第一輸出電源轉換為一第二輸出電源,以供應給該液晶顯示器之一運算積體電路;及一第二濾波模組,用來濾除該第二電源供應單元所處理之該第二輸出電源中的雜訊。 The liquid crystal display power supply circuit as described in claim 17 of the patent application, further comprising: a second power supply unit for converting the first output power to a second output power for supplying to one of the liquid crystal display computing circuits; and a second filtering module for filtering the first The noise in the second output power source processed by the two power supply units.
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