TW201113858A - Liquid crystal display power supplying circuit - Google Patents

Liquid crystal display power supplying circuit Download PDF

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Publication number
TW201113858A
TW201113858A TW98134703A TW98134703A TW201113858A TW 201113858 A TW201113858 A TW 201113858A TW 98134703 A TW98134703 A TW 98134703A TW 98134703 A TW98134703 A TW 98134703A TW 201113858 A TW201113858 A TW 201113858A
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Taiwan
Prior art keywords
power supply
power
liquid crystal
crystal display
coupled
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TW98134703A
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Chinese (zh)
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TWI413084B (en
Inventor
He-Kang Zhou
Ching-Chung Lin
Em-Ily Yang
Jin-Ming Liu
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Innolux Display Corp
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Publication of TWI413084B publication Critical patent/TWI413084B/en

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  • Liquid Crystal Display Device Control (AREA)

Abstract

Under a sleep mode of a display, a liquid crystal display power supplying circuit prohibits power from a liquid crystal display power, and proceeds supplying power with a motherboard, which supplies power all the time, instead. Therefore, power of the liquid crystal display power under the sleep mode of the display is replaced by retrieving the power supplied from the motherboard instead, so that unnecessary power consumption of the liquid crystal display power under the sleep mode is prevented.

Description

201113858 六、發明說明: 【發明所屬之技術領域】 [0001] 本發明係揭露一種顯示器供電電路,尤指一種減少功率 消耗的顯示器供電電路。 【先前技術】 [0002] —般的液晶顯示器會以進入睡眠模式的方式來節省功率 消耗,並以單一顯示器電源來供應液晶顯示器在正常運 作模式下與睡眠模式下的所需電源《液晶顯示器需要被201113858 VI. Description of the Invention: [Technical Field] [0001] The present invention discloses a display power supply circuit, and more particularly to a display power supply circuit that reduces power consumption. [Prior Art] [0002] A general-purpose liquid crystal display will save power consumption by entering a sleep mode, and supply a liquid crystal display in a normal operation mode and a required power supply in a sleep mode with a single display power supply. Be

[0003][0003]

供應電源的元件主要包括有顯示面板、微處理器及運算 積體電路;且該顯示器電源又電位約為5伏特,顯示面板 需要之電源約為5伏特,微處理器需要之電源約為3. 3伏 特,且運算積體電路需要之電源約為h 8伏特。 請參閱圖1 ’其為一般液晶顯示器供電電輅1〇{)的示意圖 。如圖1所示,液晶顯示器供電電路1〇〇包含一液晶顯示 器電源110、—第一電源供應單元150、一第二電源供應 單元160、一第一濾波模組17〇、一第二濾波模組18〇及 —一極體D120。液晶顯示器供電電路100主要係透過液晶 顯示器電源110直接輸出之電源V01 (約為5伏特)來直接 供應顯不面板12〇的所需電源,透過第一電源供應單元 150所產生之電謂2(約為3. 3伏特)來提供微處理器13〇 的所需電源’並透過第二電源供應單元160所產生之電源 ,(約為·8伏特)來提供運算積體電路的所需電源 ==需要進入睡眠模式時,微處理器爾發出訊 波通知顯不面板12〇及算 最低限戶可逐异積體電路140關閉,並在維持 -冑作機能的情況下關閉其本身大部份的機能 098134703 表單編號A0101 第3頁/共31頁 0982059454-0 201113858 ,以分別停止接收電源V01、V02、V03 ;反之,當顯示 器需要由睡眠狀態進入正常運作模式時,亦由微處理器 130發出訊號通知顯示面板120及運算積體電路140開起 ,以分別繼續接收電源V01、V02、V03。然而在顯示器 進入睡眠模式時,仍會有相當小的電流通過二極體D120 ,使得液晶顯示器電源110處於低效率工作狀態,並且仍 然會產生無法被忽略的功率消耗。 【發明内容】 [0004] 本發明係揭露一種液晶顯示器供電電路。該液晶顯示器 供電電路係包含一主機板開關電路、一液晶顯示器電源 、一電源開關電路及一第一電源供應單元。該主機板開 關電路之一輸入端係耦接於一主機板之一電源輸出端。 該電源開關電路之 一輸入端係耗接於該液晶顯不電源 。該第一電源供應單元係耦接於該主機板開關電路之一 輸出端、該電源開關電路之一輸出端及一微處理器,用 來將該主機板或該液晶顯示器電源之電源供應給該微處 理器。 [0005] 本發明之實施例所揭露之液晶顯示器供電電路係在顯示 器之睡眠模式下隔絕液晶顯示器電源之供電,並改由需 要隨時被供電的主機板來進行睡眠模式下的供電,使得 液晶顯示器電源在顯示器之睡眠模式下原本會被消耗但 不需要消耗的功率會被轉嫁至原本即需隨時被供電的主 機板,而省下了液晶顯示器電源在睡眠模式下的不必要 功率消耗。 【實施方式】 098134703 表單編號A0101 第4頁/共31頁 0982059454-0 201113858 [0006] ❹ [0007] 為了解決上述先前技術中所述睡眠模式中仍會有無法忽 略之功率消耗的問題,本發明之實施例係揭露一種用來 減少功率消耗的顯示器供電電路。所揭露之顯示器供電 電路主要係在顯示器進入睡眠模式時,將液晶顯示器電 源所輸出之電源完全截止,並另行以顯示器之主機板來 供應顯示器在睡眠模式中的電源。如此一來,由於顯示 器之主機板本身即隨時都會提供電源,因此可利用此特 性將先前技術中液晶顯示器電源應消耗的功率轉嫁給原 本就會被消耗掉的主機板輸出功率,因此阻止了液晶顯 示器電源消耗多餘的功率。 請參閱圖2與圖3,其為本發明之一第一及第二實施例所 揭露之一液晶顯示器供電電路200的示意圖,其中圖2係 為該第一實施例所揭露液晶顯示器供電電路200的示意圖 ,而圖3係為該第二實施例所揭露液晶顯示器200的示意 圖。 [0008] 〇 如圖2所示,在該第一實施例中,液晶顯示器供電電路 200係包含一主機板開關電路230、一電源開關電路240 及圖1所示之液晶顯示器電源110與第一電源供應單元150 。第一電源供應單元150係用來透過主機板開關電路230 或電源開關電路240將一主機板之電源或液晶顯示器電源 110之電源供應給微處理器130。當顯示器進入正常運作 模式時,液晶顯不Is供電電路200係關閉主機板開關電路 230並開啟電源開關電路240,使得主機板之電源無法透 過主機板開關電路230供應給第一電源供應單元150,並 使得液晶顯不is電源110之電源可透過電源開關電路240 098134703 表單編號A0101 第5頁/共31頁 0982059454-0 201113858 :’:微處理為13〇。同理’當顯示器進入睡眠模式時, =:=Γ電路2°°係開啟主機板開關電_並關 1包源開關電路240,使得主機板之雷 關電路2财紅m φ H透過主機板開 供應給第-電源供應單元15〇,並使得液晶顯 不=電源HG之電源無法透過電源開關電路⑽供應給第 一電源供應單元15〇。 [0009] [0010] 098134703The components for supplying power mainly include a display panel, a microprocessor and an integrated circuit; and the power of the display is about 5 volts, the power required for the display panel is about 5 volts, and the power required by the microprocessor is about 3. 3 volts, and the power required to calculate the integrated circuit is about h 8 volts. Please refer to Figure 1 '' for a general LCD display power supply 1〇{). As shown in FIG. 1 , the liquid crystal display power supply circuit 1 includes a liquid crystal display power supply 110, a first power supply unit 150, a second power supply unit 160, a first filter module 17A, and a second filter mode. Group 18 〇 and - a polar body D120. The liquid crystal display power supply circuit 100 mainly supplies the power supply V01 (about 5 volts) directly outputted through the liquid crystal display power supply 110 to directly supply the required power supply of the display panel 12, and the electric power generated by the first power supply unit 150 is 2 ( Approximately 3. 3 volts is provided to provide the required power of the microprocessor 13 并 and the power generated by the second power supply unit 160 (about 8 volts) to provide the required power for the integrated circuit. = When you need to enter the sleep mode, the microprocessor sends a signal to notify the panel 12 and the minimum user can turn off the divergent integrated circuit 140, and close most of its own while maintaining the operating function. The function 098134703 form number A0101 page 3 / 31 page 0982059454-0 201113858 to stop receiving power supply V01, V02, V03 respectively; conversely, when the display needs to enter the normal operation mode from sleep state, it is also issued by the microprocessor 130 The signal notification display panel 120 and the arithmetic integrated circuit 140 are turned on to continue receiving the power sources V01, V02, and V03, respectively. However, when the display enters the sleep mode, there is still a relatively small current flowing through the diode D120, so that the liquid crystal display power supply 110 is in an inefficient operating state, and still consumes power that cannot be ignored. SUMMARY OF THE INVENTION [0004] The present invention discloses a liquid crystal display power supply circuit. The liquid crystal display power supply circuit comprises a motherboard switch circuit, a liquid crystal display power supply, a power switch circuit and a first power supply unit. One of the input circuits of the motherboard switching circuit is coupled to a power output of a motherboard. An input end of the power switch circuit is connected to the liquid crystal display power supply. The first power supply unit is coupled to an output end of the motherboard switch circuit, an output end of the power switch circuit, and a microprocessor for supplying power to the motherboard or the power of the liquid crystal display. microprocessor. [0005] The liquid crystal display power supply circuit disclosed in the embodiment of the present invention isolates the power supply of the liquid crystal display power supply in the sleep mode of the display, and changes the power supply in the sleep mode by the motherboard that needs to be powered at any time, so that the liquid crystal display The power supply would otherwise be consumed in the sleep mode of the display, but the power that does not need to be consumed will be passed on to the motherboard that would otherwise be powered, and the unnecessary power consumption of the LCD monitor power supply in sleep mode is saved. [Embodiment] 098134703 Form No. A0101 Page 4 of 31 0982059454-0 201113858 [0007] In order to solve the problem that power consumption that cannot be ignored in the sleep mode described in the above prior art, the present invention Embodiments disclose a display power supply circuit for reducing power consumption. The disclosed display power supply circuit mainly cuts off the power output of the liquid crystal display power supply when the display enters the sleep mode, and separately supplies the power supply of the display in the sleep mode by using the motherboard of the display. In this way, since the motherboard of the display itself provides power at any time, this feature can be used to pass the power consumed by the power supply of the liquid crystal display in the prior art to the output power of the motherboard which would otherwise be consumed, thereby preventing the liquid crystal. The display power consumes excess power. Please refer to FIG. 2 and FIG. 3 , which are schematic diagrams of a liquid crystal display power supply circuit 200 according to the first and second embodiments of the present invention. FIG. 2 is a liquid crystal display power supply circuit 200 according to the first embodiment. FIG. 3 is a schematic diagram of the liquid crystal display 200 disclosed in the second embodiment. As shown in FIG. 2, in the first embodiment, the liquid crystal display power supply circuit 200 includes a motherboard switch circuit 230, a power switch circuit 240, and the liquid crystal display power supply 110 shown in FIG. Power supply unit 150. The first power supply unit 150 is configured to supply the power of a motherboard or the power of the liquid crystal display power supply 110 to the microprocessor 130 through the motherboard switch circuit 230 or the power switch circuit 240. When the display enters the normal operation mode, the liquid crystal display power supply circuit 200 turns off the main board switch circuit 230 and turns on the power switch circuit 240, so that the power of the main board cannot be supplied to the first power supply unit 150 through the main board switch circuit 230. And make the liquid crystal display power supply power supply 110 can pass through the power switch circuit 240 098134703 Form No. A0101 Page 5 / Total 31 page 0982059454-0 201113858 : ': Micro processing is 13 〇. Similarly, when the display enters the sleep mode, =:=Γ circuit 2°° turns on the motherboard switch _ and turns off the 1 packet source switch circuit 240, so that the motherboard's lightning circuit 2 rich red m φ H through the motherboard The power supply to the first power supply unit 15A is turned on, and the power supply of the liquid crystal display voltage = power supply HG cannot be supplied to the first power supply unit 15 through the power supply switch circuit (10). [0009] [0010] 098134703

如圖3所示,在該第二實施例中,液晶顯示器供電電路 200係_於_主機板21(),並用來提供圖i所示之微處] 器130、顯不岐12Q及運算誠魏Ug之三種不同電 位的電源。如圖3所示,液晶顯示器供電電路2〇〇係包含 主機板開關電路23G、電源_電路24q及圖i所示之液, 顯示器電源110、第一電源供應單元15〇、第二電源供應 單元160、第-據波模組m與第二據波模組刚。As shown in FIG. 3, in the second embodiment, the liquid crystal display power supply circuit 200 is disposed on the motherboard 21 (), and is used to provide the micro-device 130 shown in FIG. Wei Ug's three different potential power supplies. As shown in FIG. 3, the liquid crystal display power supply circuit 2 includes a motherboard switching circuit 23G, a power source circuit 24q, and a liquid shown in FIG. 1, a display power source 110, a first power supply unit 15A, and a second power supply unit. 160, the first-wave module m and the second wave module just.

在顯示器之正常運作模式中,液晶顯示器供電電路2〇〇係 由液晶顯示器電源110取得電源v〇1,以供顯示面板ι2〇 運作,並開啟電源開關電路_,使電源V01可輸入於第 -電源供應單元15G ;此時,位於第—電源供應單元15〇 之輸入端的電源VOS係根據電源V01所產生,且液晶顯示 器供電電路200會關閉主機板開關電路23〇,以隔絕由主 機板210產生之一主機板輸出電源v〇M的供應。如此一來 ,第一電源供應單元150會將電源V0S轉換為電源v〇2, 提供給微處理器130運作,且第二電源供應單元16〇會根 據電源V02產生電源V03,提供給運算積體電路14〇。 而在顯示器之睡眠模式中,微處理器130會產生控制訊號 來關閉運异積體電路140及顯示面板120,使得此時顯示 表單編號A0101 第6頁/共31頁 0982059454-0 [0011] 201113858 面板120不會消耗液晶顯示器電源no所供給之電源V01 • 。再者’液晶顯示器供電電路200會關閉電源開關電路 240並開啟主機板開關電路230,使得此時第—電源供應 單元150所接收之電源v〇s係根據主機板21〇所提供之主 機板輸出電源VOM而產生,而非根據液晶顯示器電源11〇 所4供之電源V01所產生β此時,液晶顯示器電源11〇處 於完全不消耗電能的狀態,因為其消耗電能的路徑完全 被封鎖而達成在睡眠模式下節省液晶顯示器電源丨丨〇的目 的。 〇 [0012]請參閱圖4 ’其為本發明之一第三實施例所揭露圖2所示 之液晶顯示器供電電路2 00的示意圖。圓4主要揭露了圖2 所示之電源開關電路240與主機板開關電路230的實施方 式。如圖4所示’主機板開關電路230係包含一第一二極 體D103 ' 一電阻R103、一齊納二極體_enar Di-ode)ZD102及一電容C100。第一二極體D103之一第一端 係Μ接於主機板21〇之_電源輸出端,以接收主機板輸出 〇 電源V0M。電阻R103之一第一端係耦接於第一二極體 D103之一第二端,且電阻R1〇3之一第二端係耦接於第一 電源供應單元150之一電源輸入端。齊納二極體ZD102之 一第一端係耦接於主機板21〇之該電源輸出端,且齊納二 極體ZD102之一第二端係接地。第一電容ci〇〇係並聯於 齊納二極體ZD102。電源開關電路240係包含一第二二極 體D101及一第三二極體!)1〇2。第二二極體!)1〇1之一第一 端係搞接於液晶顯示器電源110。第三二極體D102之一第 一端係耗接於第二二極體D101之一第二端,且第三二極 098134703 表單編號A0101 第7頁/共31頁 0982059454-0 201113858 體D1 02之-第二端係轉接於第—電源供應單元⑽之該電 源輸入端。齊納二極體ZD1〇2及電容π〇〇主要係用來據 除主機板21〇所產生之主機板輸出電源麵中所帶之雜訊 〇 [0013] [0014] 圖4所示之主機板開關電路23〇及電源開關電路州之運作 方式係描述如下。 當顯示器處於正常運作模式時m二極體di〇i 及D102係因液晶顯不器電源11〇所提供之電源腿而處於 正偏壓並因而導通’使得電源開w電路24()成開啟狀態; 且此時因為顯處於正常模式m機板21〇會 產生出較大的電流,使得主機板輸出電源v〇M經過第—二 極體D103與電阻Ri〇3被傳输時,在電阻^⑽上會產生大 於一個二極體所產生之降壓;由於二極體上的壓降係為 一固定值,換言之,電源V01僅會遭遇第二及第三二極體 D101及D102所帶來之二個二極體的祖定屠降,但電源 VOS除了遭遇第一 一極體D1..03所、帶來之單一二極體的固定 壓降以外’尚會遭遇到電阻R|〇3_h因主機板21〇之較大電 流所產生大於單一二極體之固定壓降的一壓降,因此第 一二極體D103此時係處於逆偏狀態,使得主機板21〇提供 之主機板輸出電源VOM被隔絕於第一電源供應單元15〇之 該電壓輸入端。總言之’此時第一電源供應單元15〇所接 收之電源VOS僅由液晶顯示器電源11 〇所提供之電源v〇1 所提供。 而當顯示器處於睡眠模式時,主機板210係產生較小之電 流,因此電阻R103上所產生的壓降會小於單—二極體的 098134703 表單編號A0101 第8頁/共31頁 0982059454-0 [0015] 201113858 固定壓降;換言之,此時主機板輸出電源V0M所遭遇之壓 降僅包含第一二極體D1 03上的單一二極體的固定壓降及 • 電阻R103上小於單一二極體固定壓降之一壓降。由於液 晶顯示器電源11 0所提供之電源VO1所遭遇之壓降仍然為 二個二極體D101、D102所帶來之固定壓降,因此此時第 二與第三二極體D101及D102係處於逆偏狀態,且第一二 極體D103係處於順偏狀態’使得電源開關電路240被關閉 ’而主機板開關電路2 3 0被開啟。如此一來,在顯示器之 睡眠模式下,第一電源供應單元150所接收之電源VOS係 〇 根據主機板210所提供之主機板輸出電源v〇M所產生。 [0016]請參閱圖5,其為本發明之一第四實施例所揭露圖2所示 之液晶顯示器供電電路2〇〇的示意圖,且圖5主要係揭露 在該第四實施例中電源開關電路24〇與主機板開關電路 230的詳細實施方式。如圖5所示,主機板開關電路23〇係 包含一N型金氧半電晶體Qi、一第一電阻R2〇3及一第二電 阻R151。電源開關電路24〇係包含一二極體D2〇i ^ n型金 〇 氧半電晶體Q1之一源極與一閘極係耦接於主機板210之該 電源輸出端,以接收主機板輸出電源v〇M。第一電阻R2〇3 之一第一端係耦接於N型金氧半電晶體91之一汲極,且第 一電阻R203之一第二端係耦接於第一電源供應單元15〇之 電壓輸入端。第二電阻R151之一第一端係耦接於N型金氧 半電晶體Q1之一基極,且第二電阻R151之一第二端係接 地。二極體D201之一第一端係耦接於液晶顯示器電源11〇 ,且二極體D201之一第二端係耦接於第一電源供應單元 150之該電壓輸入端《第二電阻R151係用來調整N型金氧 098134703 表單編號A0101 第9頁/共31頁 0982059454-0 201113858 半電晶體Q1之偏壓電流。 [0017] 圖5所示之電源開關電路240及主機板開關電路230之運作 方式係說明如下。 [0018] 當顯示器進入正常運作模式時,主機板210會產生較大的 電流,因而使得主機板輸出電源VOM會在第一電阻R203上 遭遇大於單一二極體固定壓降之一壓降(假設N型金氧半 電晶體Q1上的壓降可忽略),而液晶顯示器電源110所提 供之電源V01係遭遇二極體D201上單一二極體的固定壓降 ,因此此時二極體D201係處於順偏,且N型金氧半電晶體 Q1會被逆偏壓所關閉。此時,第一電源供應單元150所接 收之電源VOS係根據液晶顯示器電源110所提供之電源 V01所產生,而非根據主機板210所提供之主機板輸出電 源VOM所產生。 [0019] 當顯示器進入睡眠模式時,主機板210會產生較小的電流 ,因而使得主機板輸出電源VOM會在第一電阻R203上遭遇 小於單一二極體固定壓降之一壓降,且液晶顯示器電源 110所提供之電源V01仍然僅遭遇二極體D201上單一二極 體的固定壓降,因此此時二極體D201係處於逆偏,且N型 金氧半電晶體Q1會被正偏壓所開啟。此時,第一電源供 應單元150所接收之電源VOS係根據主機板210所提供之 主機板輸出電源VOM所產生,而非根據液晶顯示器電源 110所提供之電源V01所產生。 [0020] 本發明之實施例係另外揭露一種以主動切換顯示器之正 常運作模式與睡眠模式之一控制訊號來切換液晶顯示器 098134703 表單編號A0101 第10頁/共31頁 0982059454-0 201113858 電源或主機板央极% 供电的液晶顯示器供電電路,其中該液 晶顯示器供電雷 八ΟΛ 电玉路所包含之液晶顯示器電源亦需要以該 Ο [0021] Ο =號來操作,方能達成切換液晶顯示"源或主機 之二供電的機制。請參關6及圖7,圖6與圖7為本發明 ★實鈿例所揭露一液晶顯示器供電電路500的示意 圖’且圖6主要係揭露在該第五實施例中一電源開關電路 540與主機板開關電路530的詳細實施方式,且圖7主要係 揭露在4第五實施例中—液晶顯示器電源川的實施方式 此外圖6所不之液晶顯示器供電電路5GG與圖7所示之 液曰曰顯不器電源4i 0中皆需以一控制訊號〇N/〇ff來控制 以觸發切換電源之機制;控制訊號⑽/卿在顯示器之正 常運作模式時係為两電位,且控制訊號⑽/〇fF在顯示器 之睡眠模式時係為低電位。 。 如圖6所不,在液晶顯示器供電電路500中係包含有第一 、第二電源供應單元150、16〇及對應之第一、第二滹波 模組170、180,並另包含主機板開關電路53〇、電源開 關電路540及液晶顯示器電源41〇。主機板開關電路53〇 係包含一第一npn型雙載子接面電晶體(Bip〇lar】⑽卜 tion Transistor,bjT)Q303、一第二npn型雙栽子接 面電晶體Q302、一第一二極體D302、一電容C313&_電 阻R356 ’而電源開關電路240係包含一第二二極體D3〇l 。第一 npn型雙載子接面電晶體q303之集極係耦接於主機 板210之該電源輸出端,以接收主機板輸出電源,且 第一ηρη型雙載子接面電晶體Q303之基極係耦接於一控制 訊號0N/0FF,以對應於控制訊號on/OFF的不同(亦即顯 098134703 表單編號Α0101 第11頁/共31頁 0982059454-0 201113858 不器睡眠模式與正常運作模式的不同)來變更其開啟狀態 。第二npn型雙載子接面電晶體Q3〇2之集極係耦接於第一 npn型雙載子接面電晶體q3〇3之基極,且第二叩〇型雙載 子接面電晶體Q302之射極係接地。第一二極體D3〇2之一 第—端係耦接於第一 npn型雙載子接面電晶體Q3〇3之射極 ,且第一二極體D302之一第二端係耦接於第一電源供應 單元15G之該電壓輸人端。電阻咖6之_第—端係编接於 第一npn型雙載子接面電晶體Q303之集極,且電阻”56 之一第二端係耦接於第一npn型雙載子接面電晶體即〇3之 基極。電容G313H端係耦接於第_二極體謂2之 該第二端’且電容C313之-第二端係輕接於第二npn型雙 載子電晶體Q302之射極。第二二極體&3〇1之一第一端係 耦接於液晶顯示器電源11〇以接收電源v〇1,且第二二極 體D301之一第二端係耦接於第一電源供應單元15〇。 [0022] 如圖7所示,液晶顯示器電源410係包含一第一開關模組 460、-第-電源轉換模組43Q、_第二開關模組·、 一電源供應單元450及一第二電源轉換模組42〇。第一開 關模組460之-輸入端係麵接於主機板21〇之電源輸出端 ’亦即圖6中所不之電源PC5V ’以由主機板21〇接收電源 PC5V。第一開關模組460係用來根據控制訊號〇N/〇FF決 定是否Μ電源PC5V來產生-電源VP1 ’亦即根據顯示器 係處於睡眠模式或正常運作模式來決定是否產生電源VP1 ,換言之,第一開關模組46 0係為決定是否輪出電源Vp i 的開關。第一電源轉換模組430之一輸入端係耦接於第一 開關模組460之一輸出端。當第一電源轉換模組43〇接收 098134703 表單編號A0101 第12頁/共31頁 0982059454-0 201113858 呵電位之電源VPl而使得第一電源轉換模組43〇之輸 入端si與一接地之輸入端S2之間產生一正電位差時第 %源轉換模組430之一輸出端S3與一接地之輸入端S4之 1會被導通。第二開關模組480之一輪入端係耦接於第一 书源轉換模組430之輸出端S3,且第二開關模組480亦另 外外接於一直流電源VDD。第二開關模組48〇係根據第一 電源轉換棋組430中之輸出端S3與S4之間是否導通,並根 據直机兒源心])來產生一電源vp3,換言之,第二開關模 組480係為決定是否輸出電源VP3的開關;在本發明之一 實施例中,輸出端S3與S4之間可設置一電晶體,且該電 曰曰體係根據輸入端S1、S 2之間是否有電位差来控制是否 導通,以產生輸出端S3、S4之間的導通電流。電源供應 單兀450之一開關控制端Power係耦接於第二開關模組 480之一輪出端’當開關控制端Power所接收之電源VP3 係處於向電位時,電源供應單元450係無應一電源VCC0 ; 當開關控制端P〇wer所接收之電源vp3係處於低電位時’ 電源供應單元4 5 〇不供應電源v c c 〇 第二電源轉換模組 420之一輸入端係耦接於電源供應單元45〇之一輸出端, 且第二電源轉換模組420之一輸出端係耦接於圖6所示液 晶顯示器電源410之該輸出端,且第二電源轉換模組“ο 係將電源VCC0轉換為圖6所示之電源VCC5V,以將電源 VCC5V輸出於液晶顯示器電源41〇之輸出端並供應給電源 開關電路540。 [0023]第一開關模組460係包含一pnp型雙載子接面電晶體q8〇1 及一電阻R847。PnP型雙載子接面電晶體Q801之一射極 098134703 表單編號A0101 第13頁/共31頁 0982059454-0 201113858 係耦接於主機板21 〇之電源輸出端以接收電源pC5v,且 pnp型雙載子接面電晶體Qgoi之一基極係輕接於控制訊號 ΟΝ/OFF。電阻R847之一第一端係麵接於pnp型雙載子接 面電aa體Q801之集極,且電阻R847之一第二端係耗接於 第一電源轉換模組430之輸入端si。第二開關模組48〇係 包含一npn型雙載子接面電晶體Q802及二電阻R804、 R805。npn型雙載子接面電晶體q802之一集極係麵接於 直流電源VDD,且npn型雙載子接面電晶體Q802之一射極 係耦接於電源供應單元450之開關控制端Power。電阻 R804之一第一端係耦接於第一電源轉換模組43〇之輸出端 S3 ’且電阻R804之一第二端係耦接於npn型雙載子接面 電晶體Q802之一基極。電阻8805之一第一端係耦接於電 阻R8 04之第二端,且電阻R80 5之一第二端係耦接於npn 型雙載子接面電晶體Q802之集極。 [0024] 圖6所示之電源開關電路540及主機板開關電路530之運作 方式係與圖7所示之液晶顯示器電源410共同說明如下。 當顯示器進入正常運作模式時,控制Ιίί號ΟΝ/OFF係為一 高電位訊號,使得第二npn型雙載子接面電晶體Q302被開 啟,且第一npn型雙載子接面電晶體Q303會被第二npn型 雙載子接面電晶體Q302之導通電流拉低其基極電位而關 閉。如此一來,電源PC5V傳遞至第一電源供應單元150之 輸入端的剩餘電位會較電源VCC5V傳遞至第一電源供應單 元150之輸入端的剩餘電位來的低’而使得電源V0S相對 於第一二極體D302產生了逆偏壓,使得主機板210提供之 電源PC5V將會被隔絕於第一電源供應單元150,而由液晶 098134703 表單編號A0101 第14頁/共31頁 0982059454-0 201113858 Ο 顯示器電源410供應之電源¥(^5¥透過第二二極體0301來 產生電源VOS並供應給第一電源供應單元150。在此同時 ’在液晶顯示器電源410中,由於控制訊號0N/0FF係為 高電位,因此pnp型雙載子接面電晶體Q801會被關閉,並 進而使得圖7所示之電源VP1無法被產生出來。由於第一 電源轉換模組430沒有接收到電源VP1,因此第一電源轉 換模組430之輸出端S3、S4之間不會導通而產生電流;如 此一來,npn雙載子接面電晶體Q802不會因為輸出端S3 、S4之間的電流而拉低其基極的電位,使得npn雙載子接 面電晶體Q802呈現導通狀態,並使得電源VP3處於高電位 。電源供應單元450在收到處於高電位的電源VP3後,會 據以供應電源VCC0給第二電源轉換模組420,而在最後產 生電源VCC5V,並將電源VCC5V據以供應給圖6所示之電 源開關電路540。 [0025] ❹ 當顯示器進入睡眠模式時,控制訊號ΟΝ/OFF會處於一低 電位,使得第二npn型雙載子接面電晶體Q302被關閉,且 第一npn型雙載子接面電晶艘Q303會因為基極電位未被拉 低而開啟。如此一來,由於電源PC5V傳遞至第一電源供 應單元150時的剩餘電位較電源VCC5V傳遞至第一電源供 應單元150時的剩餘電位高,電源V0S會對第二二極體 D301產生逆偏壓而將液晶顯示器電源410供應之電源 VCC5V隔絕於第一電源供應單元150,並由主機板210提 供之電源PC5V來產生電源v〇S並供應給第一電源供應單元 150。而在液晶顯示器電源410中,pnp型雙載子接面電 晶體Q801會被位於其基極之低電位的控制訊號⑽/OFF所 098134703 表單編號A0101 第15頁/共31頁 0982059454-0 201113858 開啟’因而使付第-開關模组在第—電源轉換模纽 430之輸入賴上產生了高電位之電源VH。第-電源轉 換模組4 3 0會根據高電位之電源v p i而使第—電源轉換模 組430之輸出端S3 ' 84之間導通。在第二開關模組中 ,npn型雙載子接面電晶體Q8〇2之基極會因為輸出端幻 、S4間的導通電流而被拉低電位,並進而使得寧型雙載 子接面電晶體Q802被關閉,因此第二開關模組_2所輸 出之電源VP3此時係為低電位。電源供應單元45〇之開關 控制端Power接收到低電位的電源m後,會停止供應冑 源vcco ’因此第二電源轉換模組42Q亦無法據以產生電源 〇 VCC5V,使得圖6中液晶顯示器電源41〇亦無法提供電源 VCC5V給電源開關電路54〇 β [0026] [0027] 藉由圖6與圖7中以控制訊號〇N/〇FF主動根據顯示器之正 常運作模式與睡眠模式下所❹之電_以 以如之前各實施例般將需被隔絕之電源以逆偏壓的方式 隔絕於供電路徑之外,尚可藉由直__晶顯^電 源410之供電來進一步確保液晶顯示器供電電路500在睡 〇 眠模式下的功率消耗。 ^ 本發明之實施例揭露錢晶顯示隸電電㈣在顯示器 之睡眠模式下隔絕液晶顯示11«之供電,並改由需要 隨時被供電的主機板來進行睡眠模式下的供I如此一 來’液晶顯示器電源在顯示器之睡眠模式下原本會被消 耗但不需要消耗的功率會被轉嫁至原本㈣隨時被供電 的主機板ffi)省下了液晶顯示^電源在睡眠模式下的不 必要功率消耗。 098134703 表單編號A0101 第16頁/共31頁 0982059454-0 201113858 [0028] 雖然本發明以前述之較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習相像技藝者,在不脫離本發明 之精神和範圍内,當可作些許之更動與潤飾,因此本發 明之專利保護範圍須視本說明書所附之申請專利範圍所 界定者為準。 【圖式簡單說明】 [0029] 圖1為一般液晶顯示器供電電路的示意圖。 [0030] 圖2及圖3分別為本發明之第一及第二實施例所揭露之液 晶顯不益供電電路的不意圖*其中液晶顯不益供電電路 係耦接於主機板,並用來提供圖1所示之微處理器、顯示 面板及運算積體電路之三種不同電位的電源。 [0031] 圖4及圖5分別為本發明之第三及第四實施例所揭露圖2所 示之液晶顯示器供電電路的示意圖。 [0032] 圖6與圖7為本發明之第五實施例所揭露液晶顯示器供電 電路的示意圖,其中圖6所示之液晶顯示器供電電路與圖 7所示之液晶顯示器電源中皆需以一控制訊號來控制以觸 ❹ 發切換電源之機制。 【主要元件符號說明】 [0033] 100、200、500 :液晶顯示器供電電路 [0034] 11 0、41 0 :液晶顯示器電源 [0035] 1 2 0 :顯示面板 [0036] 130:微處理器 [0037] 140 :運算積體電路 098134703 表單編號A0101 第17頁/共31頁 0982059454-0 201113858 [0038] 150、160、450 :電源供應單元 [0039] [0040] [0041] [0042] [0043] [0044] [0045] [0046] [0047] [0048] [0049] 170、180 :濾波模組 210 :主機板 二極體 2 3 0、5 3 0 :主機板開關電路 2 4 0、5 4 0 :電源開關電路 420、430 :電源轉換模組 460、480 :開關模組 D101 、 D102 、 D103 、 D201 、 D301 、 D302 : ZD102 :齊納二極體 C100、C313 :電容 電阻In the normal operation mode of the display, the liquid crystal display power supply circuit 2 receives the power supply v〇1 from the liquid crystal display power supply 110 for the display panel to operate, and turns on the power switch circuit _, so that the power supply V01 can be input to the first The power supply unit 15G; at this time, the power supply VOS located at the input end of the first power supply unit 15A is generated according to the power supply V01, and the liquid crystal display power supply circuit 200 turns off the motherboard switch circuit 23A to isolate the motherboard board 210 from being generated. One of the motherboard outputs a supply of power v〇M. In this way, the first power supply unit 150 converts the power supply V0S into the power supply v〇2, and supplies it to the microprocessor 130 for operation, and the second power supply unit 16〇 generates the power supply V03 according to the power supply V02, and supplies it to the computing integrated body. Circuit 14〇. In the sleep mode of the display, the microprocessor 130 generates a control signal to turn off the transport integrated circuit 140 and the display panel 120, so that the form number A0101 is displayed at this time. Page 6 of 31 0982059454-0 [0011] 201113858 The panel 120 does not consume the power supply V01 supplied by the liquid crystal display power supply no. Furthermore, the liquid crystal display power supply circuit 200 turns off the power switch circuit 240 and turns on the motherboard switch circuit 230, so that the power supply v〇s received by the first power supply unit 150 is based on the motherboard output provided by the motherboard 21〇. The power supply VOM is generated instead of the power supply V01 supplied from the liquid crystal display power supply 11 此时. At this time, the liquid crystal display power supply 11 〇 is in a state of completely no power consumption, because the path of the power consumption is completely blocked. The purpose of saving the power of the LCD monitor in sleep mode. [0012] Please refer to FIG. 4, which is a schematic diagram of a liquid crystal display power supply circuit 200 shown in FIG. 2 according to a third embodiment of the present invention. Circle 4 primarily discloses the implementation of power switch circuit 240 and motherboard switch circuit 230 shown in FIG. As shown in FIG. 4, the motherboard switching circuit 230 includes a first diode D103', a resistor R103, a Zener diode _enar Di- ode, a ZD 102, and a capacitor C100. The first end of the first diode D103 is connected to the power output terminal of the motherboard 21 to receive the power output V0M of the motherboard. A first end of the resistor R103 is coupled to a second end of the first diode D103, and a second end of the resistor R1〇3 is coupled to a power input end of the first power supply unit 150. A first end of the Zener diode ZD102 is coupled to the power output of the motherboard 21, and a second end of the Zener diode ZD102 is grounded. The first capacitor ci is connected in parallel to the Zener diode ZD102. The power switch circuit 240 includes a second diode D101 and a third diode!)1〇2. The second diode!) One of the first terminals is connected to the liquid crystal display power supply 110. The first end of the third diode D102 is connected to one of the second ends of the second diode D101, and the third diode 098134703 Form No. A0101 Page 7 / Total 31 Page 0982545474-0 201113858 Body D1 02 The second end is switched to the power input of the first power supply unit (10). The Zener diode ZD1〇2 and the capacitor π〇〇 are mainly used to remove the noise from the power supply surface of the motherboard generated by the motherboard 21〇 [0013] [0014] The host shown in FIG. The mode of operation of the board switch circuit 23 and the power switch circuit state is as follows. When the display is in the normal operation mode, the m diodes di〇i and D102 are positively biased and thus turned on due to the power supply leg provided by the liquid crystal display power supply 11〇, so that the power supply open circuit 24 () is turned on. At this time, because the motherboard is in the normal mode, the board will generate a large current, so that the output power of the motherboard v〇M is transmitted through the second diode D103 and the resistor Ri〇3, at the resistance ^ (10) The voltage drop generated by more than one diode is generated; since the voltage drop across the diode is a fixed value, in other words, the power supply V01 will only be brought by the second and third diodes D101 and D102. The enthalpy of the two diodes is slaughtered, but the power supply VOS will encounter resistance R| in addition to the fixed voltage drop of the single diode brought by the first polar body D1..03. 3_h due to the larger current of the motherboard 21〇, a voltage drop greater than the fixed voltage drop of the single diode, so the first diode D103 is in a reverse bias state, so that the host board 21〇 provides the host The board output power source VOM is isolated from the voltage input terminal of the first power supply unit 15A. In short, the power supply VOS received by the first power supply unit 15 at this time is only provided by the power supply v 〇 1 provided by the liquid crystal display power supply 11 。. When the display is in the sleep mode, the motherboard 210 generates a small current, so the voltage drop generated on the resistor R103 will be smaller than the single-diode 098134703 Form No. A0101 Page 8 / Total 31 Page 0982545544-0 [ 0015] 201113858 Fixed voltage drop; in other words, the voltage drop encountered by the motherboard output power supply V0M only contains the fixed voltage drop of the single diode on the first diode D1 03 and • the resistor R103 is smaller than the single two One of the poles has a fixed pressure drop. Since the voltage drop encountered by the power supply VO1 provided by the liquid crystal display power supply 110 is still a fixed voltage drop brought by the two diodes D101 and D102, the second and third diodes D101 and D102 are at this time. The reverse bias state, and the first diode D103 is in the forward state 'so that the power switch circuit 240 is turned off' and the motherboard switch circuit 230 is turned on. In this way, in the sleep mode of the display, the power supply VOS received by the first power supply unit 150 is generated according to the motherboard output power v〇M provided by the motherboard 210. [0016] Please refer to FIG. 5, which is a schematic diagram of a liquid crystal display power supply circuit 2A shown in FIG. 2 according to a fourth embodiment of the present invention, and FIG. 5 mainly discloses a power switch in the fourth embodiment. A detailed implementation of the circuit 24 and the motherboard switch circuit 230. As shown in FIG. 5, the motherboard switching circuit 23 includes an N-type MOS transistor Qi, a first resistor R2 〇 3, and a second resistor R151. The power switch circuit 24 includes a diode D2, a type of metal oxide, and a gate and a gate are coupled to the power output of the motherboard 210 to receive the output of the motherboard. Power v〇M. The first end of the first resistor R2 〇3 is coupled to one of the drains of the N-type MOS transistor 91, and the second end of the first resistor R203 is coupled to the first power supply unit 15 Voltage input. The first end of one of the second resistors R151 is coupled to one of the bases of the N-type MOS transistor Q1, and the second end of the second resistor R151 is grounded. The first end of the diode D201 is coupled to the liquid crystal display power supply 11A, and the second end of the diode D201 is coupled to the voltage input end of the first power supply unit 150. Used to adjust the N-type gold oxygen 098134703 Form No. A0101 Page 9 / Total 31 page 0982594544-0 201113858 The bias current of the semi-transistor Q1. [0017] The operation mode of the power switch circuit 240 and the motherboard switch circuit 230 shown in FIG. 5 is as follows. [0018] When the display enters the normal operation mode, the motherboard 210 generates a large current, so that the motherboard output power VOM encounters a voltage drop greater than the single diode fixed voltage drop on the first resistor R203 ( Assuming that the voltage drop across the N-type MOS transistor Q1 is negligible, and the power supply V01 provided by the liquid crystal display power supply 110 encounters a fixed voltage drop of the single diode on the diode D201, the diode is now at this time. The D201 is in the forward direction and the N-type MOS transistor Q1 is turned off by the reverse bias. At this time, the power source VOS received by the first power supply unit 150 is generated according to the power source V01 provided by the liquid crystal display power source 110, and is not generated according to the motherboard output power source VOM provided by the motherboard 210. [0019] When the display enters the sleep mode, the motherboard 210 generates a small current, so that the motherboard output power VOM encounters a voltage drop of less than a single diode fixed voltage drop on the first resistor R203, and The power supply V01 provided by the liquid crystal display power supply 110 still only encounters the fixed voltage drop of the single diode on the diode D201, so the diode D201 is reverse biased at this time, and the N-type metal oxide semi-transistor Q1 will be The positive bias is turned on. At this time, the power supply VOS received by the first power supply unit 150 is generated according to the motherboard output power VOM provided by the motherboard 210, and is not generated according to the power supply V01 provided by the liquid crystal display power supply 110. [0020] Embodiments of the present invention additionally disclose switching a liquid crystal display 098134703 by actively switching one of a normal operation mode and a sleep mode of a display mode. Form No. A0101 Page 10 of 31 0982059454-0 201113858 Power supply or motherboard The central power supply of the liquid crystal display power supply circuit, wherein the liquid crystal display power supply Lei Yao ΟΛ The electric power supply of the liquid crystal display included in the electric jade road also needs to operate with the Ο [0021] Ο = number, in order to achieve the switch liquid crystal display " source Or the power supply mechanism of the host. Please refer to FIG. 6 and FIG. 7. FIG. 6 and FIG. 7 are schematic diagrams of a liquid crystal display power supply circuit 500 according to the present invention. FIG. 6 mainly discloses a power switch circuit 540 in the fifth embodiment. The detailed implementation of the motherboard switch circuit 530, and FIG. 7 is mainly disclosed in the fifth embodiment - the liquid crystal display power supply implementation, and the liquid crystal display power supply circuit 5GG shown in FIG. 6 and the liquid raft shown in FIG. The power supply 4i 0 needs to be controlled by a control signal 〇N/〇ff to trigger the switching power supply; the control signal (10)/qing is two potentials in the normal operation mode of the display, and the control signal (10)/ 〇fF is low during the sleep mode of the display. . As shown in FIG. 6, the liquid crystal display power supply circuit 500 includes first and second power supply units 150 and 16 and corresponding first and second chopper modules 170 and 180, and further includes a motherboard switch. The circuit 53A, the power switch circuit 540, and the liquid crystal display power supply 41 are provided. The motherboard switching circuit 53 includes a first npn-type bipolar junction transistor (Bip〇lar) (10) Bution Transistor, bjT) Q303, a second npn-type dual-substrate junction transistor Q302, and a first A diode D302, a capacitor C313 & _ resistor R356 ' and the power switch circuit 240 includes a second diode D3 〇 l. The collector of the first npn-type bipolar junction transistor q303 is coupled to the power output end of the motherboard 210 to receive the output power of the motherboard, and the base of the first ηρη-type bipolar junction transistor Q303 The pole is coupled to a control signal 0N/0FF to correspond to the difference of the control signal on/OFF (that is, the display 098134703 form number Α 0101 page 11 / total 31 page 0982059454-0 201113858 no sleep mode and normal operation mode Different) to change its open state. The collector of the second npn-type bipolar junction transistor Q3〇2 is coupled to the base of the first npn-type bipolar junction transistor q3〇3, and the second 双 type bipolar junction The emitter of transistor Q302 is grounded. One end of the first diode D3〇2 is coupled to the emitter of the first npn-type bipolar junction transistor Q3〇3, and the second end of the first diode D302 is coupled The voltage input terminal of the first power supply unit 15G. The first end of the resistor is connected to the collector of the first npn-type bipolar junction transistor Q303, and the second end of the resistor "56" is coupled to the first npn-type bipolar junction The transistor is the base of the 〇3. The capacitor G313H is coupled to the second end of the second diode 2 and the second end of the capacitor C313 is connected to the second npn bipolar transistor. The emitter of Q302. The first end of the second diode & 3〇1 is coupled to the liquid crystal display power supply 11〇 to receive the power supply v〇1, and the second end of the second diode D301 is coupled. The first power supply unit 410 includes a first switch module 460, a first power conversion module 43Q, a second switch module, and the like. A power supply unit 450 and a second power conversion module 42. The input end of the first switch module 460 is connected to the power output end of the motherboard 21, that is, the power supply PC5V in FIG. The power supply PC5V is received by the motherboard 21〇. The first switch module 460 is used to determine whether the power supply PC5V is generated according to the control signal 〇N/〇FF--the power supply VP1' The device is in a sleep mode or a normal operation mode to determine whether to generate the power source VP1. In other words, the first switch module 46 0 is a switch that determines whether to turn on the power source Vp i. One input coupling of the first power conversion module 430 Connected to one of the output terminals of the first switch module 460. When the first power conversion module 43 receives the 098134703 form number A0101 page 12 / a total of 31 pages 0982545544-0 201113858 power supply VPl to make the first power conversion mode When a positive potential difference is generated between the input terminal si of the group 43 and a grounded input terminal S2, one of the output terminals S3 of the first source converter module 430 and one of the grounded input terminals S4 are turned on. One of the group 480 is coupled to the output S3 of the first source conversion module 430, and the second switch module 480 is externally connected to the DC power supply VDD. The second switch module 48 is based on the first Whether the output terminal S3 and S4 in the power conversion chess set 430 is turned on, and generates a power source vp3 according to the source of the straight machine, in other words, the second switch module 480 is a switch for determining whether to output the power source VP3; In an embodiment of the invention A transistor may be disposed between the output terminals S3 and S4, and the power system controls whether the conduction is conducted according to whether there is a potential difference between the input terminals S1 and S2 to generate an on current between the output terminals S3 and S4. One of the power supply unit 450 is connected to one of the second switch module 480. When the power supply VP3 received by the switch control terminal is at a potential, the power supply unit 450 is not required. The power supply VCC0; when the power supply vp3 received by the switch control terminal P〇wer is at a low level, the power supply unit 4 5 does not supply the power supply vcc. One of the input terminals of the second power conversion module 420 is coupled to the power supply unit. One output of 45 ,, and one output of the second power conversion module 420 is coupled to the output end of the liquid crystal display power supply 410 shown in FIG. 6, and the second power conversion module “o” converts the power supply VCC0 The power supply VCC5V shown in FIG. 6 is used to output the power supply VCC5V to the output terminal of the liquid crystal display power supply 41A and supply it to the power supply switching circuit 540. The first switch module 460 includes a pnp type bipolar junction transistor q8〇1 and a resistor R847. PnP type double carrier junction transistor Q801 one emitter 098134703 Form No. A0101 Page 13 of 31 0982059454-0 201113858 is coupled to the power supply output of the motherboard 21 以 to receive the power supply pC5v, and pnp type double One of the bases of the carrier junction transistor Qgoi is lightly connected to the control signal ΟΝ/OFF. The first end of the resistor R847 is connected to the collector of the pnp type bipolar contact electrical aa body Q801, and the second end of the resistor R847 is connected to the input terminal si of the first power conversion module 430. The second switch module 48 includes an npn type bipolar junction transistor Q802 and two resistors R804 and R805. One of the npn-type bipolar junction transistors q802 is connected to the DC power supply VDD, and one of the npn-type bipolar junction transistors Q802 is coupled to the switching control terminal of the power supply unit 450. . The first end of the resistor R804 is coupled to the output end S3 ′ of the first power conversion module 43 且 and the second end of the resistor R 804 is coupled to a base of the npn-type bipolar junction transistor Q802 . The first end of the resistor 8805 is coupled to the second end of the resistor R8 04, and the second end of the resistor R80 5 is coupled to the collector of the npn-type bipolar junction transistor Q802. [0024] The operation mode of the power switch circuit 540 and the motherboard switch circuit 530 shown in FIG. 6 is explained in conjunction with the liquid crystal display power supply 410 shown in FIG. When the display enters the normal operation mode, the control Ιίί ΟΝ/OFF is a high potential signal, so that the second npn type bipolar junction transistor Q302 is turned on, and the first npn type bipolar junction transistor Q303 The on current of the second npn-type bipolar junction transistor Q302 is turned off and its base potential is turned off. As a result, the remaining potential of the power supply PC5V to the input end of the first power supply unit 150 is lower than the remaining potential of the power supply VCC5V to the input end of the first power supply unit 150, so that the power supply V0S is opposite to the first two poles. The body D302 generates a reverse bias so that the power supply PC5V provided by the motherboard 210 will be isolated from the first power supply unit 150, and by the liquid crystal 098134703, the form number A0101, page 14 of 31, 098,205,945,044, 201113858 显示器 the display power supply 410 The supplied power source ¥(^5¥ generates the power source VOS through the second diode 0301 and supplies it to the first power supply unit 150. At the same time 'in the liquid crystal display power source 410, since the control signal 0N/0FF is high Therefore, the pnp type bipolar junction transistor Q801 is turned off, and thus the power supply VP1 shown in Fig. 7 cannot be generated. Since the first power conversion module 430 does not receive the power supply VP1, the first power conversion The output terminals S3 and S4 of the module 430 are not turned on to generate a current; thus, the npn bipolar junction transistor Q802 is not caused by the current between the output terminals S3 and S4. Pulling down the potential of its base, so that the npn bipolar junction transistor Q802 is in an on state, and the power supply VP3 is at a high potential. After receiving the power supply VP3 at a high potential, the power supply unit 450 supplies power according to the power supply unit 450. VCC0 is supplied to the second power conversion module 420, and the power supply VCC5V is finally generated, and the power supply VCC5V is supplied to the power switch circuit 540 shown in Fig. 6. [0025] 控制 When the display enters the sleep mode, the control signal ΟΝ/ OFF will be at a low potential, so that the second npn-type bipolar junction transistor Q302 is turned off, and the first npn-type bi-carrier junction transistor Q303 will be turned on because the base potential is not pulled low. First, since the residual potential when the power source PC5V is transmitted to the first power supply unit 150 is higher than the residual potential when the power source VCC5V is transmitted to the first power supply unit 150, the power supply V0S reverse biases the second diode D301. The power supply VCC5V supplied from the liquid crystal display power supply 410 is isolated from the first power supply unit 150, and the power supply PC5V supplied from the motherboard 210 generates the power supply v〇S and supplies it to the first power supply unit 150. In the crystal display power supply 410, the pnp type bipolar junction transistor Q801 is turned on by the low potential control signal (10)/OFF of the base 098134703, Form No. A0101, Page 15 of 31, 0982594544-0, 201113858. The first-switch module generates a high-potential power supply VH on the input of the first-power conversion module 430. The first-power conversion module 430 will make the first-power conversion mode according to the high-potential power supply vpi. The output of group 430 is turned on between S3 '84. In the second switch module, the base of the npn-type bipolar junction transistor Q8〇2 is pulled low due to the conduction current between the output terminal and the conduction current between S4, and further the N-type dual carrier junction The transistor Q802 is turned off, so the power source VP3 outputted by the second switch module_2 is low at this time. After the power supply unit 45's switch control terminal Power receives the low-level power supply m, it will stop supplying the power supply vcco. Therefore, the second power conversion module 42Q cannot generate the power supply 〇VCC5V, so that the liquid crystal display power supply in FIG. 41〇 can also provide power supply VCC5V to the power switch circuit 54〇β [0026] [0027] By means of the control signal 〇N / 〇 FF in Figure 6 and Figure 7 according to the normal operating mode of the display and sleep mode In order to isolate the power supply to be isolated from the power supply path in a reverse bias manner as in the previous embodiments, the power supply circuit of the liquid crystal display can be further ensured by the power supply of the power supply 410. 500 power consumption in sleep mode. The embodiment of the present invention discloses that the money crystal display is powered by the electric power (4), and the power supply of the liquid crystal display 11« is isolated in the sleep mode of the display, and is changed by the motherboard that needs to be powered at any time to perform the sleep mode. The display power supply will be consumed in the sleep mode of the display, but the power that is not consumed will be passed on to the original (4) the motherboard (f) that is powered at any time. This saves the unnecessary power consumption of the liquid crystal display power supply in the sleep mode. 098134703 Form No. A0101 Page 16 of 31 098205945-4-0 201113858 [0028] Although the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the skilled artisan will not In the spirit and scope of the invention, the scope of the invention is to be determined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS [0029] FIG. 1 is a schematic diagram of a power supply circuit of a general liquid crystal display. [0030] FIG. 2 and FIG. 3 are respectively a schematic diagram of a liquid crystal display power supply circuit disclosed in the first and second embodiments of the present invention; wherein the liquid crystal display power supply circuit is coupled to the motherboard, and is used to provide The power supply of the three different potentials of the microprocessor, the display panel and the arithmetic integrated circuit shown in FIG. 4 and FIG. 5 are schematic diagrams showing the power supply circuit of the liquid crystal display shown in FIG. 2 according to the third and fourth embodiments of the present invention. 6 and FIG. 7 are schematic diagrams showing a power supply circuit of a liquid crystal display according to a fifth embodiment of the present invention, wherein the power supply circuit of the liquid crystal display shown in FIG. 6 and the power supply of the liquid crystal display shown in FIG. 7 are controlled by a control unit. The signal controls the mechanism for switching power. [Main component symbol description] [0033] 100, 200, 500: Liquid crystal display power supply circuit [0034] 11 0, 41 0 : Liquid crystal display power supply [0035] 1 2 0 : Display panel [0036] 130: Microprocessor [0037 140: arithmetic integrated circuit 098134703 Form No. A0101 Page 17 of 31 098205945-4-0 201113858 [0038] 150, 160, 450: power supply unit [0039] [0041] [0043] [0043] [0049] [0049] [0049] 170, 180: filter module 210: motherboard diode 2 3 0, 5 3 0: motherboard switch circuit 2 4 0, 5 4 0 : Power switch circuit 420, 430: power conversion module 460, 480: switch module D101, D102, D103, D201, D301, D302: ZD102: Zener diode C100, C313: capacitor resistance

Ql、Q302、Q303、Q8(H、Q802 :電晶體 R151 、 R203 、 R356 、 R847 、 R805 、 R804 098134703 表單編號A0101 第18頁/共31頁 0982059454-0Ql, Q302, Q303, Q8 (H, Q802: transistor R151, R203, R356, R847, R805, R804 098134703 Form No. A0101 Page 18 of 31 0982059454-0

Claims (1)

201113858 七、申請專利範圍: 1 —種液晶顯不裔供電電路*包含. 一主機板開關電路,其一輸入端係耦接於一主機板之一電 源輸出端; —液晶顯不is電源, 一電源開關電路,其一輸入端係耦接於該液晶顯示器電源 ;及 一第一電源供應單元,耦接於該主機板開關電路之一輸出 端、該電源開關電路之一輸出端及一微處理器,用來將該 ❹ 主機板或該液晶顯示器電源之電源供應給該微處理器。 2 .如申請專利範圍第1項所述之液晶顯示器供電電路,其中 ,當一顯示器進入一正常運作模式時,該主機板開關電路 係關閉,且該電源開關電路係開啟,使得該液晶顯示器電 源之該電源係通過該電源開關電路而被供應於該第一電源 供應單元。 3 .如申請專利範圍第1項所述之液晶顯示器供電電路,其中 Q ,當一顯示器進入一睡眠模式時,該主機板開關電路係開 啟,且該電源開關電路係關閉,使得該主機板之一主機板 輸出電源係通過該主機板開關電路而被供應於該第一電源 供應單元。 4.如申請專利範圍第1項所述之液晶顯示器供電電路,其中 ,該主機板開關電路係包含: 一第一二極體,其一第一端係耦接於該主機板之該電源輸 出端;及 一電阻,其一第一端係耦接於該第一二極體之一第二端, 098134703 表單編號A0101 第19頁/共31頁 0982059454-0 201113858 且該電阻之一第二端係耦接於該第一電源供應單元。 5 .如申請專利範圍第4項所述之液晶顯示器供電電路,其中 ,該主機板開關電路係更包含: 一齊納二極體(zenar diode),其一第一端係耗接於該 主機板之該電源輸出端,且該齊納二極體之一第二端係接 地;及 一第一電容,並聯於該齊納二極體。 6 .如申請專利範圍第4項所述之液晶顯示器供電電路,其中 ,該電源開關電路係包含: 一第二二極體,其一第一端係耦接於該液晶顯示器電源; 及 一第三二極體,其一第一端係耦接於該第二二極體之一第 二端,且該第三二極體之一第二端係耦接於該第一電源供 應單元。 7 .如申請專利範圍第1項所述之液晶顯示器供電電路,其中 ,該主機板開關電路係包含: 一η型金氧半電晶體,其一源極與一閘極係耦接於該主機 板之該電源輸出端;及 一第一電阻,其一第一端係耦接於該η型金氧半電晶體之 一汲極,且該第一電阻之一第二端係耦接於該第一電源供 應單元。 8.如申請專利範圍第7項所述之液晶顯示器供電電路,其中 ,該主機板開關電路更包含: 一第二電阻,其一第一端係耦接於該η型金氧半電晶體之 一基極,且該第二電阻之一第二端係接地。 9 .如申請專利範圍第7項所述之液晶顯示器供電電路,其中 098134703 表單編號Α0101 第20頁/共31頁 0982059454-0 201113858 該電源開關電路係包含: 第四極冑其-第-端係耦接於該液晶顯示器電源, 且該第四二極體之―第二端係祕㈣第—電源供應單元 10 .如申凊專利範圍第1項所述之液晶顯示器供電電路,其中 ,該主機板開關電路係包含: Ο 一第一npn型雙載子接面電晶體,其集極係耦接於該主機 板之該電源輸出端,且該第一_型雙載子接面電晶體之 基極係耦接於一控制訊號; 一第二npn型雙載子揍面電晶體’其集極係耦接於該第— npn型雙載子接面電晶體之基極’且該第二npn型雙載子 接面電晶體之射極係接地;及 一第五二極體,其一第一端係耦接於該第一npn型雙載子 接面電晶體之射極,且該第五二極截之一第二端係耗接於 該第一電源供應單元; G 其中當包含該顯示器供電電路之一顯示器‘進入睡眠模式 時’該控制訊號之電位係為一低電位。 11 .如申請專利範圍第10項所述之液晶顯示器供電電路,其中 ’該主機板開關電路係更包含: 電阻其第一端係搞接於該第一npn型雙載子接面電 晶體之該集極,且該電阻之一第二端係耦接於該第一 npn 型雙載子接面電晶體之該基極; 電谷其一第一端係耗接於該第五二極體之該第二端, 且該電容之—第二端係耦接於該第二npn型雙載子電晶體 之該射極。 098134703 12 .如申請專利範圍第10項所述之液晶 顯示器供電電路,其中 表單編號A0101 第21頁/共31頁 0982059454-0 201113858 ’該電源開關電路係包含: 顯不電源, 電源供應單元 一第六二極體,其一第一端係耦接於該液晶 且該第六二極體之―第二端勉接於該第一 13 .如申請專利範圍第10項所述之液晶顯示器供電電路其中 ’該液晶顯示器電源係包含: 一第—開關模組’其—輪人端_接於該主機板之該電源 輸出端’該第-關模㈣用來根據該控制訊號決定是否 根據該主機板所產生之-第—電源來產生—第二電源; —第-電源轉換模組,其-輸人雜娜於該第—開關模 組之-輸該第-電源轉換模組係根據該第二電源是 否處於電位來導通其_第—輸出端與—第二輸出端之 間的電流; 一第二開關模組’其—輸人端係耦接於該第-電源轉換模 組之該第-輸出端,該第二開關模㈣用來根據該第一電 源轉換模組之該第-輸出端輿該第二輸出端之間是否產生 導通電流來產生一第三電源; -第二電源供應單元’其_關控制端絲接於該第二開 關模組之-輸出端’該第二電源供應單元係根據該第三電 源是否處於一高電位來產生一第四電源;及 098134703 14 . 第二電源轉換模組’其—輸人端係Μ接於該第二電源供 應單元之-輸出端’該第二電源轉換模組之—輸出端係耗 接於該電源_電路之該輸出端,且該第二電源轉換模組 係將該第四電源轉換為_第五電源,並將該第五電源輸出 於該電源開關電路之該輸出端。 如申請專利範㈣13項所述之液晶㈣器供電電路,其中 表單編號A0101 第22頁/共31頁 0982059454-0 201113858 ’該第一開關模組係包含: 一Ρηρ型雙載子接面電晶體,其—射極係減於該主機板 之該電源輸出端,且該pnp型雙載子接面電晶體之一基極 係耦接於該控制訊號;及 第電阻其一第一端係麵接於該pnp型雙載子接面電 晶體之集極’且該第—電阻之—第二端係輕接於該第一電 源轉換模組。 15 . Ο Ο 16 . 17 . 如申請專利範圍第13項所述之液晶顯示器供電電路,其中 ’該第二開關模組係包含: 第一ηρη型雙載子接面電晶體,其一集極係耗接於一直 流電源,且該第三ηρη型雙載子接面電晶體之一射極係耦 接於該第二電源供應單元之該開關控制端; 第一電阻其第一端係麵接於該第一電源轉換模組之 該第一輸出端,且該第二電阻之一第二被係耦接於該第三 ηρη型雙載子接面電晶體之一基極;及 一第二電阻,其一第一端係耦接於該第二電阻之該第二端 ,且該第三電阻之一第二端係粞接於該第三ηρη型雙載子 接面電晶體之該集極。 如申請專利範圍第1項所述之液晶顯示器供電電路,更包 含: 一第一濾波模組,用來濾除該電源供應單元所接收之一電 源中所包含之雜訊。 如申請專利範圍第1項所述之液晶顯示器供電電路,其中 一顯示面板係耦接於該液晶顯示器電源,該微處理器係耦 接於該第一電源供應單元,以接收該第—電源供應單元提 供之一第一輸出電源。 098134703 表單編號Α0101 第23頁/共31頁 0982059454-0 201113858 18 .如申請專利範圍第17項所述之液晶顯示器供電電路,更包 含: 一第二電源供應單元,用來將該第一輸出電源轉換為一第 二輸出電源,以供應給該顯示器之一運算積體電路;及 一第二濾波模組,用來濾除該第二電源供應單元所處理之 該第二輸出電源中的雜訊。 098134703 表單編號A0101 第24頁/共31頁 0982059454-0201113858 VII, the scope of application for patents: 1 - a liquid crystal display power supply circuit * contains. A motherboard switch circuit, one of the input terminals are coupled to a power supply output of a motherboard; - LCD display is not power, a The power switch circuit has an input end coupled to the liquid crystal display power supply; and a first power supply unit coupled to one of the output terminals of the motherboard switch circuit, one output end of the power switch circuit, and a micro processing And supplying power to the microprocessor or the power supply of the liquid crystal display to the microprocessor. 2. The liquid crystal display power supply circuit of claim 1, wherein when a display enters a normal operation mode, the motherboard switch circuit is turned off, and the power switch circuit is turned on, so that the liquid crystal display power supply The power source is supplied to the first power supply unit through the power switch circuit. 3. The liquid crystal display power supply circuit of claim 1, wherein, when a display enters a sleep mode, the motherboard switch circuit is turned on, and the power switch circuit is turned off, so that the motherboard is A motherboard output power is supplied to the first power supply unit through the motherboard switch circuit. 4. The liquid crystal display power supply circuit of claim 1, wherein the motherboard switching circuit comprises: a first diode, a first end of which is coupled to the power output of the motherboard And a first end of the resistor coupled to the second end of the first diode, 098134703 Form No. A0101, page 19/31, 098205945-4-0, 201113858, and one of the second ends of the resistor The system is coupled to the first power supply unit. 5. The liquid crystal display power supply circuit of claim 4, wherein the motherboard switching circuit further comprises: a Zener diode, a first end of which is consumed by the motherboard The power output end, and the second end of the Zener diode is grounded; and a first capacitor is connected in parallel to the Zener diode. 6. The liquid crystal display power supply circuit of claim 4, wherein the power switch circuit comprises: a second diode, a first end of which is coupled to the liquid crystal display power supply; The first end of the third diode is coupled to the second end of the second diode, and the second end of the third diode is coupled to the first power supply unit. 7. The liquid crystal display power supply circuit of claim 1, wherein the motherboard switching circuit comprises: an n-type MOS transistor, wherein a source and a gate are coupled to the host a first output of the first resistor is coupled to one of the n-type MOS transistors, and the second end of the first resistor is coupled to the first end The first power supply unit. 8. The liquid crystal display power supply circuit of claim 7, wherein the motherboard switching circuit further comprises: a second resistor, a first end of which is coupled to the n-type MOS transistor a base, and one of the second ends of the second resistor is grounded. 9. The liquid crystal display power supply circuit according to claim 7, wherein 098,134,703 form number Α0101, page 20/total 31 page, 098,205,945,044, and 201113858, the power switch circuit includes: a fourth pole 胄---end system The liquid crystal display power supply circuit of the liquid crystal display power supply, wherein the second power supply is connected to the liquid crystal display power supply circuit, and the liquid crystal display power supply circuit according to claim 1, wherein the host The board switch circuit includes: Ο a first npn-type bi-carrier junction transistor, the collector is coupled to the power output end of the motherboard, and the first-type dual-carrier junction transistor The base is coupled to a control signal; a second npn-type dual-carrier silicon transistor is coupled to the base of the first npn-type bipolar junction transistor and the second An emitter of the npn-type bipolar junction transistor is grounded; and a fifth diode is coupled to the emitter of the first npn-type bipolar junction transistor, and the first end is coupled to the emitter of the first npn-type bipolar junction transistor a second end of the fifth diode is consumed by the first power supply unit; When 'when entering a sleep mode' comprises the display monitor circuit potential of one of the supply lines of the control signal is a low voltage. 11. The liquid crystal display power supply circuit of claim 10, wherein the main board switch circuit further comprises: a first end of the resistor connected to the first npn type double carrier junction transistor a collector, and a second end of the resistor is coupled to the base of the first npn-type bipolar junction transistor; a first end of the electric valley is coupled to the fifth diode The second end of the capacitor is coupled to the emitter of the second npn-type bipolar transistor. 098134703 12. The liquid crystal display power supply circuit according to claim 10, wherein the form number A0101 page 21/total 31 page 0982059454-0 201113858 'The power switch circuit system includes: display power supply, power supply unit first a liquid crystal display power supply circuit according to claim 10, wherein a first end is coupled to the liquid crystal and a second end of the sixth diode is connected to the first 13 Wherein the liquid crystal display power supply comprises: a first switch module, wherein the wheel terminal is connected to the power output end of the motherboard, and the first-off mode (4) is used to determine whether the host is based on the control signal. The first power supply is generated by the first power supply, and the first power conversion module is based on the first power conversion module. Whether the second power source is at a potential to conduct current between the _th-output terminal and the second output terminal; a second switch module s-the input terminal is coupled to the first power-conversion module - output, the second open The module (4) is configured to generate a third power source according to whether the first output terminal of the first power conversion module generates an on current between the second output terminal; - the second power supply unit 'the control terminal wire Connected to the output terminal of the second switch module, the second power supply unit generates a fourth power source according to whether the third power source is at a high potential; and 098134703 14 . The second power conversion module The input end is connected to the output end of the second power supply unit, and the output end of the second power conversion module is connected to the output end of the power supply circuit, and the second power conversion module The fourth power source is converted to a fifth power source, and the fifth power source is output to the output end of the power switch circuit. For example, the liquid crystal (four) power supply circuit described in claim 13 (4), wherein the form number A0101, page 22 / total 31 pages 0 892 514 945 - 201113858 'The first switch module includes: a Ρρ type double carrier junction transistor The emitter is reduced to the power output of the motherboard, and one of the bases of the pnp-type dual-carrier transistor is coupled to the control signal; and the first end of the first resistor is Connected to the collector of the pnp type bipolar junction transistor and the second end of the first resistor is lightly connected to the first power conversion module. 15 . The liquid crystal display power supply circuit of claim 13, wherein the second switch module comprises: a first ηρη type bipolar junction transistor, a collector thereof The first ηρη type bipolar contact transistor is coupled to the switch control end of the second power supply unit; the first resistor has a first end surface Connected to the first output end of the first power conversion module, and one of the second resistors is coupled to one of the bases of the third ηρη type bipolar junction transistor; The second resistor is coupled to the second end of the second resistor, and the second end of the third resistor is coupled to the third ηρη-type bipolar junction transistor Collective. The liquid crystal display power supply circuit of claim 1, further comprising: a first filter module for filtering noise contained in a power source received by the power supply unit. The liquid crystal display power supply circuit of claim 1, wherein a display panel is coupled to the liquid crystal display power supply, the microprocessor is coupled to the first power supply unit to receive the first power supply The unit provides one of the first output power sources. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Converting to a second output power supply for supplying an integrated circuit of the display; and a second filter module for filtering noise in the second output power source processed by the second power supply unit . 098134703 Form No. A0101 Page 24 of 31 0982059454-0
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