TWI407217B - Array substrate, display apparatus having the same and method of repairing the same - Google Patents

Array substrate, display apparatus having the same and method of repairing the same Download PDF

Info

Publication number
TWI407217B
TWI407217B TW094135758A TW94135758A TWI407217B TW I407217 B TWI407217 B TW I407217B TW 094135758 A TW094135758 A TW 094135758A TW 94135758 A TW94135758 A TW 94135758A TW I407217 B TWI407217 B TW I407217B
Authority
TW
Taiwan
Prior art keywords
line
repairing
gate
signal
signal line
Prior art date
Application number
TW094135758A
Other languages
Chinese (zh)
Other versions
TW200627030A (en
Inventor
Joon-Hak Oh
Keun-Kyu Song
Young-Chol Yang
Original Assignee
Samsung Display Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Publication of TW200627030A publication Critical patent/TW200627030A/en
Application granted granted Critical
Publication of TWI407217B publication Critical patent/TWI407217B/en

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306Details
    • G02F1/1309Repairing; Testing
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

In an array substrate, a display apparatus having the same and a method for repairing the same, a substrate includes a display area and a peripheral area that is adjacent to the display area. A plurality of signal transmitting lines are formed in the peripheral area of the substrate. A plurality of signal lines are formed in the display area of the substrate and connected to the signal transmitting lines. A repair part is formed in the peripheral area of the substrate. The repair part intersects and is insulated from the signal transmitting lines so as to repair a first opened signal transmitting line of the signal transmitting lines. Thus, the array substrate may be produced in high-yield and prevent signal distortion.

Description

陣列基板,具有陣列基板之顯示裝置及用以修補陣列基板之方法Array substrate, display device having array substrate and method for repairing array substrate

本發明係關於一種陣列基板、一種具有該陣列基板之顯示裝置及一種用以修補該陣列基板之方法。更特定言之,本發明係關於一種能夠增加顯示裝置之製造良率之陣列基板、一種具有該陣列基板之顯示裝置及一種用以修補該陣列基板之方法。The present invention relates to an array substrate, a display device having the array substrate, and a method for repairing the array substrate. More specifically, the present invention relates to an array substrate capable of increasing the manufacturing yield of a display device, a display device having the array substrate, and a method for repairing the array substrate.

一般而言,液晶顯示(LCD)裝置包括一顯示面板,其具有一陣列基板、一面向該陣列基板之相對基板及一安置於該陣列基板與該相對基板之間的液晶層。In general, a liquid crystal display (LCD) device includes a display panel having an array substrate, an opposite substrate facing the array substrate, and a liquid crystal layer disposed between the array substrate and the opposite substrate.

該陣列基板包括在其顯示區域中所提供之複數個閘極線及複數個資料線。該顯示面板包括在其周邊區域中所提供之一閘極驅動晶片及一資料驅動晶片。該閘極驅動晶片輸出一閘極訊號,且該資料驅動晶片輸出一資料訊號。The array substrate includes a plurality of gate lines and a plurality of data lines provided in a display area thereof. The display panel includes a gate drive chip and a data drive wafer provided in a peripheral region thereof. The gate driving chip outputs a gate signal, and the data driving chip outputs a data signal.

閘極驅動晶片與閘極線藉由安置於其間之複數個閘極訊號傳輸線而連接,使得閘極訊號藉由該等閘極訊號傳輸線而傳輸至該等閘極線。The gate driving chip and the gate line are connected by a plurality of gate signal transmission lines disposed therebetween, so that the gate signals are transmitted to the gate lines through the gate signal transmission lines.

類似地,資料驅動晶片與資料線藉由安置於其間之複數個資料訊號傳輸線而連接,使得資料訊號藉由該等資料訊號傳輸線而傳輸至該等資料線。Similarly, the data-driven chip and the data line are connected by a plurality of data signal transmission lines disposed therebetween, so that the data signals are transmitted to the data lines through the data signal transmission lines.

通常,閘極與資料訊號傳輸線在周邊區域中彎曲。然而,閘極與資料訊號傳輸線在其彎曲部分處開口,藉此降低顯示面板之製造良率被惡化。Typically, the gate and data signal transmission lines are bent in the peripheral region. However, the gate and the data signal transmission line are opened at the bent portion thereof, whereby the manufacturing yield of the display panel is deteriorated to be deteriorated.

本發明提供一種陣列基板,其能夠改良製造良率並防止訊號失真。The present invention provides an array substrate capable of improving manufacturing yield and preventing signal distortion.

本發明之額外特徵將陳述於以下描述中,且將部分地自該描述而變得顯而易見,或可藉由本發明之實例而得以瞭解。The additional features of the present invention are set forth in the description which follows, and will be apparent from the description.

本發明揭示一種陣列基板,其包括:一基板,該基板包括一顯示區域及一與該顯示區域相鄰之周邊區域;一第一訊號線,其提供於該基板之周邊區域處以接收一驅動訊號;一第二訊號線,其提供於該顯示區域處,該第二訊號線耦接至該第一訊號線以接收該驅動訊號;一像素陣列,其提供於該顯示區域處,其接收來自該第二訊號線之驅動訊號;及一交叉部分,其提供於該周邊區域處,該交叉部分交叉並絕緣於該第一訊號線。The invention discloses an array substrate, comprising: a substrate, the substrate comprises a display area and a peripheral area adjacent to the display area; a first signal line is provided at a peripheral area of the substrate to receive a driving signal a second signal line is provided at the display area, the second signal line is coupled to the first signal line to receive the driving signal; a pixel array is provided at the display area, and the receiving is from the a driving signal of the second signal line; and an intersection portion provided at the peripheral area, the intersection portion intersecting and insulating the first signal line.

本發明亦揭示一種顯示裝置,其包括:一陣列基板,該陣列基板包括:一基板,其具有一顯示區域及一與該顯示區域相鄰之周邊區域;一第一閘極訊號線,其提供於該周邊區域處以接收來自閘極驅動晶片之閘極訊號;一第一資料訊號線,其提供於該周邊區域處以接收來自資料驅動晶片之資料訊號;一第二閘極線,其提供於該顯示區域處,該第二閘極線耦接至該第一閘極訊號線以接收來自該第一閘極訊號線之閘極訊號;一第二資料線,其提供於該基板之顯示區域處,該資料線耦接至第一資料訊號線以接收來自該第一資料訊號線之資料訊號;一閘極側修補部分,其用以修補一第一開口閘極訊號線;一虛設閘極側修補部分,其用以修補一第二開口閘極訊號線;一資料側修補部分,其用以修補一開口第一資料訊號線;及一虛設資料側修補部分,其用以修補一第二開口第一資料訊號線;一相對基板,其對應於該陣列基板;一閘極驅動晶片,其提供於該陣列基板處以傳輸一閘極訊號;及一資料驅動晶片,其提供於該陣列基板處以傳輸一資料訊號。The present invention also discloses a display device comprising: an array substrate, the array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a first gate signal line, which is provided Receiving a gate signal from the gate driving chip at the peripheral region; a first data signal line provided at the peripheral region for receiving a data signal from the data driving chip; and a second gate line provided for the The second gate line is coupled to the first gate signal line to receive the gate signal from the first gate signal line; and a second data line is provided at the display area of the substrate. The data line is coupled to the first data signal line for receiving the data signal from the first data signal line; a gate side repairing portion for repairing a first open gate signal line; and a dummy gate side a repairing portion for repairing a second open gate signal line; a data side repairing portion for repairing an open first data signal line; and a dummy data side repairing portion for repairing a second opening first data signal line; an opposite substrate corresponding to the array substrate; a gate driving chip provided at the array substrate to transmit a gate signal; and a data driving chip provided in the array A substrate is used to transmit a data signal.

本發明亦揭示一種用以修補陣列基板之方法,其包括:將一第一雷射束照射至一開口訊號線之一第一末端部分重疊一第一修補線處之一第一重疊部分上,以將該開口訊號線耦接至該第一修補線;將一第二雷射束照射至該開口訊號線之一第二末端部分重疊一第二修補線處之一第二重疊部分上,以將該開口訊號線耦接至該第二修補線;將一第三雷射束照射至該第一修補線之一末端部分重疊一連接線處之一第三重疊部分上,以將該第一修補線耦接至該連接線;及將一第四雷射束照射至該第二修補線之一末端部分重疊該連接線處之一第四重疊部分上,以將該第二修補線耦接至該連接線。The invention also discloses a method for repairing an array substrate, comprising: irradiating a first laser beam to a first end portion of an open signal line and overlapping a first overlapping portion of a first repair line, Coupling the open signal line to the first repairing line; irradiating a second laser beam to a second end portion of one of the open signal lines and overlapping a second overlapping portion of the second repairing line to Coupling the open signal line to the second repairing line; irradiating a third laser beam to an end portion of one of the first repairing lines and overlapping a third overlapping portion of a connecting line to a repairing line is coupled to the connecting line; and irradiating a fourth laser beam to an end portion of the second repairing line overlapping a fourth overlapping portion of the connecting line to couple the second repairing line To the connection line.

本發明亦揭示一種用以修補陣列基板之方法,其包括:將一第一雷射束照射至一開口訊號線之一第一末端部分重疊一第一修補線處之一第一重疊部分上,以將該第一修補線耦接至該開口訊號線;及將一第二雷射束照射至該開口訊號線之第二末端部分之一重疊一耦接至該第一修補線之第二修補線的第二重疊部分上,以將該第二修補線耦接至該開口訊號線。The invention also discloses a method for repairing an array substrate, comprising: irradiating a first laser beam to a first end portion of an open signal line and overlapping a first overlapping portion of a first repair line, The first repairing line is coupled to the open signal line; and a second laser beam is irradiated to one of the second end portions of the open signal line, and a second repair is coupled to the first repair line. The second overlapping portion of the line is coupled to the open signal line.

應瞭解,前述之一般描述與以下之詳細描述皆為例示性及說明性的,且意欲提供如所主張之本發明之進一步說明。The foregoing description of the preferred embodiments of the invention,

在下文中參考隨附圖式來更全面地描述本發明,其中展示本發明之實施例。然而,本發明可以許多不同之形式來體現,且不應將其解釋為限於本文所陳述之實施例。相反,提供此等實施例以使得此揭示為徹底的,且將向熟悉此項技術者全面地傳達本發明之範疇。在該等圖式中,為了清晰起見,可誇示層及區域之尺寸及相對尺寸。The invention is described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the invention. However, the invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough. In the drawings, the dimensions and relative dimensions of the layers and regions are exaggerated for clarity.

圖1為展示根據本發明之一實施例之陣列基板之平面圖。參看圖1,一陣列基板101包括一基板110,該基板110被分為一顯示區域DA及一與該顯示區域DA相鄰之周邊區域PA。1 is a plan view showing an array substrate in accordance with an embodiment of the present invention. Referring to FIG. 1, an array substrate 101 includes a substrate 110 divided into a display area DA and a peripheral area PA adjacent to the display area DA.

複數個閘極線GL1~GLn及複數個資料線DL1~DLm形成於基板110之顯示區域DA中,其中n及m為正整數。閘極線GL1~GLn沿一第一方向D1延伸,且資料線DL1~DLm沿一第二方向D2延伸,該第二方向D2大體上垂直於該第一方向D1。閘極線GL1~GLn及資料線DL1~DLm可提供於相互不同之層上,使得閘極線GL1~GLn與資料線DL1~DLm相互電絕緣。A plurality of gate lines GL1 GL GLn and a plurality of data lines DL1 DL DLm are formed in the display area DA of the substrate 110, where n and m are positive integers. The gate lines GL1 GLGLn extend along a first direction D1, and the data lines DL1 DL DLm extend along a second direction D2 that is substantially perpendicular to the first direction D1. The gate lines GL1 GL GLn and the data lines DL1 DL DLm may be provided on mutually different layers such that the gate lines GL1 GL GLn and the data lines DL1 DL DLm are electrically insulated from each other.

複數個薄膜電晶體及複數個像素電極以大體上矩陣形之形狀而形成於基板110之顯示區域DA處。例如,一第一薄膜電晶體111具有:一閘電極,其電連接(例如,耦接)至閘極線GL1~GLn之第一閘極線GL1;一源電極,其電連接(例如,耦接)至資料線DL1~DLm之資料線DL1;及一汲電極,其電連接(例如,耦接)至第一像素電極112。A plurality of thin film transistors and a plurality of pixel electrodes are formed in a substantially matrix shape at the display area DA of the substrate 110. For example, a first thin film transistor 111 has a gate electrode electrically connected (eg, coupled) to the first gate line GL1 of the gate lines GL1 GL GLn; a source electrode electrically connected (eg, coupled Connected to the data line DL1 of the data lines DL1 DL DLm; and a 汲 electrode electrically connected (eg, coupled) to the first pixel electrode 112.

複數個閘極訊號傳輸線GFL1~GFLn及複數個資料訊號傳輸線DFL1~DFLm形成於基板110之周邊區域PA處。閘極訊號傳輸線GFL1~GFLn電連接(例如,耦接)至閘極線GL1~GLn之末端部分。來自閘極訊號傳輸線GFL1~GFLn之閘極訊號可傳輸至閘極線GL1~GLn。閘極訊號傳輸線GFL1~GFLn及閘極線GL1~GLn可形成於相同層上。A plurality of gate signal transmission lines GFL1 to GFLn and a plurality of data signal transmission lines DFL1 to DFLm are formed at a peripheral area PA of the substrate 110. The gate signal transmission lines GFL1 to GFLn are electrically connected (for example, coupled) to the end portions of the gate lines GL1 to GLn. The gate signals from the gate signal transmission lines GFL1 to GFLn can be transmitted to the gate lines GL1 to GLn. The gate signal transmission lines GFL1 to GFLn and the gate lines GL1 to GLn may be formed on the same layer.

或者,資料訊號傳輸線DFL1~DFLm可電連接(例如,耦接)至資料線DL1~DLm之末端部分。來自資料訊號傳輸線DFL1~DFLm之資料訊號可傳輸至資料線DL1~DLm。資料訊號傳輸線DFL1~DFLm及資料線DL1~DLm可形成於相同層上。Alternatively, the data signal transmission lines DFL1 D DFLm may be electrically connected (eg, coupled) to the end portions of the data lines DL1 DL DLm. The data signals from the data signal transmission lines DFL1~DFLm can be transmitted to the data lines DL1~DLm. The data signal transmission lines DFL1 to DFLm and the data lines DL1 to DLm may be formed on the same layer.

在本實施例中,閘極訊號傳輸線GFL1~GFLn之間之距離小於閘極線GL1~GLn之間之距離。又,資料訊號傳輸線DFL1~DFLm之間之距離小於資料線DL1~DLm之間之距離。因此,閘極訊號傳輸線GFL1~GFLn被分為具有大體上扇形之形狀之四組,且資料訊號傳輸線DFL1~DFLm被分為具有大體上扇形之形狀之三組。In the present embodiment, the distance between the gate signal transmission lines GFL1 to GFLn is smaller than the distance between the gate lines GL1 GL GLn. Moreover, the distance between the data signal transmission lines DFL1 to DFLm is smaller than the distance between the data lines DL1 to DLm. Therefore, the gate signal transmission lines GFL1 to GFLn are divided into four groups having a substantially fan shape, and the data signal transmission lines DFL1 to DFLm are divided into three groups having a substantially fan shape.

一第一修補部分RP1及一第二修補部分RP2可形成於第一基板110之周邊區域PA處。第一修補部分RP1修補閘極訊號傳輸線GFL1~GFLn之第一開口閘極訊號傳輸線。第二修補部分RP2修補資料訊號傳輸線DFL1~DFLm之第一開口資料側訊號傳輸線。A first repairing portion RP1 and a second repairing portion RP2 may be formed at a peripheral area PA of the first substrate 110. The first repairing portion RP1 repairs the first open gate signal transmission line of the gate signal transmission lines GFL1 to GFLn. The second repairing part RP2 repairs the first open data side signal transmission line of the data signal transmission line DFL1~DFLm.

第一修補部分RP1包括一第一修補線RL1、一第二修補線RL2、及一第一連接線CL1。第一修補線RL1及第二修補線RL2形成於一不同於上面相成有閘極訊號傳輸線GFL1~GFLn之層的層上。又,第一修補線RL1交叉並絕緣於閘極訊號傳輸線GFL1~GFLn之第一末端部分。第二修補線RL2交叉並絕緣於閘極訊號傳輸線GFL1~GFLn之第二末端部分。The first repairing portion RP1 includes a first repairing line RL1, a second repairing line RL2, and a first connecting line CL1. The first repairing line RL1 and the second repairing line RL2 are formed on a layer different from the layer on which the gate signal transmission lines GFL1 to GFLn are formed. Further, the first repairing line RL1 intersects and is insulated from the first end portion of the gate signal transmission lines GFL1 to GFLn. The second repairing line RL2 crosses and is insulated from the second end portion of the gate signal transmission lines GFL1 to GFLn.

第一連接線CL1及閘極訊號傳輸線GFL1~GFLn可形成於相同層上。第一連接線CL1之第一末端部分交叉並絕緣於第一修補線RL1之末端部分,且第一連接線CL1之第二末端部分交叉並絕緣於第二修補線RL2之末端部分。The first connection line CL1 and the gate signal transmission lines GFL1 to GFLn may be formed on the same layer. The first end portion of the first connection line CL1 intersects and is insulated from the end portion of the first repair line RL1, and the second end portion of the first connection line CL1 intersects and is insulated from the end portion of the second repair line RL2.

如圖1所示,閘極訊號傳輸線GFL1~GFLn可被分為四組,且第一修補線RL1及第二修補線RL2亦可被分為四組。第一連接線CL1交叉並絕緣於被分為四組之第一修補線RL1及第二修補線RL2。因此,第一修補部分RP1可修補四組閘極訊號傳輸線GFL1~GFLn。As shown in FIG. 1, the gate signal transmission lines GFL1 to GFLn can be divided into four groups, and the first repair line RL1 and the second repair line RL2 can also be divided into four groups. The first connection line CL1 intersects and is insulated from the first repair line RL1 and the second repair line RL2 which are divided into four groups. Therefore, the first repairing portion RP1 can repair the four sets of gate signal transmission lines GFL1 to GFLn.

一第一虛設修補部分DRP1提供於基板110之周邊區域PA處以修補閘極訊號傳輸線GFL1~GFLn之第二開口閘極訊號傳輸線。第一虛設修補部分DRP1包括一第一虛設修補線DRL1、一第二虛設修補線DRL2、及一第一虛設連接線DCL1。第一虛設修補部分DRP1具有與第一修補部分RP1大體上相同之結構,且因此,為方使之目的,不需要第一虛設修補部分DRP1之詳細描述。A first dummy repairing portion DRP1 is provided at the peripheral area PA of the substrate 110 to repair the second open gate signal transmission line of the gate signal transmission lines GFL1 to GFLn. The first dummy repairing portion DRP1 includes a first dummy repairing line DRL1, a second dummy repairing line DRL2, and a first dummy connecting line DCL1. The first dummy patching portion DRP1 has substantially the same structure as the first patching portion RP1, and therefore, for the purpose of the party, a detailed description of the first dummy patching portion DRP1 is not required.

第二修補部分RP2包括一第三修補線RL3、一第四修補線RL4、及一第二連接線CL2。第三修補線RL3及第四修補線RL4可形成於一不同於上面形成有資料訊號傳輸線DFL1~DFLm之層的層上。第三修補線RL3交叉並絕緣於資料訊號傳輸線DFL1~DFLm之第一末端部分。第四修補線RL4交叉並絕緣於資料訊號傳輸線DFL1~DFLm之第二末端部分。The second repairing portion RP2 includes a third repairing line RL3, a fourth repairing line RL4, and a second connecting line CL2. The third repairing line RL3 and the fourth repairing line RL4 may be formed on a layer different from the layer on which the data signal transmission lines DFL1 to DFLm are formed. The third repairing line RL3 crosses and is insulated from the first end portion of the data signal transmission lines DFL1 to DFLm. The fourth repairing line RL4 crosses and is insulated from the second end portion of the data signal transmission lines DFL1 to DFLm.

第二連接線CL2及資料訊號傳輸線DFL1~DFLm可形成於相同層上。第二連接線CL2之第一末端部分交叉第三修補線RL3之末端部分,且第二連接線CL2之第二末端部分交叉第四修補線RL4之末端部分。The second connection line CL2 and the data signal transmission lines DFL1 to DFLm may be formed on the same layer. The first end portion of the second connection line CL2 crosses the end portion of the third repair line RL3, and the second end portion of the second connection line CL2 crosses the end portion of the fourth repair line RL4.

如圖1所示,資料訊號傳輸線DFL1~DFLm可被分為三組,且第三修補線RL3及第四修補線RL4可被分為三組。第二連接線CL2交叉並絕緣於第三修補線RL3,且第四修補線RL4被分為三組。因此,第二修補部分RP2可修補三組資料訊號傳輸線DFL1~DFLm。As shown in FIG. 1, the data signal transmission lines DFL1 D DFLm can be divided into three groups, and the third repair line RL3 and the fourth repair line RL4 can be divided into three groups. The second connection line CL2 is crossed and insulated from the third repair line RL3, and the fourth repair line RL4 is divided into three groups. Therefore, the second repairing portion RP2 can repair the three sets of data signal transmission lines DFL1 to DFLm.

一第二虛設修補部分DRP2可提供於基板110之周邊區域PA處,以修補資料訊號傳輸線DFL1~DFLm之第二開口資料訊號傳輸線。第二虛設DRP2可包括一第三虛設修補線DRL3、一第四虛設修補線DRL4及一第二虛設連接線DCL2。第二虛設修補部分DRP2具有與第二修補部分RP2大體上相同之結構,且因此,為方便之目的,不需要第二虛設修補部分DRP2之詳細描述。A second dummy repairing portion DRP2 can be provided at the peripheral area PA of the substrate 110 to repair the second open data signal transmission line of the data signal transmission lines DFL1 DDFLm. The second dummy DRP2 may include a third dummy repair line DRL3, a fourth dummy repair line DRL4, and a second dummy connection line DCL2. The second dummy patching portion DRP2 has substantially the same structure as the second patching portion RP2, and therefore, a detailed description of the second dummy patching portion DRP2 is not required for the sake of convenience.

圖2為展示圖1之閘極訊號傳輸線之放大平面圖。參看圖2,閘極訊號傳輸線GFLi及GFLj可形成於周邊區域PA處,且自閘極訊號傳輸線GFLi及GFLj延伸之複數個閘極線GLi及GLj可形成於顯示區域DA處,其中i及j為正整數。一第一修補部分RP1及一虛設第一修補部分DRP1可形成於周邊區域PA處以修補閘極訊號傳輸線GFLi及GFLj。第一修補部分RP1可包括一第一修補線RL1、一第二修補線RL2、及一第一連接線CL1。第一虛設修補部分DRP1可包括一第一虛設修補線DRL1、一第二虛設修補線DRL2、及一第一虛設連接線DCL1。2 is an enlarged plan view showing the gate signal transmission line of FIG. 1. Referring to FIG. 2, the gate signal transmission lines GFLi and GFLj may be formed at the peripheral area PA, and a plurality of gate lines GLi and GLj extending from the gate signal transmission lines GFLi and GFLj may be formed at the display area DA, where i and j Is a positive integer. A first repairing portion RP1 and a dummy first repairing portion DRP1 may be formed at the peripheral area PA to repair the gate signal transmission lines GFLi and GFLj. The first repairing portion RP1 may include a first repairing line RL1, a second repairing line RL2, and a first connecting line CL1. The first dummy repairing portion DRP1 may include a first dummy repairing line DRL1, a second dummy repairing line DRL2, and a first dummy connecting line DCL1.

當第i閘極訊號傳輸線GFLi與第j閘極訊號傳輸線GFLj分別在一第一開口區域OP1與一第二開口區域OP2處開口時,第一修補部分RP1修補該第i閘極訊號傳輸線GFLi,且第二修補部分RP2修補該第j閘極訊號傳輸線GFLj。When the ith gate signal transmission line GFLi and the jth gate signal transmission line GFLj are respectively opened at a first opening area OP1 and a second opening area OP2, the first repairing portion RP1 repairs the ith gate signal transmission line GFLi, And the second patching portion RP2 repairs the jth gate signal transmission line GFLj.

下文參考圖3來描述一修補第i閘極訊號傳輸線GFLi之方法。圖3為沿圖2中線I-I'所取之橫截面圖。圖4為沿圖2中線II-II'所取之橫截面圖。A method of repairing the ith gate signal transmission line GFLi is described below with reference to FIG. Figure 3 is a cross-sectional view taken along line II' of Figure 2 . Figure 4 is a cross-sectional view taken along line II-II' of Figure 2.

參看圖2及圖3,第一修補線RL1藉由一第一絕緣層113而電絕緣於第i閘極訊號傳輸線GFLi之第一末端部分,並重疊或交叉於該第i閘極訊號傳輸線GFLi之第一末端部分。第二修補線RL2藉由第一絕緣層113而電絕緣於第i閘極訊號傳輸線GFLi之第二末端部分,並重疊或交叉於該第i閘極訊號傳輸線GFLi之第二末端部分。當將一雷射束照射至重疊部分上時,第一修補線RL1可在大體上第一雷射點LP1處電連接(例如,耦接)至第i閘極訊號傳輸線GFLi之第一末端部分,在該第一雷射點LP1處,該第一修補線RL1重疊或交叉於該第一末端部分,且第二修補線RL2可在大體上第二雷射點LP2處電連接(例如,耦接)至第i閘極訊號傳輸線GFLi之第二末端部分,在該第二雷射點LP2處,該第二修補線RL2重疊或交叉於該第二末端部分。Referring to FIG. 2 and FIG. 3, the first repairing line RL1 is electrically insulated from the first end portion of the ith gate signal transmission line GFLi by a first insulating layer 113, and overlaps or crosses the ith gate signal transmission line GFLi. The first end portion. The second repairing line RL2 is electrically insulated from the second end portion of the ith gate signal transmission line GFLi by the first insulating layer 113, and overlaps or intersects the second end portion of the ith gate signal transmission line GFLi. When a laser beam is irradiated onto the overlapping portion, the first repairing line RL1 may be electrically connected (eg, coupled) to the first end portion of the ith gate signal transmission line GFLi at substantially the first laser point LP1. At the first laser spot LP1, the first repair line RL1 overlaps or crosses the first end portion, and the second repair line RL2 can be electrically connected at substantially the second laser point LP2 (eg, coupled Connected to the second end portion of the ith gate signal transmission line GFLi, at the second laser spot LP2, the second repair line RL2 overlaps or crosses the second end portion.

如圖2及圖4所示,第一連接線CL1藉由第一絕緣層113而電絕緣於第一修補線RL1及第二修補線RL2。當將一雷射束照射至第三雷射點LP3上時,第一連接線CL1可電連接(例如,耦接)至該第一修補線RL1,在該第三雷射點LP3處,第一連接線CL1重疊第一修補線RL1。當將一雷射束照射至第四雷射點LP4上時,第一連接線CL1可電連接(例如,耦接)至該第二修補線RL2,在該第四雷射點LP4處,第一連接線CL1重疊第二修補線RL2。As shown in FIGS. 2 and 4, the first connection line CL1 is electrically insulated from the first repair line RL1 and the second repair line RL2 by the first insulating layer 113. When a laser beam is irradiated onto the third laser spot LP3, the first connection line CL1 may be electrically connected (eg, coupled) to the first repair line RL1, at the third laser point LP3, A connection line CL1 overlaps the first repair line RL1. When a laser beam is irradiated onto the fourth laser spot LP4, the first connection line CL1 may be electrically connected (eg, coupled) to the second repair line RL2, at the fourth laser point LP4, A connection line CL1 overlaps the second repair line RL2.

第一連接線CL1形成於一不同於上面形成有第一修補線RL1及第二修補線RL2之層的層上,並藉由一照射雷射束之方法而電連接(例如,耦接)至該第一修補線RL1及該第二修補線RL2。The first connection line CL1 is formed on a layer different from the layer on which the first repair line RL1 and the second repair line RL2 are formed, and is electrically connected (eg, coupled) to the laser beam by a method of irradiating the laser beam The first repair line RL1 and the second repair line RL2.

因此,第i閘極訊號傳輸線GFLi之第一末端部分及第二末端部分藉由第一修補部分RP1而相互電連接(例如,耦接)。因此,來自第i閘極訊號傳輸線GFLi之第一末端部分之閘極訊號在相繼穿過第一修補線RL1、第一連接線CL1、及第二修補線RL2之後而傳輸至一第i閘極線。Therefore, the first end portion and the second end portion of the ith gate signal transmission line GFLi are electrically connected (eg, coupled) to each other by the first repair portion RP1. Therefore, the gate signal from the first end portion of the ith gate signal transmission line GFLi is transmitted to the ith gate after successively passing through the first repair line RL1, the first connection line CL1, and the second repair line RL2. line.

下文參考圖5來描述一修補第j閘極訊號傳輸線GFLj之方法。A method of repairing the jth gate signal transmission line GFLj is described below with reference to FIG.

圖5為沿圖2中所示之線III-III'所取之橫截面圖。圖6為沿圖2中所示之線IV-IV'所取之橫截面圖。Figure 5 is a cross-sectional view taken along line III-III' shown in Figure 2. Figure 6 is a cross-sectional view taken along line IV-IV' shown in Figure 2.

參看圖2及圖5,第一虛設修補線DRL1藉由一第一絕緣層113而電絕緣於第j閘極訊號傳輸線GFLj之第一末端部分。第二虛設修補線DRL2藉由第一絕緣層113而電絕緣於第j閘極訊號傳輸線GFLj之第二末端部分。當將一雷射束照射至第五雷射點LP5上時,第一虛設修補線DRL1可電連接(例如,耦接)至第j閘極訊號傳輸線GFLj之第一末端部分,在該第五雷射點LP5處,第一虛設修補線DRL1重疊第一末端部分。當將一雷射束照射至第六雷射點LP6上時,第二虛設修補線DRL2可電連接(例如,耦接)至第j閘極訊號傳輸線GFLj之第二末端部分,在該第六雷射點LP6處,第二虛設修補線DRL2重疊第二末端部分。Referring to FIGS. 2 and 5, the first dummy repair line DRL1 is electrically insulated from the first end portion of the jth gate signal transmission line GFLj by a first insulating layer 113. The second dummy repair line DRL2 is electrically insulated from the second end portion of the j-th gate signal transmission line GFLj by the first insulating layer 113. When a laser beam is irradiated onto the fifth laser spot LP5, the first dummy repair line DRL1 may be electrically connected (eg, coupled) to the first end portion of the jth gate signal transmission line GFLj, in the fifth At the laser spot LP5, the first dummy repair line DRL1 overlaps the first end portion. When a laser beam is irradiated onto the sixth laser spot LP6, the second dummy repair line DRL2 can be electrically connected (eg, coupled) to the second end portion of the jth gate signal transmission line GFLj, in the sixth At the laser spot LP6, the second dummy repair line DRL2 overlaps the second end portion.

如圖2及圖6所示,第一虛設連接線DCL1藉由第一絕緣層113而電絕緣於第一虛設修補線DRL1及第二虛設修補線DRL2。當將一雷射束照射至第七雷射點LP7上時,第一虛設連接線DCL1可電連接(例如,耦接)至該第一虛設修補線DRL1,在該第七雷射點LP7處,第一虛設連接線DCL1重疊第一虛設修補線DRL1。又,當將一雷射束照射至第八雷射點LP8上時,第一虛設連接線DCL1可電連接(例如,耦接)至該第二虛設修補線DRL2,在該第八雷射點LP8處,第一虛設連接線DCL1重疊第二虛設修補線DRL2。As shown in FIG. 2 and FIG. 6 , the first dummy connection line DCL1 is electrically insulated from the first dummy repair line DRL1 and the second dummy repair line DRL2 by the first insulating layer 113 . When a laser beam is irradiated onto the seventh laser spot LP7, the first dummy connection line DCL1 may be electrically connected (eg, coupled) to the first dummy repair line DRL1 at the seventh laser spot LP7. The first dummy connection line DCL1 overlaps the first dummy repair line DRL1. Moreover, when a laser beam is irradiated onto the eighth laser spot LP8, the first dummy connection line DCL1 can be electrically connected (eg, coupled) to the second dummy repair line DRL2 at the eighth laser spot. At LP8, the first dummy connection line DCL1 overlaps the second dummy repair line DRL2.

第一虛設連接線DCL1提供於一不同於上面形成有第一虛設修補線DRL1及第二虛設修補線DRL2之層的層上,並藉由一照射雷射束之方法而電連接(例如,耦接)至該第一虛設修補線DRL1及該第二修補線DRL2。The first dummy connection line DCL1 is provided on a layer different from the layer on which the first dummy repair line DRL1 and the second dummy repair line DRL2 are formed, and is electrically connected by a method of irradiating the laser beam (for example, coupling Connected to the first dummy repair line DRL1 and the second repair line DRL2.

因此,第j閘極訊號傳輸線GFLj之第一末端部分及第二末端部分藉由第一虛設修補部分DRP1而相互電連接(例如,耦接)。因此,來自第j閘極訊號傳輸線GFLj之第一末端部分之閘極訊號在相繼穿過第一虛設修補線DRL1、第一虛設連接線DCL1、及第二虛設修補線DRL2之後可施加至第j閘極線。Therefore, the first end portion and the second end portion of the jth gate signal transmission line GFLj are electrically connected (eg, coupled) to each other by the first dummy repair portion DRP1. Therefore, the gate signal from the first end portion of the jth gate signal transmission line GFLj can be applied to the jth after successively passing through the first dummy repair line DRL1, the first dummy connection line DCL1, and the second dummy repair line DRL2. Gate line.

返回至圖2,修補線RL1、RL2、DRL1及DRL2在一重疊區域處具有一第一寬度W1,在該重疊區域處修補線RL1、RL2、DRL1及DRL2重疊複數個閘極訊號傳輸線,且其在一不包括該重疊區域之區域處具有一大於該第一寬度W1之第二寬度W2。此可減少該重疊區域,在該重疊區域處修補線RL1、RL2、DRL1及DRL2重疊閘極訊號傳輸線。Returning to FIG. 2, the repair lines RL1, RL2, DRL1, and DRL2 have a first width W1 at an overlapping area, at which the repair lines RL1, RL2, DRL1, and DRL2 overlap a plurality of gate signal transmission lines, and There is a second width W2 greater than the first width W1 at a region not including the overlapping region. This can reduce the overlap region where the repair lines RL1, RL2, DRL1, and DRL2 overlap the gate signal transmission lines.

重疊區域之減少的尺寸亦可減少形成於修補線RL1、RL2、DRL1及DRL2與閘極訊號傳輸線之間的電容器之電容。因此,其可防止或大體上減少閘極訊號傳輸線之線電阻,並可減少施加至該等閘極訊號傳輸線之閘極訊號之失真及延遲。The reduced size of the overlap region also reduces the capacitance of the capacitor formed between the repair lines RL1, RL2, DRL1, and DRL2 and the gate signal transmission line. Therefore, it can prevent or substantially reduce the line resistance of the gate signal transmission line and can reduce the distortion and delay of the gate signal applied to the gate signal transmission lines.

在圖2、4、5及6中,描述一用以修補閘極訊號傳輸線之方法,然而,藉由執行與上文對於該等閘極訊號傳輸線之描述方法相同之方法,可修補資料訊號傳輸線。In Figures 2, 4, 5 and 6, a method for repairing a gate signal transmission line is described. However, the data signal transmission line can be repaired by performing the same method as described above for the gate signal transmission lines. .

圖7為展示根據本發明之另一實施例之閘極訊號傳輸部分之平面圖。在圖7中,相同之參考數字表示圖2所示之相同之元件,且因此,為方便之目的,按需要而省去相同元件之任何進一步重複性描述。Figure 7 is a plan view showing a gate signal transmission portion according to another embodiment of the present invention. In FIG. 7, the same reference numerals are given to the same elements as those shown in FIG. 2, and thus, for the sake of convenience, any further repetitive description of the same elements will be omitted as needed.

參看圖7,第一修補部分RP1包括第一修補線RL1、第二修補線RL2、及第三連接線CL3。第一修補線RL1、第二修補線RL2、及第三連接線CL3可形成於一不同於形成有閘極訊號傳輸線之層的層上。Referring to FIG. 7, the first repairing portion RP1 includes a first repairing line RL1, a second repairing line RL2, and a third connecting line CL3. The first repair line RL1, the second repair line RL2, and the third connection line CL3 may be formed on a layer different from the layer on which the gate signal transmission line is formed.

第一修補線RL1交叉並絕緣於閘極訊號傳輸線之第一末端部分。第二修補線RL2交叉並絕緣於閘極訊號線之第二末端部分。第三連接線CL3自第一修補線RL1及第二修補線RL2而延伸以將該第一修補線RL1連接(例如,耦接)至該第二修補線RL2,該第二修補線RL2與該第一修補線RL1間隔分離。The first repair line RL1 crosses and is insulated from the first end portion of the gate signal transmission line. The second repair line RL2 crosses and is insulated from the second end portion of the gate signal line. The third connection line CL3 extends from the first repair line RL1 and the second repair line RL2 to connect (eg, couple) the first repair line RL1 to the second repair line RL2, and the second repair line RL2 The first repair line RL1 is separated by intervals.

當第i閘極訊號傳輸線GFLi開口時,將一雷射束照射至第一雷射點LP1及第二雷射點LP2上。因此,第一修補線RL1在第一雷射點LP1處電連接(例如,耦接)至第i閘極訊號傳輸線GFLi之第一末端部分,且第二修補線RL2在第二雷射點LP2處電連接(例如,耦接)至第i閘極訊號傳輸線GFLi之第二末端部分。When the ith gate signal transmission line GFLi is opened, a laser beam is irradiated onto the first laser spot LP1 and the second laser spot LP2. Therefore, the first repair line RL1 is electrically connected (eg, coupled) to the first end portion of the ith gate signal transmission line GFLi at the first laser point LP1, and the second repair line RL2 is at the second laser point LP2. Electrically connected (eg, coupled) to a second end portion of the ith gate signal transmission line GFLi.

因此,開口第i閘極訊號傳輸線GFLi之第一末端部分及第二末端部分藉由第一修補部分RP1而相互電連接(例如,耦接)。因此,提供至第i閘極訊號傳輸線GFLi之閘極訊號在相繼穿過第一修補線RL1、第三連接線CL3及第二修補線RL2之後而傳輸至第i閘極線GLi。Therefore, the first end portion and the second end portion of the opening i-th gate signal transmission line GFLi are electrically connected (eg, coupled) to each other by the first repairing portion RP1. Therefore, the gate signal supplied to the ith gate signal transmission line GFLi is transmitted to the ith gate line GLi after successively passing through the first repair line RL1, the third connection line CL3, and the second repair line RL2.

第一虛設修補部分DRP1包括第一虛設修補線DRL1、第二虛設修補線DRL2、及第三虛設連接線DCL3。第一虛設修補線DRL1、第二虛設修補線DRL2及第三連接線DCL3可形成於一不同於形成有閘極訊號傳輸線之層的層上。The first dummy repair portion DRP1 includes a first dummy repair line DRL1, a second dummy repair line DRL2, and a third dummy connection line DCL3. The first dummy repair line DRL1, the second dummy repair line DRL2, and the third connection line DCL3 may be formed on a layer different from the layer on which the gate signal transmission line is formed.

第一虛設修補線DRL1交叉並絕緣於閘極訊號線之第一末端部分,且第二虛設修補線DRL2交叉並絕緣於閘極訊號傳輸線之第二末端部分。第三虛設連接線DCL3自第一虛設修補線DRL1及第二虛設修補線DRL2而延伸,並將該第一虛設修補線DRL1連接至該第二虛設修補線DRL2。The first dummy repair line DRL1 intersects and is insulated from the first end portion of the gate signal line, and the second dummy repair line DRL2 crosses and is insulated from the second end portion of the gate signal transmission line. The third dummy connection line DCL3 extends from the first dummy repair line DRL1 and the second dummy repair line DRL2, and connects the first dummy repair line DRL1 to the second dummy repair line DRL2.

當第j閘極訊號傳輸線GFLj開口時,雷射束照射至第五雷射點LP5及第六雷射點LP6上。因此,第j閘極訊號傳輸線GFLj之第一末端部分在第五雷射點LP5處電連接(例如,耦接)至第一虛設修補線DRL1,且第j閘極訊號傳輸線GFLj之第二末端部分在第六雷射點LP6處電連接(例如,耦接)至第二虛設修補線DRL2。When the jth gate signal transmission line GFLj is opened, the laser beam is irradiated onto the fifth laser point LP5 and the sixth laser point LP6. Therefore, the first end portion of the jth gate signal transmission line GFLj is electrically connected (eg, coupled) to the first dummy repair line DRL1 at the fifth laser spot LP5, and the second end of the jth gate signal transmission line GFLj Portions are electrically connected (eg, coupled) to the second dummy repair line DRL2 at the sixth laser spot LP6.

因此,開口第j閘極訊號傳輸線GFLj之第一末端部分及第二末端部分藉由第一虛設修補部分DRP1而相互電連接(例如,耦接)。因此,提供至第j閘極訊號傳輸線GFLj之閘極訊號在相繼穿過第一虛設修補線DRL1、第三虛設連接線DCL3及第二虛設修補線DRL2之後而傳輸至第j閘極線GLj。Therefore, the first end portion and the second end portion of the opening jth gate signal transmission line GFLj are electrically connected (eg, coupled) to each other by the first dummy repair portion DRP1. Therefore, the gate signal supplied to the jth gate signal transmission line GFLj is transmitted to the jth gate line GLj after successively passing through the first dummy line DRL1, the third dummy line DCL3, and the second dummy line DRL2.

圖8為展示根據本發明之另一實施例之陣列基板之平面圖。在圖8中,相同之參考數字表示圖1中相同之元件,且為方便之目的,按需要而省去相同元件之任何進一步重複性描述。Figure 8 is a plan view showing an array substrate in accordance with another embodiment of the present invention. In FIG. 8, the same reference numerals are used to refer to the same elements in FIG. 1, and for the sake of convenience, any further repetitive description of the same elements will be omitted as needed.

參看圖8,陣列基板102包括基板110,該基板被分為顯示區域DA及與該顯示區域DA相鄰之周邊區域PA。Referring to FIG. 8, the array substrate 102 includes a substrate 110 which is divided into a display area DA and a peripheral area PA adjacent to the display area DA.

閘極線GL1~GLn及資料線DL1~DLm形成於基板110之顯示區域DA處。閘極線GL1~GLn沿第一方向D1而延伸,且資料線DL1~DLm沿第二方向D2而延伸,該第二方向D2大體上垂直於該第一方向D1。閘極線GL1~GLn及資料線DL1~DLm提供於相互不同之層上,使得閘極線GL1~GLn與資料線DL1~DLm相互電絕緣。The gate lines GL1 to GLn and the data lines DL1 to DLm are formed at the display area DA of the substrate 110. The gate lines GL1 GLGLn extend in the first direction D1, and the data lines DL1 DL DLm extend in the second direction D2, which is substantially perpendicular to the first direction D1. The gate lines GL1 GL GLn and the data lines DL1 DL DLm are provided on mutually different layers such that the gate lines GL1 GL GLn and the data lines DL1 DL DLm are electrically insulated from each other.

陣列基板102可進一步包括一用以修補閘極線GL1~GLn之開口閘極線之第三修補部分RP3、及一用以修補資料線DL1~DLm之開口資料線之第四修補部分RP4。The array substrate 102 may further include a third repair portion RP3 for repairing the open gate lines of the gate lines GL1 GL GLn, and a fourth repair portion RP4 for repairing the open data lines of the data lines DL1 DL DLm.

第三修補部分RP3具有一第三修補線RL3、一第四修補線RL4及一第四連接線CL4。第三修補線RL3交叉並絕緣於閘極線GL1~GLn之第一末端部分,且第四修補線RL4交叉並絕緣於閘極線GL1~GLn之第二末端部分。第三修補線RL3與第四修補線RL4相互間隔分離,並藉由第四連接線CL4而相互電連接(例如,耦接)。The third repairing portion RP3 has a third repairing line RL3, a fourth repairing line RL4, and a fourth connecting line CL4. The third repair line RL3 intersects and is insulated from the first end portion of the gate lines GL1 GL GLn, and the fourth repair line RL4 crosses and is insulated from the second end portions of the gate lines GL1 GL GLn. The third repairing line RL3 and the fourth repairing line RL4 are spaced apart from each other and electrically connected (eg, coupled) to each other by the fourth connecting line CL4.

當第p閘極線GLp一第三開口區域OP3處開口時,一雷射束照射至第九雷射點LP9及第十雷射點LP10上。因此,第三修補線RL3電連接(例如,耦接)至第p閘極線GLp之第一末端部分,且第四修補線RL4電連接(例如,耦接)至第p閘極線GLp之第二末端部分。When the pth gate line GLp is opened at the third opening area OP3, a laser beam is irradiated onto the ninth laser point LP9 and the tenth laser point LP10. Therefore, the third repair line RL3 is electrically connected (eg, coupled) to the first end portion of the pth gate line GLp, and the fourth repair line RL4 is electrically connected (eg, coupled) to the pth gate line GLp. The second end portion.

因此,施加至第p閘極線GLp之第一末端部分之閘極訊號在相繼穿過第三修補線RL3、第四連接線CL4及第四修補線RL4之後而傳輸至第二末端部分。Therefore, the gate signal applied to the first end portion of the pth gate line GLp is transmitted to the second end portion after successively passing through the third repair line RL3, the fourth connection line CL4, and the fourth repair line RL4.

第四修補部分RP4可包括一第五修補線RL5、一第六修補線RL6、及一第五連接線CL5。第五修補線RL5交叉並絕緣於資料線DL1~DLm之第一末端部分。第六修補線RL6交叉並絕緣於資料線DL1~DLm之第二末端部分。第五修補線RL5與第六修補線RL6相互間隔分離,並藉由第五連接線CL5而相互電連接(例如,耦接)。The fourth repairing portion RP4 may include a fifth repairing line RL5, a sixth repairing line RL6, and a fifth connecting line CL5. The fifth repair line RL5 crosses and is insulated from the first end portion of the data lines DL1 to DLm. The sixth repairing line RL6 crosses and is insulated from the second end portion of the data lines DL1 to DLm. The fifth repairing line RL5 and the sixth repairing line RL6 are spaced apart from each other, and are electrically connected (eg, coupled) to each other by the fifth connecting line CL5.

當第q資料線DLq在第四開口區域OP4處開口時,一雷射束照射至第十一雷射點LP11及第十二雷射點LP12上。因此,第五修補線RL5電連接(例如,耦接)至第q資料線DLq之第一末端部分,且第六修補線RL6電連接(例如,耦接)至第q資料線DLq之第二末端部分。When the qth data line DLq is opened at the fourth opening area OP4, a laser beam is irradiated onto the eleventh laser point LP11 and the twelfth laser point LP12. Therefore, the fifth repair line RL5 is electrically connected (eg, coupled) to the first end portion of the qth data line DLq, and the sixth repair line RL6 is electrically connected (eg, coupled) to the second of the qth data line DLq. End part.

因此,施加至第q資料線DLq之第一末端部分之資料訊號在相繼穿過第五修補線RL5、第六連接線CL6及第六修補線RL6之後而傳輸至第二末端部分。Therefore, the data signal applied to the first end portion of the qth data line DLq is transmitted to the second end portion after successively passing through the fifth repair line RL5, the sixth connection line CL6, and the sixth repair line RL6.

儘管圖中未圖示,但是一用以修補閘極線GL1~GLn之另一開口閘極線之第三虛設修補部分及一用以修補資料線DL1~DLm之另一開口資料線之第四虛設修補部分可形成於第一基板110上。Although not shown in the drawing, a third dummy repairing portion for repairing another open gate line of the gate lines GL1 GL GLn and a fourth dummy data line for repairing the data lines DL1 DL DLm A dummy repair portion may be formed on the first substrate 110.

圖9為一具有圖1之陣列基板之顯示裝置之平面圖。在圖9中,相同之參考數字代表圖1中相同之元件,且為方便之目的,按需要而省去相同元件之任何進一步描述。Figure 9 is a plan view of a display device having the array substrate of Figure 1. In FIG. 9, the same reference numerals denote the same elements in FIG. 1, and any further description of the same elements will be omitted as needed for convenience.

參看圖9,一顯示一影像之顯示裝置400包括陣列基板101、一面向陣列基板101之相對基板200、及一液晶層(未圖示)。顯示裝置400可進一步包括輸出閘極訊號之複數個閘極驅動晶片310及輸出資料訊號之複數個資料驅動晶片320。Referring to FIG. 9, a display device 400 for displaying an image includes an array substrate 101, an opposite substrate 200 facing the array substrate 101, and a liquid crystal layer (not shown). The display device 400 can further include a plurality of gate driving chips 310 for outputting gate signals and a plurality of data driving chips 320 for outputting data signals.

閘極驅動晶片310對應於周邊區域PA而安裝或提供於陣列基板101上以連接至閘極訊號傳輸線GFL1~GFLn。在圖9所示之實施例中,閘極訊號傳輸線GFL1~GFLn可被分為四組,且該等四組接收來自閘極驅動晶片310之閘極訊號。The gate driving chip 310 is mounted or provided on the array substrate 101 corresponding to the peripheral area PA to be connected to the gate signal transmission lines GFL1 to GFLn. In the embodiment shown in FIG. 9, the gate signal transmission lines GFL1 to GFLn can be divided into four groups, and the four groups receive the gate signals from the gate driving wafer 310.

資料驅動晶片320對應於周邊區域PA而安裝或提供於陣列基板101上以連接至資料訊號傳輸線DFL1~DFLm。在圖9所示之實施例中,資料訊號傳輸線DFL1~DFLm被分為三組,且該等三組接收來自資料驅動晶片320之資料訊號。The data driving chip 320 is mounted or provided on the array substrate 101 corresponding to the peripheral area PA to be connected to the data signal transmission lines DFL1 to DFLm. In the embodiment shown in FIG. 9, the data signal transmission lines DFL1 D DFLm are divided into three groups, and the three groups receive the data signals from the data driving chip 320.

因此,顯示裝置400顯示該影像以回應於分別來自閘極驅動晶片310與資料驅動晶片320之閘極訊號與資料訊號。Therefore, the display device 400 displays the image in response to the gate signal and the data signal from the gate driving chip 310 and the data driving chip 320, respectively.

根據該陣列基板、具有該陣列基板之顯示裝置及用以修補該陣列基板之方法,修補部分交叉並絕緣於訊號傳輸線,使得僅修補該等訊號傳輸線。因此,該修補部分可修補一開口訊號傳輸線,其增加該陣列基板之製造良率。According to the array substrate, the display device having the array substrate, and the method for repairing the array substrate, the repair portions are crossed and insulated from the signal transmission lines so that only the signal transmission lines are repaired. Therefore, the repair portion can repair an open signal transmission line, which increases the manufacturing yield of the array substrate.

又,修補部分僅交叉並絕緣於訊號傳輸線,且未交叉於閘極線及資料線。因此,陣列基板防止分別施加至閘極線與資料線之閘極訊號與資料訊號之失真。Moreover, the repaired portion is only crossed and insulated from the signal transmission line, and does not cross the gate line and the data line. Therefore, the array substrate prevents distortion of the gate signal and the data signal applied to the gate line and the data line, respectively.

熟悉此項技術者將顯而易見,在不脫離本發明之精神或範疇的情況下,可在本發明中作出各種修改及變化。因此,期望本發明涵蓋本發明之該等修改及變化,其限制條件為該等修改及變化在附加申請專利範圍及其均等物之範疇內。It will be apparent to those skilled in the art that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention. Therefore, it is intended that the present invention cover the modifications and variations of the invention, and the scope of the appended claims and their equivalents.

101...陣列基板101. . . Array substrate

102...陣列基板102. . . Array substrate

110...基板110. . . Substrate

111...第一薄膜電晶體111. . . First thin film transistor

112...第一像素電極112. . . First pixel electrode

113...第一絕緣層113. . . First insulating layer

200...相對基板200. . . Relative substrate

310...閘極驅動晶片310. . . Gate driver chip

320...資料驅動晶片320. . . Data driven chip

400...顯示裝置400. . . Display device

CL1...第一連接線CL1. . . First connection line

CL2...第二連接線CL2. . . Second connection line

CL3...第三連接線CL3. . . Third connection line

CL4...第四連接線CL4. . . Fourth connection line

CL5...第五連接線CL5. . . Fifth connection line

D1...第一方向D1. . . First direction

D2...第二方向D2. . . Second direction

DA...顯示區域DA. . . Display area

DCL1...第一虛設連接線DCL1. . . First dummy connection line

DCL2...第二虛設連接線DCL2. . . Second dummy connection line

DCL3...第三虛設連接線DCL3. . . Third dummy connection line

DFL1...資料訊號傳輸線DFL1. . . Data signal transmission line

DFLm...資料訊號傳輸線DFLm. . . Data signal transmission line

DL1...資料線DL1. . . Data line

DLm...資料線DLm. . . Data line

DLq...第q資料線DLq. . . Qth data line

DRL1...第一虛設修補線DRL1. . . First dummy repair line

DRL2...第二虛設修補線DRL2. . . Second dummy repair line

DRL3...第三虛設修補線DRL3. . . Third dummy repair line

DRL4...第四虛設修補線DRL4. . . Fourth dummy repair line

DRP1...第一虛設修補部分DRP1. . . First dummy patching section

DRP2...第二虛設修補部分DRP2. . . Second dummy repair part

GFL1...閘極訊號傳輸線GFL1. . . Gate signal transmission line

GFLi...第i閘極訊號傳輸線GFLi. . . Ith gate signal transmission line

GFLj...第j閘極訊號傳輸線GFLj. . . Jth gate signal transmission line

GFLn...閘極訊號傳輸線GFLn. . . Gate signal transmission line

GL1...閘極線GL1. . . Gate line

GLi...第i閘極線GLi. . . Ith gate line

GLj...第j閘極線GLj. . . Jth gate line

GLn...閘極線GLn. . . Gate line

GLp...第p閘極線GLp. . . Pth gate line

LP1...第一雷射點LP1. . . First laser point

LP10...第十雷射點LP10. . . Tenth laser point

LP11...第十一雷射點LP11. . . Eleventh laser point

LP12...第十二雷射點LP12. . . Twelfth laser spot

LP2...第二雷射電LP2. . . Second laser

LP3...第三雷射點LP3. . . Third laser point

LP4...第四雷射點LP4. . . Fourth laser point

LP5...第五雷射點LP5. . . Fifth laser point

LP6...第六雷射點LP6. . . Sixth laser point

LP7...第七雷射點LP7. . . Seventh laser point

LP8...第八雷射點LP8. . . Eighth laser point

LP9...第九雷射點LP9. . . Ninth laser point

OP1...第一開口區域OP1. . . First opening area

OP2...第二開口區域OP2. . . Second opening area

OP3...第三開口區域OP3. . . Third opening area

OP4...第四開口區域OP4. . . Fourth opening area

PA...周邊區域PA. . . Surrounding area

RL1...第一修補線RL1. . . First repair line

RL2...第二修補線RL2. . . Second repair line

RL3...第三修補線RL3. . . Third repair line

RL4...第四修補線RL4. . . Fourth repair line

RL5...第五修補線RL5. . . Fifth repair line

RL6...第六修補線RL6. . . Sixth repair line

RP1...第一修補部分RP1. . . First patching part

RP2...第二修補部分RP2. . . Second patching part

RP3...第三修補部分RP3. . . Third patch

RP4...第四修補部分RP4. . . Fourth patch

W1...第一寬度W1. . . First width

W2...第二寬度W2. . . Second width

圖1為展示根據本發明之一實施例之陣列基板之平面圖。1 is a plan view showing an array substrate in accordance with an embodiment of the present invention.

圖2為展示圖1之閘極訊號傳輸線之放大平面圖。2 is an enlarged plan view showing the gate signal transmission line of FIG. 1.

圖3為沿圖2中線I-I'所取之橫截面圖。Figure 3 is a cross-sectional view taken along line II' of Figure 2 .

圖4為沿圖2中線II-II'所取之橫截面圖。Figure 4 is a cross-sectional view taken along line II-II' of Figure 2.

圖5為沿圖2中線III-III'所取之橫截面圖。Figure 5 is a cross-sectional view taken along line III-III' of Figure 2.

圖6為沿圖2中線IV-IV'所取之橫截面圖。Figure 6 is a cross-sectional view taken along line IV-IV' of Figure 2.

圖7為展示根據本發明之另一實施例之閘極訊號傳輸部分之平面圖。Figure 7 is a plan view showing a gate signal transmission portion according to another embodiment of the present invention.

圖8為展示根據本發明之另一實施例之陣列基板之平面圖。Figure 8 is a plan view showing an array substrate in accordance with another embodiment of the present invention.

圖9為展示具有圖1之陣列基板之顯示裝置之平面圖。Figure 9 is a plan view showing a display device having the array substrate of Figure 1.

101...陣列基板101. . . Array substrate

110...基板110. . . Substrate

111...第一薄膜電晶體111. . . First thin film transistor

112...第一像素電極112. . . First pixel electrode

CL1...第一連接線CL1. . . First connection line

CL2...第二連接線CL2. . . Second connection line

D1...第一方向D1. . . First direction

D2...第二方向D2. . . Second direction

DA...顯示區域DA. . . Display area

DCL1...第一虛設連接線DCL1. . . First dummy connection line

DCL2...第二虛設連接線DCL2. . . Second dummy connection line

DFL1...資料訊號傳輸線DFL1. . . Data signal transmission line

DFLm...資料訊號傳輸線DFLm. . . Data signal transmission line

DL1...資料線DL1. . . Data line

DLm...資料線DLm. . . Data line

DRL1...第一虛設修補線DRL1. . . First dummy repair line

DRL2...第二虛設修補線DRL2. . . Second dummy repair line

DRL3...第三虛設修補線DRL3. . . Third dummy repair line

DRL4...第四虛設修補線DRL4. . . Fourth dummy repair line

DRP1...第一虛設修補部分DRP1. . . First dummy patching section

DRP2...第二虛設修補部分DRP2. . . Second dummy repair part

GFL1...閘極訊號傳輸線GFL1. . . Gate signal transmission line

GFLn...閘極訊號傳輸線GFLn. . . Gate signal transmission line

GL1...閘極線GL1. . . Gate line

GLn...閘極線GLn. . . Gate line

PA...周邊區域PA. . . Surrounding area

RL1...第一修補線RL1. . . First repair line

RL2...第二修補線RL2. . . Second repair line

RL3...第三修補線RL3. . . Third repair line

RL4...第四修補線RL4. . . Fourth repair line

RP1...第一修補部分RP1. . . First patching part

RP2...第二修補部分RP2. . . Second patching part

Claims (28)

一種陣列基板,其包含:一基板,其包含一顯示區域及一與該顯示區域相鄰之周邊區域;一第一訊號線,其處於該基板之該周邊區域處以接收一驅動訊號;一第二訊號線,其處於該顯示區域處,該第二訊號線耦接至該第一訊號線以接收該驅動訊號;一像素陣列,其處於該顯示區域處以接收來自該第二訊號線之該驅動訊號;及一交叉部分,其處於該周邊區域處,該交叉部分交叉並絕緣於該第一訊號線,其中該交叉部分在一第一區域中具有一第一寬度及在一第二區域中具有寬於該第一寬度之一第二寬度,該交叉部分在該第一區域中與該第一訊號線重疊。 An array substrate comprising: a substrate comprising a display area and a peripheral area adjacent to the display area; a first signal line at the peripheral area of the substrate to receive a driving signal; a signal line, the second signal line is coupled to the first signal line to receive the driving signal; a pixel array is located at the display area to receive the driving signal from the second signal line And an intersection portion at the peripheral region, the intersection portion intersecting and insulating the first signal line, wherein the intersection portion has a first width in a first region and a width in a second region And at a second width of the first width, the intersection portion overlaps the first signal line in the first region. 如請求項1之陣列基板,其中該交叉部分包含:一第一修補線,其交叉並絕緣於該第一訊號線之一第一末端部分;及一第二修補線,其交叉並絕緣於該第一訊號線之一第二末端部分。 The array substrate of claim 1, wherein the intersection portion comprises: a first repairing line intersecting and insulated from one of the first end portions of the first signal line; and a second repairing line intersecting and insulating the same One of the first end portions of the first signal line. 如請求項2之陣列基板,其中該第一修補線及該第二修補線安置於一與該第一訊號線不同之層上。 The array substrate of claim 2, wherein the first repairing line and the second repairing line are disposed on a layer different from the first signal line. 如請求項2之陣列基板,其中該第一修補線包括額外第一訊號線,且該交叉部分修補該第一訊號線之一第一開口 訊號線。 The array substrate of claim 2, wherein the first repair line includes an additional first signal line, and the intersection portion repairs one of the first openings of the first signal line Signal line. 如請求項4之陣列基板,其中藉由將一雷射束照射至該第一修補線與該第一開口訊號線之間的一第一重疊部分上,該第一修補線耦接至該第一開口訊號線之一第一末端部分;且藉由將一雷射束照射至該第二修補線與該第一開口訊號線之間的一第二重疊部分上,該第二修補線耦接至該第一開口訊號線之一第二末端部分。 The array substrate of claim 4, wherein the first repairing line is coupled to the first laser beam by irradiating a laser beam to a first overlapping portion between the first repairing line and the first open signal line a first end portion of one of the open signal lines; and the second repair line is coupled by irradiating a laser beam onto a second overlapping portion between the second repair line and the first open signal line To a second end portion of one of the first open signal lines. 如請求項2之陣列基板,其中該第一修補線與該第二修補線在該第一區域中具有該第一寬度並在該第二區域中具有寬於該第一寬度之該第二寬度,該第一修補線及該第二修補線重疊該第一訊號線。 The array substrate of claim 2, wherein the first repair line and the second repair line have the first width in the first region and the second width in the second region wider than the first width The first repairing line and the second repairing line overlap the first signal line. 如請求項2之陣列基板,其中該交叉部分進一步包含:一連接線,其用以將該第一修補線耦接至該第二修補線。 The array substrate of claim 2, wherein the intersection portion further comprises: a connection line for coupling the first repair line to the second repair line. 如請求項6之陣列基板,其中該連接線安置於一與該第一修補線及該第二修補線不同之層上。 The array substrate of claim 6, wherein the connection line is disposed on a layer different from the first repair line and the second repair line. 如請求項8之陣列基板,其中藉由將一雷射束照射至該第一修補線及該第二修補線重疊於該連接線處之一第三重疊部分、與該第一修補線及該第二修補線重疊於該連接線處之一第四重疊部分上,該連接線耦接至該第一修補線及該第二修補線。 The array substrate of claim 8, wherein the third overlapping portion, the first repairing line, and the first repairing line and the second repairing line are overlapped by the first repairing line and the second repairing line The second repairing line is overlapped with the fourth overlapping portion of the connecting line, and the connecting line is coupled to the first repairing line and the second repairing line. 如請求項7之陣列基板,其中該連接線安置於一與該第一修補線及該第二修補線相同之層上。 The array substrate of claim 7, wherein the connection line is disposed on a same layer as the first repair line and the second repair line. 如請求項1之陣列基板,其進一步包含:一第一虛設修補部分,其處於該周邊區域處,該第二交叉部分交叉並絕緣於該第一訊號線。 The array substrate of claim 1, further comprising: a first dummy repairing portion at the peripheral region, the second intersecting portion intersecting and insulating the first signal line. 如請求項11之陣列基板,其中該第二交叉部分包含:一第一虛設修補線,其交叉並絕緣於該第一訊號線之一第一末端部分;一第二虛設修補線,其交叉並絕緣於該第一訊號線之一第二末端部分;及一虛設連接線,其將該第一虛設修補線耦接至該第二虛設修補線。 The array substrate of claim 11, wherein the second intersection portion comprises: a first dummy repair line that intersects and is insulated from one of the first end portions of the first signal line; and a second dummy repair line that crosses and Insulating a second end portion of the first signal line; and a dummy connection line coupling the first dummy repair line to the second dummy repair line. 如請求項12之陣列基板,其中該第一虛設修補線及該第二虛設修補線安置於一與該等第一訊號線不同之層上,該虛設連接線安置於一與該第一訊號線相同之層上。 The array substrate of claim 12, wherein the first dummy repair line and the second dummy repair line are disposed on a layer different from the first signal lines, and the dummy connection line is disposed on the first signal line On the same layer. 如請求項13之陣列基板,其中該第一訊號線包括額外第一訊號線,且該第二交叉部分修補該等第一訊號線之一第二開口訊號線。 The array substrate of claim 13, wherein the first signal line includes an additional first signal line, and the second intersection portion repairs one of the second signal lines of the first signal lines. 如請求項1之陣列基板,其中該第二訊號線包含:一閘極線,其用以接收該驅動訊號之一閘極訊號;及一資料線,其用以接收該驅動訊號之一資料訊號,該資料線安置於一與該閘極線不同之層上且交叉該閘極線。 The array substrate of claim 1, wherein the second signal line comprises: a gate line for receiving a gate signal of the driving signal; and a data line for receiving a data signal of the driving signal The data line is disposed on a layer different from the gate line and intersects the gate line. 如請求項15之陣列基板,其進一步包含:一第三修補部分,其交叉並絕緣於該閘極線以修補一開口閘極線,該第三交叉部分耦接至該開口閘極線;及 一第四修補部分,其交叉並絕緣於該資料線以修補一開口資料線,該第四交叉部分耦接至該開口資料線。 The array substrate of claim 15, further comprising: a third repairing portion that is crossed and insulated from the gate line to repair an open gate line, the third intersection portion being coupled to the open gate line; A fourth repairing portion is crossed and insulated from the data line to repair an open data line, and the fourth intersecting portion is coupled to the open data line. 一種顯示裝置,其包含:一陣列基板,其包含:一基板,其包含一顯示區域及一與該顯示區域相鄰之周邊區域;一第一訊號線,其處於該基板之該周邊區域處以接收一驅動訊號;一第二訊號線,其處於該顯示區域處,該第二訊號線耦接至該第一訊號線以接收該驅動訊號;一像素陣列,其處於該顯示區域處以接收來自該第二訊號線之該驅動訊號;及一交叉部分,其處於該周邊區域處,該交叉部分交叉並絕緣於該第一訊號線;一相對基板,其面向該陣列基板;及一驅動部分,其處於該陣列基板上以輸出一驅動訊號,其中該交叉部分在一第一區域中具有一第一寬度及在一第二區域中具有寬於該第一寬度之一第二寬度,該交叉部分在該第一區域中與該第一訊號線重疊。 A display device comprising: an array substrate comprising: a substrate comprising a display area and a peripheral area adjacent to the display area; a first signal line at the peripheral area of the substrate for receiving a driving signal; a second signal line at the display area, the second signal line coupled to the first signal line to receive the driving signal; a pixel array at the display area to receive from the first a driving signal of the second signal line; and an intersection portion at the peripheral region, the intersection portion intersecting and insulating the first signal line; an opposite substrate facing the array substrate; and a driving portion being located at Outputting a driving signal on the array substrate, wherein the intersection portion has a first width in a first region and a second width in the second region wider than the first width, the intersection portion is in the The first area overlaps with the first signal line. 如請求項17之顯示裝置,其中該驅動部分包含:一閘極驅動晶片,其用以輸出該驅動訊號之一閘極驅動訊號;及一資料驅動晶片,其用以輸出該驅動訊號之一資料驅 動訊號。 The display device of claim 17, wherein the driving portion comprises: a gate driving chip for outputting a gate driving signal of the driving signal; and a data driving chip for outputting a data of the driving signal drive Motion signal. 如請求項18之顯示裝置,其中該第二訊號線包含:一第一閘極訊號線,其用以接收該閘極訊號;及一第一資料訊號線,其用以接收該驅動訊號之一資料訊號,該第一資料訊號線安置於一與該第一閘極訊號線不同之層上且交叉該等第一閘極訊號線。 The display device of claim 18, wherein the second signal line comprises: a first gate signal line for receiving the gate signal; and a first data signal line for receiving one of the driving signals The first information signal line is disposed on a layer different from the first gate signal line and intersects the first gate signal lines. 如請求項19之顯示裝置,其中該第一訊號線包含:一第二閘極訊號線,其位於該第一閘極線與該閘極驅動部分之間以為該第一閘極訊號線提供來自該閘極驅動部分之該閘極訊號;及一第二資料訊號線,其位於該第一資料訊號線與該資料驅動部分之間以為該第一資料訊號線提供來自該資料驅動部分之該資料訊號。 The display device of claim 19, wherein the first signal line comprises: a second gate signal line between the first gate line and the gate driving portion to provide the first gate signal line from The gate signal of the gate driving portion; and a second data signal line between the first data signal line and the data driving portion to provide the first data signal line with the data from the data driving portion Signal. 如請求項20之顯示裝置,其中該交叉部分包含:一第一修補部分,其用以修補該第二閘極訊號線之一開口閘極訊號線;及一第二修補部分,其用以修補該第二資料訊號線之一開口資料訊號線。 The display device of claim 20, wherein the intersection portion comprises: a first repairing portion for repairing one of the open gate signal lines of the second gate signal line; and a second repairing portion for repairing One of the second data signal lines opens the data signal line. 一種顯示裝置,其包含:一陣列基板,其包含:一基板,其包含一顯示區域及一與該顯示區域相鄰之周邊區域;一第一閘極訊號線部分,其提供於該周邊區域處以接收來自該閘極驅動晶片之該閘極訊號; 一第一資料訊號線部分,其提供於該周邊區域處以接收來自該資料驅動晶片之該資料訊號;一第二閘極訊號線部分,其提供於該顯示區域處,該第二閘極訊號線部分耦接至該第一閘極訊號線部分以接收來自該第一閘極訊號線部分之該閘極訊號;一第二資料訊號線部分,其提供於該基板之該顯示區域處,該第二資料訊號線部分耦接至該第一資料訊號線部分以接收來自該第一資料訊號線部分之該資料訊號;一閘極側修補部分,其用以修補一第一開口閘極訊號線;一虛設閘極側修補部分,其用以修補一第二開口閘極訊號線;一資料側修補部分,其用以修補一第一開口資料訊號線部分;及一虛設資料側修補部分,其用以修補一第二開口資料訊號線部分;一相對基板,其對應於該陣列基板;一閘極驅動晶片,其提供於該陣列基板處以傳輸一閘極訊號;及一資料驅動晶片,其提供於該陣列基板處以傳輸一資料訊號,其中該閘極側修補部分及該資料側修補部分在一第一區域中具有一第一寬度及在一第二區域中具有寬於該 第一寬度之一第二寬度,該閘極側修補部分及該資料側修補部分在該第一區域中分別與該第一開口閘極訊號線及該第一開口資料訊號線重疊。 A display device comprising: an array substrate comprising: a substrate comprising a display area and a peripheral area adjacent to the display area; a first gate signal line portion provided at the peripheral area Receiving the gate signal from the gate driving chip; a first data signal line portion provided at the peripheral area for receiving the data signal from the data driving chip; a second gate signal line portion provided at the display area, the second gate signal line Partially coupled to the first gate signal line portion for receiving the gate signal from the first gate signal line portion; a second data signal line portion provided at the display region of the substrate, the The second data signal line is partially coupled to the first data signal line portion for receiving the data signal from the first data signal line portion; and a gate side repair portion for repairing a first open gate signal line; a dummy gate side repairing portion for repairing a second open gate signal line; a data side repairing portion for repairing a first open data signal line portion; and a dummy data side repairing portion for using To repair a second open data signal line portion; an opposite substrate corresponding to the array substrate; a gate driving chip provided at the array substrate to transmit a gate signal; Driving the wafer, which is provided in the array substrate impose a data transmission signal, wherein the gate-side portion and the repair patch portion having a side profile in a first region having a first width and wider than the second region in a And a second side width of the first width, the gate side repairing portion and the data side repairing portion respectively overlapping the first open gate signal line and the first open data signal line in the first area. 如請求項22之顯示裝置,其中該第一閘極訊號線部分提供於該閘極驅動晶片與該第二閘極訊號線部分之間,且該第一資料訊號線部分提供於該資料驅動晶片與該第二資料訊號線部分之間。 The display device of claim 22, wherein the first gate signal line portion is provided between the gate driving chip and the second gate signal line portion, and the first data signal line portion is provided on the data driving chip Between the second data signal line portion. 如請求項23之顯示裝置,其中該第一閘極訊號線部分包含複數個第一閘極訊號線,且該第二閘極訊號線部分包含複數個第二閘極訊號線。 The display device of claim 23, wherein the first gate signal line portion comprises a plurality of first gate signal lines, and the second gate signal line portion comprises a plurality of second gate signal lines. 如請求項24之顯示裝置,其中該第一閘極訊號線之每一者之間的一距離小於該第二閘極訊號線之每一者之間的一距離,且其中該等第一資料訊號線之每一者之間的一距離小於該等第二資料訊號線之每一者之間的一距離。 The display device of claim 24, wherein a distance between each of the first gate signal lines is less than a distance between each of the second gate signal lines, and wherein the first data A distance between each of the signal lines is less than a distance between each of the second data signal lines. 如請求項23之顯示裝置,其中該第一閘極訊號線部分包含具有一大體上扇形之形狀之複數個第一組,且該第一資料訊號線部分包含具有一大體上扇形之形狀之複數個第二組。 The display device of claim 23, wherein the first gate signal line portion comprises a plurality of first groups having a substantially fan shape, and the first data signal line portion comprises a plurality of substantially fan shaped shapes The second group. 一種用以修補一陣列基板之方法,其包含:將一第一雷射束照射至一開口訊號線之一第一末端部分重疊一第一修補線處之一第一重疊部分上,以將該開口訊號線耦接至該第一修補線;將一第二雷射束照射至該開口訊號線之一第二末端部分重疊一第二修補線處之一第二重疊部分上,以將該開 口訊號線耦接至該第二修補線;將一第三雷射束照射至該第一修補線之一末端部分重疊一連接線處之一第三重疊部分上,以將該第一修補線耦接至該連接線;及將一第四雷射束照射至該第二修補線之一末端部分重疊該連接線處之一第四重疊部分上,以將該第二修補線耦接至該連接線,其中該第一修補線及該第二修補線在一第一區域中具有一第一寬度及在一第二區域中具有寬於該第一寬度之一第二寬度,該第一修補線及該第二修補線在該第一區域中與該開口訊號線重疊。 A method for repairing an array substrate, comprising: irradiating a first laser beam to a first end portion of an open signal line and overlapping a first overlapping portion of a first repair line to An open signal line is coupled to the first repairing line; a second laser beam is irradiated to a second end portion of one of the open signal lines and overlapped with a second overlapping portion of a second repairing line to open the second overlapping portion The third signal line is coupled to the second repairing line; a third laser beam is irradiated to a third overlapping portion of one of the end portions of the first repairing line and overlapped with a connecting line to the first repairing line Coupling to the connecting line; and irradiating a fourth laser beam to an end portion of the second repairing line overlapping a fourth overlapping portion of the connecting line to couple the second repairing line to the a connecting line, wherein the first repairing line and the second repairing line have a first width in a first area and a second width in a second area that is wider than the first width, the first patching The line and the second repair line overlap the open signal line in the first area. 一種用以修補一陣列基板之方法,其包含:將一第一雷射束照射至一開口訊號線之一第一末端部分重疊一第一修補線處之一第一重疊部分上,以將該第一修補線耦接至該開口訊號線;及將一第二雷射束照射至該開口訊號線之一第二末端部分之一重疊一耦接至該第一修補線之第二修補線的第二重疊部分上,以將該第二修補線耦接至該開口訊號線,其中該第一修補線及該第二修補線在一第一區域中具有一第一寬度及在一第二區域中具有寬於該第一寬度之一第二寬度,該第一修補線及該第二修補線在該第一區域中與該開口訊號線重疊。A method for repairing an array substrate, comprising: irradiating a first laser beam to a first end portion of an open signal line and overlapping a first overlapping portion of a first repair line to The first repairing line is coupled to the open signal line; and a second laser beam is irradiated to one of the second end portions of the open signal line and overlapped with a second repair line coupled to the first repair line. The second repairing line is coupled to the open signal line, wherein the first repairing line and the second repairing line have a first width and a second area in a first area The second repair line and the second repair line overlap the open signal line in the first area.
TW094135758A 2004-12-10 2005-10-13 Array substrate, display apparatus having the same and method of repairing the same TWI407217B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040104225A KR101058094B1 (en) 2004-12-10 2004-12-10 Array substrate, display device and repair method having same

Publications (2)

Publication Number Publication Date
TW200627030A TW200627030A (en) 2006-08-01
TWI407217B true TWI407217B (en) 2013-09-01

Family

ID=36582785

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094135758A TWI407217B (en) 2004-12-10 2005-10-13 Array substrate, display apparatus having the same and method of repairing the same

Country Status (5)

Country Link
US (1) US7936410B2 (en)
JP (1) JP4860166B2 (en)
KR (1) KR101058094B1 (en)
CN (1) CN1787217A (en)
TW (1) TWI407217B (en)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8208087B2 (en) * 2005-11-01 2012-06-26 Chunghwa Picture Tubes, Ltd. Thin film transistor array substrate and repair method
KR101349094B1 (en) 2006-12-13 2014-01-09 삼성디스플레이 주식회사 Thin film transistor substrate and liquid crystal display apparatus
TW200827888A (en) * 2006-12-29 2008-07-01 Innolux Display Corp Liquid crystal display
CN100456091C (en) * 2007-07-31 2009-01-28 昆山龙腾光电有限公司 LCD device and array substrates thereof
CN101510029B (en) * 2008-02-15 2012-01-25 奇美电子股份有限公司 LCD device
TWI438538B (en) 2009-01-23 2014-05-21 Innolux Corp Liquid crystal display device and related repairing methods, electronic device
CN101788729A (en) * 2009-01-23 2010-07-28 统宝光电股份有限公司 Liquid crystal display device and repairing method thereof
TWI412820B (en) * 2009-04-10 2013-10-21 Au Optronics Corp Active device array substrate and repairing method thereof
TWI409535B (en) * 2010-01-14 2013-09-21 Au Optronics Suzhou Corp Ltd A liquid crystal display panel and the rescue circuit therein
CN102221752A (en) * 2010-04-19 2011-10-19 北京京东方光电科技有限公司 Liquid crystal panel and manufacturing and maintenance method of liquid crystal panel
CN102819158B (en) * 2012-08-10 2015-08-12 北京京东方光电科技有限公司 A kind of display panel
CN102929050B (en) * 2012-10-31 2015-12-02 合肥京东方光电科技有限公司 Array base palte, panel and display device
CN102998869B (en) * 2012-12-14 2015-11-11 京东方科技集团股份有限公司 Thin-film transistor array base-plate and preparation method thereof, display device
CN104395821B (en) * 2013-02-19 2017-11-14 堺显示器制品株式会社 Display device
WO2015008696A1 (en) * 2013-07-19 2015-01-22 堺ディスプレイプロダクト株式会社 Display panel and display device
JP6105729B2 (en) 2013-07-19 2017-03-29 堺ディスプレイプロダクト株式会社 Display panel and display device
KR102166873B1 (en) * 2014-02-24 2020-10-19 삼성디스플레이 주식회사 Display substrate and method of repairing the same
JP6422672B2 (en) 2014-05-29 2018-11-14 三菱電機株式会社 Display device
WO2018159395A1 (en) * 2017-02-28 2018-09-07 シャープ株式会社 Wiring substrate and display device
KR102338943B1 (en) 2017-07-17 2021-12-13 엘지디스플레이 주식회사 Light Emitting Display Device
CN109387988B (en) * 2018-11-27 2020-10-16 惠科股份有限公司 Display panel and repairing method thereof
US10921665B2 (en) 2018-11-27 2021-02-16 HKC Corporation Limited Display panel and repair method for the display panel
CN113571557B (en) * 2021-07-09 2022-09-09 深圳市华星光电半导体显示技术有限公司 Display panel and display device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6111558A (en) * 1997-05-30 2000-08-29 Samsung Electronics Co., Ltd. Liquid crystal displays including closed loop repair lines and methods of repairing same
TW466367B (en) * 1997-01-31 2001-12-01 Fujitsu Ltd Repairable thin film transistor matrix substrate and method of repairing the substrate
US6380992B1 (en) * 1998-04-28 2002-04-30 Lg. Philips Lcd Co., Ltd Liquid crystal display device having a defective pad repair structure and method for making the same
TW487895B (en) * 1999-11-19 2002-05-21 Fujitsu Ltd Display and method for repairing defects thereof

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02212811A (en) * 1989-02-14 1990-08-24 Seiko Epson Corp Method for correcting breaking of wire
JP2622174B2 (en) * 1989-09-06 1997-06-18 シャープ株式会社 Matrix type display device
JPH03152594A (en) * 1989-11-08 1991-06-28 Mitsubishi Electric Corp Matrix type display device
JP2812346B2 (en) * 1992-01-27 1998-10-22 日本電気株式会社 Liquid crystal display device and method of manufacturing the same
JPH0980470A (en) * 1995-09-14 1997-03-28 Hitachi Electron Eng Co Ltd Method for repairing wiring defect of tft substrate
JPH09244048A (en) * 1996-03-11 1997-09-19 Fujitsu Ltd Liquid crystal panel substrate and production of liquid crystal panel
JP3970351B2 (en) * 1996-04-19 2007-09-05 シャープ株式会社 Liquid crystal display device and bus line disconnection processing method
KR100244181B1 (en) * 1996-07-11 2000-02-01 구본준 Repair structure of liquid crystal display device and repairing method for using it
DE19756082C2 (en) * 1997-12-17 1999-10-14 Bosch Gmbh Robert Method for repairing the row and column lines of an active matrix liquid crystal display device
JP4498489B2 (en) * 1999-03-19 2010-07-07 シャープ株式会社 Liquid crystal display device and manufacturing method thereof
CN1264135C (en) 2003-03-07 2006-07-12 友达光电股份有限公司 Planar display with data line capable of being repaired and its repair method
JP4658173B2 (en) * 2008-09-05 2011-03-23 シャープ株式会社 Liquid crystal display device and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW466367B (en) * 1997-01-31 2001-12-01 Fujitsu Ltd Repairable thin film transistor matrix substrate and method of repairing the substrate
US6111558A (en) * 1997-05-30 2000-08-29 Samsung Electronics Co., Ltd. Liquid crystal displays including closed loop repair lines and methods of repairing same
US6380992B1 (en) * 1998-04-28 2002-04-30 Lg. Philips Lcd Co., Ltd Liquid crystal display device having a defective pad repair structure and method for making the same
TW487895B (en) * 1999-11-19 2002-05-21 Fujitsu Ltd Display and method for repairing defects thereof

Also Published As

Publication number Publication date
KR20060065808A (en) 2006-06-14
TW200627030A (en) 2006-08-01
JP4860166B2 (en) 2012-01-25
US20060124966A1 (en) 2006-06-15
US7936410B2 (en) 2011-05-03
CN1787217A (en) 2006-06-14
KR101058094B1 (en) 2011-08-24
JP2006171672A (en) 2006-06-29

Similar Documents

Publication Publication Date Title
TWI407217B (en) Array substrate, display apparatus having the same and method of repairing the same
US10068545B2 (en) Display apparatus
CN100428481C (en) Thin film transistor array base board and its repairing method
US8045122B2 (en) Liquid crystal display device
US8564515B2 (en) Gate driver circuit and display device having the same
US8217924B2 (en) Display apparatus and method of driving the same
US8354672B2 (en) Thin film transistor array panel
US11194204B2 (en) Pixel array substrate
CN101430438B (en) Image element structure of liquid crystal display panel and its renovation method
US5852305A (en) Liquid crystal display apparatus with repair structure
CN100533747C (en) Pixel structure and method for repairing thereof
CN110908200B (en) Display panel
CN201097400Y (en) Thin film transistor array base plate
US7532302B2 (en) Method of repairing gate line on TFT array substrate
KR20200009163A (en) Display device
KR100734232B1 (en) method for fabricating liquid crystal display device
KR19980031799A (en) Liquid crystal display
KR100472172B1 (en) LCD Display
KR100218509B1 (en) Liquid crystal display device
JP3287985B2 (en) Liquid crystal panel and its defect repair method
US8154701B2 (en) Liquid crystal display device with link lines connecting to tape carrier package
KR100483379B1 (en) LCD panel reduces open line of data
KR20040017504A (en) Liquid crystal display
KR20050061132A (en) Thin film transistor array panel
KR100523292B1 (en) Display board