TWI392911B - Display panel and a method for checking trace of the display panel - Google Patents
Display panel and a method for checking trace of the display panel Download PDFInfo
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本發明係關於一種線路檢查方法,特別是一種顯示面板及其線路檢查方法。The present invention relates to a line inspection method, and more particularly to a display panel and a line inspection method thereof.
隨著窄框與輕量化的設計趨勢興起,目前顯示面板大部份朝向外部零組件縮減與內部設計最佳化的方向著手,外部零組件縮減降低用料與生產成本,而內部設計最佳化提升了強健性與可靠度。透過無閘極區印刷電路板的設計(Gate PCB-less Design)將掃描驅動側的印刷電路板與軟性電路板(Flexible Printed Circuit,FPC)的線路轉移至陣列背板線路(Wring on Array,WOA),同時搭配閘極端軟膜覆晶(Chip On Film,COF)或玻璃覆晶(Chip on Glass,COG)內時脈的串聯可使系統電路連接點減少,擴大邊框使用空間與重量,並達到降低顯示面板材料成本。With the rise of narrow frame and lightweight design trends, most of the current display panels are facing the direction of external component reduction and internal design optimization. External components are reduced to reduce materials and production costs, while internal design is optimized. Improved robustness and reliability. Transfer the printed circuit board on the scan drive side and the flexible printed circuit (FPC) line to the array backplane line (Wring on Array, WOA) through the design of the gateless printed circuit board (Gate PCB-less Design) At the same time, the series connection of the gates in the Chip On Film (COF) or Chip on Glass (COG) can reduce the system connection point, expand the space and weight of the frame, and reduce the size. Display panel material costs.
然而在顯示面板的製做過程中,若顯示面板線路遭到刮傷,或者有非預期的微粒落在顯示面板線路上,造成陣列背板線路中的各線路因短路而導通,就會造成顯示面板顯示異常。例如,掉落的微粒子使得陣列背板線路中的第奇數條橫向的連接線與第偶數條橫向的連接線導通,如此,將造成顯示面板顯示異常。However, in the manufacturing process of the display panel, if the display panel line is scratched, or unintended particles fall on the display panel line, causing each line in the array backplane line to be turned on due to a short circuit, the display may be caused. The panel displays an exception. For example, the dropped particles cause the odd-numbered horizontal connecting lines in the array backplane line to be electrically connected to the even-numbered horizontal connecting lines, thus causing the display panel to display an abnormality.
習知作法上,通常要等到顯示面板處於模組(module)階段,也就是控制晶片都設置於顯示面板上之後,利用測試線路區測試畫素單元是否正常工作的時候,才可能發現導線之間是否短路,然而如果等到這時候才發現因為陣列背板線路短路而造成顯示異常,則已經設置好的控制晶片就必須拆除甚或報廢,造成材料的浪費以及成本增加。Conventionally, it is usually necessary to wait until the display panel is in the module stage, that is, after the control chip is placed on the display panel, it is possible to find between the wires when the test circuit area is used to test whether the pixel unit is working normally. Whether it is short-circuited, but if it is found at this time that the display abnormality is caused by the short circuit of the array backplane, the already-set control wafer must be removed or even scrapped, resulting in waste of materials and increased cost.
鑒於以上的問題,本發明提供一種顯示面板及其線路檢查方法,係透過延伸線路與測試線路的分組量測特性,於線路陣列階段檢測出陣列基板上的線路是否異常導通,藉以節省顯示面板的製造成本。In view of the above problems, the present invention provides a display panel and a line inspection method thereof, which are configured to detect whether a line on an array substrate is abnormally turned on at a line array stage by using a packet measurement characteristic of an extension line and a test line, thereby saving a display panel. manufacturing cost.
因此,本發明所揭露之顯示面板,包含有:第一測試線路;第二測試線路,平行於第一測試線路;複數組陣列背板線路;複數組第一延伸線路,分別電性連接各個陣列背板線路的奇數條線路至第一測試線路;複數組第二延伸線路,平行於各個第一延伸線路,分別電性連接各個陣列背板線路的偶數條線路至第二測試線路;及複數組驅動線路,位於各組陣列背板線路之間,各個驅動線路中的奇數條線路透過各個第一延伸線路電性連接至第一測試線路,各個驅動線路中的偶數條線路透過各個第二延伸線路電性連接至第二測試線路。Therefore, the display panel disclosed in the present invention comprises: a first test line; a second test line parallel to the first test line; a complex array array backplane line; and a complex array first extension line electrically connected to each array An odd number of lines of the backplane line to the first test line; a second array of extension lines parallel to the first extension lines, electrically connecting the even lines of the array backplane lines to the second test line; and the complex array The driving circuit is located between each group of array backplane lines, and the odd number of lines in each driving line are electrically connected to the first test line through the respective first extending lines, and the even number of lines in each driving line are transmitted through the respective second extending lines Electrically connected to the second test line.
另外,本發明所揭露之顯示面板,包含有:第一測試線路;第二測試線路,平行於第一測試線路;複數組驅動線路,各個驅動線路中的奇數條線路電性連接至第一測試線路,各個驅動線路中的偶數條線路電性連接至第二測試線路;複數組第一延伸線路,分別電性連接各個驅動線路的奇數條線路至第一測試線路;複數組第二延伸線路,平行於各個第一延伸線路,分別電性連接各個陣列背板線路的偶數條線路至第二測試線路;複數組第三延伸線路,平行於各個第二延伸線路;複數組第四延伸線路,平行於各個第三延伸線路;第三測試線路;平行於第二測試線路;第四測試線路,平行於第三測試線路;及複數組陣列背板線路,位於各組驅動線路之間,各個陣列背板線路中的奇數條線路透過各個第三延伸線路電性連接至第三測試線路,各個陣列背板線路中的偶數條線路透過各個第四延伸線路電性連接至第四測試線路。In addition, the display panel disclosed in the present invention includes: a first test line; a second test line parallel to the first test line; a complex array drive line, and an odd number of lines in each drive line are electrically connected to the first test a plurality of lines in each of the driving lines are electrically connected to the second test line; the first array of the first extended lines is electrically connected to the odd lines of the respective driving lines to the first test line; and the second array of the second extended line is Parallel to each of the first extension lines, electrically connecting the even-numbered lines of the respective array backplane lines to the second test line; the complex array of the third extension lines, parallel to the respective second extension lines; the complex array of the fourth extension lines, parallel In each of the third extension lines; the third test line; parallel to the second test line; the fourth test line, parallel to the third test line; and the complex array array backplane line, located between each group of drive lines, each array back An odd number of lines in the board line are electrically connected to the third test line through each of the third extension lines, and each array backplane line An even number of lines connected to the fourth test line extending through the respective fourth electric circuit.
另外,本發明所揭露之顯示面板的線路檢查方法,包含有下列步驟:提供相互平行的第一測試線路與第二測試線路;設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路;提供複數組第一延伸線路,以分別電性連接各個陣列背板線路中的奇數條線路至第一測試線路;提供複數組第二延伸線路,以分別電性連接陣列背板線路中的偶數條線路至第二測試線路;量測第一測試線路與第二測試線路之間的電性連接狀態,以檢查各個陣列背板線路是否短路;及切割第一測試線路、第二測試線路與各個第一延伸線路、各個第二延伸線路之間的線路,以切斷陣列背板線路與第一測試線路、第二測試線路之間的電性連接。In addition, the method for inspecting a display panel of the present invention includes the steps of: providing a first test line and a second test line that are parallel to each other; and providing a multi-array array backplane line and a line between each array backplane line. a complex array driving circuit; providing a first array of extended lines to electrically connect an odd number of lines in each array backplane line to the first test line; and providing a second array of extended lines to electrically connect the array backplane An even number of lines in the line to the second test line; measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited; and cutting the first test line, the second A line between the test line and each of the first extension lines and each of the second extension lines is used to cut off the electrical connection between the array backplane line and the first test line and the second test line.
另外,本發明所揭露之顯示面板的線路檢查方法,包含有下列步驟:提供相互平行的第一測試線路、第二測試線路、第三測試線路與第四測試線路;設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路;提供複數組第一延伸線路,以分別電性連接各個驅動線路中的奇數條線路至第一測試線路,以及提供複數組第三延伸線路,以分別電性連接各個陣列背板線路的奇數條線路至第三測試線路;提供複數組第二延伸線路,以分別電性連接各個驅動線路中的偶數條線路至第二測試線路,以及提供複數組第四延伸線路,以分別電性連接各個陣列背板線路的偶數條線路至第四測試線路;量測第三測試線路與第四測試線路之間的電性連接狀態,以檢查陣列背板線路是否短路;及切割第三測試線路、第四測試線路與等第三延伸線路以及各個第四延伸線路之間的線路,以切斷陣列背板線路與各個第三延伸線路以及各個第四延伸線路之間的電性連接。In addition, the circuit inspection method of the display panel disclosed in the present invention includes the following steps: providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other; and setting a complex array array backplane line And a complex array of driving lines between the respective array backplane lines; providing a plurality of first extended lines to electrically connect the odd number of lines in each of the driving lines to the first test line, and providing a plurality of third extended lines To electrically connect the odd-numbered lines of each array backplane line to the third test line respectively; provide a second array of extended lines to electrically connect the even-numbered lines of the respective drive lines to the second test line, and provide The fourth array of extension lines is electrically connected to the even-numbered lines of the respective array backplane lines to the fourth test line; the electrical connection state between the third test line and the fourth test line is measured to check the array back Whether the board line is short-circuited; and cutting the third test line, the fourth test line, and the third extension line and each The line extending between the lines to cut off the electrical connection between the array and backplate line and each of the third extension line connecting each fourth line extends.
藉由這種顯示面板及其線路檢查方法,係透過延伸線路與測試線路的分組量測特性,就可以在線路陣列階段檢測出陣列基板上的線路是否異常導通。然而習知技術檢測顯示面板是否正常工作時,必須等到較後端的模組階段才能檢測,亦即要等到控制晶片全都設置於顯示面板上之後,才能測試。若到了模組階段才檢測出異常情況,則已經設置上去的控制晶片則必須拆除甚或報廢,造成許多材料的浪費以及增加成本,而利用本發明的方法除了可以及早發現電路的異常狀況並及早做出適當的因應之外,更重要的是不會造成控制晶片的報銷,無形中節省更多成本。With such a display panel and its line inspection method, it is possible to detect whether the line on the array substrate is abnormally turned on at the line array stage by the packet measurement characteristics of the extension line and the test line. However, when the conventional technology detects whether the display panel is working normally, it must wait until the module stage of the back end can detect, that is, wait until the control chip is all set on the display panel before testing. If an abnormal situation is detected at the module stage, the control chip that has been set up must be removed or even scrapped, resulting in waste of many materials and increased cost. In addition to early detection of abnormalities of the circuit and early implementation, the method of the present invention can be used early. In addition to the appropriate response, it is more important not to cause reimbursement of the control chip, which incurs more cost.
有關本發明的特徵與實作,茲配合圖示作最佳實施例詳細說明如下。The features and implementations of the present invention are described in detail below with reference to the preferred embodiments.
請參照「第1圖」,係為本發明第一實施例之顯示面板局部示意圖。如「第1圖」所示,本發明之顯示面板包含有第一測試線路10、第二測試線路20、複數組的陣列背板線路30、複數組的第一延伸線路40、複數組的第二延伸線路50與複數組的驅動線路60。Please refer to FIG. 1 for a partial schematic view of a display panel according to a first embodiment of the present invention. As shown in FIG. 1, the display panel of the present invention includes a first test line 10, a second test line 20, a complex array of array backplane lines 30, a first array of extended arrays 40, and a complex array. The second extension line 50 and the complex array of drive lines 60.
第一測試線路10的一端電性連接至測試墊10a。第一測試線路10與各個第一延伸線路40的一端電性連接。各個第一延伸線路40的另一端分別電性連接至陣列背板線路30的奇數條線路,以及各個驅動線路60中的奇數條線路。第一測試線路10可為印刷線路。One end of the first test line 10 is electrically connected to the test pad 10a. The first test line 10 is electrically connected to one end of each of the first extension lines 40. The other ends of the respective first extension lines 40 are electrically connected to an odd number of lines of the array backplane line 30, respectively, and an odd number of lines in each of the drive lines 60. The first test line 10 can be a printed circuit.
第二測試線路20的一端電性連接至測試墊20a。第二測試線路20平行於第一測試線路10。第二測試線路20與各個第二延伸線路50的一端電性連接。各個第二延伸線路50的另一端分別電性連接至陣列背板線路30的偶數條線路,以及各個驅動線路60中的偶數條線路。第二測試線路20可為印刷線路。One end of the second test line 20 is electrically connected to the test pad 20a. The second test line 20 is parallel to the first test line 10. The second test line 20 is electrically connected to one end of each of the second extension lines 50. The other ends of the respective second extension lines 50 are electrically connected to the even-numbered lines of the array backplane line 30, respectively, and the even-numbered lines of the respective drive lines 60. The second test line 20 can be a printed circuit.
其中第一測試線路10與第二測試線路20可分別在顯示面板之線路陣列中的不同層,其之間設有絕緣層,以避免第一延伸線路40與第二延伸線路50分別連接至第一測試線路10與第二測試線路20時造成短路。The first test line 10 and the second test line 20 are respectively disposed on different layers in the line array of the display panel with an insulating layer therebetween to prevent the first extension line 40 and the second extension line 50 from being respectively connected to the first test line 10 A test circuit 10 and the second test line 20 cause a short circuit.
複數組的陣列背板線路30設置於各組驅動線路60之間。陣列背板線路的30一端分別電性連接至第一測試線路10與第二測試線路20,而陣列背板線路30的另一端則可不與其他線路電性連接。陣列背板線路30可為印刷線路。A complex array of array backplane lines 30 is disposed between each set of drive lines 60. The 30 ends of the array backplane line are electrically connected to the first test line 10 and the second test line 20, respectively, and the other end of the array backplane line 30 is not electrically connected to other lines. The array backplane line 30 can be a printed circuit.
複數組的第一延伸線路40自陣列背板線路30的一端位置處往第一測試線路10的位置方向延伸,以分別電性連接各個陣列背板線路30的奇數條線路至第一測試線路10。第一延伸線路40可為印刷線路。The first extension line 40 of the complex array extends from the end of the array backplane line 30 to the position of the first test line 10 to electrically connect the odd-numbered lines of the respective array backplane lines 30 to the first test line 10, respectively. . The first extension line 40 can be a printed circuit.
複數組的第二延伸線路50自陣列背板線路30的一端位置處往第二測試線路20的位置方向延伸,以分別電性連接各個陣列背板線路30的偶數條線路至第二測試線路20。各個第二延伸線路50概略平行於各個第一延伸線路40。第二延伸線路50可為印刷線路。The second extension line 50 of the complex array extends from the end of the array backplane line 30 to the position of the second test line 20 to electrically connect the even-numbered lines of the respective array backplane lines 30 to the second test line 20, respectively. . Each of the second extension lines 50 is substantially parallel to each of the first extension lines 40. The second extension line 50 can be a printed circuit.
複數組的驅動線路60位於各組陣列背板線路30之間。各個驅動線路60的一端電性連接至液晶單元60a,而各個驅動線路60的另一端分別電性連接至第一延伸線路40與第二延伸線路50。其中各個驅動線路60中的奇數條線路透過各個第一延伸線路40電性連接至第一測試線路10,而各個驅動線路60中的偶數條線路透過各個第二延伸線路50電性連接至第二測試線路20。The complex array of drive lines 60 are located between each set of array backplane lines 30. One end of each driving line 60 is electrically connected to the liquid crystal unit 60a, and the other end of each driving line 60 is electrically connected to the first extension line 40 and the second extension line 50, respectively. The odd-numbered lines of the respective driving lines 60 are electrically connected to the first test line 10 through the respective first extension lines 40, and the even-numbered lines of the respective driving lines 60 are electrically connected to the second through the respective second extension lines 50. Test line 20.
如此,測試時,檢測人員便可將探針點在測試墊10a以及測試墊20a上,來測試測試墊10a以及測試墊20a是否導通,亦即測試陣列背板線路30中的奇數條線路是否與偶數條線路導通,來進一步判斷陣列背板線路30是否短路,同樣的,亦可判斷驅動線路60中的奇數條線路是否與偶數條線路形成短路。換言之,藉由增加第一延伸線路40與第二延伸線路50,顯示面板可以在陣列的階段(亦即陣列基板)就檢測出陣列背板線路30與驅動線路60是否異常導通,而不必等到電路板上都已經連接上控制晶片的模組(module)階段才能檢測出,除了可以提早做出適當的因應之外,亦可以避免控制晶片的拆除甚或報廢,而節省更多成本。In this way, during the test, the tester can point the probe on the test pad 10a and the test pad 20a to test whether the test pad 10a and the test pad 20a are turned on, that is, whether the odd-numbered lines in the array backplane line 30 are tested. The even number of lines are turned on to further determine whether the array backplane line 30 is short-circuited. Similarly, it can be determined whether the odd-numbered lines in the drive line 60 form a short circuit with the even-numbered lines. In other words, by adding the first extension line 40 and the second extension line 50, the display panel can detect whether the array backplane line 30 and the drive line 60 are abnormally turned on at the stage of the array (ie, the array substrate) without waiting for the circuit. The module can be detected by the module stage of the control chip. In addition to making appropriate response early, it can also avoid the removal or even scrapping of the control chip, and save more cost.
請參照「第2圖」,係為本發明之另一顯示面板局部示意圖。如「第2圖」所示,本發明顯示面板之包含有第一測試線路10、第二測試線路20、複數組的陣列背板線路30、複數組的第一延伸線路40、複數組的第二延伸線路50、複數組的驅動線路60、第一印記70與第二印記71。Please refer to FIG. 2, which is a partial schematic view of another display panel of the present invention. As shown in FIG. 2, the display panel of the present invention includes a first test line 10, a second test line 20, a multi-array array backplane line 30, a first array of extended lines 40, and a complex array. The second extension line 50, the complex array of drive lines 60, the first imprint 70 and the second imprint 71.
第一印記70標記於陣列背板線路30中的第一組線路的側邊位置處。第二印記71標記於陣列背板線路30中的最後一組線路的側邊位置處。The first stamp 70 is marked at the side locations of the first set of lines in the array backplane line 30. The second stamp 71 is marked at the side position of the last set of lines in the array backplane line 30.
請參照「第3圖」,係為本發明之另一顯示面板局部示意圖。如「第3圖」所示,當顯示面板檢測程序完成後,可利用雷射設備由第一印記70往第二印記71方向進行切割,或者由第二印記71往第一印記70方向進行切割。透過切割第一測試線路10、第二測試線路20與各個第一延伸線路40、各個第二延伸線路50之間的線路,以切斷陣列背板線路30與各個第一測試線路10、第二測試線路20之間的電性連接,並形成切割區域72。如此,即可出貨給模組部門以進行下一階段的測試。Please refer to "FIG. 3" for a partial schematic view of another display panel of the present invention. As shown in "Fig. 3", after the display panel detection process is completed, the laser device can be used to cut from the first mark 70 to the second mark 71 or the second mark 71 to the first mark 70. . By cutting the line between the first test line 10, the second test line 20 and each of the first extension lines 40 and each of the second extension lines 50, the array backplane line 30 and each of the first test lines 10 and 2 are cut off. Electrical connections between the test lines 20 are made and a cut region 72 is formed. In this way, it can be shipped to the module department for the next phase of testing.
請參照「第4圖」,係為本發明第二實施例之顯示面板局部示意圖。如「第4圖」所示,本發明第二實施例與第一實施例之差別在於:第二實施例中多了第三測試線路80、第四測試線路90、第三延伸線路41、第四延伸線路51、測試墊80a與測試墊90a。Please refer to FIG. 4, which is a partial schematic view of a display panel according to a second embodiment of the present invention. As shown in FIG. 4, the second embodiment of the present invention differs from the first embodiment in that the third test line 80, the fourth test line 90, the third extension line 41, and the The four extension lines 51, the test pad 80a and the test pad 90a.
第一測試線路10的一端電性連接至測試墊10a。第一測試線路10與各個第一延伸線路40的一端電性連接。各個第一延伸線路40的另一端分別電性連接至各個驅動線路60中的奇數條線路。第一測試線路10可為印刷線路。One end of the first test line 10 is electrically connected to the test pad 10a. The first test line 10 is electrically connected to one end of each of the first extension lines 40. The other ends of the respective first extension lines 40 are electrically connected to an odd number of lines in the respective driving lines 60, respectively. The first test line 10 can be a printed circuit.
第二測試線路20的一端電性連接至測試墊20a。第二測試線路20平行於第一測試線路10。第二測試線路20與各個第二延伸線路50的一端電性連接。各個第二延伸線路50的另一端分別電性連接至各個驅動線路60中的偶數條線路。第二測試線路20可為印刷線路。One end of the second test line 20 is electrically connected to the test pad 20a. The second test line 20 is parallel to the first test line 10. The second test line 20 is electrically connected to one end of each of the second extension lines 50. The other ends of the respective second extension lines 50 are electrically connected to the even-numbered lines in the respective driving lines 60, respectively. The second test line 20 can be a printed circuit.
其中第一測試線路10與第二測試線路20可分別在顯示面板之線路陣列中的不同層,其之間設有絕緣層,以避免第一延伸線路40與第二延伸線路50分別連接至第一測試線路10與第二測試線路20時造成短路。The first test line 10 and the second test line 20 are respectively disposed on different layers in the line array of the display panel with an insulating layer therebetween to prevent the first extension line 40 and the second extension line 50 from being respectively connected to the first test line 10 A test circuit 10 and the second test line 20 cause a short circuit.
複數組的陣列背板線路30設置於各組驅動線路60之間。陣列背板線路的30一端分別電性連接至第三測試線路80與第四測試線路90,而陣列背板線路30的另一端則可不與其他線路電性連接。陣列背板線路30可為印刷線路。A complex array of array backplane lines 30 is disposed between each set of drive lines 60. The 30 ends of the array backplane line are electrically connected to the third test line 80 and the fourth test line 90, respectively, and the other end of the array backplane line 30 is not electrically connected to other lines. The array backplane line 30 can be a printed circuit.
複數組的第一延伸線路40自驅動線路60的一端位置處往第一測試線路10的位置方向延伸,以分別電性連接各個驅動線路60的奇數條線路至第一測試線路10。第一延伸線路40可為印刷線路。The first extension line 40 of the complex array extends from the position of one end of the driving line 60 toward the position of the first test line 10 to electrically connect the odd-numbered lines of the respective driving lines 60 to the first test line 10, respectively. The first extension line 40 can be a printed circuit.
複數組的第二延伸線路50自驅動線路60的一端位置處往第二測試線路20的位置方向延伸,以分別電性連接各個驅動線路60的偶數條線路至第二測試線路20。各個第二延伸線路50概略平行於各個第一延伸線路40。第二延伸線路50可為印刷線路。The second extension line 50 of the complex array extends from the position of one end of the driving line 60 to the position of the second test line 20 to electrically connect the even-numbered lines of the respective driving lines 60 to the second test line 20, respectively. Each of the second extension lines 50 is substantially parallel to each of the first extension lines 40. The second extension line 50 can be a printed circuit.
複數組的第三延伸線路41自陣列背板線路30的一端位置處往第三測試線路80的位置方向延伸,以分別電性連接各個陣列背板線路30的奇數條線路至第三測試線路80。第三延伸線路41可為印刷線路。The third extension line 41 of the complex array extends from the position of one end of the array backplane line 30 to the position of the third test line 80 to electrically connect the odd-numbered lines of the respective array backplane lines 30 to the third test line 80, respectively. . The third extension line 41 can be a printed circuit.
複數組的第四延伸線路51自陣列背板線路30的一端位置處往第四測試線路90的位置方向延伸,以分別電性連接各個陣列背板線路30的偶數條線路至第四測試線路90。第四延伸線路51可為印刷線路。The fourth extension line 51 of the complex array extends from the position of one end of the array backplane line 30 to the position of the fourth test line 90 to electrically connect the even-numbered lines to the fourth test line 90 of the respective array backplane lines 30, respectively. . The fourth extension line 51 can be a printed circuit.
複數組的驅動線路60位於各組陣列背板線路30之間。各個驅動線路60的一端電性連接至液晶單元60a,而各個驅動線路60的另一端分別電性連接至第一延伸線路40與第二延伸線路50。其中各個驅動線路60中的奇數條線路透過各個第一延伸線路40電性連接至第一測試線路10,而各個驅動線路60中的偶數條線路透過各個第二延伸線路50電性連接至第二測試線路20。The complex array of drive lines 60 are located between each set of array backplane lines 30. One end of each driving line 60 is electrically connected to the liquid crystal unit 60a, and the other end of each driving line 60 is electrically connected to the first extension line 40 and the second extension line 50, respectively. The odd-numbered lines of the respective driving lines 60 are electrically connected to the first test line 10 through the respective first extension lines 40, and the even-numbered lines of the respective driving lines 60 are electrically connected to the second through the respective second extension lines 50. Test line 20.
如此,測試時,檢測人員便可將探針點在測試墊10a以及測試墊20a上,來測試測試墊10a以及測試墊20a是否導通,亦即測試驅動線路60中的奇數條線路是否與偶數條線路導通,來進一步判斷驅動線路60是否短路,同樣的,亦可將探針點在測試墊80a以及測試墊90a上,來測試測試墊80a以及測試墊90a是否導通,亦即測試陣列背板線路30中的奇數條線路是否與偶數條線路導通,來判斷陣列背板線路30中的奇數條線路是否與偶數條線路形成短路。換言之,藉由增加第一延伸線路40、第二延伸線路50、第三延伸線路41、第四延伸線路51、第三測試線路80與第四延伸線路90,顯示面板可以在陣列的階段(亦即陣列基板)就檢測出陣列背板線路30與/或驅動線路60是否異常導通,而不必等到電路板上都已經連接上控制晶片的模組(module)階段才能檢測出,除了可以提早做出適當的因應之外,亦可以避免控制晶片的拆除甚或報廢,而節省更多成本。In this way, during the test, the tester can point the probe on the test pad 10a and the test pad 20a to test whether the test pad 10a and the test pad 20a are turned on, that is, whether the odd-numbered lines in the test drive line 60 and the even-numbered strips are tested. The line is turned on to further determine whether the driving circuit 60 is short-circuited. Similarly, the probe can be placed on the test pad 80a and the test pad 90a to test whether the test pad 80a and the test pad 90a are turned on, that is, the test array backplane line is tested. Whether the odd-numbered lines in 30 are electrically connected to the even-numbered lines determines whether the odd-numbered lines in the array back-up line 30 form a short circuit with the even-numbered lines. In other words, by adding the first extension line 40, the second extension line 50, the third extension line 41, the fourth extension line 51, the third test line 80 and the fourth extension line 90, the display panel can be in the stage of the array (also That is, the array substrate) detects whether the array backplane line 30 and/or the driving line 60 are abnormally turned on, and does not have to wait until the module is connected to the module stage of the control chip, except that it can be made earlier. In addition to proper response, it can also avoid the removal or even scrapping of the control wafer, and save more cost.
請參照「第5圖」,係為本發明第一實施例之線路檢測方法步驟流程圖。如「第5圖」所示,本發明之顯示面板的線路檢測方法,包含有下列步驟:首先,提供相互平行的第一測試線路與第二測試線路(步驟100),其中第一測試線路與第二測試線路可透過印刷電路板製程方式完成。Please refer to FIG. 5, which is a flow chart of the steps of the line detection method according to the first embodiment of the present invention. As shown in FIG. 5, the line detecting method of the display panel of the present invention includes the following steps: First, providing a first test line and a second test line parallel to each other (step 100), wherein the first test line and The second test line can be completed by a printed circuit board process.
接著,設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路(步驟110),其中陣列背板線路以及各個驅動線路可透過印刷電路板製程方式完成。Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 110), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.
提供複數組第一延伸線路,以分別電性連接各個陣列背板線路中的奇數條線路至第一測試線路(步驟120),其中各個第一延伸線路可透過印刷電路板製程方式完成。A plurality of first extension lines are provided to electrically connect the odd number of lines in each of the array backplane lines to the first test line (step 120), wherein each of the first extension lines can be completed by a printed circuit board process.
提供複數組第二延伸線路,以分別電性連接陣列背板線路中的偶數條線路至第二測試線路(步驟130),其中各個第二延伸線路可透過印刷電路板製程方式完成。A plurality of second extension lines are provided to electrically connect the even lines of the array backplane lines to the second test lines (step 130), wherein each of the second extension lines can be completed by a printed circuit board process.
量測第一測試線路與第二測試線路之間的電性連接狀態,以檢查各個陣列背板線路是否短路(步驟140),其中可利用三用電表對第一測試線路與第二測試線路進行量測。Measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited (step 140), wherein the first test line and the second test line can be utilized by the three-meter power meter Make measurements.
切割第一測試線路、第二測試線路與各個第一延伸線路、各個第二延伸線路之間的線路,以切斷陣列背板線路與第一測試線路、第二測試線路之間的電性連接(步驟150),其中可利用雷射設備切割第一測試線路、第二測試線路與各個第一延伸線路、各個第二延伸線路之間的線路。另外,若步驟140中的量測結果為短路時,表示顯示面板為瑕疵品,因此則無需再進行步驟150,換言之,當顯示面板為瑕疵品時,可省略步驟150。Cutting a line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines to cut off an electrical connection between the array backplane line and the first test line and the second test line (Step 150), wherein the line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines can be cut by the laser device. In addition, if the measurement result in step 140 is a short circuit, it means that the display panel is defective, so there is no need to perform step 150. In other words, when the display panel is defective, step 150 may be omitted.
請參照「第6圖」,係為本發明另一實施例之線路檢測方法步驟流程圖。如「第6圖」所示,本發明之顯示面板的線路檢測方法,包含有下列步驟:首先,提供相互平行的第一測試線路與第二測試線路(步驟200),其中第一測試線路與第二測試線路可透過印刷電路板製程方式完成。Please refer to FIG. 6 , which is a flow chart of the steps of the line detection method according to another embodiment of the present invention. As shown in FIG. 6, the line detecting method of the display panel of the present invention includes the following steps: First, providing a first test line and a second test line (step 200) parallel to each other, wherein the first test line and The second test line can be completed by a printed circuit board process.
接著,設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路(步驟210),其中陣列背板線路以及各個驅動線路可透過印刷電路板製程方式完成。Next, a complex array array backplane line and a complex array drive line between the various array backplane lines are provided (step 210), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.
提供複數組第一延伸線路,以分別電性連接各個陣列背板線路中的奇數條線路至第一測試線路(步驟220),其中各個第一延伸線路可透過印刷電路板製程方式完成。A plurality of first extension lines are provided to electrically connect the odd number of lines in each of the array backplane lines to the first test line (step 220), wherein each of the first extension lines can be completed by a printed circuit board process.
提供複數組第二延伸線路,以分別電性連接陣列背板線路中的偶數條線路至第二測試線路(步驟230),其中各個第二延伸線路可透過印刷電路板製程方式完成。A plurality of second extension lines are provided to electrically connect the even number of lines in the array backplane line to the second test line (step 230), wherein each of the second extension lines can be completed by a printed circuit board process.
標記第一印記於陣列背板線路中的第一組線路的側邊位置處,以及標記第二印記於陣列背板線路中的最後一組線路的側邊位置處(步驟240)。The mark is first stamped at the side position of the first set of lines in the array backplane line, and the second mark is stamped at the side position of the last set of lines in the array backplane line (step 240).
施加驅動訊號於第一測試線路與第二測試線路,以檢查各個驅動線路所連接的液晶單元是否正常(步驟250),其中可透過分別施加不同電壓準位的驅動訊號於第一測試線路與第二測試線路,以檢查各個驅動線路所連接的液晶單元是否正常,例如,若第一測試線路施加高電壓準位訊號,則第二測試線路施加低電壓準位訊號;或是相反地,若第一測試線路施加低電壓準位訊號,則第二測試線路施加高電壓準位訊號。Applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the respective driving lines are normal (step 250), wherein the driving signals respectively applying different voltage levels are applied to the first test line and the first Second test circuit to check whether the liquid crystal unit connected to each driving line is normal, for example, if the first test line applies a high voltage level signal, the second test line applies a low voltage level signal; or conversely, if When a test circuit applies a low voltage level signal, the second test line applies a high voltage level signal.
量測第一測試線路與第二測試線路之間的電性連接狀態,以檢查各個陣列背板線路是否短路(步驟260),其中可利用三用電表對第一測試線路與第二測試線路進行量測。Measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited (step 260), wherein the first test line and the second test line can be utilized by the three-meter power meter Make measurements.
切割第一測試線路、第二測試線路與各個第一延伸線路、各個第二延伸線路之間的線路,以切斷陣列背板線路與第一測試線路、第二測試線路之間的電性連接(步驟270),其中可利用雷射設備由第一印記往第二印記方向切割第一測試線路、第二測試線路與各個第一延伸線路、各個第二延伸線路之間的線路。另外,若步驟260中的量測結果為短路時,表示顯示面板為瑕疵品,因此則無需再進行步驟270,換言之,當顯示面板為瑕疵品時,可省略步驟270。Cutting a line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines to cut off an electrical connection between the array backplane line and the first test line and the second test line (Step 270), wherein the laser device is used to cut the line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines from the first imprint to the second imprint direction. In addition, if the measurement result in step 260 is a short circuit, it means that the display panel is a defective product, so there is no need to perform step 270, in other words, when the display panel is defective, step 270 can be omitted.
請參照「第7圖」,係為本發明第二實施例之線路檢測方法步驟流程圖。如「第7圖」所示,本發明之顯示面板的線路檢測方法,包含有下列步驟:首先,提供相互平行的第一測試線路、第二測試線路、第三測試線路與第四測試線路(步驟300),其中第一測試線路、第二測試線路、第三測試線路與第 四測試線路可透過印刷電路板製程方式完成。Please refer to FIG. 7 , which is a flow chart of the steps of the line detection method according to the second embodiment of the present invention. As shown in FIG. 7, the circuit detection method of the display panel of the present invention includes the following steps: First, providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other ( Step 300), wherein the first test line, the second test line, the third test line and the first The four test lines can be completed by a printed circuit board process.
接著,設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路(步驟310),其中陣列背板線路以及各個驅動線路可透過印刷電路板製程方式完成。Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 310), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.
提供複數組第一延伸線路,以分別電性連接各個驅動線路中的奇數條線路至第一測試線路,以及提供複數組第三延伸線路,以分別電性連接各個陣列背板線路的奇數條線路至第三測試線路(步驟320),其中各個第一延伸線路、第三延伸線路可透過印刷電路板製程方式完成。Providing a plurality of first extension lines for electrically connecting the odd lines of the respective driving lines to the first test line, and providing a plurality of third extended lines for electrically connecting the odd lines of the respective array backplane lines To the third test line (step 320), wherein each of the first extension line and the third extension line can be completed by a printed circuit board process.
提供複數組第二延伸線路,以分別電性連接各個驅動線路中的偶數條線路至第二測試線路,以及提供複數組第四延伸線路,以分別電性連接各個陣列背板線路的偶數條線路至第四測試線路(步驟330),其中各個第二延伸線路、第四延伸線路可透過印刷電路板製程方式完成。Providing a second array of extended lines to electrically connect the even lines of the respective driving lines to the second test line, and providing a fourth array of extended lines to electrically connect the even lines of the respective array backplane lines To the fourth test line (step 330), wherein each of the second extension line and the fourth extension line can be completed by a printed circuit board process.
量測第三測試線路與第四測試線路之間的電性連接狀態,以檢查陣列背板線路是否短路(步驟340),其中可利用三用電表對第三測試線路與第四測試線路進行量測。Measuring an electrical connection state between the third test line and the fourth test line to check whether the array backplane line is short-circuited (step 340), wherein the third test line and the fourth test line can be performed by using the three-meter power meter Measure.
切割第三測試線路、第四測試線路與各個第三延伸線路以及各個第四延伸線路之間的線路,以切斷陣列背板線路與各個第三延伸線路以及各個第四延伸線路之間的電性連接。(步驟350),其中可利用雷射設備切割第三測試線路、第四測試線路與各個第三延伸線路、各個第四延伸線路之間的線路。另外,若步驟340中的量測結果為短路時,表示顯示面板為瑕疵品,因此則無需再進行步驟350,換言之,當顯示面板為瑕疵品時,可省略步驟350。Cutting a line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines to cut off the electricity between the array backplane line and each of the third extension lines and each of the fourth extension lines Sexual connection. (Step 350), wherein the laser test device can be used to cut the line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines. In addition, if the measurement result in step 340 is a short circuit, it means that the display panel is a defective product, so there is no need to perform step 350. In other words, when the display panel is defective, step 350 may be omitted.
請參照「第8圖」,係為本發明另一實施例之線路檢測方法步驟流程圖。如「第8圖」所示,本發明之顯示面板的線路檢測方法,包含有下列步驟:首先,提供相互平行的第一測試線路、第二測試線路、第三測試線路與第四測試線路(步驟400),其中第一測試線路、第二測試線路、第三測試線路與第四測試線路可透過印刷電路板製程方式完成。Please refer to FIG. 8 , which is a flow chart of the steps of the line detection method according to another embodiment of the present invention. As shown in FIG. 8, the circuit detection method of the display panel of the present invention includes the following steps: First, providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other ( Step 400), wherein the first test line, the second test line, the third test line, and the fourth test line are completed by a printed circuit board process.
接著,設置複數組陣列背板線路以及位於各個陣列背板線路之間的複數組驅動線路(步驟410),其中陣列背板線路以及各個驅動線路可透過印刷電路板製程方式完成。Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 410), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.
提供複數組第一延伸線路,以分別電性連接各個驅動線路中的奇數條線路至第一測試線路,以及提供複數組第三延伸線路,以分別電性連接各個陣列背板線路的奇數條線路至第三測試線路(步驟420),其中各個第一延伸線路、第三延伸線路可透過印刷電路板製程方式完成。Providing a plurality of first extension lines for electrically connecting the odd lines of the respective driving lines to the first test line, and providing a plurality of third extended lines for electrically connecting the odd lines of the respective array backplane lines To the third test line (step 420), wherein each of the first extension line and the third extension line can be completed by a printed circuit board process.
提供複數組第二延伸線路,以分別電性連接各個陣列背板線路中的偶數條線路至第二測試線路,以及提供複數組第四延伸線路,以分別電性連接各個驅動線路的偶數條線路至第四測試線路(步驟430),其中各個第二延伸線路、第四延伸線路可透過印刷電路板製程方式完成。Providing a second array of extended lines to electrically connect the even-numbered lines in each of the array backplane lines to the second test line, and to provide a fourth array of extended lines to electrically connect the even-numbered lines of the respective drive lines To the fourth test line (step 430), wherein each of the second extension line and the fourth extension line can be completed by a printed circuit board process.
標記第一印記於陣列背板線路中的第一組線路的側邊位置處,以及標記第二印記於陣列背板線路中的最後一組線路的側邊位置處(步驟440)。The mark is first stamped at the side position of the first set of lines in the array backplane line, and the second mark is stamped at the side position of the last set of lines in the array backplane line (step 440).
施加驅動訊號於第一測試線路與第二測試線路,以檢查各個驅動線路所連接的液晶單元是否正常(步驟450),其中可透過分別施加不同電壓準位的驅動訊號於第一測試線路與第二測試線路,以檢查各個驅動線路所連接的液晶單元是否正常,例如,若第一測試線路施加高電壓準位訊號,則第二測試線路施加低電壓準位訊號;或是相反地,若第一測試線路施加低電壓準位訊號,則第二測試線路施加高電壓準位訊號。Applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the respective driving lines are normal (step 450), wherein the driving signals respectively applying different voltage levels are applied to the first test line and the first Second test circuit to check whether the liquid crystal unit connected to each driving line is normal, for example, if the first test line applies a high voltage level signal, the second test line applies a low voltage level signal; or conversely, if When a test circuit applies a low voltage level signal, the second test line applies a high voltage level signal.
量測第三測試線路與第四測試線路之間的電性連接狀態,以檢查各個陣列背板線路是否短路(步驟460),其中可利用三用電表對第三測試線路與第四測試線路進行量測。Measure the electrical connection state between the third test line and the fourth test line to check whether each array backplane line is short-circuited (step 460), wherein the third test line and the fourth test line can be utilized by the three-meter power meter Make measurements.
切割第三測試線路、第四測試線路與各個第三延伸線路以及各個第四延伸線路之間的線路,以切斷陣列背板線路與各個第三延伸線路以及各個第四延伸線路之間的電性連接。(步驟470),其中可利用雷射設備切割第三測試線路、第四測試線路與各個第三延伸線路、各個第四延伸線路之間的線路。另外,若步驟460中的量測結果為短路時,表示顯示面板為瑕疵品,因此則無需再進行步驟470,換言之,當顯示面板為瑕疵品時,可省略步驟470。Cutting a line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines to cut off the electricity between the array backplane line and each of the third extension lines and each of the fourth extension lines Sexual connection. (Step 470), wherein the line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines can be cut by the laser device. In addition, if the measurement result in step 460 is a short circuit, indicating that the display panel is defective, step 470 is not required, in other words, when the display panel is defective, step 470 may be omitted.
綜合以上所述,本發明之顯示面板及其線路檢查方法,係透過延伸線路與測試線路的分組量測特性,就可以在線路陣列階段檢測出陣列基板上的線路是否異常導通。然而習知技術檢測顯示面板是否正常工作時,必須等到較後端的模組階段才能檢測,亦即要等到控制晶片全都設置於顯示面板上之後,才能測試。若到了模組階段才檢測出異常情況,則已經設置上去的控制晶片則必須拆除甚或報廢,造成許多材料的浪費以及增加成本,而利用本發明的方法除了可以及早發現電路的異常狀況並及早做出適當的因應之外,更重要的是不會造成控制晶片的報銷,無形中節省更多成本。In summary, the display panel and the line inspection method of the present invention can detect whether the line on the array substrate is abnormally turned on in the line array stage by the packet measurement characteristics of the extension line and the test line. However, when the conventional technology detects whether the display panel is working normally, it must wait until the module stage of the back end can detect, that is, wait until the control chip is all set on the display panel before testing. If an abnormal situation is detected at the module stage, the control chip that has been set up must be removed or even scrapped, resulting in waste of many materials and increased cost. In addition to early detection of abnormalities of the circuit and early implementation, the method of the present invention can be used early. In addition to the appropriate response, it is more important not to cause reimbursement of the control chip, which incurs more cost.
雖然本發明以前述之較佳實施例揭露如上,然其並非用以限定本發明,任何熟習相像技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The patent protection scope of the invention is subject to the definition of the scope of the patent application attached to the specification.
10...第一測試線路10. . . First test line
10a...測試墊10a. . . Test pad
20...第二測試線路20. . . Second test line
20a...測試墊20a. . . Test pad
30...陣列背板線路30. . . Array backplane line
40...第一延伸線路40. . . First extension line
41...第三延伸線路41. . . Third extension line
50...第二延伸線路50. . . Second extension line
51...第四延伸線路51. . . Fourth extension line
60...驅動線路60. . . Drive line
60a...液晶單元60a. . . Liquid crystal cell
70...第一印記70. . . First imprint
71...第二印記71. . . Second mark
72...切割區域72. . . Cutting area
80...第三測試線路80. . . Third test line
80a...測試墊80a. . . Test pad
90...第四測試線路90. . . Fourth test line
90a...測試墊90a. . . Test pad
第1圖係為本發明第一實施例之顯示面板局部示意圖。Figure 1 is a partial schematic view of a display panel in accordance with a first embodiment of the present invention.
第2圖係為本發明之另一顯示面板局部示意圖。Figure 2 is a partial schematic view of another display panel of the present invention.
第3圖係為本發明之另一顯示面板局部示意圖。Figure 3 is a partial schematic view of another display panel of the present invention.
第4圖係為本發明第二實施例之顯示面板局部示意圖。Figure 4 is a partial schematic view of a display panel in accordance with a second embodiment of the present invention.
第5圖係為本發明第一實施例之線路檢測方法步驟流程圖。Figure 5 is a flow chart showing the steps of the line detecting method of the first embodiment of the present invention.
第6圖係為本發明另一實施例之線路檢測方法步驟流程圖。Figure 6 is a flow chart showing the steps of the line detecting method according to another embodiment of the present invention.
第7圖係為本發明第二實施例之線路檢測方法步驟流程圖。Figure 7 is a flow chart showing the steps of the line detecting method according to the second embodiment of the present invention.
第8圖係為本發明另一實施例之線路檢測方法步驟流程圖。Figure 8 is a flow chart showing the steps of a line detecting method according to another embodiment of the present invention.
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TW375685B (en) * | 1995-07-31 | 1999-12-01 | Image Quest Technologies Inc | Method of manufacturing improved active matrix display |
TW200411302A (en) * | 2002-11-19 | 2004-07-01 | Samsung Electronics Co Ltd | Liquid crystal display and testing method thereof |
TW200727058A (en) * | 2006-01-05 | 2007-07-16 | Chunghwa Picture Tubes Ltd | Active device array substrate, liquid crystal display panel and examining methods thereof |
TW200735024A (en) * | 2006-03-09 | 2007-09-16 | Au Optronics Corp | Layout structure for laser cutting |
TW200734725A (en) * | 2006-03-08 | 2007-09-16 | Au Optronics Corp | Apparatus for testing short circuit on wire on array circuit and method thereof |
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TW375685B (en) * | 1995-07-31 | 1999-12-01 | Image Quest Technologies Inc | Method of manufacturing improved active matrix display |
TW200411302A (en) * | 2002-11-19 | 2004-07-01 | Samsung Electronics Co Ltd | Liquid crystal display and testing method thereof |
TW200727058A (en) * | 2006-01-05 | 2007-07-16 | Chunghwa Picture Tubes Ltd | Active device array substrate, liquid crystal display panel and examining methods thereof |
TW200734725A (en) * | 2006-03-08 | 2007-09-16 | Au Optronics Corp | Apparatus for testing short circuit on wire on array circuit and method thereof |
TW200735024A (en) * | 2006-03-09 | 2007-09-16 | Au Optronics Corp | Layout structure for laser cutting |
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