TWI392911B - Display panel and a method for checking trace of the display panel - Google Patents

Description

Display panel and its line inspection method

The present invention relates to a line inspection method, and more particularly to a display panel and a line inspection method thereof.

With the rise of narrow frame and lightweight design trends, most of the current display panels are facing the direction of external component reduction and internal design optimization. External components are reduced to reduce materials and production costs, while internal design is optimized. Improved robustness and reliability. Transfer the printed circuit board on the scan drive side and the flexible printed circuit (FPC) line to the array backplane line (Wring on Array, WOA) through the design of the gateless printed circuit board (Gate PCB-less Design) At the same time, the series connection of the gates in the Chip On Film (COF) or Chip on Glass (COG) can reduce the system connection point, expand the space and weight of the frame, and reduce the size. Display panel material costs.

However, in the manufacturing process of the display panel, if the display panel line is scratched, or unintended particles fall on the display panel line, causing each line in the array backplane line to be turned on due to a short circuit, the display may be caused. The panel displays an exception. For example, the dropped particles cause the odd-numbered horizontal connecting lines in the array backplane line to be electrically connected to the even-numbered horizontal connecting lines, thus causing the display panel to display an abnormality.

Conventionally, it is usually necessary to wait until the display panel is in the module stage, that is, after the control chip is placed on the display panel, it is possible to find between the wires when the test circuit area is used to test whether the pixel unit is working normally. Whether it is short-circuited, but if it is found at this time that the display abnormality is caused by the short circuit of the array backplane, the already-set control wafer must be removed or even scrapped, resulting in waste of materials and increased cost.

In view of the above problems, the present invention provides a display panel and a line inspection method thereof, which are configured to detect whether a line on an array substrate is abnormally turned on at a line array stage by using a packet measurement characteristic of an extension line and a test line, thereby saving a display panel. manufacturing cost.

Therefore, the display panel disclosed in the present invention comprises: a first test line; a second test line parallel to the first test line; a complex array array backplane line; and a complex array first extension line electrically connected to each array An odd number of lines of the backplane line to the first test line; a second array of extension lines parallel to the first extension lines, electrically connecting the even lines of the array backplane lines to the second test line; and the complex array The driving circuit is located between each group of array backplane lines, and the odd number of lines in each driving line are electrically connected to the first test line through the respective first extending lines, and the even number of lines in each driving line are transmitted through the respective second extending lines Electrically connected to the second test line.

In addition, the display panel disclosed in the present invention includes: a first test line; a second test line parallel to the first test line; a complex array drive line, and an odd number of lines in each drive line are electrically connected to the first test a plurality of lines in each of the driving lines are electrically connected to the second test line; the first array of the first extended lines is electrically connected to the odd lines of the respective driving lines to the first test line; and the second array of the second extended line is Parallel to each of the first extension lines, electrically connecting the even-numbered lines of the respective array backplane lines to the second test line; the complex array of the third extension lines, parallel to the respective second extension lines; the complex array of the fourth extension lines, parallel In each of the third extension lines; the third test line; parallel to the second test line; the fourth test line, parallel to the third test line; and the complex array array backplane line, located between each group of drive lines, each array back An odd number of lines in the board line are electrically connected to the third test line through each of the third extension lines, and each array backplane line An even number of lines connected to the fourth test line extending through the respective fourth electric circuit.

In addition, the method for inspecting a display panel of the present invention includes the steps of: providing a first test line and a second test line that are parallel to each other; and providing a multi-array array backplane line and a line between each array backplane line. a complex array driving circuit; providing a first array of extended lines to electrically connect an odd number of lines in each array backplane line to the first test line; and providing a second array of extended lines to electrically connect the array backplane An even number of lines in the line to the second test line; measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited; and cutting the first test line, the second A line between the test line and each of the first extension lines and each of the second extension lines is used to cut off the electrical connection between the array backplane line and the first test line and the second test line.

In addition, the circuit inspection method of the display panel disclosed in the present invention includes the following steps: providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other; and setting a complex array array backplane line And a complex array of driving lines between the respective array backplane lines; providing a plurality of first extended lines to electrically connect the odd number of lines in each of the driving lines to the first test line, and providing a plurality of third extended lines To electrically connect the odd-numbered lines of each array backplane line to the third test line respectively; provide a second array of extended lines to electrically connect the even-numbered lines of the respective drive lines to the second test line, and provide The fourth array of extension lines is electrically connected to the even-numbered lines of the respective array backplane lines to the fourth test line; the electrical connection state between the third test line and the fourth test line is measured to check the array back Whether the board line is short-circuited; and cutting the third test line, the fourth test line, and the third extension line and each The line extending between the lines to cut off the electrical connection between the array and backplate line and each of the third extension line connecting each fourth line extends.

With such a display panel and its line inspection method, it is possible to detect whether the line on the array substrate is abnormally turned on at the line array stage by the packet measurement characteristics of the extension line and the test line. However, when the conventional technology detects whether the display panel is working normally, it must wait until the module stage of the back end can detect, that is, wait until the control chip is all set on the display panel before testing. If an abnormal situation is detected at the module stage, the control chip that has been set up must be removed or even scrapped, resulting in waste of many materials and increased cost. In addition to early detection of abnormalities of the circuit and early implementation, the method of the present invention can be used early. In addition to the appropriate response, it is more important not to cause reimbursement of the control chip, which incurs more cost.

The features and implementations of the present invention are described in detail below with reference to the preferred embodiments.

Please refer to FIG. 1 for a partial schematic view of a display panel according to a first embodiment of the present invention. As shown in FIG. 1, the display panel of the present invention includes a first test line 10, a second test line 20, a complex array of array backplane lines 30, a first array of extended arrays 40, and a complex array. The second extension line 50 and the complex array of drive lines 60.

One end of the first test line 10 is electrically connected to the test pad 10a. The first test line 10 is electrically connected to one end of each of the first extension lines 40. The other ends of the respective first extension lines 40 are electrically connected to an odd number of lines of the array backplane line 30, respectively, and an odd number of lines in each of the drive lines 60. The first test line 10 can be a printed circuit.

One end of the second test line 20 is electrically connected to the test pad 20a. The second test line 20 is parallel to the first test line 10. The second test line 20 is electrically connected to one end of each of the second extension lines 50. The other ends of the respective second extension lines 50 are electrically connected to the even-numbered lines of the array backplane line 30, respectively, and the even-numbered lines of the respective drive lines 60. The second test line 20 can be a printed circuit.

The first test line 10 and the second test line 20 are respectively disposed on different layers in the line array of the display panel with an insulating layer therebetween to prevent the first extension line 40 and the second extension line 50 from being respectively connected to the first test line 10 A test circuit 10 and the second test line 20 cause a short circuit.

A complex array of array backplane lines 30 is disposed between each set of drive lines 60. The 30 ends of the array backplane line are electrically connected to the first test line 10 and the second test line 20, respectively, and the other end of the array backplane line 30 is not electrically connected to other lines. The array backplane line 30 can be a printed circuit.

The first extension line 40 of the complex array extends from the end of the array backplane line 30 to the position of the first test line 10 to electrically connect the odd-numbered lines of the respective array backplane lines 30 to the first test line 10, respectively. . The first extension line 40 can be a printed circuit.

The second extension line 50 of the complex array extends from the end of the array backplane line 30 to the position of the second test line 20 to electrically connect the even-numbered lines of the respective array backplane lines 30 to the second test line 20, respectively. . Each of the second extension lines 50 is substantially parallel to each of the first extension lines 40. The second extension line 50 can be a printed circuit.

The complex array of drive lines 60 are located between each set of array backplane lines 30. One end of each driving line 60 is electrically connected to the liquid crystal unit 60a, and the other end of each driving line 60 is electrically connected to the first extension line 40 and the second extension line 50, respectively. The odd-numbered lines of the respective driving lines 60 are electrically connected to the first test line 10 through the respective first extension lines 40, and the even-numbered lines of the respective driving lines 60 are electrically connected to the second through the respective second extension lines 50. Test line 20.

In this way, during the test, the tester can point the probe on the test pad 10a and the test pad 20a to test whether the test pad 10a and the test pad 20a are turned on, that is, whether the odd-numbered lines in the array backplane line 30 are tested. The even number of lines are turned on to further determine whether the array backplane line 30 is short-circuited. Similarly, it can be determined whether the odd-numbered lines in the drive line 60 form a short circuit with the even-numbered lines. In other words, by adding the first extension line 40 and the second extension line 50, the display panel can detect whether the array backplane line 30 and the drive line 60 are abnormally turned on at the stage of the array (ie, the array substrate) without waiting for the circuit. The module can be detected by the module stage of the control chip. In addition to making appropriate response early, it can also avoid the removal or even scrapping of the control chip, and save more cost.

Please refer to FIG. 2, which is a partial schematic view of another display panel of the present invention. As shown in FIG. 2, the display panel of the present invention includes a first test line 10, a second test line 20, a multi-array array backplane line 30, a first array of extended lines 40, and a complex array. The second extension line 50, the complex array of drive lines 60, the first imprint 70 and the second imprint 71.

The first stamp 70 is marked at the side locations of the first set of lines in the array backplane line 30. The second stamp 71 is marked at the side position of the last set of lines in the array backplane line 30.

Please refer to "FIG. 3" for a partial schematic view of another display panel of the present invention. As shown in "Fig. 3", after the display panel detection process is completed, the laser device can be used to cut from the first mark 70 to the second mark 71 or the second mark 71 to the first mark 70. . By cutting the line between the first test line 10, the second test line 20 and each of the first extension lines 40 and each of the second extension lines 50, the array backplane line 30 and each of the first test lines 10 and 2 are cut off. Electrical connections between the test lines 20 are made and a cut region 72 is formed. In this way, it can be shipped to the module department for the next phase of testing.

Please refer to FIG. 4, which is a partial schematic view of a display panel according to a second embodiment of the present invention. As shown in FIG. 4, the second embodiment of the present invention differs from the first embodiment in that the third test line 80, the fourth test line 90, the third extension line 41, and the The four extension lines 51, the test pad 80a and the test pad 90a.

One end of the first test line 10 is electrically connected to the test pad 10a. The first test line 10 is electrically connected to one end of each of the first extension lines 40. The other ends of the respective first extension lines 40 are electrically connected to an odd number of lines in the respective driving lines 60, respectively. The first test line 10 can be a printed circuit.

One end of the second test line 20 is electrically connected to the test pad 20a. The second test line 20 is parallel to the first test line 10. The second test line 20 is electrically connected to one end of each of the second extension lines 50. The other ends of the respective second extension lines 50 are electrically connected to the even-numbered lines in the respective driving lines 60, respectively. The second test line 20 can be a printed circuit.

The first test line 10 and the second test line 20 are respectively disposed on different layers in the line array of the display panel with an insulating layer therebetween to prevent the first extension line 40 and the second extension line 50 from being respectively connected to the first test line 10 A test circuit 10 and the second test line 20 cause a short circuit.

A complex array of array backplane lines 30 is disposed between each set of drive lines 60. The 30 ends of the array backplane line are electrically connected to the third test line 80 and the fourth test line 90, respectively, and the other end of the array backplane line 30 is not electrically connected to other lines. The array backplane line 30 can be a printed circuit.

The first extension line 40 of the complex array extends from the position of one end of the driving line 60 toward the position of the first test line 10 to electrically connect the odd-numbered lines of the respective driving lines 60 to the first test line 10, respectively. The first extension line 40 can be a printed circuit.

The second extension line 50 of the complex array extends from the position of one end of the driving line 60 to the position of the second test line 20 to electrically connect the even-numbered lines of the respective driving lines 60 to the second test line 20, respectively. Each of the second extension lines 50 is substantially parallel to each of the first extension lines 40. The second extension line 50 can be a printed circuit.

The third extension line 41 of the complex array extends from the position of one end of the array backplane line 30 to the position of the third test line 80 to electrically connect the odd-numbered lines of the respective array backplane lines 30 to the third test line 80, respectively. . The third extension line 41 can be a printed circuit.

The fourth extension line 51 of the complex array extends from the position of one end of the array backplane line 30 to the position of the fourth test line 90 to electrically connect the even-numbered lines to the fourth test line 90 of the respective array backplane lines 30, respectively. . The fourth extension line 51 can be a printed circuit.

The complex array of drive lines 60 are located between each set of array backplane lines 30. One end of each driving line 60 is electrically connected to the liquid crystal unit 60a, and the other end of each driving line 60 is electrically connected to the first extension line 40 and the second extension line 50, respectively. The odd-numbered lines of the respective driving lines 60 are electrically connected to the first test line 10 through the respective first extension lines 40, and the even-numbered lines of the respective driving lines 60 are electrically connected to the second through the respective second extension lines 50. Test line 20.

In this way, during the test, the tester can point the probe on the test pad 10a and the test pad 20a to test whether the test pad 10a and the test pad 20a are turned on, that is, whether the odd-numbered lines in the test drive line 60 and the even-numbered strips are tested. The line is turned on to further determine whether the driving circuit 60 is short-circuited. Similarly, the probe can be placed on the test pad 80a and the test pad 90a to test whether the test pad 80a and the test pad 90a are turned on, that is, the test array backplane line is tested. Whether the odd-numbered lines in 30 are electrically connected to the even-numbered lines determines whether the odd-numbered lines in the array back-up line 30 form a short circuit with the even-numbered lines. In other words, by adding the first extension line 40, the second extension line 50, the third extension line 41, the fourth extension line 51, the third test line 80 and the fourth extension line 90, the display panel can be in the stage of the array (also That is, the array substrate) detects whether the array backplane line 30 and/or the driving line 60 are abnormally turned on, and does not have to wait until the module is connected to the module stage of the control chip, except that it can be made earlier. In addition to proper response, it can also avoid the removal or even scrapping of the control wafer, and save more cost.

Please refer to FIG. 5, which is a flow chart of the steps of the line detection method according to the first embodiment of the present invention. As shown in FIG. 5, the line detecting method of the display panel of the present invention includes the following steps: First, providing a first test line and a second test line parallel to each other (step 100), wherein the first test line and The second test line can be completed by a printed circuit board process.

Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 110), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.

A plurality of first extension lines are provided to electrically connect the odd number of lines in each of the array backplane lines to the first test line (step 120), wherein each of the first extension lines can be completed by a printed circuit board process.

A plurality of second extension lines are provided to electrically connect the even lines of the array backplane lines to the second test lines (step 130), wherein each of the second extension lines can be completed by a printed circuit board process.

Measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited (step 140), wherein the first test line and the second test line can be utilized by the three-meter power meter Make measurements.

Cutting a line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines to cut off an electrical connection between the array backplane line and the first test line and the second test line (Step 150), wherein the line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines can be cut by the laser device. In addition, if the measurement result in step 140 is a short circuit, it means that the display panel is defective, so there is no need to perform step 150. In other words, when the display panel is defective, step 150 may be omitted.

Please refer to FIG. 6 , which is a flow chart of the steps of the line detection method according to another embodiment of the present invention. As shown in FIG. 6, the line detecting method of the display panel of the present invention includes the following steps: First, providing a first test line and a second test line (step 200) parallel to each other, wherein the first test line and The second test line can be completed by a printed circuit board process.

Next, a complex array array backplane line and a complex array drive line between the various array backplane lines are provided (step 210), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.

A plurality of first extension lines are provided to electrically connect the odd number of lines in each of the array backplane lines to the first test line (step 220), wherein each of the first extension lines can be completed by a printed circuit board process.

A plurality of second extension lines are provided to electrically connect the even number of lines in the array backplane line to the second test line (step 230), wherein each of the second extension lines can be completed by a printed circuit board process.

The mark is first stamped at the side position of the first set of lines in the array backplane line, and the second mark is stamped at the side position of the last set of lines in the array backplane line (step 240).

Applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the respective driving lines are normal (step 250), wherein the driving signals respectively applying different voltage levels are applied to the first test line and the first Second test circuit to check whether the liquid crystal unit connected to each driving line is normal, for example, if the first test line applies a high voltage level signal, the second test line applies a low voltage level signal; or conversely, if When a test circuit applies a low voltage level signal, the second test line applies a high voltage level signal.

Measuring an electrical connection state between the first test line and the second test line to check whether each array backplane line is short-circuited (step 260), wherein the first test line and the second test line can be utilized by the three-meter power meter Make measurements.

Cutting a line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines to cut off an electrical connection between the array backplane line and the first test line and the second test line (Step 270), wherein the laser device is used to cut the line between the first test line, the second test line, and each of the first extension lines and each of the second extension lines from the first imprint to the second imprint direction. In addition, if the measurement result in step 260 is a short circuit, it means that the display panel is a defective product, so there is no need to perform step 270, in other words, when the display panel is defective, step 270 can be omitted.

Please refer to FIG. 7 , which is a flow chart of the steps of the line detection method according to the second embodiment of the present invention. As shown in FIG. 7, the circuit detection method of the display panel of the present invention includes the following steps: First, providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other ( Step 300), wherein the first test line, the second test line, the third test line and the first The four test lines can be completed by a printed circuit board process.

Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 310), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.

Providing a plurality of first extension lines for electrically connecting the odd lines of the respective driving lines to the first test line, and providing a plurality of third extended lines for electrically connecting the odd lines of the respective array backplane lines To the third test line (step 320), wherein each of the first extension line and the third extension line can be completed by a printed circuit board process.

Providing a second array of extended lines to electrically connect the even lines of the respective driving lines to the second test line, and providing a fourth array of extended lines to electrically connect the even lines of the respective array backplane lines To the fourth test line (step 330), wherein each of the second extension line and the fourth extension line can be completed by a printed circuit board process.

Measuring an electrical connection state between the third test line and the fourth test line to check whether the array backplane line is short-circuited (step 340), wherein the third test line and the fourth test line can be performed by using the three-meter power meter Measure.

Cutting a line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines to cut off the electricity between the array backplane line and each of the third extension lines and each of the fourth extension lines Sexual connection. (Step 350), wherein the laser test device can be used to cut the line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines. In addition, if the measurement result in step 340 is a short circuit, it means that the display panel is a defective product, so there is no need to perform step 350. In other words, when the display panel is defective, step 350 may be omitted.

Please refer to FIG. 8 , which is a flow chart of the steps of the line detection method according to another embodiment of the present invention. As shown in FIG. 8, the circuit detection method of the display panel of the present invention includes the following steps: First, providing first test lines, second test lines, third test lines, and fourth test lines that are parallel to each other ( Step 400), wherein the first test line, the second test line, the third test line, and the fourth test line are completed by a printed circuit board process.

Next, a complex array array backplane line and a complex array drive line between the array backplane lines are provided (step 410), wherein the array backplane lines and the individual drive lines are completed by a printed circuit board process.

Providing a plurality of first extension lines for electrically connecting the odd lines of the respective driving lines to the first test line, and providing a plurality of third extended lines for electrically connecting the odd lines of the respective array backplane lines To the third test line (step 420), wherein each of the first extension line and the third extension line can be completed by a printed circuit board process.

Providing a second array of extended lines to electrically connect the even-numbered lines in each of the array backplane lines to the second test line, and to provide a fourth array of extended lines to electrically connect the even-numbered lines of the respective drive lines To the fourth test line (step 430), wherein each of the second extension line and the fourth extension line can be completed by a printed circuit board process.

The mark is first stamped at the side position of the first set of lines in the array backplane line, and the second mark is stamped at the side position of the last set of lines in the array backplane line (step 440).

Applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the respective driving lines are normal (step 450), wherein the driving signals respectively applying different voltage levels are applied to the first test line and the first Second test circuit to check whether the liquid crystal unit connected to each driving line is normal, for example, if the first test line applies a high voltage level signal, the second test line applies a low voltage level signal; or conversely, if When a test circuit applies a low voltage level signal, the second test line applies a high voltage level signal.

Measure the electrical connection state between the third test line and the fourth test line to check whether each array backplane line is short-circuited (step 460), wherein the third test line and the fourth test line can be utilized by the three-meter power meter Make measurements.

Cutting a line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines to cut off the electricity between the array backplane line and each of the third extension lines and each of the fourth extension lines Sexual connection. (Step 470), wherein the line between the third test line, the fourth test line, and each of the third extension lines and each of the fourth extension lines can be cut by the laser device. In addition, if the measurement result in step 460 is a short circuit, indicating that the display panel is defective, step 470 is not required, in other words, when the display panel is defective, step 470 may be omitted.

In summary, the display panel and the line inspection method of the present invention can detect whether the line on the array substrate is abnormally turned on in the line array stage by the packet measurement characteristics of the extension line and the test line. However, when the conventional technology detects whether the display panel is working normally, it must wait until the module stage of the back end can detect, that is, wait until the control chip is all set on the display panel before testing. If an abnormal situation is detected at the module stage, the control chip that has been set up must be removed or even scrapped, resulting in waste of many materials and increased cost. In addition to early detection of abnormalities of the circuit and early implementation, the method of the present invention can be used early. In addition to the appropriate response, it is more important not to cause reimbursement of the control chip, which incurs more cost.

While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The patent protection scope of the invention is subject to the definition of the scope of the patent application attached to the specification.

10. . . First test line

10a. . . Test pad

20. . . Second test line

20a. . . Test pad

30. . . Array backplane line

40. . . First extension line

41. . . Third extension line

50. . . Second extension line

51. . . Fourth extension line

60. . . Drive line

60a. . . Liquid crystal cell

70. . . First imprint

71. . . Second mark

72. . . Cutting area

80. . . Third test line

80a. . . Test pad

90. . . Fourth test line

90a. . . Test pad

Figure 1 is a partial schematic view of a display panel in accordance with a first embodiment of the present invention.

Figure 2 is a partial schematic view of another display panel of the present invention.

Figure 3 is a partial schematic view of another display panel of the present invention.

Figure 4 is a partial schematic view of a display panel in accordance with a second embodiment of the present invention.

Figure 5 is a flow chart showing the steps of the line detecting method of the first embodiment of the present invention.

Figure 6 is a flow chart showing the steps of the line detecting method according to another embodiment of the present invention.

Figure 7 is a flow chart showing the steps of the line detecting method according to the second embodiment of the present invention.

Figure 8 is a flow chart showing the steps of a line detecting method according to another embodiment of the present invention.

Claims (16)

A display panel includes: a first test line; a second test line parallel to the first test line; a complex array array backplane line; and a complex array first extension line electrically connected to the array backplane An odd number of lines of the line to the first test line; a second array of extended lines parallel to the first extension lines, electrically connecting the even lines of the array backplane lines to the second test line; a plurality of array drive lines disposed between the array of backplane lines of the arrays, wherein the odd number of lines in the drive lines are electrically connected to the first test line through the first extension lines, and the even number of lines in the drive lines The second extension line is electrically connected to the second test line. The display panel of claim 1, wherein the first extension line and the second extension lines have a cutting area to cut off the array backplane lines, the driving lines, and the first extensions. Electrical connections between the lines and the second extension lines. A display panel includes: a first test line; a second test line parallel to the first test line; a complex array drive line, and an odd number of lines in the drive line Connected to the first test circuit, the even-numbered lines of the drive lines are electrically connected to the second test line; the plurality of first extended lines are electrically connected to the odd-numbered lines of the drive lines to the first a test circuit; a second array of extension lines, parallel to the first extension lines, electrically connecting the even lines of the drive lines to the second test line; the third array of extension lines, parallel to the a second extension line; a fourth array of extension lines parallel to the third extension lines; a third test line; parallel to the second test line; a fourth test line parallel to the third test line; a group of array backplane lines between each group of drive lines, wherein the odd number of lines in the array backplane lines are electrically connected to the third test line through the third extension lines, and the array of backplane lines An even number of lines are electrically connected to the fourth test line through the fourth extension lines. The display panel of claim 3, wherein the first extension line and the second extension lines have a cutting area to cut off the array backplane lines, the driving lines, and the first extensions. Electrical connections between the lines and the second extension lines. A circuit inspection method for a display panel includes the steps of: providing a first test line and a second test line parallel to each other; setting a complex array array backplane line and a complex array drive between each of the array backplane lines line; Providing a plurality of first extended lines to electrically connect the odd number of lines in the array backplane lines to the first test line; and providing a second array of extended lines to electrically connect the array backplane lines And an even number of lines to the second test line; measuring an electrical connection state between the first test line and the second test line to check whether the array backplane lines are short-circuited; and cutting the first test line a line between the second test line and the first extension line and the second extension line to cut off electrical continuity between the array backplane line and the first test line and the second test line connection. The circuit inspection method of the display panel of claim 5, wherein the first extension lines are electrically connected to the odd-numbered lines of the driving lines to the first test line, respectively. The circuit inspection method of the display panel of claim 5, wherein the second extension lines are further electrically connected to the even-numbered lines of the driving lines to the second test line. The method for inspecting a display panel of claim 5, comprising: marking a first imprint on a side position of the first set of lines in the array backplane lines, and marking a second imprint on the The steps at the side positions of the last set of lines in the array backplane line. The line inspection method of the display panel of claim 8, wherein the line between the first test line, the second test line, and the first extension line and the second extension line is cut to cut off The array backplane line and the first In the step of electrically connecting the test line and the second test line, the first imprint is cut in the second imprint direction. The line inspection method of the display panel according to claim 5, wherein the first test line, the second test line, and the first extension line and the second extension line are cut by laser. The circuit inspection method of the display panel of claim 5, comprising the step of applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the driving lines are normal. A circuit inspection method for a display panel includes the steps of: providing a first test line, a second test line, a third test line, and a fourth test line that are parallel to each other; setting a complex array array backplane line and located a plurality of array drive lines between the array backplane lines; providing a plurality of first extension lines for electrically connecting the odd number of lines of the drive lines to the first test line, and providing a third array of complex arrays a circuit for electrically connecting the odd-numbered lines of the array backplane lines to the third test line; providing a plurality of second extended lines to electrically connect the even-numbered lines of the drive lines to the second Testing a line, and providing a fourth array of extended lines to electrically connect the even-numbered lines of the array of backplane lines to the fourth test line; measuring between the third test line and the fourth test line Electrical connection Connected to check whether the array backplane line is shorted; and cut the third test line, the fourth test line and the third extension line and the fourth extension line to cut the array An electrical connection between the backplane line and the third extension lines and the fourth extension lines. The method of line inspection of the display panel of claim 12, comprising: marking a first imprint on a side position of the first set of lines in the array backplane lines, and marking a second imprint on the The steps at the side positions of the last set of lines in the array backplane line. The line inspection method of the display panel of claim 13, wherein the line between the first test line, the second test line, and the first extension line and the second extension line is cut to cut off In the step of electrically connecting the driving circuit to the first test line and the second test line, the first imprint is cut in the second imprint direction. The line inspection method of the display panel of claim 12, wherein the third test line, the fourth test line, and the third extension line and the line between the fourth extension lines are cut by laser. The circuit inspection method of the display panel of claim 12, comprising the step of applying a driving signal to the first test line and the second test line to check whether the liquid crystal cells connected to the driving lines are normal.