KR101469481B1 - Display panel for display device and method for detecting defects of signal line - Google Patents

Abstract

The present invention relates to a display panel for a display device and a defect detection method of a signal line for a display device, which can accurately determine whether short-circuiting and disconnection of adjacent signal lines are performed, and a plurality of signal lines for transmitting various signals required for pixels A substrate formed; One of the signal lines adjacent to each other is connected to at least one main signal transmission line, and the other signal line is in a floating state.

Description

TECHNICAL FIELD [0001] The present invention relates to a display panel for a display device and a method for detecting defects in a signal line for a display device.

The present invention relates to a display device, and more particularly, to a display panel for a display device and a method for detecting a defect in a signal line for a display device, which can accurately determine whether or not short-circuiting and disconnection of adjacent signal lines are possible.

Various display devices such as a liquid crystal display device, a plasma display device, and a light emitting display device are manufactured as one finished product through several inspection processes.

These various processes include a process of inspecting a short circuit and a disconnection of a signal line such as a gate line and a data line.

However, as the size of such a display device becomes larger, the number of signal lines also increases in proportion thereto, and the interval between the signal lines becomes narrower. In particular, a light-emitting diode display device requires a large number of switching elements and various driving signals supplied thereto in order to compensate the current driving capability of the driving switching element, thereby narrowing the interval between the signal lines.

Therefore, conventionally, signal waveforms detected from neighboring signal lines are almost the same due to signal interference between adjacent signal lines, so that whether the respective signal lines are short-circuited or disconnected, and the position of an accurate signal line in which disconnection and short- There was a problem that could not be specified.

SUMMARY OF THE INVENTION The present invention has been conceived to solve the problems described above, and it is an object of the present invention to provide a semiconductor device having a structure in which signal lines adjacent to each other have different electrical connections, And to provide a method for detecting defects in a signal line for a display device and a signal line for a display device that can precisely determine whether each signal line is short-circuited or disconnected by excluding signal interference between neighboring signal lines.

According to an aspect of the present invention, there is provided a display panel for a display device, comprising: a substrate having a plurality of signal lines for transmitting various signals required for pixels; One of the signal lines adjacent to each other is connected to at least one main signal transmission line and the other signal line is in a floating state at the time of inspecting the open and short of the signal lines.

The nth signal lines among the plurality of signal lines are in a floating state; Signal lines other than the n-th signal lines are connected to the main signal transmission line; The n is 2 m-1 (m is a natural number) or 2 m.

The main signal transmission line and the plurality of signal lines are located in different layers with a gate insulating film therebetween; And signal lines other than the n-th signal lines are connected to the main signal transmission line through a contact hole passing through the gate insulating layer.

Wherein the substrate is divided into a display region in which the pixels are formed, a non-display region in which driving integrated circuits for supplying signals for driving the pixels are mounted, and a plurality of shorting bars in which a plurality of shorting bars are to be formed; The plurality of shorting bars are formed on the same layer as the main signal transmission line; After the disconnection and short circuit test, each of the n-th signal lines is connected to the plurality of shorting bars through a plurality of connection lines.

The plurality of connection lines and the plurality of signal lines are located in different layers with a protective film interposed therebetween; The plurality of connection lines and the plurality of shorting bars are located in different layers with the gate insulating film and the protective film interposed therebetween; One side of the plurality of connection lines is connected to the nth signal lines through a plurality of contact holes passing through the protection film; And the other side of the plurality of connection lines is connected to the plurality of shorting bars through a plurality of contact holes passing through the gate insulating film and the protective film.

The main signal transmission line and the plurality of shorting bars are formed of materials of the same material; The plurality of signal lines are formed of materials of the same material; The plurality of connection lines are formed of materials of the same material; The main signal transmission line, the signal line, and the connection line are formed of materials of different materials.

The connection line is formed of indium-tin-oxide or molybdenum metal compound (MoX).

The main signal transmission line is divided into first and second main signal transmission lines; The other signal lines other than the n-th signal lines are alternately connected to the first main signal transmission line and the second main signal transmission line.

And a plurality of connection lines connecting the output terminals of the data driver for outputting the data signals and the signal lines in the floating state, respectively.

The plurality of connection lines and the signal lines are located in different layers with a protective film interposed therebetween; One side of the plurality of connection lines is connected to the floating signal lines through a plurality of contact holes passing through the protection film; The other end of the plurality of connection lines is connected to the output terminals.

The signal lines and the connection lines are formed of materials of different materials.

And a plurality of connection lines connecting the output terminals of the data driver for outputting the data signals and the signal lines in the floating state, respectively.

The plurality of connection lines and the signal lines are located in different layers with a protective film interposed therebetween; One side of the plurality of connection lines is connected to the floating signal lines through a plurality of contact holes passing through the protection film; The other end of the plurality of connection lines is connected to the output terminals.

The signal lines and the connection lines are formed of different materials.

According to another aspect of the present invention, there is provided a display panel for a display device, including: a plurality of data lines for transmitting data signals output from a data driver to a plurality of pixels; And a plurality of first connection lines for individually connecting output terminals of the data driver to which the data signals are output and one side of the data lines.

The plurality of first connection lines and the data lines are located in different layers with a protective film interposed therebetween; One side of the plurality of first connection lines is connected to one side of the data lines through a plurality of contact holes passing through the protection film; The other end of the plurality of first connection lines is connected to the output terminals.

The data line and the first connection line are formed of different materials.

And a plurality of second connection lines individually connected to the other side of the data lines.

The plurality of second connection lines and the data lines are located in different layers with a protective film interposed therebetween; And one side of the plurality of second connection lines is connected to the other side of the data lines through a plurality of contact holes passing through the protective film.

And the data line and the second connection line are formed of different materials.

According to another aspect of the present invention, there is provided a method for detecting a defective signal line for a display device, the method comprising: preparing a substrate having a plurality of signal lines for transmitting various signals required for pixels; Connecting any one signal line of two adjacent signal lines to at least one main signal transmission line and keeping any other signal line in a floating state; Applying an input test signal to one side of the plurality of signal lines; And analyzing a waveform of an output test signal output from the other side of the plurality of signal lines to determine whether the plurality of signal lines are short-circuited or disconnected.

The nth signal lines among the plurality of signal lines are in a floating state; Signal lines other than the n-th signal lines are connected to the main signal transmission line; The n is 2 m-1 (m is a natural number) or 2 m.

The main signal transmission line and the plurality of signal lines are located in different layers with a gate insulating film therebetween; And signal lines other than the n-th signal lines are connected to the main signal transmission line through a contact hole passing through the gate insulating layer.

And the input test signal is an input test signal in the form of a voltage.

Wherein the step of analyzing the waveform of the output test signal output from the other side of the plurality of signal lines and judging whether the plurality of signal lines are short-circuited or disconnected comprises the steps of: Calculating a maximum average peak voltage by averaging peak peak voltages for each of the output test signals detected from the lines, and using the calculated peak average voltage as a first reference voltage; The lowest average peak voltage is calculated by averaging the lowest peak voltages detected from the signal lines other than the n-th signal lines in a normal situation where the signal lines are not short-circuited and disconnected, Setting a second reference voltage; And determining whether the signal line is short-circuited or disconnected based on a comparison result between the first and second reference voltages and the output detection signal of each signal line.

When the difference between the highest peak voltage of the output detection signal detected from the n-th signal line and the first reference value is within a preset specific range, the step of determining whether the signal line is short- And determines that the corresponding signal line is disconnected when the difference between the highest peak voltage of the output detection signal detected from the n-th signal line and the first reference value is greater than the maximum value within the specified range, When the difference between the highest peak voltage of the output detection signal detected from the n-th signal line and the first reference value is smaller than the minimum value within the specified range, it is determined that the corresponding signal line is short-circuited; When the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the n-th signal line and the second reference value is within a preset specific range, it is determined that there is no abnormality in the corresponding signal line, When the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the first signal line and the second reference value is greater than the maximum value within the specified range described above, when the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the n-th signal line and the second reference value is smaller than the minimum value within the specified range described above, it is determined that the corresponding signal line is disconnected .

Wherein the substrate is divided into a display region in which the pixels are formed, a non-display region in which driving integrated circuits for supplying signals for driving the pixels are mounted, and a plurality of shorting bars in which a plurality of shorting bars are to be formed; The plurality of shorting bars are formed on the same layer as the main signal transmission line; The method may further include connecting each of the n-th signal lines to the plurality of shorting bars via a plurality of connection lines.

The plurality of connection lines and the plurality of signal lines are located in different layers with a protective film interposed therebetween; The plurality of connection lines and the plurality of shorting bars are located in different layers with the gate insulating film and the protective film interposed therebetween; One side of the plurality of connection lines is connected to the nth signal lines through a plurality of contact holes passing through the protection film; And the other side of the plurality of connection lines is connected to the plurality of shorting bars through a plurality of contact holes passing through the gate insulating film and the protective film.

The main signal transmission line and the plurality of shorting bars are formed of materials of the same material; The plurality of signal lines are formed of materials of the same material; The plurality of connection lines are formed of materials of the same material; The main signal transmission line, the signal line, and the connection line are formed of materials of different materials.

The connection line is formed of indium-tin-oxide or molybdenum metal compound (MoX).

The main signal transmission line is divided into first and second main signal transmission lines; The other signal lines other than the n-th signal lines are alternately connected to the first main signal transmission line and the second main signal transmission line.

Applying a current-type input test signal to one side of the plurality of signal lines to determine whether the signal line is short-circuited or disconnected; A signal line connected to the signal line and a signal line connected to the signal line, the signal line being short-circuited or disconnected according to the input test signal of the current type, And judging whether or not a short circuit is present.

The method for detecting defects in a display panel for a display device and a signal line for a display device according to the present invention has the following effects.

The odd-numbered signal lines among the signal lines of the display panel according to the present invention have a floating state, and the even-numbered signal lines have a structure connected to the main signal transmission line. As a result, adjacent signal lines have resistances of different sizes. Therefore, even when a plurality of signal lines are located very close to each other, when an input test signal of the same size is applied to one end of neighboring signal lines, the output test signals detected from the other end of the neighboring signal lines A difference occurs. Therefore, even if noise due to signal interference occurs between neighboring signal lines, the difference between the two output test signals is large, so that the output test signal can be accurately detected from each signal line. Therefore, according to the present invention, the size of the output test signals (OIS) detected from each signal line can be analyzed individually to determine whether each signal line is short-circuited or disconnected.

1 is a view showing a display panel for a display device according to a first embodiment of the present invention;
2 is a view showing a structure of a display panel after a process of short-circuiting and disconnection of signal lines
3 is a sectional view taken along the line A in Fig.
Fig. 4 is a cross-sectional view taken along the line B in Fig. 2
5 is a diagram showing the configuration of any one of the pixels in Fig. 1
6A to 6C are diagrams for explaining a defect detection method for a signal line for a display device according to the present invention;
7 is a view showing a waveform of an output test signal when a part of the signal lines is short-circuited and disconnected
8 is a view showing a display panel for a display device according to a second embodiment of the present invention
9 is a view showing the structure of a display panel after the process of short-circuiting and disconnection of signal lines
10A to 10B are views for explaining a process of attaching a data driver to a display panel according to the first embodiment of the present invention
11A to 11B are views for explaining the process of attaching the data driver to the display panel according to the second embodiment of the present invention

1 is a view showing a display panel for a display device according to a first embodiment of the present invention.

1, a display panel for a display device according to a first embodiment of the present invention includes a substrate 100 on which a plurality of signal lines SL for transmitting various signals necessary for pixels are formed, .

The substrate 100 is divided into a display region 101, a non-display region 102, and a shorting bar region 103. The substrate 100 shown in FIG. 1 is a lower substrate positioned under one of two substrates, and the upper substrate is not shown in FIG. A plurality of color filters are formed on an upper substrate not shown. The shorting bar area 103 is removed from the substrate 100 after the final inspection. For example, this shorting bar region 103 is removed by cutting the substrate 100 along the scribing line SCL of FIG.

In the display region 101, a plurality of pixels and a plurality of signal lines SL are formed as described above. In this display area 101, first and second main signal transmission lines MSL1 and MSL2 are formed. The first and second main signal transmission lines MSL1 and MSL2 may be formed in the non-display area 102 instead of the display area 101. [

The non-display area 102 is an area in which drive ICs for transmitting signals to a plurality of signal lines SL and main signal transmission lines MSL1 and MSL2 are installed, ) Are installed after the completion of all inspection processes.

A plurality of shorting bars (SB) are formed in the shorting bar area (103). These shorting bars SB discharge the static electricity generated in the signal lines SL and the main signal transmission line to prevent damage to the thin film transistors formed in the pixels. In addition, these shorting bars (SB) also serve to supply necessary test signals to the pixels to detect defective pixels.

The structure shown in FIG. 1 is designed to check whether the signal lines SL are short-circuited and disconnected. To this end, one of the two signal lines SL adjacent to each other is connected to the main signal line SL Is connected to the line MSL1 or MSL2, while the other signal line SL is kept in a floating state not connected to any line.

That is, the nth signal lines SL among the plurality of signal lines SL are kept in the floating state, while the remaining signal lines SL except for the nth signal lines SL are connected to the first main signal transmission line MSL1 or the second main signal transmission line MSL2. Here, n is 2m-1 (m is a natural number) or 2m. For example, as shown in FIG. 1, the odd-numbered signal lines SL among the plurality of signal lines SL are held in a floating state without being connected to anywhere, while the odd- And one end thereof is alternately connected to the first and second main signal transmission lines MSL1 and MSL2.

The first and second main signal transmission lines MSL1 and MSL2 and the shorting bars SB may be made of a gate metal conventionally used in the fabrication of gate lines. For example, the main signal transmission lines MSL1 and MSL2 and the shorting bars SB may be made of any one of a metal material of an aluminum alloy or a double metal layer including aluminum.

The signal lines SL can be used as the source / drain metal conventionally used for the fabrication of data lines. For example, these signal lines SL can be made of any one of molybdenum (Mo), chromium (Cr), tungsten (W), and nickel (Ni), which have high chemical resistance and high mechanical strength .

The first and second main signal transmission lines MSL1 and MSL2 and the Schotting bar SB are formed in the same layer pattern on the same layer with the same metal material.

The plurality of signal lines SL are formed in one patterning process on the same layer with the same metal material.

The first and second main signal transmission lines MSL1 and MSL2 and the signal lines SL are located on different layers with a gate insulating film therebetween.

The nth signal lines SL (for example, the odd signal lines SL) among the signal lines SL are not connected to the first and second main signal transmission lines MSL1 and MSL2 . That is, the n-th signal lines SL are formed on the gate insulating film in a floating state and intersect with the first and second main signal transmission lines MSL1 and MSL2. On the other hand, the (n + 1) th signal lines SL (for example, the even signal lines SL) are connected to the first main signal transmission line MSL1 or the second main signal line SL through the contact holes passing through the gate insulating film. And is connected to the transmission line MSL2.

According to this structure, even if a plurality of signal lines SL are located close to each other, it is possible to accurately check whether the signal lines SL are individually disconnected or short-circuited. That is, since the signal lines SL adjacent to each other have different electrical connections, the resistance between the neighboring signal lines SL becomes different from each other. In other words, since the resistance of the signal line SL in the floating state is different from the resistance of the signal line SL connected to any one of the main signal transmission lines, the same voltage is applied to one end of the adjacent signal lines SL A large difference occurs between the output test signals detected from the other end of the neighboring signal lines SL. Therefore, even if noise due to signal interference occurs between adjacent signal lines SL, the difference between the two output test signals is large, so that an output test signal can be accurately detected from each signal line SL individually. Therefore, in the present invention, it is possible to accurately determine whether each signal line SL is short-circuited or disconnected by individually analyzing the magnitude of the output test signals detected from the signal lines SL.

Fig. 2 is a view showing the structure of the display panel after the process of short-circuiting and disconnection of the signal lines SL.

In the structure of the display panel shown in FIG. 1, if there is no abnormality after the short-circuit and disconnection inspection processes of the signal lines SL are performed, a process of checking whether or not each pixel is defective is performed. For this purpose, a test signal must be supplied to the signal lines SL in a floating state. For this purpose, as shown in FIG. 2, the operation of electrically connecting the signal lines SL in a floating state to the shorting bars SB Should be preceded.

As shown in FIG. 2, the signal lines SL in a floating state are electrically connected to a plurality of shorting bars SB through connection lines CNLs.

The connection line CNL may be formed of any one of indium-tin-oxide and molybdenum alloy MoX.

A plurality of connection lines (CNL) and the plurality of floating signal lines (SL) are located on different layers with a protective film interposed therebetween. Also, a plurality of connection lines CNL and a plurality of shorting bars SB are located in different layers with a gate insulating film and a protective film interposed therebetween.

One end of the plurality of connection lines CNL is connected to the floating signal lines SL through a plurality of contact holes passing through the protection film. The other end of the plurality of connection lines CNL is connected to the plurality of shorting bars SB through a plurality of contact holes passing through the gate insulating film and the protective film.

Referring to FIGS. 3 and 4, the connection relationship between the main signal transmission line and the signal line SL and the connection relationship between the shutting bar SB and the signal line SL will be described in detail.

FIG. 3 is a cross-sectional view taken along the line A - I 'in FIG. 2, taken along the line A of FIG.

As shown in FIG. 3, a first main signal transmission line MSL1 made of a gate metal is formed on a substrate 100. As shown in FIG. A gate insulating film GI is formed on the first main signal transmission line MSL1. A signal line SL made of a data metal is formed on the gate insulating film GI. At this time, a contact hole is formed in the gate insulating film GI. The contact hole exposes a part of the first main signal transmission line MSL1 located under the gate insulating film GI. The signal line SL is electrically connected to the first main signal transmission line MSL1 located below the contact hole SL. A protective film PAS is formed on the first main signal transmission line MSL1 and the gate insulating film GI.

Fig. 4 is a cross-sectional view taken along the line II-II 'of Fig.

As shown in FIG. 4, a first shorting bar SB made of a gate metal is formed on the substrate 100. A gate insulating film GI is formed on the shorting bar SB. A signal line SL made of a data metal is formed on the gate insulating film GI. A protective film PAS is formed on the signal line SL and the gate insulating film GI. A connection line CNL is formed on the protective film PAS. At this time, a contact hole penetrating the passivation layer PAS is formed. The contact hole exposes a part of the signal line SL located under the passivation layer PAS. Another contact hole is formed in the gate insulating film GI and the protective film PAS so as to continuously penetrate them. The contact hole exposes a part of the Schotenba SB located under the gate insulating film GI. One end of the connection line CNL is electrically connected to the signal line SL located below the contact hole through the contact hole. The other end of the connection line CNL is connected to the signal line SL via the contact hole SB ). Therefore, the signal line SL floated by the connection line CNL and the shorting bar SB are electrically connected to each other.

The cross-sectional structure shown in FIG. 4 is a structure for inspecting a pixel defect after the step of inspecting the short-circuit and the disconnection of the signal line SL. In the process of inspecting the short-circuit and disconnection of the signal line SL, The connection line CNL is not formed. At this time, not only the above-described connection line CNL but also contact holes may not be formed in the process of inspecting the short-circuit and disconnection of the signal line SL. That is, the first main transmission signal line SL, the second main signal transmission line MSL2, the shorting bars SB, the gate insulating film GI, and the protective film PAS (not shown) are formed before the signal line SL is short- ), And the above-described contact holes (the contact holes in FIG. 4) and the connection lines CNL can be formed after the short-circuit and disconnection inspection process of the signal line SL is completed.

As another embodiment, the first main transmission line SL, the second main signal transmission line MSL2, the shorting bars SB, the gate insulating film GI, and the second main signal transmission line MS may be used before the short- After the short circuit and the disconnection inspection process of the signal line SL are completed, the protection film PAS, the contact PAS, the signal line SL, Holes (contact holes in FIG. 4) and connection lines CNLs.

5 is a diagram showing the configuration of any one of the pixels in Fig.

The substrate 100 of FIG. 1 may be a substrate 100 of a light emitting diode display. In this case, one pixel includes a data switching element Tr_DS, a driving switching element Tr_DR, , A light emitting diode (OLED), and a storage capacitor (Cst).

The data switching element Tr_DS is controlled according to a gate signal from the gate line GL and is connected between the data line DL and the gate electrode of the driving switching element Tr_DR.

The driving switching element Tr_DR is controlled according to a data signal from the data switching element Tr_DS and is connected between the cathode electrode of the light emitting diode OLED and the second driving line VSL. The second driving line VSL is connected to the second main driving line MVSL for transmitting the second driving voltage VSS.

The light emitting diode OLED is connected between the first drive line VDS and the drain electrode of the drive switching element Tr_DR. The first driving line VDL is connected to the first main driving line MVDL for transmitting the first driving voltage VDD.

The storage capacitor Cst is connected between the gate electrode and the source electrode of the drive switching element Tr_DR.

Here, the data line DL, the first driving line VDL and the second driving line VSL may be included in the signal lines SL of FIG. 1 described above. For example, the data line DL corresponds to the floating signal line SL of FIG. 1, the first main drive line MVDL corresponds to the first main signal transmission line MSL1 of FIG. 1, 2 main driving line MVSL corresponds to the second main signal transmission line MSL2 in FIG. 1 and the first driving line VDL corresponds to the signal line (signal line) MSL1 connected to the first main signal transmission line MSL1 SL and the second drive line VSL corresponds to the signal line SL connected to the second main signal transmission lines MSL1, MSL2 in Fig.

A method of detecting defective (open and short) of the signal line (SL) for a display device according to an embodiment of the present invention will be described in detail.

6A to 6C are diagrams for explaining a defect detection method for a signal line SL for a display device according to the present invention, wherein FIG. 6B is a cross-sectional view taken along a line III-III 'of FIG. 6A, Sectional view taken along a line IV-IV 'in Fig. 6A.

First, as shown in FIG. 6A, the line inspection apparatus 600 is placed on the substrate 100 of FIG. The line inspection apparatus 600 includes an input inspection signal output unit 601 and an output inspection signal detection unit 602, as shown in FIG. 6A. The input test signal output unit 601 is located above one end of the signal lines SL and the output test signal detecting unit 602 is located above the other end of the signal lines SL. 6B and 6C, the input test signal output unit 601 and the output test signal detection unit 602 are spaced apart from each other by a predetermined distance without directly contacting the signal lines SL.

The input test signal output from the input test signal output unit 601 is applied to one end of each of the signal lines SL as shown in FIG. 6C. Then, an output test signal (OIS) for the input test signal is generated from the other end of each of the signal lines SL. The output test signal OIS generated from the other end of the signal lines SL is detected by the output test signal detector 602. [

6A shows the output test signal OIS detected by the output test signal detector 602 when there is no abnormality in all the signal lines SL, that is, when short-circuit and disconnection do not occur. Here, the output test signal OIS detected from the floating signal lines SL, for example, the odd signal lines SL has a relatively high peak voltage. On the other hand, the output test signal OIS (for example, the even-numbered signal line SL) detected from the signal lines SL connected to the first main signal transmission line MSL1 or the second main signal transmission line MSL2, ) Has a relatively low peak voltage. This is because the odd-numbered signal lines SL in the floating state have a relatively higher resistance than the even-numbered signal lines SL. Therefore, when there is no abnormality in all the signal lines SL, the output test signals OIS detected from the entire signal lines SL form a sine wave having a uniform size as shown in FIG. 6A.

7 is a diagram showing waveforms of an output test signal (OIS) when a part of the signal lines SL is short-circuited and disconnected.

As shown in FIG. 7, when some of the signal lines SL are short-circuited and disconnected, output check signals OIS having a size different from that shown in FIG. 6A are output from the signal lines SL corresponding to a part of the signal lines SL. For example, when the entire signal lines SL in FIG. 7 are defined as the first to eleventh signal lines SL1 to SL11 from the left side, the first and second signal lines SL1, The peak voltage of the output test signals OIS output from the output terminals SL1 and SL2 has a lower value than when it is normal. This is because the resistance of the first and second signal lines SL1 and SL2 is relatively decreased due to the short circuit between the first and second signal lines SL1 and SL2. In addition, the peak voltage of the output test signals OIS output from the disconnected fifth and eighth signal lines SL5 and SL8 has a higher value than when it is normal. This is because the resistance of the fifth and eighth signal lines SL5 and SL8 is relatively increased due to disconnection of the fifth and eighth signal lines SL5 and SL8.

In the present invention, the first and second reference values can be set based on the output test signals (OIS) from the signal lines (SL) under normal conditions as shown in FIG. 6A. That is, the highest peak voltages for each of the output test signals (OIS) detected from the odd-numbered signal lines SL in FIG. 6A are averaged to calculate a highest average peak voltage, and the calculated highest average peak voltage 1 reference voltage. Further, the lowest peak voltages detected from the even-numbered signal lines SL of FIG. 6A may be averaged to calculate the lowest average peak voltage, and the calculated lowest average peak voltage may be set as the second reference voltage. When the difference between the highest peak voltage of the output detection signal detected from any one of the odd-numbered signal lines SL and the first reference value is within a preset specific range, it is determined that there is no abnormality in the corresponding signal line SL . On the other hand, when the difference between the highest peak voltage of the output detection signal detected from any one of the odd-numbered signal lines SL and the first reference value has a value larger than the maximum value within the above- It is judged to be disconnected. On the other hand, when the difference between the highest peak voltage of the output detection signal detected from any of the odd-numbered signal lines SL and the first reference value is smaller than the minimum value within the above-mentioned specific range, the corresponding signal line SL It is judged to be short-circuited.

Likewise, when the difference between the lowest peak voltage of the output detection signal detected from any one of the even-numbered signal lines SL and the second reference value is within a preset specific range, it is determined that there is no abnormality in the corresponding signal line SL . On the other hand, when the difference between the lowest peak voltage of the output detection signal detected from any one of the even-numbered signal lines SL and the second reference value is greater than the maximum value within the above-mentioned specific range, Is judged to be short-circuited. On the other hand, when the difference between the lowest peak voltage of the output detection signal detected from any one of the even-numbered signal lines SL and the second reference value is smaller than the minimum value within the above-mentioned specific range, the corresponding signal line SL It is judged to be disconnected.

Such a determination can be determined from the output test signal detector 602. [ The determined result can be displayed on a separate monitor.

The input test signal from the input test signal output unit 601 may be a voltage or a current. In FIGS. 6A and 7, the input test signal is a voltage. The waveform of the output test signal OIS detected from each signal line SL even when the input test signal of the current type is used has a form as shown in Figs. 6A and 7 in actuality.

The input test signal output unit 601 of the present invention can output both the input test signal of the voltage type and the input test signal of the current type. At this time, the line inspecting apparatus 600 having the input inspecting signal outputting unit 601 firstly applies the input test signal of the voltage form to the signal lines SL to judge whether the signal lines SL are short- Then, an input test signal of a current type may be applied to the signal lines SL to judge whether the signal lines SL are short-circuited or disconnected. In this case, it is possible to finally determine whether the signal lines SL are short-circuited or disconnected based on the two determination results. That is, the output test signal detecting unit 602 compares the results obtained in the two judgments and determines whether the signal line SL having received the same diagnosis (disconnection state, short-circuit state, or normal state) SL). Performing two or more determinations in this manner can increase the accuracy and efficiency of the test.

On the other hand, when the area of the substrate 100 is larger than the inspectable area of the line inspecting apparatus, the area of the substrate is divided into a plurality of areas and the line inspecting apparatus 600 is transferred to the divided areas of the substrate 100, The defects of the entire signal lines can be inspected.

8 is a view showing a display panel for a display device according to a second embodiment of the present invention.

A display panel for a display device according to a second embodiment of the present invention includes a substrate 100 having a plurality of signal lines SL formed thereon for transmitting various signals required for pixels as shown in FIG. .

The substrate 100 is divided into a display region 101, a non-display region 102, a first shorting bar region 103 and a second shorting bar region 103. The substrate 100 shown in FIG. 8 shows a lower substrate 100 positioned under the two substrates 100, and the upper substrate 100 is not shown in FIG. A plurality of color filters are formed on the upper substrate 100 not shown.

In the display region 101, a plurality of pixels and a plurality of signal lines SL are formed as described above. In this display region 101, first to fourth main signal transmission lines MSL1 to MSL4 are formed. On the other hand, the first to fourth main signal transmission lines MSL1 to MSL4 may be formed in the non-display area 102 instead of the display area 101. [

The non-display area 102 is an area in which driving integrated circuits for transmitting signals to a plurality of signal lines SL and main signal transmission lines MSL1 to MSL4 are installed, ) Are installed after the completion of all inspection processes.

A plurality of first shorting bars (SB1) are formed in the first shorting bar area (103). These first shorting bars SB prevent the damage of the thin film transistor formed in the pixel by discharging the static electricity generated in the signal lines SL and main signal transmission lines MSL1 to MSL4 to the outside. In addition, the first shorting bars SB also serve to supply the pixels with various test signals necessary for detecting defective pixels. This first shorting bar region 103 is removed from the substrate 100 after the final inspection. For example, this first shorting bar region 103 is removed by cutting the substrate 100 along the first scribing line SCL of FIG.

A plurality of second shorting bars (SB2) are formed in the second shorting bar area (103). These second shorting bars SB prevent the damage of the thin film transistor formed in the pixel by discharging the static electricity generated in the signal lines SL and main signal transmission lines MSL1 to MSL4 to the outside. In addition, the second shorting bars SB serve to supply necessary test signals to the pixels to detect defective pixels. This second shorting bar region 104 is removed from the substrate 100 after the final inspection. For example, this second shorting bar region 104 is removed by cutting the substrate 100 along the second scribing line SCL of FIG.

The structure shown in FIG. 8 is designed to check whether the signal lines SL are short-circuited or disconnected. To this end, one of the two signal lines SL adjacent to each other is connected to the main signal line SL One of the signal lines SL is connected to one of the lines MSL1 to MSL4 while the other signal line SL is maintained in a floating state not connected to any line.

That is, the n-th signal lines SL among the plurality of signal lines SL are kept in the floating state, while the remaining signal lines SL except for the n-th signal lines SL are kept in the floating state, To the transmission lines MSL1 and MSL3 or to the second and fourth main signal transmission lines MSL2 and MSL4. Here, n is 2m-1 (m is a natural number) or 2m. For example, as shown in FIG. 8, the odd-numbered signal lines SL among the plurality of signal lines SL are not connected to anywhere and are kept in a floating state. On the other hand, the respective one ends of the even-numbered signal lines SL are alternately connected to the first and second main signal transmission lines MSL1 and MSL2, and the other ends thereof are connected to the third and fourth main signal transmission lines MSL3 , And MSL4.

The first to fourth main signal transmission lines MSL1 to MSL4 and the first and second shorting bars SB1 and SB2 may be made of a gate metal conventionally used for manufacturing a gate line. This gate metal is the same as the material described above in the first embodiment.

The signal lines SL can be used as the source / drain metal conventionally used for the fabrication of data lines. This data metal is the same as the material described above in the first embodiment.

The first to fourth main signal transmission lines MSL1 to MSL4 and the first and second shorting bars SB1 and SB2 are formed by a single pattern process on the same layer with the same metal material.

The plurality of signal lines SL are formed in one patterning process on the same layer with the same metal material.

The first to fourth main signal transmission lines MSL1 to MSL4 and the signal lines SL are located on different layers with the gate insulating film GI interposed therebetween.

The nth signal lines SL (for example, odd signal lines SL) among the signal lines SL are not connected to the first to fourth main signal transmission lines MSL1 to MSL4 . That is, the nth signal lines SL are formed on the gate insulating film GI in a floating state, and intersect with the first to fourth main signal transmission lines MSL1 to MSL4. On the other hand, the n + 1th signal lines SL (for example, even signal lines SL) are connected to the first and third main signal transmission lines MSL1 and MSL2 through contact holes passing through the gate insulating film GI. , MSL2, or the second and fourth main signal transmission lines MSL2, MSL4.

According to this structure, even if a plurality of signal lines SL are located close to each other, it is possible to accurately check whether the signal lines SL are individually disconnected or short-circuited. That is, since the signal lines SL adjacent to each other have different electrical connections, the resistance between the neighboring signal lines SL becomes different from each other. In other words, since the resistance of the signal line SL in the floating state is different from the resistance of the signal line SL connected to any one of the main signal transmission lines, the same voltage is applied to one end of the adjacent signal lines SL A large difference occurs between the output test signals OIS detected from the other end of the adjacent signal lines SL. Therefore, even if noise due to signal interference occurs between adjacent signal lines SL, the difference between the two output test signals OIS is large, so that the output test signal OIS can be detected accurately from each signal line SL . Therefore, in the present invention, it is possible to accurately determine whether each signal line SL is short-circuited or disconnected by individually analyzing the sizes of the output test signals OIS detected from the signal lines SL.

Fig. 9 is a view showing the structure of the display panel after the step of inspecting the short-circuit and the disconnection of the signal lines SL.

In the structure of the display panel shown in FIG. 8, if there is no abnormality after the short-circuit and disconnection inspection processes of the signal lines SL are performed, a process of checking whether or not each pixel is defective is performed. For this purpose, a test signal must be supplied to the signal lines SL in a floating state. For this purpose, the signal lines SL in a floating state and the first and second shorting bars SB1 and SB2 ) Should be preceded.

9, the floating signal lines SL are electrically connected to the first and second shorting bars SB1 and SB2 through the first and second connecting lines CNL1 and CNL2, do.

The first and second connection lines CNL1 and CNL2 may be formed of any one of indium-tin-oxide (ITO) and molybdenum alloy (MoX).

A plurality of first and second connection lines CNL1 and CNL2 and the plurality of floating signal lines SL are located on different layers with a protective film PAS interposed therebetween. A plurality of first and second connection lines CNL1 and CNL2 and a plurality of first and second shorting bars SB1 and SB2 are formed on different layers with a gate insulating film GI and a protective film PAS therebetween. .

One end of the plurality of first connection lines CNL1 is connected to one end of the floating signal lines SL through a plurality of contact holes passing through the protective film PAS. The other ends of the plurality of first connection lines CNL1 are connected to the plurality of first shorting bars SB1 through a plurality of contact holes passing through the gate insulating film GI and the passivation film PAS.

One end of the plurality of second connection lines CNL2 is connected to the other end of the floating signal lines SL through a plurality of contact holes passing through the protection film PAS. The other end of the plurality of second connection lines CNL2 is connected to the plurality of second shorting bars SB2 through a plurality of contact holes passing through the gate insulating film GI and the passivation film PAS.

In the second embodiment of the present invention, the first main signal transmission line MSL1 and the third main signal transmission line MSL3 transmit the same voltage, i.e., the first driving voltage, after the final inspection. Similarly, in the second embodiment, the second main signal transmission line MSL2 and the fourth main signal transmission line MSL4 transmit the same voltage, that is, the second driving voltage VSS after the final inspection.

The display panel for the display device according to the second embodiment of the present invention is also inspected in the same manner as that according to the first embodiment.

On the other hand, if it is judged that there is no abnormality in the display panel after the inspection process of the defectiveness of the pixel as shown in FIG. 2 is completed, the subsequent process in which the data driver is attached to the display panel proceeds. This will be described in detail with reference to the drawings.

10A and 10B are views for explaining a process of attaching a data driver to a display panel according to the first embodiment of the present invention.

First, as shown in Fig. 10A, the substrate 100 is cut along the scribing line SCL. Then, the substrate 100 is separated into two along the scribe line SCL. At this time, a portion of the connection line (CNL) located at the intersection of the scribing line (SCL) is cut off. At this time, of the two substrate portions, the substrate portion on which the shorting bars SB are formed is discarded, and only the portion of the substrate 100 on which the display region 101 is formed is used in the subsequent process.

Next, as shown in Fig. 10B, a data driver DD is attached to the cut-out portion side of the substrate 100 on which the display region 101 is formed. The data driver DD may be attached to a substrate in the form of a TCP (Tape Carrier Package). At this time, the output terminals OT of the data driver DD are individually connected to each of the connection lines CNL remaining on the cut-off side. Accordingly, the data driver DD and the signal lines SL in a floating state are electrically connected to each other through the connection lines CNL. Here, the signal lines SL in the floating state are data lines for transmitting data signals to the pixels.

Here, as described above, the connection lines CNL and the signal lines SL are located in different layers with the protective film PAS therebetween. Thus, one side of the connection lines CNL is electrically connected to one side of the signal lines SL in a floating state through the contact holes passing through the protection film PAS. The other side of the connection lines CNL is electrically connected to the output terminals OT.

Also, as described above, the signal line SL and the connection line CNL are formed of materials of different materials.

On the other hand, although not shown, the display panel of Fig. 9 can also be attached to the data driver DD through the same process as shown in Figs. 10A and 10B. This will be described in detail as follows.

11A to 11B are views for explaining a process of attaching a data driver to a display panel according to a second embodiment of the present invention.

First, as shown in Fig. 11A, the substrate 100 is cut along the first and second scribing lines SCL1 and SCL2. Then, the substrate 100 is separated into three portions along the first and second scribing lines SCL1 and SCL2. At this time, the first connection line CNL1 located at the intersection with the first scribing line SCL1 is cut off, and the second connection line CNL2 located at the intersection of the second scribing line SCL2, The part is cut off. At this time, the portion of the substrate on which the first and second shorting bars SB1 and SB2 are formed is discarded, and only the portion of the substrate 100 on which the display region 101 is formed is used in the subsequent process.

Then, as shown in Fig. 11B, a data driver DD is attached to the side of the upper side of the substrate 100 on which the display region 101 is formed. The data driver DD may be attached to a substrate in the form of a TCP (Tape Carrier Package). At this time, the output terminals OT of the data driver DD are individually connected to each of the first connection lines CNL1 remaining on the cut-off side. Accordingly, the data driver DD and the signal lines SL in a floating state are electrically connected to each other through the first connection lines CNL1. Here, the signal lines SL in the floating state are data lines for transmitting data signals to the pixels.

Here, as described above, the first connection lines CNL1 and the signal lines SL are located in different layers with the protective film PAS therebetween. Thus, one side of the first connection lines CNL1 is electrically connected to one side of the signal lines SL in a floating state through the contact holes passing through the protective film PAS. The other side of the connection lines CNL is electrically connected to the output terminals OT.

Also, as described above, the signal line SL and the first connection line CNL1 are formed of materials of different materials.

Further, the second connection lines CNL2 and the signal lines SL are located in different layers with the protective film PAS therebetween. Accordingly, one side of the second connection lines CNL2 is electrically connected to the other side of the signal lines SL in a floating state through the contact holes passing through the protective film PAS.

Also, as described above, the signal line SL and the second connection line CNL1 are formed of materials of different materials.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

100: substrate 101: display area
102: Non-display area 103: Shoting area
SB: Shotinba SL: Signal line
MSL #: Main # signal transmission line SCL: Scribing line

Claims (29)

A substrate on which a plurality of signal lines are formed;
Wherein one of the signal lines adjacent to each other is connected to at least one of the main signal transmission lines and the other signal line is in a floating state. The method according to claim 1,
The nth signal lines among the plurality of signal lines are in a floating state;
Signal lines other than the n-th signal lines are connected to the main signal transmission line; And,
Wherein n is 2m < -1 > (m is a natural number) or 2m. 3. The method of claim 2,
The main signal transmission line and the plurality of signal lines are located in different layers with a gate insulating film therebetween;
And the signal lines other than the n-th signal lines are connected to the main signal transmission line through a contact hole passing through the gate insulating layer. The method of claim 3,
Wherein the substrate is divided into a display region in which the pixels are formed, a non-display region in which driving integrated circuits for supplying signals for driving the pixels are mounted, and a plurality of shorting bars in which a plurality of shorting bars are to be formed;
The plurality of shorting bars are formed on the same layer as the main signal transmission line; And,
And each of the nth signal lines is connected to the plurality of shorting bars through a plurality of connection lines. 5. The method of claim 4,
The plurality of connection lines and the plurality of signal lines are located in different layers with a protective film interposed therebetween;
The plurality of connection lines and the plurality of shorting bars are located in different layers with the gate insulating film and the protective film interposed therebetween;
One side of the plurality of connection lines is connected to the nth signal lines through a plurality of contact holes passing through the protection film;
And the other side of the plurality of connection lines is connected to the plurality of shorting bars through a plurality of contact holes passing through the gate insulating film and the protective film. 6. The method of claim 5,
The main signal transmission line and the plurality of shorting bars are formed of materials of the same material;
The plurality of signal lines are formed of materials of the same material;
The plurality of connection lines are formed of materials of the same material; And,
Wherein the main signal transmission line, the signal line, and the connection line are formed of materials of different materials. delete The method according to claim 1,
The main signal transmission line is divided into first and second main signal transmission lines; And,
and one side of each of the remaining signal lines except for the n-th signal lines is alternately connected to the first main signal transmission line and the second main signal transmission line. The method according to claim 1,
Further comprising a plurality of first connection lines for individually connecting between the output terminals of the data driver for outputting the data signals and the signal lines in the floating state. 10. The method of claim 9,
The plurality of first connection lines and the floating signal lines are located in different layers with a protective film interposed therebetween;
One side of the plurality of first connection lines is connected to the floating signal lines through a plurality of contact holes passing through the protection film; And,
And the other of the plurality of first connection lines is connected to the output terminals. delete delete delete delete 11. The method of claim 10,
Further comprising a plurality of second connection lines individually connected to the other side of the signal lines in the floating state. 16. The method of claim 15,
The plurality of second connection lines and the floating signal lines are located in different layers with a protective film interposed therebetween;
And one side of the plurality of second connection lines is connected to the other side of the signal lines in the floating state through a plurality of contact holes passing through the protective film. 17. The method of claim 16,
The signal lines in the floating state and the plurality of first and second connection lines are formed of different materials,
And the signal lines in the floating state are data lines. Preparing a substrate on which a plurality of signal lines for transmitting various signals necessary for pixels are formed;
Connecting any one signal line of two adjacent signal lines to at least one main signal transmission line and keeping any other signal line in a floating state;
Applying an input test signal to one side of the plurality of signal lines; And
And analyzing a waveform of an output test signal output from the other side of the plurality of signal lines to determine whether the plurality of signal lines are short-circuited or disconnected. 19. The method of claim 18,
The nth signal lines among the plurality of signal lines are in a floating state;
Signal lines other than the n-th signal lines are connected to the main signal transmission line; And,
Wherein n is 2m-1 (m is a natural number) or 2m. 20. The method of claim 19,
The main signal transmission line and the plurality of signal lines are located in different layers with a gate insulating film therebetween;
Wherein the signal lines other than the n-th signal lines are connected to the main signal transmission line through contact holes passing through the gate insulating layer. 21. The method of claim 20,
Wherein the input test signal is an input test signal in the form of a voltage. 22. The method of claim 21,
Wherein the step of analyzing the waveform of the output test signal output from the other side of the plurality of signal lines and determining whether the plurality of signal lines are short-
In a normal situation in which the signal lines are not short-circuited and disconnected, the peak peak voltages for each of the output test signals detected from the nth signal lines are averaged to calculate a peak average peak voltage, and the calculated peak average peak voltage Making a first reference voltage;
The lowest average peak voltage is calculated by averaging the lowest peak voltages detected from the signal lines other than the n-th signal lines in a normal situation where the signal lines are not short-circuited and disconnected, Setting a second reference voltage; And
And determining whether a signal line is short-circuited or disconnected based on a comparison result between the first and second reference voltages and an output detection signal of each signal line. 23. The method of claim 22,
In the step of judging whether the signal line is short-circuited or disconnected,
When it is determined that the difference between the highest peak voltage of the output detection signal detected from the n-th signal line and the first reference value is within a preset specific range, it is determined that there is no abnormality in the corresponding signal line, When the difference between the highest peak voltage of the detection signal and the first reference value is greater than the maximum value within the specified range described above, it is determined that the corresponding signal line is disconnected, and the output detection signal Determines that the corresponding signal line is shorted when the difference between the highest peak voltage of the signal line and the first reference value has a value smaller than the minimum value within the specified range described above; And,
Determines that there is no abnormality in the corresponding signal line when the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the n-th signal line and the second reference value is within a preset specific range, When the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the line and the second reference value has a value larger than the maximum value within the above-mentioned specified range, it is determined that the corresponding signal line is short- When the difference between the lowest peak voltage of the output detection signal detected from the signal line other than the signal line and the second reference value has a value smaller than the minimum value within the above-mentioned specified range, it is determined that the corresponding signal line is disconnected A method for detecting a defect in a signal line for a display device. 24. The method of claim 23,
Wherein the substrate is divided into a display region in which the pixels are formed, a non-display region in which driving integrated circuits for supplying signals for driving the pixels are mounted, and a plurality of shorting bars in which a plurality of shorting bars are to be formed;
The plurality of shorting bars are formed on the same layer as the main signal transmission line; And,
And connecting each of the nth signal lines to the plurality of shorting bars via a plurality of connection lines. delete 25. The method of claim 24,
The main signal transmission line and the plurality of shorting bars are formed of materials of the same material;
The plurality of signal lines are formed of materials of the same material;
The plurality of connection lines are formed of materials of the same material; And,
Wherein the main signal transmission line, the signal line, and the connection line are formed of materials of different materials. 27. The method of claim 26,
Wherein the connection line is formed of indium-tin-oxide or molybdenum metal compound (MoX). 19. The method of claim 18,
The main signal transmission line is divided into first and second main signal transmission lines; And,
and one side of each of the remaining signal lines except for the nth signal lines is alternately connected to the first main signal transmission line and the second main signal transmission line. 24. The method of claim 23,
Applying a current-type input test signal to one side of the plurality of signal lines to determine whether the signal line is short-circuited or disconnected;
A signal line connected to the signal line and a signal line connected to the signal line, the signal line being short-circuited or disconnected according to the input test signal of the current type, Further comprising the step of determining whether a short-circuit is present or absent.

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