TWI387803B - Display device capable of measuring an illuminance and widening a dynamic range of the measured illuminance - Google Patents

Description

Display device capable of measuring illuminance and expanding dynamic range of measured illuminance

The present invention relates to a display device that can measure illuminance and expand the dynamic range of the measured illuminance.

The present application is based on and claims the benefit of priority of Japanese Patent Application No. 2007- 296 912, filed on Nov. The entire content of the application is incorporated herein by reference.

There is a need to reduce the power consumption of a device having a display device. For a liquid crystal display device, a method of reducing power consumption is under study. The method reduces the brightness of a backlight when the ambient light of a display unit is low (for example, at night). It is considered that the power consumption of an organic electroluminescence display device can also be reduced by reducing the brightness of the illuminating pixels when the ambient illuminance is low (for example, at night). In particular, there is a proposal to arrange a photosensor circuit in an area around a display unit of one of the display devices and to use one of the photo sensor circuits to reduce the brightness of a backlight or pixel.

A liquid crystal display device each having a photosensor circuit separate from a display panel is disclosed in Japanese Unexamined Patent Publication No. Publication No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. No. However, this separation makes it difficult to form smaller or thinner devices. In order to solve this problem, a technique of fabricating a smaller or thinner liquid crystal display device by forming a photo sensor circuit in a display panel is disclosed in Japanese Laid-Open Patent Publication No. 2007-114315. Further, in the liquid crystal display device, the brightness of a backlight is controlled to accurately measure the illuminance.

Further, when the illuminance is measured by a device such as the above display device, the following operations are performed.

A pre-set count value is updated each time a level of a clock signal changes. A trigger signal is output at a time corresponding to the illuminance. When the trigger signal is output, the count value is sampled. The sampled count value corresponds to the illuminance.

If one of the changes in the level of the clock signal is short, the length of the period when the maximum count value becomes minimum is short. Thus, the count value can only represent a narrow range of one illuminance, such as a range from about 80 [1x] to about 1000 [1x] (for example). That is, the count value can indicate that the dynamic range of one of the illuminances is as narrow as about 10 times.

Therefore, the display device can be used only in a room in which, for example, the illuminance is low. Conversely, the device can only be used outdoors, for example, where the illuminance is high. Therefore, the convenience of the display device is broken.

The present invention has been made in view of the above circumstances. It is an object of the present invention to provide a display device that can measure illuminance and expand one of the dynamic ranges of measured illuminance.

A display device according to a first aspect of the present invention is characterized in that it comprises: a display unit having pixels; a photo sensor circuit having a capacitor and a photoelectric conversion element, the photoelectric conversion element being arranged according to one of the display units The illuminance discharges the capacitor; an arithmetic circuit that similarly reduces a data to a voltage between the electrodes of the capacitor and outputs a trigger signal if the data becomes equal to or less than a threshold; a clock signal generating circuit , which generates a clock signal whose cycle of changing the level gradually becomes longer; a counter circuit that updates a count value when each of the levels of the clock signal changes; and a sampling latch circuit The count value is sampled when the trigger signal is output.

In the first invention, since the cycle of changing the level of the clock signal is gradually lengthened, the dynamic range of one of the counted values of the sample is widened. That is, a wide dynamic range of illuminance can be measured.

A display device according to a second aspect of the present invention is characterized in that it comprises: a display unit having pixels; a photo sensor circuit having a capacitor and a photoelectric conversion element, the photoelectric conversion element being according to one of the display units The surrounding illuminance discharges the capacitor; an arithmetic circuit that similarly reduces a data to a voltage between the electrodes of the capacitor, and outputs a trigger signal if the data becomes equal to or less than a threshold; a clock a signal generating circuit, which generates a clock signal, the level of the clock signal periodically changes; a counter circuit that updates a count value when each of the levels of the clock signal changes; a sampling latch circuit And sampling the count value when the trigger signal is output; the value conversion circuit has a mapping table having a range of the sampled count values respectively associated with an output value, the value conversion circuit Configuring to find a range of the range of sampled count values in the range, and outputting an output value associated with the identified range; The larger the output value of the table, the narrower the associated range.

In the second invention, since the output value of the map is larger, the correlation range is narrower, and thus the dynamic range of one of the output values of the output is widened. That is, a wide dynamic range of illuminance can be measured.

First embodiment

In the liquid crystal display device according to the first embodiment, a pair of insulating and light-permeable substrates constitute a liquid crystal cell. A liquid crystal material sealed between the substrates forms a liquid crystal layer. Specifically, as illustrated in FIG. 1, in the liquid crystal display device 1, a liquid crystal layer 4 is formed between an array substrate 2 and a pair of substrates 3.

The array substrate 2 has an insulating and permeable substrate composed of glass and the like as a supporting substrate. On the support substrate, scan lines are formed almost in parallel and at equal intervals. Signal lines are formed almost orthogonal to the scan lines. A transparent interlayer insulating film is formed between the scan line and the signal line to electrically insulate the scan line from the signal line. A thin film transistor is formed as a switching element and the like in the vicinity of each intersection of the scanning line and the signal line.

In the array substrate 2, the pixel electrodes are formed similar to a matrix. Each of the pixel electrodes is electrically connected to a corresponding switching element via a through hole formed in the insulating film of the layer. Note that, as described earlier, although a scan line, a signal line, a switching element such as a thin film transistor, an interlayer insulating film, and the like are disposed between the support substrate of the array substrate and the pixel electrode, it is Omitted. Further, although an oriented film can be formed on all of the pixel electrodes, the alignment film is also omitted.

The counter substrate 3 has an insulating and permeable substrate composed of glass and the like, which also serves as a supporting substrate. On the side of one of the opposed substrates 3 facing the liquid crystal layer 4, color filter layers 5 each corresponding to the pixels are formed. A transparent counter electrode 6 (which is composed of a transparent and electrically conductive material such as indium tin oxide and the like) is formed on all of the color filter layers 5. Each color filter layer is a resin layer colored by a dye and a pigment. Each pixel includes, for example, a red color filter layer, a green color filter layer, and a blue color filter layer. Although omitted in the figure, to improve the contrast ratio and the like, a black matrix layer is formed to fill the regions surrounding each of the color filter layers of the corresponding pixels.

The polarizing plates 7, 8 are respectively disposed on one of the back sides of the array substrate 2 and one of the front sides of the opposite substrate 3. The image display is performed using a backlight 9 disposed on the back side as a light source.

As illustrated in Fig. 2, a black matrix BM is formed in a shape similar to an area surrounding a picture frame around a display unit A composed of pixels to prevent light leakage from the backlight. An external large integrated circuit device 10 is mounted on the array substrate 2 by a wafer-on-wafer method outside the region where the black matrix BM is formed.

The above is a basic composition of one of the liquid crystal display devices 1.

Further, in the liquid crystal display device 1, an opening 11 is formed in the black matrix BM, and a photo sensor circuit 12 for measuring a peripheral illuminance is mounted on the array substrate facing the opening 11. A photo sensor circuit 13 for measuring a background current is mounted on the array substrate shielded under the black matrix BM.

FIG. 3 illustrates a circuit diagram of each of the photo sensor circuits 12 and 13. The photo sensor circuits 12 and 13 are identical to each other, and each photosensor circuit has a photodiode 55 and a capacitor 56. The photodiode 55 of the photo sensor circuit 12 is a photoelectric conversion element that converts light around the display unit A into an electrical signal.

In each photosensor circuit, a predetermined voltage Vprc is precharged for capacitor 56 for a predetermined time. In the photo sensor circuit 12, a photocurrent flows in the photodiode 55 according to one of the illuminances around one of the display units A. In the photo sensor circuit 13, a background current flows in the photodiode 55.

4 illustrates a block diagram of a portion of an external large integrated circuit device 10 and photosensor circuits 12 and 13 and an additionally mounted photo sensor circuit 14. For example, the photo sensor circuit 14 is used to measure the illuminance of the backlight 9, and the photo sensor circuit 14 only receives light from the backlight 9.

The external large integrated circuit device 10 has a precharge circuit 111, an arithmetic circuit 112, a clock signal generating circuit 113, a counter circuit 114, a sampling latch circuit 115, and a parallel/serial conversion circuit 116.

First, the precharge circuit 111 supplies a constant voltage Vprc to the photo sensor circuits 12, 13, and 14. At a predetermined time during which the voltage Vprc is supplied, the precharge circuit 111 supplies a start signal SRT, (for example, a pulse signal) to the photo sensor circuits 12, 13 and 14, the clock signal generating circuit 113, and the counter. Circuit 114 and parallel/serial conversion circuit 116.

Each photosensor circuit 12, 13 and 14 can precharge the capacitor 56 with a voltage Vprc. Specifically, for example, the photo sensor circuit connects a wire to which the voltage Vprc is applied and one of the positive electrodes of the capacitor by turning on an analog switch composed of a thin film transistor and the like (not illustrated). Therefore, a voltage between the electrodes of the capacitor 56 is equal to the voltage Vprc.

Each of the photo sensor circuits 12, 13 and 14 turns off the conductor of the applied voltage Vprc and the capacitor 56 by turning off the analog switch, for example, when the start signal SRT is supplied. A photocurrent having an amount of illuminance around one of the display units A flows in the photodiode 55 of the photo sensor circuit 12. This background current flows in the photodiode 55 of the photo sensor circuit 13. A photocurrent having an amount of illuminance according to one of the backlights 9 flows in the photodiode 55 of the photo sensor circuit 14. Therefore, each capacitor 56 is discharged and the voltage between the electrodes is lowered. The photo sensor circuits 12, 13 and 14 respectively output the voltages of the positive electrodes of the capacitors into electrical signals Photo 1, Photo 2 and Photo 3.

Arithmetic circuit 112 produces a level having a predetermined amount of data and similarly reducing the data to a lower level of electrical signal Photo 1 from photosensor circuit 12 due to discharge of capacitor 56. At this time, the arithmetic circuit 112 is based on the level of the electrical signal Photo 2 from the photosensor circuit 13 for measuring the background current and the electrical signal from the photosensor circuit 14 for measuring the illuminance of the backlight 9. Photo 3 is the standard to correct the data. Note that the arithmetic circuit 112 operates to similarly reduce the corrected data to the level of the electrical signal Photo 1.

The arithmetic circuit 112 memorizes a threshold value in advance and supplies a trigger signal TRG (for example, a pulse signal) to the sampling latch circuit 115 when the corrected data becomes equal to or smaller than the threshold value.

The clock signal generating circuit 113 supplies a clock signal CLK to the counter circuit 114 and the parallel/serial conversion circuit 116.

As illustrated in FIG. 5, the clock signal generating circuit 113 generates a clock signal CLK whose cycle of changing the level is gradually lengthened, for example, starting at a time T1, and the time T1 is providing a start signal. The time after SRT is T0. The clock signal generating circuit 113 supplies the thus generated clock signal CLK to the counter circuit 114 and the parallel/serial conversion circuit 116.

In FIG. 4, the counter circuit 114 decrements a count value CNT here. The counter circuit 114 redesigns the value CNT when the start signal SRT is supplied. Here, the false design value CNT is a 4-bit value. The count value CNT is reset to 16, which is the maximum value of a range that can be represented by a 4-bit. Then, the count value CNT1 is decremented by 1 until it becomes 1, which is the minimum value of the range.

The counter circuit 114 decrements the count value CNT each time the level of the clock signal CLK changes. Whenever the count value is decremented, the counter circuit 114 supplies the count value CNT to the sampling latch circuit 115 by the parallel signal. Counter circuit 114 also does this when redesigning the value CNT.

The sampling latch circuit 115 samples the count value CNT when the trigger signal TRG is output. The sampling latch circuit 115 supplies the sampled count value CNT to the parallel/serial conversion circuit 116 by a parallel signal. The parallel/serial conversion circuit 116 converts the parallel signals into a serial signal and outputs the serial signal.

As illustrated in FIG. 6, the count value CNT output by the serial signal is a 4-bit value, and the count value CNT is included in a range from 1 to 16 and corresponds to the illuminance.

For example, the lower the illuminance, the more progressive the level of the electrical signal Photo 1 illustrated in FIG. 4 is reduced. Therefore, the lower the illuminance, the later the trigger signal TRG is provided. Therefore, the lower the illuminance, the lower the count value CNT that is output.

In the first embodiment, for example, if the illuminance is about 90 [1x], the count value CNT is 1. For example, if the illuminance is about 90000 [1x], the count value CNT is 16. That is, the count value CNT can represent a dynamic range of about 1000 times the illuminance.

A comparative example will be explained below. In this comparative example, the clock signal generating circuit 113 generates a clock signal CLK' as illustrated in Fig. 5, which changes the level of the cycle constant. The clock signal generating circuit 113 supplies the clock signal CLK' to the counter circuit 114 and the parallel/serial conversion circuit 116.

Since the cycle of the change level of the clock signal CLK' is constant in the comparative example and the cycle of the clock signal CLK is gradually lengthened in the first embodiment, the count value CNT is changed from 16 to 1. The length of time is shorter in this comparative example than in the first embodiment.

Therefore, the count value CNT can represent the above-described dynamic range of about 1000 times the illuminance in the first embodiment, and the count value CNT may represent, for example, only about 10 times the dynamic range in the comparative example.

As illustrated in FIG. 6, in the comparative example, for example, if the illuminance is about 70 [1x], the count value CNT is 1. For example, if the illuminance is about 10000 [1x], the count value CNT is 16.

In contrast, in the first embodiment, as described above, for example, if the illuminance is about 90 [1x], the count value CNT is 1. For example, if the illuminance is about 90000 [1x], the count value CNT is 16.

In the first embodiment, since the cycle of the change level of the clock signal becomes long, the linearity between the illuminance and the count value represented by the logarithm in Fig. 6 can be perfect.

Therefore, according to the first embodiment, since the cycle of the change level of the clock signal becomes longer, the dynamic range of one of the sampled count values CNT becomes wider. That is, a wide dynamic range of illuminance can be measured. Therefore, it is possible to measure an illuminance in a dark room or outdoors in a clear weather.

Note that the arithmetic circuit 112 does not need to correct the data, although the arithmetic circuit 112 does this in the first embodiment. In this case, the photo sensor circuit 13 and the photo sensor circuit 14 are unnecessary.

Second embodiment

As illustrated in FIG. 7, the liquid crystal display device 1A according to the second embodiment of the present invention is similar to the liquid crystal display device 1 according to the first embodiment. In the second embodiment, the same components are assigned the same reference numerals. The same explanation will be omitted. In the following, the differences will be mainly explained.

In the liquid crystal display device 1A, a black matrix BM is formed in a region similar in shape to a picture frame surrounding the display unit A. An external large integrated circuit device 10A is mounted outside the area where the black matrix BM is formed.

The photo sensor circuits 121, 122, and 123 are disposed in a region in which the black matrix BM is formed. Each of the photo sensor circuits 121, 122, and 123 has a photo sensor circuit and an arithmetic circuit. The photo sensor circuits 121, 122, and 123 respectively output trigger signals TRG1, TRG2, and TRG3, each of which is similar to the trigger signal TRG. Each of the trigger signals is supplied to the external large integrated circuit device 10A. One of the photo sensor circuits 121, 122, and 123 receives light, for example, from the backlight 9, and the remaining photo sensor circuit receives light from around the display area A.

As illustrated in FIG. 8, the external large integrated circuit device 10A has a precharge circuit 111, a clock signal generation circuit 113A, counter circuits 1141, 1142, and 1143, sample latch circuits 1151, 1152, and 1153, and a value conversion circuit 1171. 1,172 and 1173. Each of the photo sensor circuits 121, 122, and 123 has a photo sensor circuit 12 and an arithmetic circuit 112.

The precharge circuit 111 first supplies a constant voltage Vprc to each of the photo sensor circuits 121, 122, and 123. At a predetermined time during which the voltage Vprc is supplied, the precharge circuit 111 supplies a start signal SRT to the photo sensor circuits 121, 122, and 123, and the counter circuits 1141, 1142, and 1143.

Each photosensor circuit precharges capacitor 56 with a voltage Vprc. A voltage between the electrodes of each capacitor is equal to the voltage Vprc.

Each photosensor circuit turns off the wire of the applied voltage Vprc and the capacitor 56 when the start signal SRT is supplied. A photocurrent having an amount of illuminance according to the illuminance of one of the display units A or one of the light from the backlight 9 flows in each of the photodiodes 55. Therefore, each capacitor 56 is discharged and the voltage between the electrodes is lowered. The photo sensor circuits 121, 122, and 123 respectively output the voltages of the positive electrodes of the capacitors into electrical signals Photo 11, Photo 12, and Photo 13.

Each arithmetic circuit 112 produces a data having a predetermined amount of data and similarly gradually reduces the data to a level at which the electrical signal from the photosensor circuit 12 is lowered by the discharge of the capacitor.

Each of the arithmetic circuits 112 pre-stores a threshold value and when the corresponding data becomes equal to or less than the threshold value, the arithmetic circuits provide the trigger signals TRG1, TRG2, and TRG3 (eg, one pulse signal) to the sampling locks, respectively. The circuits 1151, 1152 and 1153 are stored.

The clock signal generating circuit 113A supplies the clock signal CLK' (which is a clock-level signal CLK' whose level is periodically changed) illustrated in FIG. 5 to the counter circuits 1141, 1142, and 1143.

The counter circuits 1141, 1142, and 1143 increment the count values CNT1, CNT2, and CNT3, respectively. Each counter circuit resets the corresponding count value when the start signal SRT is supplied. Here, it is assumed that each count value is a 16-bit value. The count value is reset to zero, which is the minimum of the range over which a 16-bit value can be represented. Then, the count value is incremented by 1 until it becomes 65535, which is the maximum value of the range.

Each counter circuit increments the corresponding count value each time the level of the clock signal CLK changes. Each timer circuit provides the count value to the corresponding sample latch circuit whenever the count value is incremented. The counter circuit also does this when redesigning the values.

Each sampling latch circuit samples the corresponding count value when outputting the corresponding trigger signal. The sampling latch circuit supplies the sampled count values CNT1, CNT2, and CNT3 to the value conversion circuits 1171, 1172, and 1173, respectively, by parallel signals.

The value conversion circuits 1171, 1172, and 1173 convert the count values CNT1, CNT2, and CNT3 into output values OUT1, OUT2, and OUT3, respectively, and output the output values.

As illustrated in Figure 9, each value conversion circuit has a mapping table having a plurality of ranges of respective count values each associated with an output value.

If any of the sampled count values is provided to the corresponding value conversion circuit, the value conversion circuit first finds a range including the sampled count value in the ranges of the corresponding mapping table. Then, the value conversion circuit outputs the output value associated with the found range as an output value OUT1, OUT2 or OUT3 by the parallel signal.

The larger the output value of the mapping table, the smaller the count value included in the associated range. And the larger the output value of the mapping table, the narrower the correlation range.

The output value is a 4-bit value, as is the output value illustrated in Figure 6. The output value is included in a range from 0 to 15, and corresponds to the illuminance.

For example, the lower the illuminance, the more progressive the level of the electrical signals Photo 11, Photo 12, and Photo 13 illustrated in FIG. Therefore, the lower the illuminance, the later the trigger signal is provided. And the count values are incremented. Therefore, the lower the illuminance, the larger the count value sampled.

Since the output value of the mapping table is larger, the count value included in the associated range is smaller, so the lower the illuminance, the lower the output value. That is, the output values correspond to the illuminance.

As with the output value CNT illustrated in Figure 6, each output value can also represent a dynamic range of about 1000 times the illuminance.

Here, a comparative example of a range having the same width in a similar mapping table will be explained.

For example, assuming a width of 100, a perfect linearity between the illuminance expressed by the logarithm and the output value can be obtained provided that the output value is equal to or greater than 10 and equal to or less than 15.

The maximum count value is 1600 (= 16 times 100) in the comparative example and the maximum count value is 65535 in the second embodiment. Therefore, the comparative example cannot represent a low illuminance corresponding to a count value greater than 1600.

Thus, in this comparative example, the output value can represent a dynamic range of, for example, only about 10 times.

In contrast, as in the case of the count value in the first embodiment, the output value can represent a dynamic range of, for example, about 1000 times the illuminance in the second embodiment.

In addition, since the output value of the mapping table is larger, the associated range is narrower, so the linearity between the illuminance and the output value can be perfect within a wide range of the illuminance.

Therefore, according to the second embodiment, since the output value of the map is larger, the range of the correlation is narrower, and thus the dynamic range of one of the output values becomes awkward. That is, a wide dynamic range of illuminance can be measured. Therefore, it is possible to measure an illuminance in a dark room or outdoors in a clear weather.

Note that the present invention is not limited to the first or second embodiment. Each liquid crystal display device can be changed as long as it has the characteristics of the present invention.

For example, although the clock signal CLK' having a constant change level cycle is used in the liquid crystal display device according to the second embodiment, the cycle in which the level is changed can be gradually lengthened as in the first embodiment. The clock signal CLK.

The mapping tables can be individually set such that the difference between the output values due to differences in characteristics of the photoelectric conversion elements in the photosensor circuit can be within a tolerance.

If the liquid crystal display device according to the second embodiment is mass-produced, the mapping table can be different for each display device, so that the difference in performance of the illuminance expression between the liquid crystal display devices can be within a tolerance. .

The liquid crystal display device in the first or second embodiment is merely an example of a display device according to the present invention. The display device can be a display device using organic electroluminescence. In this case, the only choice that must be made is a composition that is similar to the composition used for illumination metrics in each embodiment.

Although in the first or second embodiment, the photodiode 55 is used as a photoelectric conversion element that discharges a capacitor charged in the photosensor circuit in accordance with light around the display unit, the photoelectric conversion element Can be a photoelectric transistor.

1. . . Liquid crystal display device

1A. . . Liquid crystal display device

2. . . Array substrate

3. . . Counter substrate

4. . . Liquid crystal layer

5. . . Color filter layer

6. . . Transparent counter electrode

7. . . Polarizer

8. . . Polarizer

9. . . Backlight

10. . . External large integrated circuit device

10A. . . External large integrated circuit device

11. . . Opening

12. . . Photosensor circuit

13. . . Photosensor circuit

14. . . Photosensor circuit

55. . . Photodiode

56. . . Capacitor

111. . . Precharge circuit

112. . . Arithmetic circuit

113. . . Clock signal generation circuit

113A. . . Clock signal generation circuit

114. . . Counter circuit

115. . . Sampling latch circuit

116. . . Serial conversion circuit

121. . . Photosensor circuit

122. . . Photosensor circuit

123. . . Photosensor circuit

1141. . . Counter circuit

1142. . . Counter circuit

1143. . . Counter circuit

1151. . . Sampling latch circuit

1152. . . Sampling latch circuit

1153. . . Sampling latch circuit

1171. . . Value conversion circuit

1172. . . Value conversion circuit

1173. . . Value conversion circuit

A. . . Display unit

BM. . . Black matrix

1 is a cross-sectional view showing a liquid crystal display device according to a first embodiment of the present invention;

Figure 2 is a plan view illustrating a liquid crystal display device of Figure 1;

3 is a circuit diagram illustrating a photosensor circuit included in the liquid crystal display device of FIG. 1;

4 is a block diagram showing a portion of an external large integrated circuit device and a photosensor circuit included in the liquid crystal display device of FIG. 1;

FIG. 5 is a diagram illustrating a clock used in the liquid crystal display device of FIG. 1.

6 is a diagram illustrating a relationship between one illuminance measured in the liquid crystal display device of FIG. 1 and a count value used in the device, and a illuminance measured in a device of a comparative example. a relationship between the count values used in the device;

Figure 7 is a plan view showing a liquid crystal display device according to a second embodiment of the present invention;

Figure 8 is a block diagram showing a portion of an external large integrated circuit device and a photosensor circuit included in the liquid crystal display device of Figure 7;

Figure 9 illustrates an exemplary content of a mapping table used in the liquid crystal display device of Figure 7.

(no component symbol description)

Claims (3)

A display device comprising: a display unit having a pixel; a photo sensor circuit having a capacitor and a photoelectric conversion element, the photoelectric conversion element discharging the capacitor according to an illumination degree around one of the display units; a circuit that similarly reduces data with a voltage between electrodes of the capacitor that is reduced by the discharge of the capacitor, and outputs a trigger signal if the data becomes equal to or less than a threshold; generating a clock signal a clock signal generating circuit, the cycle of changing the level of the clock signal is gradually lengthened; a counter circuit updating a count value when each of the levels of the clock signal is changed; and a sampling latch circuit And it samples the count value when the trigger signal is output. A display device comprising: a display unit having a pixel; a photo sensor circuit having a capacitor and a photoelectric conversion element, the photoelectric conversion element discharging the capacitor according to an illumination degree around one of the display units; a circuit that similarly reduces data with a voltage between electrodes of the capacitor that is reduced by the discharge of the capacitor, and outputs a trigger signal if the data becomes equal to or less than a threshold; generating a clock signal Clock signal generating circuit, the clock signal The level is periodically changed; a counter circuit updates a count value each time the level of the clock signal changes; a sampling latch circuit that samples the count value when the trigger signal is output And a value conversion circuit having a mapping table having a plurality of ranges of count values each of said samples associated with an output value, the value conversion circuit being configured to find in the ranges An output value including a range of the sampled count value and an output associated with the found range; wherein the larger the output value of the map, the narrower the associated range. The display device of claim 1 or claim 2, wherein the photo sensor circuit is formed in an area similar to a picture frame of an array substrate in which the display unit is formed, the picture frame area surrounding the display Around the unit.