TWI385665B - 非揮發性記憶體系統及程式化非揮發性儲存裝置之方法 - Google Patents

非揮發性記憶體系統及程式化非揮發性儲存裝置之方法 Download PDF

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Publication number
TWI385665B
TWI385665B TW096137701A TW96137701A TWI385665B TW I385665 B TWI385665 B TW I385665B TW 096137701 A TW096137701 A TW 096137701A TW 96137701 A TW96137701 A TW 96137701A TW I385665 B TWI385665 B TW I385665B
Authority
TW
Taiwan
Prior art keywords
program voltage
state
programmed
applying
data
Prior art date
Application number
TW096137701A
Other languages
English (en)
Chinese (zh)
Other versions
TW200837760A (en
Inventor
Yan Li
Fanglin Zhang
Toru Miwa
Farookh Moogat
Original Assignee
Sandisk Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/548,267 external-priority patent/US7450426B2/en
Priority claimed from US11/548,264 external-priority patent/US7474561B2/en
Application filed by Sandisk Technologies Inc filed Critical Sandisk Technologies Inc
Publication of TW200837760A publication Critical patent/TW200837760A/zh
Application granted granted Critical
Publication of TWI385665B publication Critical patent/TWI385665B/zh

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486—Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
TW096137701A 2006-10-10 2007-10-08 非揮發性記憶體系統及程式化非揮發性儲存裝置之方法 TWI385665B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/548,267 US7450426B2 (en) 2006-10-10 2006-10-10 Systems utilizing variable program voltage increment values in non-volatile memory program operations
US11/548,264 US7474561B2 (en) 2006-10-10 2006-10-10 Variable program voltage increment values in non-volatile memory program operations

Publications (2)

Publication Number Publication Date
TW200837760A TW200837760A (en) 2008-09-16
TWI385665B true TWI385665B (zh) 2013-02-11

Family

ID=39046765

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096137701A TWI385665B (zh) 2006-10-10 2007-10-08 非揮發性記憶體系統及程式化非揮發性儲存裝置之方法

Country Status (3)

Country Link
KR (1) KR101013200B1 (ko)
TW (1) TWI385665B (ko)
WO (1) WO2008045805A1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5039079B2 (ja) * 2009-03-23 2012-10-03 株式会社東芝 不揮発性半導体記憶装置
US8953386B2 (en) 2012-10-25 2015-02-10 Sandisk Technologies Inc. Dynamic bit line bias for programming non-volatile memory
EP4181131B1 (en) * 2021-11-16 2024-04-03 Samsung Electronics Co., Ltd. Operation method of memory device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1249842A1 (en) * 2001-04-10 2002-10-16 STMicroelectronics S.r.l. Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude
EP1271553A2 (en) * 2001-06-27 2003-01-02 SanDisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory in multiple-data states
US20040240269A1 (en) * 2001-09-17 2004-12-02 Raul-Adrian Cernea Latched programming of memory and method
WO2005041206A2 (en) * 2003-10-29 2005-05-06 Saifun Semiconductors Ltd. Method, system and circuit for programming a non-volatile memory array
US20050157555A1 (en) * 2004-01-21 2005-07-21 Tsuyoshi Ono Nonvolatile semiconductor memory device
US6958934B2 (en) * 2002-01-17 2005-10-25 Macronix International Co., Ltd. Method of programming and erasing multi-level flash memory
EP1615227A2 (en) * 1996-03-18 2006-01-11 Kabushiki Kaisha Toshiba Multilevel semiconductor memory device
US20060104120A1 (en) * 2004-11-16 2006-05-18 Hemink Gerrit J High speed programming system with reduced over programming

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE449465T1 (de) * 2001-04-12 2009-12-15 Juniper Networks Inc Zugangsrauschunterdrückung in einem digitalen empfänger
US7173859B2 (en) * 2004-11-16 2007-02-06 Sandisk Corporation Faster programming of higher level states in multi-level cell flash memory
US7301817B2 (en) * 2005-10-27 2007-11-27 Sandisk Corporation Method for programming of multi-state non-volatile memory using smart verify

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1615227A2 (en) * 1996-03-18 2006-01-11 Kabushiki Kaisha Toshiba Multilevel semiconductor memory device
EP1249842A1 (en) * 2001-04-10 2002-10-16 STMicroelectronics S.r.l. Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude
EP1271553A2 (en) * 2001-06-27 2003-01-02 SanDisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory in multiple-data states
US6807095B2 (en) * 2001-06-27 2004-10-19 Sandisk Corporation Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements
US20040240269A1 (en) * 2001-09-17 2004-12-02 Raul-Adrian Cernea Latched programming of memory and method
US6958934B2 (en) * 2002-01-17 2005-10-25 Macronix International Co., Ltd. Method of programming and erasing multi-level flash memory
WO2005041206A2 (en) * 2003-10-29 2005-05-06 Saifun Semiconductors Ltd. Method, system and circuit for programming a non-volatile memory array
US20050157555A1 (en) * 2004-01-21 2005-07-21 Tsuyoshi Ono Nonvolatile semiconductor memory device
US20060104120A1 (en) * 2004-11-16 2006-05-18 Hemink Gerrit J High speed programming system with reduced over programming

Also Published As

Publication number Publication date
TW200837760A (en) 2008-09-16
KR20090089310A (ko) 2009-08-21
KR101013200B1 (ko) 2011-02-10
WO2008045805A1 (en) 2008-04-17

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