TWI383484B - Lead-free quad flat leadframe, lead-free quad flat package unit, and method for fabricating the same - Google Patents

Description

Conductor frame with quadrilateral plane without lead, square plane non-lead package unit and preparation method thereof

The present invention relates to a tetragonal planar leadless package unit, and more particularly to a quad flat no-lead package unit having pins that enhance solder bonding strength.

The quadrilateral planar leadless package unit is a package unit for exposing the bottom surface of the wafer holder and the pin to the bottom surface of the encapsulant. Generally, the package unit is coupled to the printed circuit board by surface coupling technology, thereby forming a specific function. Circuit module. In the surface coupling process, the wafer pads and pins of the quad flat no-lead package unit are directly soldered to the printed circuit board.

For example, U.S. Patent Nos. 6,201,292 and 7,049,177 disclose a conventional quad flat no-lead package unit. The following is a description of a method for coupling a conventional quad flat unguided package unit to a printed circuit board in conjunction with FIG.

The conventional quad flat unguided package unit 100 includes the following components: (a) a lead frame 110 having a wafer holder 111 and a plurality of pins 113, the wafer holder 111 and the plurality of pins 113 having a first surface 120, respectively. And the opposite second surface 130; (b) the wafer 140 has an active surface 150 and an opposite inactive surface 160, the active surface 150 having a plurality of pads 151, wherein the inactive surface 160 of the wafer 140 is connected On the first surface 120 of the wafer holder 111; (c) a plurality of wires 170 electrically connected to the pads 151 and the pins 113, and the wires 170 are bonded to the pins 113 a surface 120; and (d) an encapsulant 180, The wafer 140, the wires 170 and the lead frame 110 are covered, but the wafer holder 111 and the second surface 130 of the plurality of pins 113 are exposed; wherein the second surface 130 of the wafer holder 111 is The second surface 130 of the pin 113 presents a plane.

The printed circuit board 190 includes a substrate 191, a ground portion 193, and a plurality of conductive portions 195. The grounding portion 193 is used as a placement area of the wafer holder 111 of the quad flat planar leadless package unit 100, and the area thereof is substantially equal to the area of the wafer holder; and the conductive portion 195 serves as an electrical connection point on the printed circuit board 190, and the area thereof It is approximately equal to the area of the exposed surface of each pin on the quad flat no-lead package unit.

Next, a soldering process is performed to apply the solder 197 on the surface of the ground portion 193 and the respective conductive portions 195. Then, the surface coupling process is performed to place the quad flat unguided package unit 100 on the printed circuit board 190, and the respective pins 113 and the wafer holders 111 are respectively aligned to the corresponding conductive portions 195 and the ground portions 193.

Finally, a solder-reflow process is performed to reflow the solder between each of the pins and the conductive portion and between the wafer holder and the ground, thereby completing the quadrilateral planar leadless package unit to the printed circuit Board coupling program.

However, due to the reflow process, the molten solder will condense toward the center, so that the solder after the reflow is slightly raised upward, so that the bonding area becomes smaller, and since the second surface of the wafer holder and the pin are Both surfaces are flat surfaces, and the only planar bonding also results in poor solder bonding strength, resulting in poor reliability.

Therefore, how to solve the problem caused by the above-mentioned conventional solder joint strength is poor, and to develop a novel quadrilateral planar leadless package unit, which is currently a problem to be solved.

In view of the above-mentioned shortcomings of the prior art, it is an object of the present invention to provide a quad flat no-lead package unit having a recess on the bottom surface of the pin to enhance the solder joint strength in the horizontal direction and the vertical direction.

In order to achieve the above and other objects, the present invention discloses a quad flat no-lead package unit, comprising: (a) a lead frame comprising a wafer holder and a plurality of pins, the wafer holder and the plurality of pins respectively having a first a surface and an opposite second surface; (b) a wafer having an active surface and an opposite inactive surface, the active surface having a plurality of pads, wherein the inactive surface of the wafer is placed first in the wafer holder (c) a plurality of wires electrically connected to the pads and the pins, and the wires are bonded to the first surfaces of the pins; and (d) an encapsulant covering the wafer The wire and the lead frame, but the second surface of the wafer holder and the plurality of pins are exposed; wherein the first surface of the outermost pin of the lead frame is formed with an extension portion and Extending away from the first surface, and forming a recess relative to the second surface for accommodating the solder when the quadrilateral planar leadless package unit is reflowed.

The invention also discloses a method for fabricating a quad flat no-lead package unit, comprising: providing a carrier board, the carrier board comprising a plurality of cutting lines defined on a surface of the carrier board, a plurality of bumps formed on the cutting line, and the a flat portion surrounded by a plurality of bumps; shaped on the surface of the carrier plate having the bumps After forming a metal layer, the metal layer is patterned to obtain a lead frame having a wafer holder having a first surface and an opposite second surface formed on the flat portion, and a plurality of pins, wherein a foot is formed at the bump and covers the bump, and the pin formed at the bump has an extension portion and a recess portion; then the wafer is bonded to the wafer holder; and a plurality of wires are formed to be electrically Connecting the wafer and the pin; forming an encapsulant on the carrier to cover the pin, the wafer holder, the wafer and the wire; removing the carrier to expose the lead frame; and cutting along the cutting lines Separate to obtain a plurality of quadrilateral planar leadless package units.

The present invention further discloses a quadrilateral planar leadless lead frame comprising: a wafer holder; and a plurality of pins surrounding the wafer holder, the wafer holder and the plurality of pins respectively having a first surface and an opposite second a surface; wherein the first surface of the pin of the outermost periphery of the lead frame is formed with an extension portion extending in a direction away from the first surface, and a recessed portion is formed on the opposite second surface for accommodating the solder.

According to the present invention, the recess is formed on the second surface of the pin, and the recess is used to accommodate the solder during the reflow process of the four-plane non-lead package unit, thereby providing a combination of horizontal and vertical directions and increasing the bonding area to enhance Solder bond strength.

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in the present specification.

First embodiment

Please refer to FIGS. 2A to 2G, which are schematic diagrams of the quadrilateral planar leadless package unit of the present invention and a method for manufacturing the same.

As shown in FIG. 2A, a carrier 212 is provided. The material of the carrier 212 may be, for example, but not limited to, a metal material such as copper. The surface 214 of the carrier 212 includes a matrix encapsulation region 216 defining a plurality of dicing lines 218 and a matrix unit 219.

Referring to FIG. 2A', the carrier plate 212 has a flat portion 221 and a plurality of bumps 223 formed on the cutting line 218 and surrounding the flat portion 221. The bumps 223 surround the flat portion 221 The resulting area is approximately equal to the area of a quad flat no-lead package unit 200; then, a patterned metal layer is formed on the carrier 212 using electroplating and patterning techniques, such as gold/palladium/ a nickel/palladium layer or a gold/nickel/copper/palladium layer, and the patterned metal layer is used as a lead frame 210. The lead frame 210 has a wafer holder 211 and a plurality of pins 213, wherein the wafer holder 211 is formed. The area of the wafer holder 211 is substantially equal to the area of the wafer; a portion of the pin 213 is formed between the wafer holder 211 and the bump 223, and a portion of the pin 213 is formed on the bump 223. The bump 223 is covered and covered, so that the pin 213 formed at the bump 223 has an extension portion 225 and a recess portion 227 with respect to the bump.

Alternatively, as shown in FIG. 2A", the inside of the cutting line 218 of each matrix unit 219 of the carrier also has a bump 223 surrounding the flat portion 221, so that the area of the flat portion 221 is smaller than that shown in FIG. 2A'. Small.

Specifically, referring to FIG. 2A', the quadrilateral planar leadless lead frame 210 of the present invention includes: a wafer holder 211; and a plurality of circumferences Around the pin 213 of the wafer holder 211, the wafer holder 211 and the plurality of pins 213 respectively have a first surface 220 and an opposite second surface 230; wherein, the first outermost pin 213 of the lead frame 210 is first An extension 225 is formed at the surface 220 and extends away from the first surface 220, and a recess 227 is formed opposite the second surface 230 for accommodating solder.

Similarly, according to the 2A" figure, the first surface of all the pins of the lead frame may be formed with an extension portion extending in a direction away from the first surface, and a concave portion is formed opposite to the second surface. The second surface of the wafer holder of the lead frame may be formed with a recess for accommodating the solder when the square planar non-lead package unit is reflowed.

As shown in FIG. 2B, the die bonding step is performed to provide a wafer 240 having a plurality of pads 251 on the active surface 250, and bonding the inactive surface 260 of the wafer 240 relative to the active surface 250 by the adhesive 241. Wafer holder 211. In the present invention, examples of the adhesive include, but are not limited to, silver paste.

As shown in FIG. 2C, an electrical connection step of the wafer and the pin is performed, and a plurality of wires 270 are formed by wire-bonding, and the wires 270 are electrically connected to the pad 251 of the wafer 240 and Pin 213.

As shown in FIG. 2D, a glue step is performed, which is formed by using a stamper or a glue to form an encapsulant. The encapsulant 280 is formed on the carrier 212 to cover the pin 213 and the wafer holder 211. Wafer 240 and wire 270.

As shown in FIG. 2E, an etching step such as wet etching is performed to remove the carrier, such that the bottom surface 261 of the lead frame 210 and the package are exposed. The bottom surface 261 of the colloid 280, and because the carrier having the bumps is removed, the pins 213 previously formed at the bumps have opposite recesses 227.

As shown in FIG. 2F, a step of cutting is then performed by cutting each of the matrix cells along the cutting lines 218 to obtain the quad flat unguided package unit 200 of the present invention.

The present invention discloses a quad flat planar leadless package unit 200, which includes a lead frame 210 including a wafer holder 211 and a plurality of pins 213, and the wafer holder 211 and the plurality of pins 213 have a a surface 220 and an opposite second surface 230; the wafer 240 has an active surface 250 and an opposite inactive surface 260 having a plurality of pads 251 thereon, wherein the inactive surface 260 of the wafer 240 is attached On the first surface 220 of the wafer holder 211, a plurality of wires 270 are electrically connected to the pads 251 and the pins 213, and the wires 270 are bonded to the first surface 220 of the pins 213. And the encapsulant 280, covering the wafer 240, the wires 270 and the lead frame 210, but exposing the wafer holder 211 and the second surface 230 of the plurality of pins 213 to the outside; wherein the lead frame 210 The first surface 220 of the outermost pin 213 is formed with an extending portion 225 extending away from the first surface 220, and opposite the second surface 230 is formed with a recess 227 for guiding the quadrilateral plane. When the package unit 200 performs reflow, the recess is made Carolina solder. More specifically, the outermost pins have a stepped structure, and the recesses of the pins are located at the outer edges of the package unit.

In another embodiment of the present invention, the first surface of all of the pins is formed with an extension portion extending in a direction away from the first surface, and a recess is formed on the second surface opposite to the second surface.

As shown in FIG. 2G, the soldering and reflowing steps are sequentially performed to provide a printed circuit board 290 having a predetermined grounding portion 293 and a conductive portion 295 for applying solder 297 to the ground. On the surface of the portion 293 and each of the conductive portions 295, the tetragonal planar leadless package unit 200 is then placed on the printed circuit board 290, and the respective pins 213 and the wafer holder 211 are respectively aligned to the corresponding conductive portions 295 and ground. Department 293.

Finally, a solder-reflow process is performed to reflow the solder 297 between the respective pins 213 and the conductive portions 295 and between the wafer holder 211 and the ground portion 293, thereby completing the tetragonal plane of the present invention. The coupling procedure of the lead-free package unit 200 to the printed circuit board 290, and further, since the quadrilateral planar lead-free package unit of the present invention has a recessed pin, which is located on the cutting line, the solder can be after reflowing. The pins on the sides of the package unit are provided to provide better bonding strength.

Therefore, the pin of the quad flat no-lead package unit of the present invention has a recess for accommodating solder, thereby enhancing the bonding strength in the horizontal and vertical directions, and further, an extension portion is formed at the first surface of the pin, and The pin extends away from the first surface, so the pin of the present invention provides more area for bonding with the encapsulant, and also strengthens the bonding strength between the pin and the encapsulant.

Second embodiment

Please refer to Figures 3A to 3D for the quadrilateral plane without the lead of the present invention. A schematic diagram of a second embodiment of a package unit. In the embodiment, the same or similar elements are denoted by the same reference numerals in the embodiment.

The quadrilateral planar leadless package unit of the present embodiment and the manufacturing method thereof are substantially the same as those of the foregoing embodiment, and the main difference is that the second surface of the wafer holder is further formed with a concave portion for reflowing the quadrilateral planar leadless package unit. At this time, the recess is made to accommodate the solder. The method of forming the concave portion of the second surface of the wafer holder may be formed with a concave portion on the second surface of the wafer holder after removing the carrier.

As shown in FIG. 3A, the recess 227 of the wafer holder 211 is formed at a central position of the second surface 230 of the wafer holder 211.

Further, as shown in FIGS. 3B and 3C, the concave portion 227 at the center position is rectangular or the concave portion 227 at the center position is circular.

As shown in FIG. 3D, the recess 227 of the wafer holder 211 may also be formed at a peripheral position of the second surface 230 of the wafer holder 211.

On the other hand, as can be seen from FIGS. 3A to 3D, the recess of the wafer holder included in the lead frame of the quadrilateral plane without lead can be formed at a central position of the second surface of the wafer holder, and the shape of the recess is not It is particularly limited that the recess in the central position may be rectangular or circular. In addition, the recess of the wafer holder may also be formed at a peripheral position of the second surface of the wafer holder.

The quad flat no-lead package unit of the present invention transmits the solder in the recessed portion of the second surface of the pin through the concave portion, and the solder is provided during the reflow soldering of the square-sided non-lead package unit to provide a combination of horizontal and vertical directions. And increase the bonding area. In addition, since the legs located on the outer edge of the package unit are formed with a stepped structure inward, the solder can be coated during reflow. The pins on the outer edge can further improve the bonding strength of the package unit.

The specific embodiments described above are only used to illustrate the features and functions of the present invention, and are not intended to limit the scope of the present invention, and any application without departing from the spirit and scope of the present invention. Equivalent changes and modifications made to the disclosure of the invention are still covered by the scope of the following claims.

100,200‧‧‧tetragonal planar leadless package unit

110, 210‧‧‧ lead frame

111, 211‧‧‧ wafer holder

113, 213‧‧‧ feet

120, 220‧‧‧ first surface

130, 230‧‧‧ second surface

140, 240‧‧‧ wafer

150, 250‧‧‧ active surface

151, 251‧‧ ‧ pads

160, 260‧‧‧ inactive surface

170, 270‧‧‧ wires

180, 280‧‧‧Package colloid

190, 290‧‧‧ Printed circuit boards

191‧‧‧Substrate

193, 293‧‧‧ Grounding Department

195, 295‧‧‧Electrical Department

197, 297‧‧‧ solder

212‧‧‧ Carrier Board

214‧‧‧ surface

216‧‧‧Mask sealing area

218‧‧‧ cutting line

219‧‧‧Matrix unit

221‧‧‧flat

223‧‧‧Bumps

225‧‧‧Extension

227‧‧‧ recess

241‧‧‧Adhesive

1 is a schematic cross-sectional view of a conventional quad flat no-lead package unit; FIGS. 2A to 2G are cross-sectional views of a tetragonal planar leadless package unit of the present invention and a method for manufacturing the same; FIG. 2A' shows a formation and A schematic cross-sectional view of a lead frame on a carrier board; a 2A" diagram showing a cross-sectional view of another lead frame formed on the carrier board; and FIG. 3A is a schematic cross-sectional view of another quad flat no-lead package unit of the present invention And 3B to 3D are schematic views showing the concave portion of the present invention formed on the second surface of the wafer holder.

200‧‧‧tetragonal planar leadless package unit

210‧‧‧ lead frame

211‧‧‧ wafer holder

213‧‧‧ pins

220‧‧‧ first surface

225‧‧‧Extension

227‧‧‧ recess

230‧‧‧ second surface

240‧‧‧ wafer

250‧‧‧Active surface

251‧‧‧ solder pads

260‧‧‧Inactive surface

270‧‧‧ wire

280‧‧‧Package colloid

Claims (22)

A quad flat planar leadless package unit includes: a lead frame including a wafer holder and a plurality of pins, the wafer holder and the plurality of pins respectively having a first surface and an opposite second surface; the wafer having an active surface And the opposite non-active surface, the active surface has a plurality of pads, wherein the inactive surface of the wafer is placed on the first surface of the wafer holder; a plurality of wires are electrically connected to the pads and the a plurality of pins, and the wires are bonded to the first surfaces of the pins; and an encapsulant covering the wafer, the wires and the lead frame, but the wafer holder and the plurality of pins are second The surface is exposed to the outside; wherein the first surface of the outermost pin of the lead frame is formed with an extension portion extending in a direction away from the first surface and away from a periphery of the lead frame, so that the outermost connection The leg has a stepped structure, and the extending portion is formed with a concave portion opposite to the second surface for accommodating the solder when the quadrilateral planar leadless package unit is reflowed. The quadrilateral planar leadless package unit of claim 1, wherein the outermost leg recess is located at a side edge of the quad flat unguided package unit. The quad flat non-lead package unit of claim 1, wherein the first surface of the pin is formed with an extension portion extending away from the first surface and formed opposite to the second surface. There are recesses. The quadrilateral planar leadless package unit of claim 1, wherein the second surface of the wafer holder is further formed with a recess for accommodating the recess when the square-sided non-lead package unit is reflowed. solder. The quadrilateral planar leadless package unit of claim 4, wherein the recess of the wafer holder is formed at a central position of the second surface of the wafer holder. The quadrilateral planar leadless package unit of claim 5, wherein the central portion of the recess is rectangular. The quadrilateral planar leadless package unit of claim 5, wherein the central portion of the recess is circular. The quadrilateral planar leadless package unit of claim 4, wherein the recess of the wafer holder is formed at a peripheral position of the second surface of the wafer holder. A quad flat no-lead package unit as claimed in claim 1 includes a printed circuit board for bonding the wafer holder and the pins by the solder. A quadrilateral planar leadless lead frame includes: a wafer holder; and a plurality of pins surrounding the wafer holder, the wafer holder and the plurality of pins respectively having a first surface and an opposite second surface; wherein An extension portion is formed at the first surface of the outermost pin of the lead frame, and extends away from the first surface and away from the periphery of the lead frame, so that the outermost pin has a stepped junction And the extension is formed with a recess relative to the second surface for accommodating the solder. A lead frame having no guide legs according to claim 10, wherein the first surface of the pin is formed with an extension portion extending in a direction away from the first surface and opposite to the second surface A recess is formed. The lead frame of the quadrilateral plane without a lead according to claim 10, wherein the second surface of the wafer holder is further formed with a recess for making the recess when the quadrilateral planar leadless package unit is reflowed. Contains solder. The lead frame of the quadrilateral plane without a lead according to claim 12, wherein the recess of the wafer holder is formed at a central position of the second surface of the wafer holder. A lead frame having no guide legs in a square plane as claimed in claim 13 wherein the central portion of the recess is rectangular. A lead frame having no guide legs in a square plane as claimed in claim 13 wherein the central portion of the recess is circular. The lead frame of the quadrilateral plane without a lead according to claim 12, wherein the recess of the wafer holder is formed at a peripheral position of the second surface of the wafer holder. A method for manufacturing a tetragonal planar leadless package unit, comprising: providing a carrier board, the carrier board comprising a plurality of cutting lines defined on a surface of the carrier board, a plurality of bumps formed on the cutting line, and the plurality of bumps a flat portion around it; After forming a metal layer on the surface of the bumped carrier, patterning the metal layer to obtain a lead frame having a wafer holder having a first surface and an opposite second surface formed on the flat portion a plurality of pins, wherein a part of the pin is formed at the bump and covers the bump, and the pin formed at the bump has an extension and a recess, so that the pin at the bump forms a stepped structure; bonding a wafer to the wafer holder; forming a plurality of wires to electrically connect the wafer and the pins; forming an encapsulant on the carrier to cover the pins, the wafer holder, the wafer, and the wires; Removing the carrier to expose the lead frame; and cutting and separating along the cutting lines to obtain a plurality of square planar leadless package units. The method for fabricating a quad flat no-lead package unit of claim 17 includes bonding the wafer holder and the pins of the quad flat unguided package unit to the printed circuit board by solder. The method for manufacturing a quad flat no-lead package unit according to claim 17 of the patent application, further comprising forming a recess on the second surface of the wafer holder after removing the carrier. The method for manufacturing a quad flat no-lead package unit according to claim 19, wherein the recess of the wafer holder is formed at a central position of the second surface of the wafer holder, and the recess is rectangular. The method for manufacturing a quadrilateral planar leadless package unit according to claim 19, wherein the recess of the wafer holder is formed in the wafer holder second The central position of the surface, and the recess is circular. For example, in the method of manufacturing the quadrilateral planar leadless package unit of claim 19, the recess of the wafer holder is formed at a peripheral position of the second surface of the wafer holder.