TWI372522B - Clock generator and associated self-test and switching-control method - Google Patents

Clock generator and associated self-test and switching-control method

Info

Publication number
TWI372522B
TWI372522B TW097101061A TW97101061A TWI372522B TW I372522 B TWI372522 B TW I372522B TW 097101061 A TW097101061 A TW 097101061A TW 97101061 A TW97101061 A TW 97101061A TW I372522 B TWI372522 B TW I372522B
Authority
TW
Taiwan
Prior art keywords
switching
test
control method
clock generator
associated self
Prior art date
Application number
TW097101061A
Other languages
English (en)
Other versions
TW200830723A (en
Inventor
Chris Lam
Original Assignee
Mstar Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mstar Semiconductor Inc filed Critical Mstar Semiconductor Inc
Publication of TW200830723A publication Critical patent/TW200830723A/zh
Application granted granted Critical
Publication of TWI372522B publication Critical patent/TWI372522B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
TW097101061A 2007-01-10 2008-01-10 Clock generator and associated self-test and switching-control method TWI372522B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88422507P 2007-01-10 2007-01-10

Publications (2)

Publication Number Publication Date
TW200830723A TW200830723A (en) 2008-07-16
TWI372522B true TWI372522B (en) 2012-09-11

Family

ID=39547760

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097101061A TWI372522B (en) 2007-01-10 2008-01-10 Clock generator and associated self-test and switching-control method

Country Status (3)

Country Link
US (1) US7859346B2 (zh)
CN (1) CN101197573B (zh)
TW (1) TWI372522B (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7999581B1 (en) * 2008-03-23 2011-08-16 Freescale Semiconductor, Inc. System and a method for providing an output clock signal
JP5488116B2 (ja) * 2010-03-30 2014-05-14 ソニー株式会社 受信装置
CN102655410B (zh) * 2011-03-02 2014-10-29 复旦大学 压控振荡器、用于检测工艺波动的测试系统及其测试方法
JP5613605B2 (ja) * 2011-03-28 2014-10-29 ルネサスエレクトロニクス株式会社 クロック生成回路、それを用いたプロセッサシステム、及びクロック周波数制御方法
CN103487648B (zh) * 2013-09-25 2015-12-02 南京理工大学 sigma-delta PLL频率测量电路及方法
US9641113B2 (en) 2014-02-28 2017-05-02 General Electric Company System and method for controlling a power generation system based on PLL errors
US9768762B2 (en) 2014-09-25 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of testing
DE102017113730A1 (de) * 2017-06-21 2018-12-27 Infineon Technologies Ag Radar-frontend mit hf-oszillator-überwachung
US10771296B1 (en) * 2019-06-25 2020-09-08 Realtek Semiconductor Corp. 2.4GHz ISM band zero-IF transceiver and method thereof

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381085A (en) * 1993-07-06 1995-01-10 Motorola, Inc. Phase lock loop with self test circuitry and method for using the same
JP2923910B2 (ja) * 1996-08-14 1999-07-26 日本電気株式会社 超低利得電圧制御発振器
JPH10303747A (ja) * 1997-04-25 1998-11-13 Matsushita Electric Ind Co Ltd 複数周波数帯域ｐｌｌ周波数シンセサイザ
JP2000278124A (ja) * 1999-03-26 2000-10-06 Sanyo Electric Co Ltd Ｐｌｌ回路
JP3488180B2 (ja) * 2000-05-30 2004-01-19 松下電器産業株式会社 周波数シンセサイザ
DE10257181B3 (de) * 2002-12-06 2004-07-15 Infineon Technologies Ag Phasenregelkreis mit Modulator
US7205853B2 (en) * 2005-03-28 2007-04-17 Kabushiki Kaisha Toshiba Method to configure phase-locked loop dividing ratio
TWI296464B (en) * 2005-06-20 2008-05-01 Airoha Tech Corp Phase lock loop and operating method thereof
EP1911185B1 (en) * 2005-08-02 2011-11-23 RF Magic, Inc. System and method for mitigating phase pulling in a multiple frequency source system
DE102005041048B4 (de) * 2005-08-30 2007-09-06 Texas Instruments Deutschland Gmbh Integrierter Schaltungsbaustein

Also Published As

Publication number Publication date
US7859346B2 (en) 2010-12-28
CN101197573B (zh) 2010-12-29
CN101197573A (zh) 2008-06-11
TW200830723A (en) 2008-07-16
US20080211560A1 (en) 2008-09-04

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees
MM4A Annulment or lapse of patent due to non-payment of fees