TWI371686B - System and method to reduce drive overhead using a mirrored cache volume in a storage array - Google Patents

System and method to reduce drive overhead using a mirrored cache volume in a storage array

Info

Publication number
TWI371686B
TWI371686B TW098143847A TW98143847A TWI371686B TW I371686 B TWI371686 B TW I371686B TW 098143847 A TW098143847 A TW 098143847A TW 98143847 A TW98143847 A TW 98143847A TW I371686 B TWI371686 B TW I371686B
Authority
TW
Taiwan
Prior art keywords
storage array
reduce drive
cache volume
mirrored cache
drive overhead
Prior art date
Application number
TW098143847A
Other languages
English (en)
Chinese (zh)
Other versions
TW201037510A (en
Inventor
Mahmoud K Jibbe
Senthil Kannan
Original Assignee
Lsi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/417,096 external-priority patent/US8140762B2/en
Application filed by Lsi Corp filed Critical Lsi Corp
Publication of TW201037510A publication Critical patent/TW201037510A/zh
Application granted granted Critical
Publication of TWI371686B publication Critical patent/TWI371686B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • G06F11/2087—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring with a common controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/22—Employing cache memory using specific memory technology
    • G06F2212/221—Static RAM
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/22—Employing cache memory using specific memory technology
    • G06F2212/222—Non-volatile memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/28—Using a specific disk cache architecture
    • G06F2212/285—Redundant cache memory
    • G06F2212/286—Mirrored cache memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW098143847A 2009-04-02 2009-12-21 System and method to reduce drive overhead using a mirrored cache volume in a storage array TWI371686B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/417,096 US8140762B2 (en) 2008-04-22 2009-04-02 System to reduce drive overhead using a mirrored cache volume in a storage array

Publications (2)

Publication Number Publication Date
TW201037510A TW201037510A (en) 2010-10-16
TWI371686B true TWI371686B (en) 2012-09-01

Family

ID=45813138

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098143847A TWI371686B (en) 2009-04-02 2009-12-21 System and method to reduce drive overhead using a mirrored cache volume in a storage array

Country Status (5)

Country Link
EP (1) EP2237157B1 (de)
JP (2) JP5415333B2 (de)
KR (1) KR101124480B1 (de)
CN (1) CN101859234B (de)
TW (1) TWI371686B (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8296782B2 (en) 2008-04-22 2012-10-23 Lsi Corporation System eliminating hardware duplication during application testing of an internal storage array across different operating systems
TWI472920B (zh) * 2011-09-01 2015-02-11 A system and method for improving the read and write speed of a hybrid storage unit
EP2761481A4 (de) * 2011-09-30 2015-06-17 Intel Corp Darstellung von direktzugriffsspeichern in einem logischen laufwerkmodell
JP6056211B2 (ja) * 2012-06-22 2017-01-11 富士通株式会社 情報管理装置、情報管理プログラム、及び情報管理方法
US9081686B2 (en) * 2012-11-19 2015-07-14 Vmware, Inc. Coordinated hypervisor staging of I/O data for storage devices on external cache devices
JP6036736B2 (ja) 2014-03-31 2016-11-30 日本電気株式会社 キャッシュ装置、ストレージ装置、キャッシュ制御方法、及びストレージ制御プログラム
CN106557264B (zh) * 2015-09-25 2019-11-08 伊姆西公司 针对固态硬盘的存储方法及设备

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MX9200970A (es) 1991-03-05 1993-08-01 Zitel Corp Memoria de deposito.
US5586291A (en) * 1994-12-23 1996-12-17 Emc Corporation Disk controller with volatile and non-volatile cache memories
JP3699797B2 (ja) 1997-02-04 2005-09-28 沖電気工業株式会社 ディスクアレイ装置
US6081875A (en) * 1997-05-19 2000-06-27 Emc Corporation Apparatus and method for backup of a disk storage system
US6446237B1 (en) * 1998-08-04 2002-09-03 International Business Machines Corporation Updating and reading data and parity blocks in a shared disk system
US6321298B1 (en) * 1999-01-25 2001-11-20 International Business Machines Corporation Full cache coherency across multiple raid controllers
US7313614B2 (en) * 2000-11-02 2007-12-25 Sun Microsystems, Inc. Switching system
WO2003075166A1 (fr) * 2002-03-06 2003-09-12 Fujitsu Limited Systeme de stockage et procede de transfert de donnees dans ledit systeme
US7330931B2 (en) * 2003-06-26 2008-02-12 Copan Systems, Inc. Method and system for accessing auxiliary data in power-efficient high-capacity scalable storage system
JP4338075B2 (ja) * 2003-07-22 2009-09-30 株式会社日立製作所 記憶装置システム
US7136973B2 (en) * 2004-02-04 2006-11-14 Sandisk Corporation Dual media storage device
JP4625675B2 (ja) 2004-10-20 2011-02-02 株式会社日立製作所 ストレージ装置のリソース割り当て方法及びストレージ装置
JP4819369B2 (ja) * 2005-02-15 2011-11-24 株式会社日立製作所 ストレージシステム
JP5008845B2 (ja) * 2005-09-01 2012-08-22 株式会社日立製作所 ストレージシステムとストレージ装置及びその制御方法
JP4394670B2 (ja) * 2006-09-28 2010-01-06 株式会社日立製作所 ディスク制御装置及びストレージシステム

Also Published As

Publication number Publication date
KR20100110271A (ko) 2010-10-12
JP2010244532A (ja) 2010-10-28
EP2237157A1 (de) 2010-10-06
CN101859234A (zh) 2010-10-13
TW201037510A (en) 2010-10-16
JP2013047965A (ja) 2013-03-07
JP5415333B2 (ja) 2014-02-12
CN101859234B (zh) 2013-09-11
KR101124480B1 (ko) 2012-03-16
EP2237157B1 (de) 2014-02-12

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees