US8140762B2 - System to reduce drive overhead using a mirrored cache volume in a storage array - Google Patents
System to reduce drive overhead using a mirrored cache volume in a storage array Download PDFInfo
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- US8140762B2 US8140762B2 US12/417,096 US41709609A US8140762B2 US 8140762 B2 US8140762 B2 US 8140762B2 US 41709609 A US41709609 A US 41709609A US 8140762 B2 US8140762 B2 US 8140762B2
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- 238000000034 method Methods 0.000 claims abstract description 17
- 239000007787 solid Substances 0.000 claims abstract description 15
- 238000013507 mapping Methods 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 6
- 238000003491 array Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000003999 initiator Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
Definitions
- the present application may relate to co-pending application Ser. No. 61/046,815, filed Apr. 22, 2008; Ser. No. 12/143,123, filed Jun. 20, 2008; Ser. No. 61/080,806, filed Jul. 15, 2008; Ser. No. 61/080,762, filed Jul. 15, 2008; Ser. No. 12/178,064, filed Jul. 23, 2008; Ser. No. 12/238,858, filed Sep. 26, 2008; Ser. No. 61/100,034, filed Sep. 25, 2008; Ser. No. 12/324,224, filed Nov. 26, 2008; Ser. No. 12/354,126, filed Jan. 15, 2009 and Ser. No. 12/395,786, filed Mar. 2, 2009, which are each hereby incorporated by reference in their entirety.
- the present invention relates to storage arrays generally and, more particularly, to a method and/or apparatus for reducing drive overhead using a mirrored cache volume in a storage array.
- Write caches and read caches stored on DRAMs depend on writing to the HDD for the write through cache policy when there is no back-up battery for the caches. Writing to the HDD for the write through cache policy adds to the latency of the HDD. The read-ahead cache policy does not help reduce the latency of the HDD since the pre-fetch results of unwanted data adds to the time delay in getting the write data.
- the present invention concerns a system comprising a host, a solid state device, and an abstract layer.
- the host may be configured to generate a plurality of input/output (IO) requests.
- the solid state device may comprise a write cache region and a read cache region.
- the read cache region may be a mirror of the write cache region.
- the abstract layer may be configured to (i) receive the plurality of IO requests, (ii) process the IO requests, and (iii) map the plurality of IO requests to the write cache region and the read cache region.
- the objects, features and advantages of the present invention include providing a method and/or apparatus that may (i) reduce hard disc overhead, (ii) implement a mirrored cache volume in a storage array, (iii) allow the write through mode to write to a solid state drive (SSD) cache in place of a typical hard disk drive (HDD), (iv) create LUNs with a mirrored cache volume during creation of the LUNs, (v) create the mirrored cache volumes after the LUNs are created, (vi) asynchronously mirror existing data until all data is mirrored and synchronously written to the HDD and the mirrored LUN, (vii) use the mirrored cache volume for read IO requests (instead of the HDD) to avoid the HDD latency, (viii) provide a user selectable mirrored cache volume, (ix) allow the read cache using the mirrored cache volume to be a SSD (or a flash drive), (x) have the write cache and the read cache on the SSD separate from DRAMs, (xi) write on the HDD for
- FIG. 1 is a block diagram of an embodiment of the present invention
- FIG. 2 is a more detailed block diagram of an embodiment of the present invention.
- FIG. 3 is a block diagram of another embodiment of the present invention.
- the system 100 generally comprises a module 102 , a module 104 , a module 106 , a module 108 , a module 110 , a module 112 and a connection 114 .
- the module 102 may be implemented as a server. In one example, the module 102 may be implemented as a host.
- the module 104 may be implemented as a controller.
- the module 106 may be implemented as a storage array.
- the module 108 may be implemented as a hard disk drive (HDD). In one example, the HDD 108 may implement a number of physical disks (e.g., P 1 , P 2 , P 3 ).
- the number of physical disks may be varied to meet the design criteria of a particular implementation.
- the HDD 108 may be part of the storage array 106 .
- the controller 104 may include the module 110 .
- the module 110 may be implemented as an input/output (IO) abstract layer.
- the module 106 may include the module 112 .
- the module 112 may be implemented as a solid state device.
- the connection 114 may be a network connection, such as a fiber channel connection or other type of network connection.
- the system 100 may reduce over head caused by latency in accessing the HHD 108 of the storage array 106 .
- the module 112 generally comprises a write cache region 116 and a read cache region 118 .
- the write cache region 116 and the read cache region 118 may be located (e.g., mapped) in different locations of the SSD 112 .
- the write cache region 116 generally comprises a plurality of LUNs 120 a - 120 n (e.g., LUN 0 , LUN 1 , LUN 2 , etc.).
- the read cache region 118 generally comprises a LUN 122 (e.g., LUN 0 ′).
- the LUN 122 may be implemented as a mirrored cache volume of a particular one of the LUNs 120 a - 120 n (e.g., the LUN 120 a ).
- the particular number of LUNs 120 a - 120 n and LUN 122 may be varied (e.g., increased and/or decreased) to meet the design criteria of a particular implementation (e.g., up to 2048 or more).
- IO requests are normally sent to the LUNs 120 a - 120 n and LUN 122 , which translate such requests to storage devices (e.g., the physical disks P 1 , P 2 , or P 3 ) in the storage array 106 .
- the controller 104 may be configured with the IO abstract layer 110 .
- An IO request to be processed from the host 102 may be sent to the IO abstract layer 110 .
- the IO abstract layer 110 may have a mapping to the write cache region 116 and the read cache region 118 of the solid state device 112 (e.g., the LUNs 120 a - 120 n and the LUN 122 ).
- the write cache region 116 may be mapped on the SSD 112 .
- the read cache region 118 may be mapped on another location (or region) of the SSD 112 . In one example, the read cache region 118 may be mapped on a flash drive.
- the read cache region 118 may be a mirror of the write cache region 116 of a particular one of the LUNs 120 a - 120 n .
- an IO write request for the LUN 120 a (e.g., LUN 0 ) may be mapped to the write cache region 116 of the SSD 112 .
- the IO write request may be synchronously (or asynchronously) mirrored to the read cache region 118 .
- the IO abstract layer 110 may return a signal (e.g., a good status signal) to the host 102 when the IO write is complete.
- An IO read request for the LUN 122 (e.g., LUN 0 ′) may be sent to the IO abstract layer 110 from the host 102 .
- the IO abstract layer 110 may read the mirrored read cache region 118 from the LUN 122 to retrieve desired data.
- the IO abstract layer 110 may not need to read from the HDD 108 if the desired data is stored in the read cache region 118 of the SDD 112 . If the desired data is stored in the read cache region 118 of the SSD 112 , then the delay in response time associated with reading from the HDD 108 may be avoided.
- the IO write requests may be asynchronously written to the HDD 108 (e.g., the write cache region 116 ) and to the mirrored read cache region 118 of the SSD 112 .
- the IO write request may be sent to the IO abstract layer 110 from the host (or initiator) 102 .
- the IO abstract layer 110 may write the IO request to the SSD 112 (e.g., the write cache region 116 ).
- the IO abstract layer 110 may send a signal (e.g., a “good” status signal) to the host 102 .
- the IO abstract layer 110 may write the IO request to the SSD 112 and send the good status signal to the host 102 on a write through cache policy.
- the IO abstract layer 110 may send the good status signal to the host 102 while writing the IO request on a write back cache policy to the controller/array DRAM.
- the IO abstract layer 110 may process the IO read request from the LUN 122 instead of processing the IO read request from the write cache region 116 (e.g., the LUN 120 a ) of the SSD 112 .
- An IO read request may be sent from the host 102 .
- the IO read request may be sent to the IO abstract layer 110 .
- the IO abstract layer 100 may asynchronously write previous IO requests to the LUNs 120 a - 120 n (e.g., the LUN 0 ) in the HDD 108 .
- the IO requests may be mirrored to the LUN 122 in the read cache region 118 .
- the LUN 122 may be a mirrored cache volume of a particular one of the LUNs 120 a - 120 n (e.g., the LUN 0 ).
- the LUNs 120 a - 120 n and the LUN 122 may be written synchronously (or asynchronously) by the IO abstract layer 110 .
- the mirrored LUN 122 in the read cache region 118 may be created during the configuration of the LUNs 120 a - 120 n .
- the LUN 122 may be mapped during the configuration of the LUNs 120 a - 120 n . In one example, the LUN 122 may be mapped based upon a user selection depending on a particular design implementation.
- One or more of the LUNs 120 a - 120 n may be configured without a mirrored cache volume.
- the LUNs 120 b - 120 n may be configured to use a read pre-fetch cache policy (e.g., currently present in LSI storage arrays).
- the IO abstract layer 110 may read the mirrored cache volume (e.g., the read cache region 118 ) from the LUN 122 .
- the IO read request processing may be faster from the LUN 122 than a IO read request processing from the HDD 108 (e.g., the write cache region 116 ).
- the IO read request may be returned to the host 102 .
- the system 100 ′ generally comprises the host 102 , the controller 104 , a module 106 ′, and the HDD 108 .
- the controller 104 may implement the IO abstract layer 110 .
- the module 106 ′ may be implemented as a storage array.
- the storage array 106 ′ generally comprises the module 112 , and the module 130 .
- the module 112 ′ may be implemented as a solid state device (SSD).
- the SSD 112 ′ generally comprises the write cache region 116 .
- the write cache region generally comprises the plurality of LUNs 120 a - 120 n .
- the module 130 may be implemented as a flash drive.
- the flash drive 130 generally comprises the read cache region 118 .
- the read cache region may include the LUN 122 .
- the flash drive 130 may include a plurality of LUNs configured to mirror the plurality of LUNs 120 a - 120 n.
- a manufacturing cost may be associated with implementing a solid state drive (SSD) or a flash drive to store an entire mirrored LUN.
- SSD solid state drive
- flash drive to store an entire mirrored LUN.
- a performance to cost balance may be achieved. The improvement in performance normally balances out with the additional cost of the SSD implementation.
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- Memory System Of A Hierarchy Structure (AREA)
Abstract
Description
Claims (20)
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/417,096 US8140762B2 (en) | 2008-04-22 | 2009-04-02 | System to reduce drive overhead using a mirrored cache volume in a storage array |
TW098143847A TWI371686B (en) | 2009-04-02 | 2009-12-21 | System and method to reduce drive overhead using a mirrored cache volume in a storage array |
JP2010071656A JP5415333B2 (en) | 2009-04-02 | 2010-03-26 | A system that reduces drive overhead by using a cache volume mirrored in a storage array |
EP10158683.2A EP2237157B1 (en) | 2009-04-02 | 2010-03-31 | System to reduce drive overhead using a mirrored cache volume in a storage array |
KR1020100029143A KR101124480B1 (en) | 2009-04-02 | 2010-03-31 | System to reduce drive overhead using a mirrored cache volume in a storage array |
CN2010101468523A CN101859234B (en) | 2009-04-02 | 2010-04-01 | System to reduce drive overhead using mirrored cache volume in storage array |
JP2012226878A JP2013047965A (en) | 2009-04-02 | 2012-10-12 | System for reducing drive overhead by using cache volume mirrored by storage array |
Applications Claiming Priority (5)
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US4681508P | 2008-04-22 | 2008-04-22 | |
US8080608P | 2008-07-15 | 2008-07-15 | |
US8076208P | 2008-07-15 | 2008-07-15 | |
US10003408P | 2008-09-25 | 2008-09-25 | |
US12/417,096 US8140762B2 (en) | 2008-04-22 | 2009-04-02 | System to reduce drive overhead using a mirrored cache volume in a storage array |
Publications (2)
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US20090265507A1 US20090265507A1 (en) | 2009-10-22 |
US8140762B2 true US8140762B2 (en) | 2012-03-20 |
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US12/238,858 Expired - Fee Related US8296782B2 (en) | 2008-04-22 | 2008-09-26 | System eliminating hardware duplication during application testing of an internal storage array across different operating systems |
US12/417,096 Expired - Fee Related US8140762B2 (en) | 2008-04-22 | 2009-04-02 | System to reduce drive overhead using a mirrored cache volume in a storage array |
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US12/238,858 Expired - Fee Related US8296782B2 (en) | 2008-04-22 | 2008-09-26 | System eliminating hardware duplication during application testing of an internal storage array across different operating systems |
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Cited By (2)
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US9582439B2 (en) | 2013-11-14 | 2017-02-28 | Samsung Electronics Co., Ltd. | Nonvolatile memory system and operating method thereof |
US11693747B2 (en) | 2016-08-19 | 2023-07-04 | Samsung Electronics Co., Ltd. | Adaptive multipath fabric for balanced performance and high availability |
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US8499120B2 (en) * | 2008-10-17 | 2013-07-30 | Seagate Technology Llc | User selectable caching management |
US8380911B2 (en) | 2010-09-13 | 2013-02-19 | Lsi Corporation | Peripheral device, program and methods for responding to a warm reboot condition |
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US20130067289A1 (en) * | 2011-09-14 | 2013-03-14 | Ariel Maislos | Efficient non-volatile read cache for storage system |
US8966170B2 (en) | 2012-01-31 | 2015-02-24 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Elastic cache of redundant cache data |
US9047200B2 (en) * | 2012-01-31 | 2015-06-02 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Dynamic redundancy mapping of cache data in flash-based caching systems |
US9232005B1 (en) * | 2012-06-15 | 2016-01-05 | Qlogic, Corporation | Methods and systems for an intelligent storage adapter used for both SAN and local storage access |
US9776270B2 (en) | 2013-10-01 | 2017-10-03 | Globalfoundries Inc. | Chip joining by induction heating |
US9454305B1 (en) | 2014-01-27 | 2016-09-27 | Qlogic, Corporation | Method and system for managing storage reservation |
JP6036736B2 (en) | 2014-03-31 | 2016-11-30 | 日本電気株式会社 | Cache device, storage device, cache control method, and storage control program |
US9423980B1 (en) | 2014-06-12 | 2016-08-23 | Qlogic, Corporation | Methods and systems for automatically adding intelligent storage adapters to a cluster |
US9436654B1 (en) | 2014-06-23 | 2016-09-06 | Qlogic, Corporation | Methods and systems for processing task management functions in a cluster having an intelligent storage adapter |
US9477424B1 (en) | 2014-07-23 | 2016-10-25 | Qlogic, Corporation | Methods and systems for using an intelligent storage adapter for replication in a clustered environment |
US9460017B1 (en) | 2014-09-26 | 2016-10-04 | Qlogic, Corporation | Methods and systems for efficient cache mirroring |
US9483207B1 (en) | 2015-01-09 | 2016-11-01 | Qlogic, Corporation | Methods and systems for efficient caching using an intelligent storage adapter |
US9588901B2 (en) | 2015-03-27 | 2017-03-07 | Intel Corporation | Caching and tiering for cloud storage |
US10664189B2 (en) * | 2018-08-27 | 2020-05-26 | International Business Machines Corporation | Performance in synchronous data replication environments |
CN110928495B (en) * | 2019-11-12 | 2023-09-22 | 杭州宏杉科技股份有限公司 | Data processing method and device on multi-control storage system |
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US11693747B2 (en) | 2016-08-19 | 2023-07-04 | Samsung Electronics Co., Ltd. | Adaptive multipath fabric for balanced performance and high availability |
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US20090265507A1 (en) | 2009-10-22 |
US20090265724A1 (en) | 2009-10-22 |
US8296782B2 (en) | 2012-10-23 |
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