1354333 九、發明說明： 【發明所屬之技術領域】 本發明提供一種在一開口蝕刻後的清洗方法，尤指一 . 種利用同時現場（in-situ)氮氣處理製程的清洗方法。 4 【先前技術】 銅雙鑲嵌(dual damascene)技術搭配低介電常數 φ (1〇w-k ; k^2.9)介電層為目前所知高積集度、高速邏輯積 體電路晶片製造以及0.13微米以下半導體製程之最佳金屬 内連線解決方案。其原因在於銅具有低電阻值（比鋁低30%) 以及較佳抗電致遷（electro-migration resistance)等特性，而 具有低介電常數之介電層材料能幫助降低金屬導線之間的 電阻-電容時間延遲(Resistance-Capacitance Time Delay)， 由此可知，具有低介電常數之介電層材料搭配銅金屬雙鑲 _ 嵌内連線技術在積體電路製程中顯得日益重要。 低介電常數介電層係由摻雜有碳原子的氧化矽材料所 構成，亦即氧化矽材料中部分鍵結於矽原子的氧原子會被 至少一個有機官能基(organic functional group)，例如曱基 (methyl group : CH3-)等，所取代。這類具有低介電常數的 材料包含有機石夕玻璃（organo-silicate-glasses ; OSGs)、含 氟二氧化石夕（fluorinated silica glasses ; FSGs)、氫石夕酸鹽類 (hydrogen silsequoxiane ; HSQ)、曱基矽酸鹽類（methyl 1354333 silsequoxiane; MSQ)等，其介電常數值 _ 皆小於約2.5。 雖然，利用至少一個有機官能基來取 的部分氧原子，能夠有效降低氧化矽材料的^化矽材料中 • 但是，矽原子和官能基之間的鍵結並不如^原1電常數值， 結般的穩定；因此，在製作銅雙鑲嵌的部分掣'^氧原子鍵 银刻低介電常數介電層以形成如溝渠或介層=中’ ^如 φ 的開口蝕刻，或是移除光阻層的灰化製程等，石開口結構 能基之間的鍵結很容易被破壞。 原子和s 當矽原子和官能基之間的鍵結被打斷後，所带成的自 由基(radical)會和蝕刻或灰化等製程中所使用的反應氣體 反應’產生許多碳氟鍵結(C-F)聚合物殘留在餘刻形成之雙 鑲嵌結構的底部或側壁上。另外，隨著半導體製程技術的 不斷提升，許多銅雙拔製程中會使用包含金屬層，例如& 化鈦(titanium nitride ; TiN)等，的硬遮罩層以當作餘列遮 罩，來取代習知的有機光阻層；然而，使用包含金屬層的 硬遮罩層當作蝕刻遮罩時，卻會造成在銅雙鑲嵌的開口# 刻後產生比習知的有機光阻層更難去除的金屬殘留物殘留 在雙鑲嵌開口的底部或側壁上。因此，如果在後續製程中 若直接將金屬導電層，例如銅，填入雙鑲嵌開d中以製作 金屬内連線時，則會產生電阻值增高之情形。 1354333 因此，已經有許多專利揭示如何清除碳氟鍵結（c-F)聚 合物或金屬殘留物的方法，例如美國專利公開號 2006/0246717 A1 「製作雙鑲嵌結構以及清除其殘餘聚合 物的方法（Method for fabricating a dual damascene and polymer removal)」，其中揭露在雙鑲嵌結構蝕刻完成後， 在同一反應室中通入含有氫氣(hydrogen)、氧氣(oxygen)或 四氟化碳(CF4)之氣體，並可另外通入氮氣(nitrogen)或惰性 氣體（inert gas)，以對雙鑲嵌結構進行一乾式清洗製程，以 移除蝕刻低介電常數介電層後所產生之殘留物。 另外，在美國專利第6,713,402號「清除蝕刻停止層之 I虫刻聚合物方法（Method for polymer removal following etch-stop layer etch)」中，也揭示了在雙鑲嵌結構餘刻完成 後，將半導體基底傳送至一電漿清洗室中，再通入含有氩 氣之電漿以移除殘留之聚合物。 然而，上述使用同時包含氬氣/氧氣/四氟化碳(CF4)電 漿的清洗方法、或者只有氫氣電漿的清洗方法，卻仍然無 法有效地清除殘留之聚合物或金屬殘留物，因此在增加製 程良率（yield)上一直無法得到突破。所以，在習知的電漿 清洗方法後，往往需要再利用多次的濕式清洗製程才能將 這些殘留之聚合物或金屬殘留物清除乾淨；然而增加多次 濕式清洗製程卻會大大地降低製程的產能（throughput)並且 8 1354333 增加製程成本。再者，使用含有反應性氣體電漿，例如氫 氣或四氟化碳(CF4)等，該清洗方法往往會損壞低介電常數 介電層，或者造成這些低介電常數介電層之介電常數(k)值 的改變，因而影響到相對元件的電容值（capacitance)。 因此，如何以有效的方法去除開口蝕刻後所產生之聚 合物，且不會在清除過程中破壞雙鑲嵌結構，或者在清除 過程中改變低介電常數介電層的介電常數(k)值，仍為業界 目前亟待研究的方向。 【發明内容】 本發明提供一種在一開〇蝕刻後的清洗方法，尤指一 種利用同時現場（in-situ)氮氣處理製程的清洗方法。 根據本發明之申請專利範圍，係提供一種在一開口蝕 刻後的清洗方法。首先提供一半導體基底，其上形成有一 介電層，接著進行該開口蝕刻，以於該介電層中形成至少 一開口，然後進行一氮氣處理製程以清洗該開口中的碳氟 鍵結（C-F)聚合物殘留物，最後再進行一濕式清洗製程。 本發明的特點在於僅利用一道同時現場（in-situ)氮氣 處理製程以及一道濕式清洗製程，就能夠有效地清除在内 連線製程中開口钱刻後所產生的殘留物，因此’大幅地簡 9 1354333 化製程步驟，進而增加產能並降低製程成本。另外，隨著 清洗能力的提高，因而大大地提升製程良率。此外，由於 本發明係利用只有氮氣的電漿取代習知的反應性氣體，例 如虱氣、氧氣或四ft化碳等之氣體電聚，因此，可以避免 在習知技術中損壞低介電常數介電層以及改變低介電常數 介電層之介電常數(k)值的問題。 【實施方式】 請參考第1圖’第1圖為本發明於開口 I虫刻後的清洗 方法流程圖。如第1圖所示’在步驟10中，首先提供一半 導體基底，例如一梦基底或一絕緣層上覆石夕 (silicon-on-insulator; SOI)基底等，其上形成有一介電層， 以及一硬遮罩層’其中硬遮罩層包含有至少一金屬層。半 導體基底上亦可包含有至少一功能性元件，例如金氧半導 體（Metal Oxide Semiconductor ; M0S)電晶體等。介電層係 為一低介電常數介電層，例如碳摻雜氧化物(carb〇n_d〇ped oxide; CDO)、有機矽玻璃（〇SGs)、含氟二氧化矽(FSGs)、 或超低介電常數(Ultra low-k ; k<2.5)等材料層；形成低介 電常數介電層的方法包含有旋轉鍍膜（spin-coating)製程、 電毁加強化學氣相沉積製程(plasma-enhanced chemical vapor deposition; PECVD)、高密度電漿化學氣相沉積（high density plasma chemical vapor deposition ; HDPCVD)製程 等。 1354333 然後，在步驟20中，利用此含有至少一金屬層之硬遮 罩層當做蝕刻遮罩來進行至少一開口蝕刻，以於介電層中 形成至少一開口。此開口蝕刻可為利用例如濺擊蝕刻製程 (sputtering etch process)、電漿#刻製程（plasma etch process)、或反應離子触刻（Reactive Ion Etching ; RIE)等钱 刻製程，於蝕刻反應室内通入反應性氣體，蝕刻硬遮罩層 和介電層，以於介電層中形成至少一開口；其中，蝕刻反 應室可以為感應耦合電聚（Induced Coupled Plasma ; ICP)、 電子環繞共振式(Electron Cyclotron Resonance ; ECR)、或 變壓偶合電漿（Transformer Coupled Plasma ; TCP)等# 刻反 應室。通入反應室中的氣體種類’會依據欲蝕刻的材料層 不同而有所不同，舉例來說，當欲蝕刻介電層時，會於反 應室中通入含有碳原子和氟原子的反應氣體，例如四氟化 碳（carbon tetrafluoride ; CF4)、三氟曱烷（trifluoromenthane ; CHF3)、六氟乙烷(perfiu〇r〇 ethane; c#6)、八ι化四碳㈣池犷 hexafluoride iCJ8)等，並可混合氧氣和氫氣以形成反應氣 體電聚’接著利用離子轟擊(I〇n B〇mbardment)、電聚餘刻、 或者離子轟擊和電漿蝕刻兩者同時進行的機制蝕刻介電層。 在上述之開口蝕刻過程中，由於介電層係由一低介電 常數材料所構成，因此在蝕刻介電層時會產生具有碳氟鍵 結（C-F)之聚合物殘留於開口結構的底部或側壁上。另外， 蝕刻含有金屬層之硬遮罩層時亦可能會產生較難清除之金 1354333 屬殘留物，例如具有碳碳鍵結（c-c)之金屬殘留物。在這裡 ‘ 將具有碳氟鍵結（C - F)之聚合物以及金屬殘留物通稱為殘 留物。其中，在步驟20中所形成的開口，可以為單鑲嵌開 口、雙鑲嵌開口或是插塞洞(plug hole)等之各式開口圖案， 且雙鑲嵌開口亦可以為先形成溝渠（trench-first)之雙鑲嵌 開口或先形成介層洞(via-first)之雙鑲嵌開口；另外，插塞 洞亦可以為接觸洞（contact hole)或是介層洞（via hole)。 接著，在步驟30中，對形成的開口施予一現場同時 (in-situ)氮氣處理製程，以清除在開口蝕刻中所產生的殘留 物。值得注意的是，此現場同時氮氣處理製程會實施於與 開口蝕刻同一個反應室中；而且氮氣處理製程的清洗機制 與上述之開口蝕刻相同，係為利用例如：濺擊蝕刻製程、 電漿蝕刻製程、或反應離子蝕刻等蝕刻製程，以清除開口 中的殘留物。 # 根據本發明之較佳實施例，氮氣處理製程係在開口蝕 刻之後，隨即於同一反應室中僅僅通入氮氣，且氮氣流量 為約700至1300每分鐘標準毫升（standard cubic centimeter per minute ; seem)，反應室壓力設定為約150至 250毫托爾（mtorr)，並使用27兆赫茲（MHZ)的無線電功率 產生器（radio frequency generator ; RF generator)產生 200 瓦特的功率，反應時間約為30秒。其中，通入反應室的氮 12 1354333 氣會形成包含氮自由基、氡離子、或氮原子等的氮氣電漿， 因而能夠取代碳氟鍵結（C-F)聚合物中的部分ρ原子，以形 成具揮發性(volatile)的碳氡鍵結（C_N)生成物，接著再將這 些碳氮鍵結(C-N)生成物經由連結於反應室的抽氣系統抽 離反應至。另外’氮氣電漿亦會和金屬殘留物反應形成較 易去除的生成物’舉例來說，I氣電聚中的I自由基會切 斷具有碳碳鍵結（c-c)之金屬殘留物中部分的碳碳(c_c)鍵 結’使得該金屬殘留物成為較小分子的生成物，例如碳氫 氣化合物(HxCyNz)等’以利於被連結於反應室的抽氣系統 抽離反應室’而且這些小分子生成物也易於在後續的濕式 清洗製程中被清除。 最後，在步驟40中，對形成的開口進行一濕式清洗製 私。根據本發明之較佳實施例，濕式清洗製程係為將具有 開口的半導體基底送入一濕式清洗裝置中，並將其浸泡在 /辰度、力為2.5百萬分之一（parts per mini〇n ; ppm)的氫亂酸 水溶液中約1至5分鐘。之後再經過去離子水沖洗、乾燥 等步驟，最後移出濕式清洗裝置，此為習知相關技藝者及 具通常知識者所熟知，在此不多加贅述。 值得注意的是，上述步驟30中的氮氣處理製程，之所 以％為「氮氣」處理製程，是因為本發明僅使用氮氣這種 非反應性(n〇n-reactive)氣體作為電漿源，來清除在開口蝕 13 1354333 .刻中所產生的殘留物，因此’可以避免在習知技術中，因 為利用反應性(職㈣氣體，例如氫氣、氧氣或四說化碳 等電聚，而造成損壞低介電常數(low_k)介電層以及改變低 介電常數(low-k)介電層之介電常數⑻值的問題。然而，在 .此步驟並不限定於使用氮氣，其他非反應性氣體，例如氛 氣(Helium)、氖氣(Neon)等惰性氣體(n〇we gas)亦可以使用。 • 請參考第2圖至第7圖，第2圖至第7圖為根據第i "@所示之清洗方法的第一較佳具體實施丫列，其為本發明應 用於雙鑲嵌開口製程的清洗方法，其中該雙鑲嵌開口可以 為先形成溝渠（trench-first)之雙鑲嵌開口或為先形成介層 洞（via-first)之雙鑲嵌開口。以下便以實施於先形成溝渠 (trench-first)之雙鑲嵌開口製程的清洗方法為例來做說 明。如第2圖所示，首先提供一半導體基底1〇〇，例如一 _ 矽基底或一絕緣層上覆矽(S0I)基底等，其上具有一導電層 102 又於底層介電層中。接著，於底層介電層 以及導電層102之上依序形成一底層104、一介電層！〇6、 一蝕刻停止層108、一金屬層110' 一遮罩層112以及一第 一抗反射底層（bottom anti-reflection coating ; BARC) 116。 接著，在第一抗反射底層116上形成一圖案化之第一光阻 層118，以定義出一溝渠圖案12〇。 其中，蝕刻停止層108、金屬層11〇以及遮罩層112 14 1354333 係用來作為後續蝕刻製程之硬遮罩層114，而蝕刻停止層 108之材料較佳為碳化石夕（silicon carbide ; SiC)，金屬層110 之材料較佳為氮化鈦(TiN)或氮化钽(TaN)，遮罩層112則可 選擇以電聚形成之電漿增強石夕氧（plasma enhanced oxide, PEOX)層。此外，底層104係為一氮化矽層，而構成介電 層106之材料為低介電常數材料，例如FSG、OSG、或 ULK(k<2.5)等材料。 接著，進行一第一蝕刻製程，例如一濺擊蝕刻製程、 一電漿蝕刻製程、或一反應性離子蝕刻製程等，經由第一 光阻層118内的溝渠圖案120蝕刻第一抗反射底層116、遮 罩層112、金屬層110以及部份之蝕刻停止層108，在硬遮 罩層114中形成一溝渠凹陷122，並使蝕刻停止在蝕刻停 止層108。隨然，去除第一光阻層118以及第一抗反射底 層116，如第3圖所示。 接著，如第4圖所示，於硬遮罩層114上形成一第二 抗反射底層124，且第二抗反射底層會填滿溝渠凹陷122。 隨後在第二抗反射底層124上形成一圖案化之第二光阻層 126，以定義出一介層洞圖案128。 接著，如第5圖所示，進行一第二蝕刻製程，例如一 濺擊蝕刻製程、一電漿蝕刻製程、或一反應性離子蝕刻製 15 1354333 ^等”工由第—光阻層126内的介層洞圖案i28向下姓刻 第二抗反射底層m、_停止層⑽…錢刻至部份的 "電層106而停也，报士 入& ' 知止形成一介層洞凹陷130。之後去除剩 下的第二光阻層126以及第二抗反射底層 124。 者’如第6圖所示，利用硬遮罩層114作為韻刻遮 罩，進行一第三钱刻製程，例如一濺擊餘刻製程、一電聚 製程、或—反應性離子_製程等，透過介層洞凹陷 及溝渠凹陷122_介電層1G6以及底層iG4，直至暴 路出導電層1〇2，以於介電層1〇6中形成具有溝渠以及介 層洞之雙鑲嵌開口 132。 此時，由於介電層106之材料為低介電常數材料，因 此在韻刻時會產生具有碳氟鍵結(C_F)之聚合物殘留於雙 鲁鑲嵌開口 132内。另外，含有金屬層112之硬遮罩層114 、村能會於_製程中產生較難清除之金屬殘留物，例如 具有碳碳鍵結(C_C)之聚合物，殘留於雙鑲細口 132内。 在這裡將具有碳諸結(叫之聚合物从金屬殘留物通 稱為殘留物134。故本發明係在第三次敍刻製程之後隨即 於同一反應室中連續進行一現場同時(in_s㈣氮氣處理製 根據本發明之較佳實施例，氮氣處理製程136係在第 16 1354333 三钮刻製程之後’隨即於同一反應室中僅僅通入氮氣，且 氮氣流量為約700至1300每分鐘標準毫升（SCCm)，反應 至壓力设定為約150至250毫托爾（mtorr)，並使用27彡匕赫 茲（MHZ)的無線電功率產生器（rf generator)產生200瓦特 的功率，反應時間約為30秒。其中，通入反應室的氮氣會 形成包含有氮離子、氮自由基、以及氮原子等的氮氣電漿， 因而能夠取代碳氟鍵結（C-F)聚合物中的部分f原子，以形 成具揮發性(volatile)的碳氮鍵結(C-N)生成物，接著再將這 些碳氮鍵結（C-N)生成物經由連結於反應室的抽氣系統抽 離反應室。另外，氮氣電漿亦會和具有碳碳(C-C)鍵結的金 屬殘留物反應形成較易去除的生成物，舉例來說，氮氣電 製中的氮自由基會切斷金屬殘留物中部分的碳碳鍵結 (C-C) ’使得該金屬殘留物成為較小分子的生成物，例如碳 氫氮化合物（HxCyNz)等’以利於被連結於反應室的抽氣系 統抽離反應室，而且這些小分子生成物也易於在後續的濕 式清洗製程中被清除。 接著，將具有雙鑲嵌開口 132的半導體基底1〇〇移出 上述進行蝕刻製程以及氮氣處理製程136的反應室，並將 半導體基底100送入一濕式清洗裝置，以進行一濕式清洗 製程。根據本發明之較佳實施例，濕式清洗製程係為將具 有雙鑲嵌開口 132的基底100浸泡在濃度約為2.5百萬分 之一（ppm)的氫氟酸水溶液中約1至5分鐘。最後，如第7 圖所示，得到被清除乾淨的雙鑲嵌開口 132。之後，再進 行沉積、研磨等製程，以於雙鑲嵌開口 132中形成銅雙鑲 嵌，此為習知相關技藝者及具通常知識者所熟知，在此不 多加贅述。 值得注意的是，本發明之清洗方式並不限定於上述第 2圖至第7圖所示之清洗先形成溝渠（trench-first)之雙鑲嵌 製程，本發明之清洗方式亦適用於清洗先形成介層洞（via-first)之雙鑲嵌製程；而且都是於形成雙鑲嵌開口的開口蝕 刻之後，才進行現場同時（in-situ)氮氣處理製程136以及濕 式清洗製程。 請參考第8圖至第11圖，第8圖至第11圖為根據第1 圖所示之清洗方法的第二較佳具體實施例，其為本發明應 用於插塞洞製程之清洗方法，其中該插塞洞可以為接觸洞 或介層洞。以下便以實施於接觸洞製程的清洗方法為例來 做說明。如第8圖所示，首先提供一半導體基底200，例 如一碎基底或一絕緣層上覆石夕（S OI)基底等；其中半導體基 底200中包含有一導電區域202，例如導電性摻質或是金 屬矽化物（metal silicide)等。接著，於半導體基底200之上 依序形成一底層204、一介電層206、一触刻停止層208、 一金屬層210、一遮罩層212以及一抗反射底層216。接著， 在抗反射底層216上形成一圖案化之光阻層218 ’以定義 18 1354333 出一接觸洞圖案220。 蝕刻停止層208、金屬層210以及遮罩層212係用來 作為後續蝕刻製程之硬遮罩層214，而蝕刻停止層208之 材料較佳為碳化矽（SiC)，金屬層210之材料較佳為氮化鈦 (TiN)或氮化钽(TaN)，遮罩層212則可選擇以電漿形成之電 漿增強矽氧(PEOX)層。此外，底層204係為一氮化矽層， 而構成介電層206之材料係為低介電常數材料，例如FSG、 " OSG、或ULK等材料。 接著，進行一第一蝕刻製程，經由光阻層218内的接 觸洞圖案220蝕刻抗反射底層216、遮罩層212、金屬層 210以及以及部分之蝕刻停止層208，在硬遮罩層214中形 成一接觸洞凹陷222,並使蝕刻停止在蝕刻停止層208上。 隨然，去除光阻層218以及抗反射底層216，如第9圖所 示。 接著，如第1〇圖所示，利用硬遮罩層214作為蝕刻遮 罩，進行一第二蝕刻製程，經由硬遮罩層214中的接觸洞 凹陷222蝕刻介電層206以及底層204，直至暴露出導電 區域202，以於介電層206中形成一接觸洞224。 此時，由於介電層206之材料為低介電常數材料，因 19 1354333 此在#刻時會產生具有碳氟鍵結(C F)之聚合物殘留於接 觸洞224内；另外’含有金屬之硬遮罩層214亦可能會於 餘刻製程中產生較難清除之金屬殘留物而殘留於接觸洞 224内。在這裡將具有碳氣鍵結（C F)之聚合物以及金屬殘 留物通稱為殘留物2 2 6。故本發明方法係在第二飯刻製程 之後隨即於同一反應室中連續進行-現場同時(in-situ)氮 氣處理製程228。 根據本發明之較佳實施例，氮氣處理製程228係在第 二蝕刻製程之後，隨即於同一反應室中僅只通入氮氣，且 氮氣流量為約700至13〇〇每分鐘標準毫升（sccm)，反應 至壓力。又定為約15〇至250毫托爾（mtorr)，並使用27兆赫 茲（MHZ)的無線電功率產生器（RF generat〇r)產生2⑻瓦特 的功率，反應時間約為3〇秒。其中，通入反應室的氮氣會 形成包含有氮離子、氮自由基、以及I原子等的氮氣電聚， 因而能夠取代碳氟鍵結（C_F)聚合物中的部分F原子，以形 成具揮發性的錢鍵結(C_N)生成物，接著再將這些碳氣鍵 結(C-N)生成物經由連結於反應㈣減系統抽離絲 室。另外，氮氣電漿亦會和金屬殘留物反應形成較易去除 的生成物，舉例來說，氮氣電漿中的氮自由基會切斷金屬 殘留物中的碳碳鍵結（C-C)，以產生較小分子的生成物，例 如碳氫氮化合物(HxCyNz)等，而利於被連結於反應室的抽 氣系統抽離反應室；另外，這些小分子生成物也易於在後 20 1354333 - 績的濕式清洗製程中被清除。 接著’將具有接觸洞224的半導體基底2〇〇移出上述 • 進行蝕刻製程以及氮氣處理製程228的反應室，並將半導 體基底200送入一濕式清洗裝置，以進行一濕式清洗製 秩。根據本發明之較佳實施例，濕式清洗製程係為將具有 接觸洞224的基底200浸泡在濃度約為2.5百萬分之一（ppm) • 的氫氟酸水溶液中約1至5分鐘。最後，如第n圖所示， 得到被清洗乾淨之接觸洞224。最後，再進行沉積、研磨 等製程，以於接觸洞224中形成接觸插塞，此為習知相關 技藝者及具通常知識者所熟知，在此不多加贅述。 本發明的特點在於僅利用一道同時現場（in_situ)氮氣 處理製程以及-道濕式清洗製程，就能夠有效地清除在内 _ 連線製程中開口敍刻後所產生的殘留物，因此，大幅地簡 化製程步驟，進而增加產能並降低製程成本。另外，隨著 清洗能力的提高，因而大大地提升製程良率。此外，由於 本發明係利用只有氮氣的電漿取代習知的反應性氣體，例 如氫氣、氧氣或四就化碳等之氣體電浆，因此，可以避免 在習知技術令損壞低介電常數(1〇以)介電層以及改變低介 ，常數__k)介電層之介電常數(k)值的問題。值得注意的 疋，本發明所使用的清洗氣體，並不限定於使用氮氣，其 他非反應性氣體’例如氦氣、氖氣等惰性氣體亦可以使用。 21 1354333 以上所述僅為本發明之録實_，凡財 專利範圍所做之均等變化與修飾， 申— 圍。 乃之涵蓋範 【圖式簡單說明】 第1圖為本發明之清洗方㈣流程示意圖1354333 IX. Description of the Invention: [Technical Field] The present invention provides a cleaning method after etching in an opening, and more particularly, a cleaning method using an in-situ nitrogen processing process. 4 [Prior Art] Dual damascene technology with low dielectric constant φ (1〇wk; k^2.9) dielectric layer is currently known for high-accumulation, high-speed logic integrated circuit chip fabrication and 0.13 micron The best metal interconnect solution for the following semiconductor processes. The reason is that copper has low resistance (30% lower than aluminum) and better resistance to electro-migration resistance, while dielectric layer materials with low dielectric constant can help reduce the relationship between metal wires. Resistivity-Capacitance Time Delay, it can be seen that the dielectric layer material with low dielectric constant and copper metal double-insertion-insert interconnection technology are increasingly important in the integrated circuit process. The low-k dielectric layer is composed of a ruthenium oxide material doped with carbon atoms, that is, an oxygen atom partially bonded to the ruthenium atom in the ruthenium oxide material is subjected to at least one organic functional group, for example, Substituted by methyl group (CH3-), etc. Such low dielectric constant materials include organo-silicate-glasses (OSGs), fluorinated silica glasses (FSGs), and hydrogen silsequoxianes (HSQ). , methyl 1354333 silsequoxiane (MSQ), etc., whose dielectric constant value _ is less than about 2.5. Although a part of the oxygen atoms taken by using at least one organic functional group can effectively reduce the ruthenium oxide material in the ruthenium material, the bond between the ruthenium atom and the functional group is not as high as the value of the original one. Stable; therefore, in the fabrication of a copper dual damascene part of the 掣'^ oxygen atomic silver engraved low-k dielectric layer to form an opening such as trench or interlayer = ^ ^ such as φ, or remove light The ashing process of the resist layer, etc., the bond between the energy bases of the stone opening structure is easily destroyed. Atom and s When the bond between a ruthenium atom and a functional group is broken, the radicals that are carried out react with the reaction gases used in processes such as etching or ashing to produce many fluorocarbon bonds. The (CF) polymer remains on the bottom or sidewall of the remaining dual damascene structure. In addition, with the continuous improvement of semiconductor process technology, many copper double-drawing processes use a hard mask layer containing a metal layer, such as & titanium nitride (TiN), as a residual mask. Replacing a conventional organic photoresist layer; however, when a hard mask layer comprising a metal layer is used as an etch mask, it is more difficult to create a copper double damascene opening after engraving than a conventional organic photoresist layer. The removed metal residue remains on the bottom or sidewall of the dual damascene opening. Therefore, if a metal conductive layer, such as copper, is directly filled into the double damascene opening d in a subsequent process to make a metal interconnection, an increase in resistance value occurs. 1354333 Thus, there are a number of patents that disclose methods for removing fluorocarbon-bonded (cF) polymers or metal residues, such as U.S. Patent Publication No. 2006/0246717 A1, "Method of Making Dual Mosaic Structures and Clearing Their Residual Polymers (Method For fabricating a dual damascene and polymer removal), wherein after the double damascene structure etching is completed, a gas containing hydrogen, oxygen or carbon tetrafluoride (CF4) is introduced into the same reaction chamber, and Nitrogen or inert gas may be additionally introduced to perform a dry cleaning process on the dual damascene structure to remove residues generated after etching the low dielectric constant dielectric layer. In addition, in the method for the removal of the etch-stop layer etch, the semiconductor substrate is also disclosed after the completion of the dual damascene structure. Transfer to a plasma cleaning chamber and pass a plasma containing argon to remove residual polymer. However, the above-mentioned cleaning method using argon/oxygen/carbon tetrafluoride (CF4) plasma, or a cleaning method using only hydrogen plasma, still cannot effectively remove residual polymer or metal residue, so There has been no breakthrough in increasing the yield of the process. Therefore, after the conventional plasma cleaning method, it is often necessary to use multiple wet cleaning processes to remove these residual polymer or metal residues; however, the addition of multiple wet cleaning processes is greatly reduced. The throughput of the process and 8 1354333 increase the process cost. Furthermore, the use of a reactive gas plasma, such as hydrogen or carbon tetrafluoride (CF4), etc., tends to damage the low-k dielectric layer or cause dielectric of these low-k dielectric layers. A change in the value of the constant (k), thus affecting the capacitance of the opposing component. Therefore, how to effectively remove the polymer produced after the opening etching, and not destroy the dual damascene structure during the cleaning process, or change the dielectric constant (k) value of the low-k dielectric layer during the cleaning process. It is still the direction that the industry is currently studying. SUMMARY OF THE INVENTION The present invention provides a cleaning method after an opening etching, and more particularly to a cleaning method using an in-situ nitrogen processing process. According to the scope of the invention, there is provided a cleaning method after an opening etch. First, a semiconductor substrate is provided, a dielectric layer is formed thereon, and then the opening is etched to form at least one opening in the dielectric layer, and then a nitrogen treatment process is performed to clean the fluorocarbon bond in the opening (CF). The polymer residue is finally subjected to a wet cleaning process. The invention is characterized in that only a simultaneous in-situ nitrogen treatment process and a wet cleaning process can effectively remove the residue generated after the opening of the interconnect process, so that 'substantially Jane 9 1354333 process steps to increase productivity and reduce process costs. In addition, as the cleaning ability is increased, the process yield is greatly improved. In addition, since the present invention utilizes a plasma of only nitrogen to replace a conventional reactive gas, such as gas of helium, oxygen or tetra-decreasing carbon, it is possible to avoid damage to the low dielectric constant in the prior art. The dielectric layer and the problem of changing the dielectric constant (k) value of the low-k dielectric layer. [Embodiment] Please refer to Fig. 1 which is a flow chart of the cleaning method after the opening of the invention. As shown in FIG. 1 , in step 10, a semiconductor substrate is first provided, such as a dream substrate or a silicon-on-insulator (SOI) substrate, on which a dielectric layer is formed. And a hard mask layer 'where the hard mask layer comprises at least one metal layer. The semiconductor substrate may also include at least one functional component such as a metal oxide semiconductor (MOS) transistor or the like. The dielectric layer is a low dielectric constant dielectric layer, such as carbon doped oxide (CDO), organic germanium glass (〇SGs), fluorine-containing germanium oxide (FSGs), or super A material layer having a low dielectric constant (Ultra low-k; k<2.5); a method of forming a low-k dielectric layer includes a spin-coating process and an electro-destructive enhanced chemical vapor deposition process (plasma- Enhanced chemical vapor deposition; PECVD), high density plasma chemical vapor deposition (HDPCVD) process. 1354333 Then, in step 20, at least one opening etch is performed using the hard mask layer containing at least one metal layer as an etch mask to form at least one opening in the dielectric layer. The opening etching may be performed by using a sputtering process such as a sputtering etch process, a plasma etch process, or a reactive ion etch (RIE) process in the etching reaction chamber. Injecting a reactive gas, etching the hard mask layer and the dielectric layer to form at least one opening in the dielectric layer; wherein the etching reaction chamber may be an Inductive Coupled Plasma (ICP) or an Electronic Surround Resonance ( Electron Cyclotron Resonance; ECR), or Transformer Coupled Plasma (TCP), etc. The type of gas introduced into the reaction chamber will vary depending on the layer of material to be etched. For example, when the dielectric layer is to be etched, a reaction gas containing carbon atoms and fluorine atoms is introduced into the reaction chamber. For example, carbon tetrafluoride (CF4), trifluoromenthane (CHF3), hexafluoroethane (perfiu〇r〇ethane; c#6), octatetracycline (tetra) hexafluoride iCJ8) Etc., and can mix oxygen and hydrogen to form a reaction gas for electropolymerization' followed by etching the dielectric layer by means of ion bombardment, electropolymerization, or both ion bombardment and plasma etching. . In the above opening etching process, since the dielectric layer is composed of a low dielectric constant material, a polymer having a fluorocarbon bond (CF) is left at the bottom of the opening structure when the dielectric layer is etched or On the side wall. In addition, etching a hard mask layer containing a metal layer may also result in a residue of gold 1354333 that is difficult to remove, such as a metal residue having a carbon-carbon bond (c-c). Here ‘polymers with fluorocarbon bonds (C-F) and metal residues are collectively referred to as residues. The opening formed in the step 20 may be a single opening pattern, a double inlaid opening or a plug hole, and the double inlaid opening may also be a trench-first. The double inlaid opening or the via-first double inlaid opening; in addition, the plug hole may also be a contact hole or a via hole. Next, in step 30, an in-situ nitrogen treatment process is applied to the formed opening to remove the residue generated in the open etching. It is worth noting that the simultaneous nitrogen treatment process in this site is carried out in the same reaction chamber as the open etching; and the cleaning mechanism of the nitrogen treatment process is the same as the above-described opening etching, for example, using a sputtering etching process, plasma etching An etching process such as a process or reactive ion etching to remove residues in the opening. According to a preferred embodiment of the present invention, the nitrogen treatment process is followed by open etching, followed by only nitrogen gas in the same reaction chamber, and the nitrogen flow rate is about 700 to 1300 standard milliliters per minute (standard cubic centimeter per minute; The reaction chamber pressure is set to about 150 to 250 millitorr (mtorr), and a 27 megahertz (MHZ) radio frequency generator (RF generator) is used to generate 200 watts of power with a response time of about 30 volts. second. Wherein, the nitrogen 12 1354333 gas introduced into the reaction chamber forms a nitrogen plasma containing a nitrogen radical, a cesium ion, or a nitrogen atom, and thus can replace a part of the ρ atom in the fluorocarbon bonded (CF) polymer to form A volatile carbon-germanium bond (C_N) product is then removed from the carbon-nitrogen bond (CN) product via a pumping system coupled to the reaction chamber. In addition, 'nitrogen plasma will react with metal residues to form a relatively easy to remove product'. For example, I radicals in I gas electropolymerization cut off parts of metal residues with carbon-carbon bonds (cc). Carbon-carbon (c_c) linkage' makes the metal residue a product of smaller molecules, such as carbon-hydrogen compounds (HxCyNz), etc., to facilitate extraction from the reaction chamber by the extraction system attached to the reaction chamber' and these small Molecular products are also easily removed in subsequent wet cleaning processes. Finally, in step 40, the formed opening is subjected to a wet cleaning process. According to a preferred embodiment of the present invention, the wet cleaning process is to feed a semiconductor substrate having an opening into a wet cleaning apparatus and immerse it in a /1 degree force of 2.5 parts per minute (parts per Mini〇n ; ppm) in aqueous hydrogen acid solution for about 1 to 5 minutes. Thereafter, the steps of rinsing with deionized water, drying, and the like, and finally removing the wet cleaning device are well known to those skilled in the art and those of ordinary skill in the art, and will not be further described herein. It should be noted that the nitrogen treatment process in the above step 30 is because the % is a "nitrogen" treatment process because the present invention uses only a non-reactive (n〇n-reactive) gas such as nitrogen as a plasma source. Clearing the residue generated in the open etching 13 1354333. Therefore, it can be avoided in the prior art because of the damage caused by the use of reactive (four (4) gases, such as hydrogen, oxygen or carbon tetrahydride). Low dielectric constant (low_k) dielectric layer and the problem of changing the dielectric constant (8) of the low dielectric constant (low-k) dielectric layer. However, this step is not limited to the use of nitrogen, other non-reactivity Gases such as inert gas (Helium), neon (Neon), etc. can also be used. • Please refer to Figures 2 to 7, and Figures 2 to 7 are based on i " A first preferred embodiment of the cleaning method shown in FIG. 2 is a cleaning method for the dual damascene opening process, wherein the dual damascene opening may be a trench-first dual damascene opening. Or to form a double-inlay of via-first The opening is described below by taking a cleaning method of a double-inlaid opening process which first forms a trench-first. As shown in FIG. 2, a semiconductor substrate 1 is first provided, for example, a _ substrate. Or an insulating layer overlying a bismuth (S0I) substrate, etc., having a conductive layer 102 and a bottom dielectric layer thereon. Then, a bottom layer 104 and a dielectric layer are sequentially formed on the underlying dielectric layer and the conductive layer 102. Electrical layer 〇6, an etch stop layer 108, a metal layer 110', a mask layer 112, and a first anti-reflection coating (BAR) 116. Next, on the first anti-reflection underlayer 116 A patterned first photoresist layer 118 is formed to define a trench pattern 12? wherein the etch stop layer 108, the metal layer 11 and the mask layer 112 14 1354333 are used as a hard mask for the subsequent etching process. The layer 114, and the material of the etch stop layer 108 is preferably silicon carbide (SiC), the material of the metal layer 110 is preferably titanium nitride (TiN) or tantalum nitride (TaN), and the mask layer 112 is Plasma can be formed by electropolymerization to enhance Shi Xi oxygen (plasma) Further, the underlayer 104 is a tantalum nitride layer, and the material constituting the dielectric layer 106 is a low dielectric constant material such as FSG, OSG, or ULK (k < 2.5). Performing a first etching process, such as a splatter etching process, a plasma etching process, or a reactive ion etching process, etc., etching the first anti-reflective underlayer 116 via the trench pattern 120 in the first photoresist layer 118, The mask layer 112, the metal layer 110, and a portion of the etch stop layer 108 form a trench recess 122 in the hard mask layer 114 and stop etching at the etch stop layer 108. The first photoresist layer 118 and the first anti-reflective underlayer 116 are removed, as shown in FIG. Next, as shown in Fig. 4, a second anti-reflective underlayer 124 is formed on the hard mask layer 114, and the second anti-reflective underlayer fills the trench recess 122. A patterned second photoresist layer 126 is then formed over the second anti-reflective underlayer 124 to define a via pattern 128. Next, as shown in FIG. 5, a second etching process, such as a splatter etching process, a plasma etching process, or a reactive ion etching process, is performed in the first photoresist layer 126. The interlayer pattern i28 is slid down to the second anti-reflective bottom layer m, the _ stop layer (10)... the money is engraved to the part of the "electric layer 106 and stops, and the reporter enters & ' knows to form a via hole depression 130. Thereafter, the remaining second photoresist layer 126 and the second anti-reflective underlayer 124 are removed. As shown in FIG. 6, the hard mask layer 114 is used as a rhyme mask to perform a third etching process. For example, a splashing process, an electropolymerization process, or a reactive ion process, through the via hole recess and the trench recess 122_dielectric layer 1G6 and the bottom layer iG4, until the conductive layer 1〇2, A double damascene opening 132 having a trench and a via hole is formed in the dielectric layer 1〇6. At this time, since the material of the dielectric layer 106 is a low dielectric constant material, a fluorocarbon bond is generated in the rhyme. The polymer of the junction (C_F) remains in the double-rubber inlaid opening 132. In addition, the metal layer 112 is contained. The hard mask layer 114, the village can produce metal residues that are difficult to remove in the process, such as a polymer with carbon-carbon bonds (C_C), remaining in the double-inserted port 132. Here will have carbon knots (The polymer is called metal residue from the residue 134. Therefore, the present invention is continuously performed in the same reaction chamber after the third characterization process. (in_s (four) nitrogen treatment system according to the preferred embodiment of the present invention. For example, the nitrogen treatment process 136 is after the 16th 1354333 three-button engraving process, and then only nitrogen gas is introduced into the same reaction chamber, and the nitrogen flow rate is about 700 to 1300 standard milliliters per minute (SCCm), and the reaction is set to a pressure of Approximately 150 to 250 millitors (mtorr), and using a 27 Hz (MHZ) radio power generator (rf generator) to generate 200 watts of power, the reaction time is about 30 seconds, wherein the nitrogen into the reaction chamber A nitrogen plasma containing nitrogen ions, nitrogen radicals, nitrogen atoms, and the like is formed, and thus a part of the f atoms in the fluorocarbon bonded (CF) polymer can be substituted to form a volatile carbon-nitrogen bond. Knot CN) a product, which is then pumped away from the reaction chamber via a pumping system coupled to the reaction chamber. In addition, the nitrogen plasma is also associated with a metal having carbon-carbon (CC) bonding. The residue reacts to form a relatively easily removed product. For example, nitrogen radicals in nitrogen electrolysis cut off some carbon-carbon bonds (CC) in the metal residue, making the metal residue smaller. The product, such as a hydrocarbon nitrogen compound (HxCyNz) or the like, is facilitated to be evacuated from the reaction chamber by a pumping system coupled to the reaction chamber, and these small molecule products are also easily removed in a subsequent wet cleaning process. Next, the semiconductor substrate 1 having the dual damascene openings 132 is removed from the reaction chamber for performing the etching process and the nitrogen treatment process 136, and the semiconductor substrate 100 is fed to a wet cleaning apparatus to perform a wet cleaning process. In accordance with a preferred embodiment of the present invention, the wet cleaning process is to immerse the substrate 100 having the dual damascene openings 132 in an aqueous hydrofluoric acid solution having a concentration of about 2.5 parts per million (ppm) for about 1 to 5 minutes. Finally, as shown in Figure 7, a cleaned dual damascene opening 132 is obtained. Thereafter, deposition, grinding, and the like are performed to form a copper double inlay in the dual damascene opening 132, which is well known to those skilled in the art and will be described in detail herein. It should be noted that the cleaning method of the present invention is not limited to the double damascene process of cleaning the first trench-first shown in the above FIG. 2 to FIG. 7 , and the cleaning method of the present invention is also suitable for cleaning first. A via-first dual damascene process; and both in-situ nitrogen processing 136 and wet cleaning processes are performed after opening etching to form a dual damascene opening. Please refer to FIG. 8 to FIG. 11 . FIG. 8 to FIG. 11 are second preferred embodiments of the cleaning method according to FIG. 1 , which are the cleaning method for the plug hole process according to the present invention. The plug hole may be a contact hole or a via hole. The cleaning method implemented in the contact hole process will be described below as an example. As shown in FIG. 8, a semiconductor substrate 200 is first provided, such as a broken substrate or an insulating layer coated on a rock (S OI) substrate, etc.; wherein the semiconductor substrate 200 includes a conductive region 202, such as a conductive dopant or It is a metal silicide or the like. Next, a bottom layer 204, a dielectric layer 206, a etch stop layer 208, a metal layer 210, a mask layer 212, and an anti-reflective bottom layer 216 are sequentially formed on the semiconductor substrate 200. Next, a patterned photoresist layer 218' is formed on the anti-reflective underlayer 216 to define a contact hole pattern 220 of 18 1354333. The etch stop layer 208, the metal layer 210, and the mask layer 212 are used as the hard mask layer 214 for the subsequent etching process, and the material of the etch stop layer 208 is preferably tantalum carbide (SiC), and the material of the metal layer 210 is preferably For titanium nitride (TiN) or tantalum nitride (TaN), the mask layer 212 may be selected from a plasma-enhanced plasma enhanced PEOX layer. In addition, the underlayer 204 is a tantalum nitride layer, and the material constituting the dielectric layer 206 is a low dielectric constant material such as FSG, "OSG, or ULK. Next, a first etching process is performed to etch the anti-reflective underlayer 216, the mask layer 212, the metal layer 210, and a portion of the etch stop layer 208 through the contact hole pattern 220 in the photoresist layer 218, in the hard mask layer 214. A contact hole recess 222 is formed and the etch is stopped on the etch stop layer 208. The photoresist layer 218 and the anti-reflective underlayer 216 are removed, as shown in FIG. Next, as shown in FIG. 1 , using the hard mask layer 214 as an etch mask, a second etching process is performed to etch the dielectric layer 206 and the bottom layer 204 through the contact hole recesses 222 in the hard mask layer 214 until The conductive region 202 is exposed to form a contact hole 224 in the dielectric layer 206. At this time, since the material of the dielectric layer 206 is a low dielectric constant material, since 19 1354333, a polymer having a fluorocarbon bond (CF) is left in the contact hole 224 at the time of engraving; The hard mask layer 214 may also cause metal residues that are difficult to remove in the residual process to remain in the contact holes 224. Here, a polymer having a carbon gas bond (C F) and a metal residue are collectively referred to as residue 2 26 . Thus, the process of the present invention is carried out continuously in the same reaction chamber after the second meal process - an in-situ nitrogen treatment process 228. According to a preferred embodiment of the present invention, the nitrogen treatment process 228 is followed by a second etching process followed by only nitrogen gas in the same reaction chamber, and the nitrogen flow rate is about 700 to 13 Torr per minute (sccm). React to pressure. It is also set to be about 15 〇 to 250 mtorr, and uses a 27 megahertz (MHZ) radio power generator (RF generat〇r) to generate 2 (8) watts of power with a reaction time of about 3 sec. Wherein, the nitrogen gas introduced into the reaction chamber forms a nitrogen gas electropolymerization containing nitrogen ions, nitrogen radicals, and I atoms, and thus can replace part of the F atoms in the fluorocarbon bonded (C_F) polymer to form a volatile The product of the carbon bond (C_N) is then extracted from the wire chamber via a reaction (4) subtraction system. In addition, the nitrogen plasma reacts with the metal residue to form a relatively easily removed product. For example, nitrogen radicals in the nitrogen plasma cut off carbon-carbon bonds (CC) in the metal residue to produce The product of a smaller molecule, such as a hydrocarbon nitrogen compound (HxCyNz), etc., facilitates the extraction of the pumping system connected to the reaction chamber from the reaction chamber; in addition, these small molecule products are also prone to be wet in the latter 20 1354333 - performance The cleaning process is cleared. Next, the semiconductor substrate 2 having the contact holes 224 is removed from the above-described reaction chamber for performing the etching process and the nitrogen treatment process 228, and the semiconductor substrate 200 is fed to a wet cleaning apparatus to perform a wet cleaning process. In accordance with a preferred embodiment of the present invention, the wet cleaning process is to immerse the substrate 200 having the contact holes 224 in a hydrofluoric acid aqueous solution having a concentration of about 2.5 parts per million (ppm) for about 1 to 5 minutes. Finally, as shown in Figure n, a cleaned contact hole 224 is obtained. Finally, deposition, grinding, and the like are performed to form contact plugs in the contact holes 224, which are well known to those skilled in the art and those of ordinary skill in the art, and will not be further described herein. The invention is characterized in that only a simultaneous in-situ (in_situ) nitrogen treatment process and a -channel wet cleaning process can effectively remove the residue generated after the opening in the inner-connection process, and therefore, substantially Simplify process steps to increase productivity and reduce process costs. In addition, as the cleaning ability is increased, the process yield is greatly improved. In addition, since the present invention replaces a conventional reactive gas such as hydrogen gas, oxygen gas or a gas plasma such as carbon with a plasma of only nitrogen gas, it is possible to avoid damage to the low dielectric constant in the prior art ( The problem is that the dielectric layer and the dielectric constant (k) of the dielectric layer are changed by a low dielectric constant __k. It is to be noted that the cleaning gas used in the present invention is not limited to the use of nitrogen gas, and other non-reactive gases such as helium or neon may be used. 21 1354333 The above is only a record of the invention _, the equivalent changes and modifications made by the scope of patents, Shen-Wei. Coverage of the model [Simplified description of the diagram] Figure 1 is a schematic diagram of the process of cleaning (4) of the present invention
第2圖至第7圖為本發明根據第1圖所示之清洗方法 一較佳具體實施例 先方法 1圖所示之清洗方法的第 第8圖至第11圖為本發明根據第 二較佳具體實施例。 【主要元件符號說明】2 to 7 are the cleaning method according to the first embodiment of the present invention. The eighth to eleventh drawings of the cleaning method shown in the first method of the first embodiment are based on the second comparison. A preferred embodiment. [Main component symbol description]
10 步驟 20 步驟 30 步驟 40 步驟 100半導體基底 101底層介電層 102導電層 104底層 106介電層 108姓刻停止層 13 0介層丨同凹陷 132雙鑲嵌開口 134殘留物 136氱氣處理製程 200半導體基底 202導電區域 204底層 206介電層 208轴刻停止層 210金屬層 22 1354333 110金屬層 212遮罩層 112遮罩層 214硬遮罩層 114硬遮罩層 216第一抗反射底層 116第一抗反射底層218光阻層 118第一光阻層 220接觸洞圖案 120溝渠圖案 222接觸洞凹陷 122溝渠凹陷 224接觸洞 124第二抗反射底層226殘留物 126第二光阻層 128介層洞圖案 228氮氣處理製程 2310 Step 20 Step 30 Step 40 Step 100 Semiconductor substrate 101 Underlying dielectric layer 102 Conductive layer 104 Underlayer 106 Dielectric layer 108 Last stop layer 13 0 Dielectric sag 132 Dual damascene opening 134 Residue 136 Helium treatment process 200 Semiconductor substrate 202 conductive region 204 underlayer 206 dielectric layer 208 axis stop layer 210 metal layer 22 1354333 110 metal layer 212 mask layer 112 mask layer 214 hard mask layer 114 hard mask layer 216 first anti-reflective bottom layer 116 An anti-reflective underlayer 218 photoresist layer 118 first photoresist layer 220 contact hole pattern 120 trench pattern 222 contact hole recess 122 trench recess 224 contact hole 124 second anti-reflective bottom layer 226 residue 126 second photoresist layer 128 via hole Pattern 228 nitrogen treatment process 23