TWI346341B - Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus - Google Patents

Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus

Info

Publication number
TWI346341B
TWI346341B TW095112289A TW95112289A TWI346341B TW I346341 B TWI346341 B TW I346341B TW 095112289 A TW095112289 A TW 095112289A TW 95112289 A TW95112289 A TW 95112289A TW I346341 B TWI346341 B TW I346341B
Authority
TW
Taiwan
Prior art keywords
blocks
flash
bus
volatile memories
multiple non
Prior art date
Application number
TW095112289A
Other languages
English (en)
Other versions
TW200636747A (en
Inventor
Jens Peter Wittenburg
Thomas Brune
Original Assignee
Thomson Licensing
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing filed Critical Thomson Licensing
Publication of TW200636747A publication Critical patent/TW200636747A/zh
Application granted granted Critical
Publication of TWI346341B publication Critical patent/TWI346341B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
TW095112289A 2005-04-15 2006-04-07 Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus TWI346341B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05090111A EP1712985A1 (en) 2005-04-15 2005-04-15 Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data I/O bus

Publications (2)

Publication Number Publication Date
TW200636747A TW200636747A (en) 2006-10-16
TWI346341B true TWI346341B (en) 2011-08-01

Family

ID=36579583

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095112289A TWI346341B (en) 2005-04-15 2006-04-07 Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus

Country Status (7)

Country Link
US (1) US8301825B2 (zh)
EP (2) EP1712985A1 (zh)
JP (1) JP4954974B2 (zh)
KR (1) KR101252317B1 (zh)
CN (1) CN101156129B (zh)
TW (1) TWI346341B (zh)
WO (1) WO2006108755A1 (zh)

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WO2008087082A1 (en) * 2007-01-15 2008-07-24 Thomson Licensing Method and apparatus for recording data into a matrix of memory devices
US8825939B2 (en) * 2007-12-12 2014-09-02 Conversant Intellectual Property Management Inc. Semiconductor memory device suitable for interconnection in a ring topology
US20090271564A1 (en) * 2008-04-25 2009-10-29 Hitachi, Ltd. Storage system
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US8180981B2 (en) * 2009-05-15 2012-05-15 Oracle America, Inc. Cache coherent support for flash in a memory hierarchy
EP2264604A1 (en) * 2009-06-15 2010-12-22 Thomson Licensing Device for real-time streaming of two or more streams in parallel to a solid state memory device array
EP2270662A1 (en) * 2009-06-29 2011-01-05 Thomson Licensing Method and apparatus for dealing with write errors when writing information data into flash memory devices
CN102004701B (zh) 2009-08-28 2013-01-09 炬才微电子（深圳）有限公司 一种次级内存的分配方法和装置
JP2011100518A (ja) * 2009-11-06 2011-05-19 Toshiba Corp 半導体装置及びその制御方法
CN101923578B (zh) * 2010-09-09 2012-07-25 成都雷思特电子科技有限责任公司 高速数据流文件式存取装置及方法
CN102541945B (zh) * 2010-12-31 2014-04-09 联芯科技有限公司 终端上的多项文件复制方法及装置
US9329996B2 (en) * 2011-04-27 2016-05-03 Veris Industries, Llc Branch circuit monitor with paging register
US9195581B2 (en) * 2011-07-01 2015-11-24 Apple Inc. Techniques for moving data between memory types
US9015404B2 (en) * 2012-09-28 2015-04-21 Intel Corporation Persistent log operations for non-volatile memory
KR102047495B1 (ko) 2013-02-22 2019-11-21 삼성전자주식회사 클라이언트에서 캐시를 이용하여 서버의 멀티 미디어 컨텐트를 스트리밍 재생하는 방법 및 이를 위한 장치
US9781225B1 (en) * 2014-12-09 2017-10-03 Parallel Machines Ltd. Systems and methods for cache streams
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US10747659B2 (en) 2018-02-06 2020-08-18 Western Digital Technologies, Inc. Flash fast program mode for high definition video recording and high resolution camera burst mode recording
US11487654B2 (en) * 2020-03-02 2022-11-01 Silicon Motion, Inc. Method for controlling write buffer based on states of sectors of write buffer and associated all flash array server

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Also Published As

Publication number Publication date
CN101156129B (zh) 2010-12-08
US8301825B2 (en) 2012-10-30
WO2006108755A1 (en) 2006-10-19
TW200636747A (en) 2006-10-16
KR101252317B1 (ko) 2013-04-08
EP1712985A1 (en) 2006-10-18
KR20070119692A (ko) 2007-12-20
CN101156129A (zh) 2008-04-02
EP1869543A1 (en) 2007-12-26
JP4954974B2 (ja) 2012-06-20
JP2008537828A (ja) 2008-09-25
US20090043948A1 (en) 2009-02-12
EP1869543B1 (en) 2013-03-06

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