TWI335463B - Thin film transistor liquid crystal display panel, array substrate of the same, and method of manufacturing the same - Google Patents

Description

1335463 IX. Description of the Invention: [Technical Field] The present invention relates to a liquid crystal display panel, and more particularly to a color filter film integrated on a thin film transistor array (color filter) On array, referred to as C0A), a thin film transistor liquid crystal display panel, an array substrate thereof, and a method of fabricating the same. [Prior Art] With the development of high technology, video products, especially digital video or video devices, have become common products in everyday life. In these digital video or video devices, the display is an important component to display relevant information. The user can read the information from the display or, in turn, control the operation of the device. In order to cope with modern lifestyles, the size of video or video devices is becoming thinner and lighter. Conventional cathode ray display, while still having its advantages, requires a large volume and consumes power. Therefore, panel-type displays have been developed to become common display products, such as thin film electro-crystal liquid crystal displays, in conjunction with optoelectronic technology and semiconductor manufacturing technology. Thin film transistor liquid crystal displays have advantages that cannot be achieved with conventional cathode ray tubes (CRTs) manufactured by low-voltage operation, no radiation scattering, light weight, and small size, and other flat-panel displays such as electricity Poly-displays and electroluminescence displays have become the main topics of display research in recent years, and are regarded as the mainstream of displays in the 21st century. As shown in FIG. 1 , a conventional thin film transistor liquid crystal display panel generally has a thin film transistor array substrate 102, a pair of substrates 104 and a liquid crystal layer (not shown), wherein the liquid crystal layer is located on the substrate 102 and Between 104. On the thin film transistor array substrate 102, there is a thin film transistor array 112 including scanning wiring, data wiring, and a plurality of thin film transistors. Then, between the substrates 102 and 104, there will be a 1335.463 frame glue i Ο 6 ' to close the space between the substrates i Ο 2 and i ο 4 so that the liquid crystal can be in the middle, and the closed area is mainly used for display. The pattern or color is therefore called the display region. Moreover, the sealant 106 needs to reserve a liquid crystal injection port (108) for liquid crystal injection. In addition to the above-mentioned conventional thin film transistor liquid crystal display panel, there is a technology for producing a thin film transistor liquid crystal display panel by a brown eye, which is characterized in that it is directly fabricated on the remaining 1 () 2 of the thin film electrocrystal (10) column m. Color calendering film, the advantage of which is to increase the panel aperture ratio n. The thin film transistor liquid crystal display panel which is formed by integrating the color (four) light film on the thin film transistor array substrate is currently applied to thin and high resolution. NB panel or one of the liquid crystal display panels of LCD TVs, high-end LCD monitors and other products. However, the above-mentioned thin film transistor liquid crystal display panel formed by integrating a color light-sensitive film on a thin film transistor array substrate has the following disadvantages: First, taking FIG. 1 as an example, it is generally directly on the substrate 104 having the thin film transistor array 112. After making the "color filter" light film, it is necessary to make the black matrix (BM) first in the future. Therefore, how to reduce the processing time of the thin film transistor liquid crystal display panel made by c〇A technology With cost, it has become one of the focuses of research. Moreover, when the BM and the color filter film are formed on the same substrate, the alignment problem of the above two will affect the yield of the product. Further, in the display area edge (b〇rder) 11 of Fig. 1, light leakage is often emitted from the lines on the substrate 102, which affects the display quality of the thin film transistor liquid crystal display panel. In addition, the liquid crystal injection port 1〇8 reserved at the edge of the display area also has a problem of light leakage. In addition, each of the thin film transistors in the thin film transistor array 112 of FIG. 1 or the wires around the thin film transistor array 112 may have a repair structure (not shown) for the failure of the thin film transistor. Or in the case of line defects, enter the 1353546 line repair process. However, the conventional repair structure is often covered by a thick dielectric layer, and a dielectric layer burst occurs during the repair process, so that the repair process cannot be completed, resulting in a thin film transistor that needs to be repaired. Unable to use, line defects cannot be repaired. In addition to the foregoing disadvantages, referring again to FIG. 1, each of the thin film transistors 112 further has a storage capacitor (also referred to as Cst) whose structure is mainly in two metal layers. An insulating layer is interposed, and the upper metal layer is connected to the halogen electrode to be manipulated by the thin film transistor. However, due to errors in the lithography process, such as development or etching processes, the dielectric layer on the storage capacitor is not fully exposed or incompletely etched, and some of the dielectric layer remains, which may result in contact between the metal layer and the element of the halogen electrode. Poor performance causes the liquid crystal capacitor to not maintain a certain gray level for the required time, resulting in poor panel performance. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to save process time. It is still another object of the present invention to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to reduce manufacturing costs. Another object of the present invention is to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to reduce light leakage at the edge of the display area. It is still another object of the present invention to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to reduce light leakage from a liquid crystal injection port. It is still another object of the present invention to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to prevent the dielectric structure from bursting during the repair process. Another object of the present invention is to provide a thin film transistor liquid crystal display panel and a method of fabricating the same to solve the problem of poor contact of the storage capacitor. 1335463 In accordance with the above and other objects, the present invention provides a thin film transistor array substrate comprising a substrate, a scan wiring, a data wiring, a thin film transistor, a pixel electrode, a color filter film, and a color filter stack. The scanning wiring and the data wiring system are disposed on the substrate, and the data wiring and the scanning wiring system constitute a plurality of pixel regions. The thin film transistor is disposed at the intersection of the data wiring and the scanning wiring, and is controlled by the data wiring and the scanning wiring. The halogen electrodes are disposed in the halogen region and are electrically connected to the corresponding thin film transistors, respectively. Further, the color filter film is disposed on the pixel region, and the color filter layer is disposed on the color filter film above the film transistor. Further, a thin film transistor liquid crystal display panel can be obtained by adding a pair of a substrate and a liquid crystal layer between the two substrates. The invention further provides a thin film transistor pixel structure having a plurality of pixel regions on a substrate, including a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of wires, and a plurality of first and second A third color filter stack. The halogen electrode is located in the pixel region, and the thin film transistor is disposed in the halogen region. The wires are disposed at the intersection of the halogen regions to define a pixel region, wherein the pixel electrodes are electrically connected to the wires via the thin film transistors. The first color filter stack is on the pixel electrode, the second color filter stack is on the wire, and the third color filter stack is on the thin film transistor. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, and then patterning the first metal layer to form a plurality of gates and a plurality of scan lines. Next, a gate insulating layer is formed on the substrate, and a patterned amorphous germanium layer is formed on the gate to form a plurality of channel layers. Thereafter, a second metal layer is formed on the substrate, and the second metal layer is patterned to form a plurality of sources, a plurality of drain electrodes on the gate, and a plurality of data wires are formed on the substrate, wherein the data wiring and the data are The scanning wiring system constitutes a plurality of halogen regions, and the gate, the channel layer, the source, and the 1354463 drain are composed of a plurality of thin film transistors. Then, a plurality of first color filter films are formed in the pixel regions, and a plurality of second color filter films are formed to cover the first color filter film above the film transistors. Then, a plurality of pixel electrodes are formed on the substrate in the pixel region, and the halogen electrodes are electrically connected to the corresponding thin film transistors, respectively. In addition, a pair of substrates can be further provided, and a thin film transistor liquid crystal display panel can be fabricated by disposing a liquid crystal layer between the opposite substrate and the thin film transistor array substrate with respect to the thin film transistor array substrate. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a plurality of scanning wires on a substrate, and then forming a plurality of data wires on the substrate, wherein the data wires and the scanning wires form a plurality of pixel regions . Thereafter, a plurality of thin film transistors are formed at the intersection of the data wiring and the scanning wiring, and the thin film electrocrystallization system is controlled by the data wiring and the scanning wiring, and then a plurality of pixel electrodes are formed in the pixel region, and the pixel electrodes are formed. They are electrically connected to the corresponding thin film transistors. Then, a plurality of color filter films are formed on the pixel region, and a plurality of color filter stacks are formed on the color filter film above the film transistors. The present invention further provides a thin film transistor array substrate comprising a display area and a non-display area, characterized by a ring-shaped color filter stack disposed around the edge of the display area in the non-display area. The present invention further provides a thin film transistor array substrate comprising a display area and a non-display area, characterized in that a plurality of first metal layers are disposed at an edge of the display area, that is, a non-display area; and a plurality of second metal layers Partially overlapping the first metal layer configuration to prevent light leakage at the edge of the display area. The present invention further provides a thin film transistor array substrate, comprising a display area and a non-display area, wherein a first metal layer is disposed on the edge of the display area, a second metal layer, and partially overlapping the first metal layer; And at least one annular color light-transmissive film disposed around the edge of the display area. 1335463 The present invention further provides a light-shielding structure, which is applicable to a non-display area of a thin film transistor array substrate, and includes a first metal layer disposed on the non-display area and a second metal layer, and is disposed to overlap with the first metal layer. The first and second metal layers are electrically isolated by an insulating layer; and the at least one color filter film is disposed on the first and second metal layers. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, wherein the substrate comprises a display area and a non-display area. Thereafter, the first metal layer is patterned to form a plurality of gates and a plurality of scan lines, wherein the scan lines extend to the edge of the display area. Next, a gate insulating layer and an amorphous germanium layer are formed on the substrate, and the amorphous germanium layer other than above the gate is removed to form a plurality of channel layers. Thereafter, a second metal layer is formed on the substrate, and the second metal layer is patterned to form a source and a drain on the gate, form a data wiring on the substrate, and form a plurality of pseudo metal layers on the edge of the display region. The data wiring and the scanning wiring system form a plurality of pixel regions, and the gate, the channel layer, the source, and the drain are composed of a plurality of thin film transistors, and the pseudo metal layer partially overlaps the scan wiring. Then, a first color filter film is formed on the substrate, and the first color filter film is patterned to retain a portion of the first color filter film in the pixel region and at the edge of the display region. Next, a second color filter film is formed to cover the first color filter film at the edge of the display area. Then, a plurality of pixel electrodes are formed on the substrate in the pixel region, and the halogen electrodes are electrically connected to the corresponding thin film transistors, respectively. The invention further provides a method for fabricating a thin film transistor array substrate, comprising providing a substrate comprising a display area and a non-display area, characterized in that an annular color filter is formed on the substrate in the non-display area. The laminate is laminated with an annular color filter and surrounding the edge of the display area. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area. After the case, the metal layer is formed to form a plurality of gate wirings in the display area. The scanning wiring extends to the edge of the display area: a gate and a plurality of sweeps - the closed-pole insulation s q main display. Connected to form ii, t® on the substrate and then form a patterned amorphous germanium layer on the gate to ###/ channel layer. After that, the upper layer of the substrate is called a plurality of layers, and the first metal layer of the domain is re-patterned to the second time; a plurality of sources and a plurality of drains are formed on the three poles, and the wiring of the 'negative material and the earth and the earth are Several strips of pseudo-metal layers are formed on the material to form a number of pseudo-metal layers on the edge of the display area. Among them, the cautious a-recognition wiring system is structured in the financial sector, the secret m, the towel reading wiring and:=:Γ:2::::: = .· Should not leak the edge. Next, a plurality of pixel electrodes are formed on the color film of the book sound-preventing light film, and (4) the core material, and the bismuth-spirit electrodes are electrically connected to the corresponding film transistors. The present invention further proposes a method for fabricating a thin film transistor array substrate, wherein the metal layer is formed on the substrate to include a display region and a non-display region. ^ 'Pattern-metal layer to form several gates and several strips of wiring in the display area and several quasi-gold rides at the edge of the (4) area. Subsequently, a non-W layer, a channel layer, is patterned on the substrate _ into a gate insulating layer. Then, 'the second metal layer is formed on the substrate, and then the second metal layer is patterned' to form a plurality of impurities and a plurality of drain electrodes on the _, and to form a plurality of data wirings, wherein the data wiring extends to The edge of the display area, and the data distribution board scanning wiring system constitutes a plurality of pixel areas, and the gate, the channel layer, the source and the immersion system constitute a plurality of thin film transistors, and the pseudo metal layer partially overlaps the f material wiring, Prevent light leakage at the edge of the display area. Then, a plurality of color light-transmissive films are formed on the substrate in the pixel region, and a plurality of halogen electrodes are formed on the substrate in the display region, and the pixel electrodes are electrically connected to the corresponding thin film transistors. The invention further provides a method for fabricating a thin film transistor array substrate, comprising: providing a substrate comprising: a display region and a non-display region, characterized in that a plurality of first metal layers are formed on the edge of the display region 1335.463 and Forming a plurality of second metal and a first metal layer partially overlapping the first metal layer on the substrate to prevent edge leakage of the display region. The present invention further proposes a method for fabricating a thin film transistor array substrate, which is formed on the substrate. a first metal layer, the substrate comprises a display area and a package, and a 'patterned first metal layer for forming a dummy electrode in the display area, and scanning wiring, wherein the scan wiring extends to the edge of the display area, Then the United States is a very dense insulation layer. Next, a patterned amorphous germanium layer is formed on the gate to form a plurality of via layers, and a second metal layer is formed on the substrate. Thereafter, the first metal layer is patterned to form a plurality of sources on the gate, a plurality of immersions, and a plurality of data lines are formed on the substrate, and a plurality of pseudo metal layers are formed on the edge of the display area, wherein the data wiring and scanning The wiring system constitutes a plurality of pixel regions, and the gate, the channel layer, the source, and the drain are composed of a plurality of thin film transistors, and the pseudo metal layer is partially overlapped with the scan wiring to prevent light leakage at the edge of the display region. Thereafter, a first color filter film is formed on the substrate, and the first color filter film is patterned to retain a portion of the first color filter film in the pixel region and form a first ring shape at the edge of the display region. Color filter film. Subsequently, a plurality of pixel electrodes are formed on the substrate in the display region, and the halogen electrodes are electrically connected to the corresponding thin film transistors. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, the substrate comprises a display area and a non-display area, and then patterning the first metal layer for display A plurality of gates and a plurality of scanning wires are formed in the region, and a plurality of pseudo metal layers are formed on the edge of the display region. Thereafter, a gate insulating layer is formed on the substrate, and a patterned amorphous germanium layer is formed on the gate to form a plurality of channel layers. Then forming a second metal layer on the substrate, and then patterning the second metal layer to form a plurality of sources and a plurality of drain electrodes on the gate, and forming a plurality of data wirings on the substrate, wherein the data wiring Extending to the edge of the display area, wherein the data wiring and the scanning g line constitute a plurality of pixel regions, the gate 'channel layer, the source and the > and the poles constitute 12 1335463 thin film transistors, and the pseudo metal layers partially overlap Wiring the data to prevent light leakage at the edge of the display area. Then, a first color filter film is formed on the substrate, and then the first color filter film is patterned to retain a portion of the first color filter film in the halogen region and form a first ring shape at the edge of the display region. Color filter film. Then, a plurality of halogen electrodes are formed on the substrate in the display region, and the halogen electrodes are electrically connected to the thin film transistor. The invention further provides a method for fabricating a thin film transistor array substrate, comprising providing a substrate comprising a display area and a non-display area, wherein a plurality of first metal layers are formed on the edge of the display area, and then A plurality of second metal layers are formed on the material, and the second metal layer partially overlaps the first metal layer. Subsequently, at least one annular color filter film is formed around the edge of the display area. The present invention further provides a thin film transistor array substrate comprising a display area and a non-display area, wherein the non-display area has a liquid crystal injection port, characterized by a plurality of first metal layers, disposed in the non-display area, and several a second metal layer partially overlapping the first metal layer, a color light-emitting layer disposed in the non-display area outside the liquid crystal injection port; and a first color filter block exposed by the liquid crystal injection port in the non-display area On the area. The present invention further provides a thin film transistor array substrate comprising a display area and a non-display area, wherein the display area edge has a liquid crystal injection port, characterized by a plurality of first metal layers, and a liquid crystal injection port disposed at an edge of the display area The exposed substrate and the plurality of second metal layers partially overlap the first metal layer configuration to prevent light leakage from the liquid crystal injection port at the edge of the display region. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, wherein the substrate comprises a display area and a non-display area, and the edge of the display area has a liquid crystal injection port. Thereafter, the first metal layer is patterned to form a plurality of gates and a plurality of scan lines, wherein the scan lines extend to the edge of the display area 13 1335.463. Next, a gate insulating layer and an amorphous sand layer are formed on the substrate to remove an amorphous germanium layer other than above the interpole to form a plurality of channel layers. Thereafter, a second metal layer is formed on the substrate to re-pattern the second metal layer to form a source and a drain on the gate, form a data wiring on the substrate, and form a plurality of pseudo metal layers on the edge of the display region. The data wiring and the scanning (4) constitute a plurality of pixel regions, and the gate, the channel layer, the source and the drain are composed of a plurality of thin film transistors, and the pseudo metal layer partially overlaps the scan wiring. Then, a color filter thin film is formed on the substrate, and the color light-thin film is patterned to preserve the color county area on the substrate exposed by the liquid crystal injection port in the pixel region and at the edge of the display region. Piece. Next, a plurality of pixel electrodes are formed on the substrate in the pixel region, and the pixel electrodes are electrically connected to the sealed thin film transistor, respectively. The present invention further provides a method of fabricating a thin film transistor array substrate comprising forming a -first metal layer on a substrate, the substrate comprising a display region and a non-display region, wherein the edge of the display region has a liquid crystal population. Thereafter, the first metal layer is patterned to form a plurality of gates and a plurality of scanning lines in the display region and a plurality of pseudo metal layers formed on the substrate of the liquid a day/main entrance path at the edge of the display region. Then, a gate insulating layer is formed on the substrate and then formed on the gate - patterned amorphous (tetra) to form a plurality of channel layers. Thereafter, a second metal layer is formed on the substrate to pattern the first metal layer to form a plurality of sources and a plurality of drain electrodes on the gate, and a plurality of data lines are formed on the substrate, and the data lines are extended. The liquid crystal injection port to the edge of the display area, wherein the data wiring and the scanning wiring system form a plurality of pixel regions, and the pseudo metal layer partially overlaps the data wiring to prevent the liquid crystal population at the edge of the display area from leaking light, and the gate and the channel layer The source and the secret system form several thin film transistors. Next, a plurality of color fluorescent films are formed in the pixel region ‘ and a plurality of pixel electrodes are formed in the pixel region. These halogen electrode electrodes are electrically connected to the corresponding thin film transistors. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ A plurality of first metal layers are formed on the edge of the display region, and then a plurality of second metal layers are formed on the substrate. The second metal layers partially overlap the first metal layer to prevent light leakage from the liquid crystal injection port at the edge of the display region. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area, wherein the edge of the display area has a liquid crystal injection port. Thereafter, the first metal layer is patterned to form a plurality of gates and a plurality of scan lines in the display area and at the edge of the display area

A pseudo metal layer is formed on the substrate exposed by the liquid Ha/main inlet. Thereafter, a gate insulating layer and an amorphous germanium layer are formed on the substrate, and the amorphous germanium layer other than above the gate is removed to form a plurality of channel layers. Subsequently, a second metal layer is formed on the substrate, and the second metal layer is patterned to form a plurality of sources and a plurality of drain electrodes on the gate, and form a plurality of data wirings on the base and the data wiring. a liquid crystal 3 inlet extending to the edge of the display area, wherein the data wiring and the scanning wiring system constitute a plurality of pixel regions, and the gold shoulder layer partially overlaps the scanning wiring, and the gate, the channel layer, the source, and the drain are the remainder / special transistor. Next, a color filter film is formed on the substrate, and the color filter film is replaced to retain a portion of the color data in the pixel region.

A -, and a square block are formed on the substrate exposed by the liquid crystal injection port at the edge of the display area. Then, a plurality of pixel electrodes are formed in the pixel region, and these book color filters are electrically connected to the corresponding thin film transistors. The present invention further provides a method for fabricating a thin film transistor array substrate for a substrate, the substrate comprising a display area and a non-display area, wherein the liquid crystal injection port is not explicitly provided, and is characterized in that The edge of the region forms a number j without the edge layer 'and then forms a plurality of second metal layers' on the substrate 'the second metal layer/metal stack first metal layer. Subsequently, a first color filter block is formed on the liquid crystal injection port at the edge of the display area. 〜路的范围 15 1335463 The present invention further proposes a thin film transistor array substrate having a plurality of repair structures including a first metal layer, a second metal layer, an insulating layer, a channel layer, a dielectric layer, a transparent electrode, and At least one color filter film. The first metal layer is disposed on a substrate including a scan line, a gate, and a plurality of first repair metal layers. The insulating layer covers the first metal layer. The channel layer is disposed on the insulating layer above the gate. The second metal layer is disposed on the substrate, and includes a source, a drain, a data wiring, and a plurality of second repair metal layers, wherein the source and the drain are disposed on both sides of the channel layer above the gate, and the data The wiring and the scanning wiring system form a plurality of halogen regions, and the second repair metal layer and the first repair metal layer overlap each other to form a plurality of repair structures, and the gate, the channel layer, the source, and the drain are composed A thin film transistor. The dielectric layer is disposed on the first metal layer, the insulating layer and the second metal layer, wherein the dielectric layer has a repair opening and a contact window, and the repairing opening exposes the second repair metal layer of the repair structure, and the contact window is exposed. The source of the thin film transistor. The transparent electrode is disposed on the dielectric layer, and includes a plurality of halogen electrodes and a plurality of floating electrodes, wherein the halogen electrodes are disposed in the pixel region, and the source of the corresponding thin film transistor is respectively connected by the contact window The floating electrode is electrically connected to the second repair metal by the repairing opening. Further, the color filter film is disposed on a halogen region other than the repair opening. Further, a thin film transistor liquid crystal display panel can be obtained by adding a pair of a substrate and a liquid crystal layer between the two substrates. The present invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, and then patterning the first metal layer to form a scan line, a gate, and a plurality of first repair metal layers. . Thereafter, a gate insulating layer and an amorphous germanium layer are formed on the substrate, and an amorphous germanium layer other than above the gate is removed to form a channel layer. Next, a second metal layer is formed on the substrate, and then the second metal layer is patterned to form a source, a drain, a data wiring, and a plurality of second repair metal layers, 16 1335.463, wherein the source and the drain are disposed on The two sides of the channel layer above the gate, and the data wiring and the scanning wiring system form a plurality of pixel regions, and the second repair metal layer and the first repair metal layer overlap each other to form a repair structure, a gate, a channel layer, The source and the drain form a plurality of thin film transistors. Then, a dielectric layer is formed on the first metal layer, the insulating layer and the second metal layer, wherein the dielectric layer has a repair opening and a contact window, and the repairing opening exposes the second repair metal layer of the repair structure, and the contact window The source of the thin film transistor is exposed, and a plurality of first color filter films are formed in the pixel region other than the opening. Thereafter, a plurality of second color filter films are formed to cover a portion of the first color filter film above the film transistor, and a transparent electrode is formed on the substrate, which includes a plurality of halogen electrodes and a plurality of floating electrodes The pixel electrodes are electrically connected to the source of the corresponding thin film transistor through the contact window, and the floating electrode is electrically connected to the second repair metal through the repair opening. In addition, a pair of substrates can be further provided, and a thin film transistor liquid crystal display panel can be fabricated by disposing a liquid crystal layer between the opposite substrate and the thin film transistor array substrate with respect to the thin film transistor array substrate. The invention further provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, comprising a plurality of scan lines, a plurality of gates and a plurality of first repair metal layers. Thereafter, an insulating layer is formed on the substrate to cover the first metal layer, and then a plurality of channel layers are formed on the insulating layer above the gate, and then a second metal layer is formed on the substrate, which includes a plurality of sources, a plurality of drain electrodes, a plurality of data wires, and a plurality of second repair metal layers, wherein the source and the drain are disposed on both sides of the channel layer above the gate, and the data wiring and the scanning wiring system constitute a plurality of pixel regions, and The second repair metal layer and the first repair metal layer overlap each other to form a repair structure, and the gate, the channel layer, the source and the drain are composed of a plurality of thin film transistors. Next, a dielectric layer is formed on the first metal layer, the insulating layer and the second metal layer, wherein the dielectric layer has a plurality of repair openings and a plurality of contact windows, and the repair opening exposes a second repaired structure of 1 335.463 Repairing the metal layer and contacting the window exposes the source of the thin film transistor. Then, a plurality of pixel electrodes are formed in the pixel region, wherein the pixel electrodes are electrically connected to the source of the corresponding thin film transistor through the contact window, and at least one of the pixel regions other than the repair opening is formed. Color filter film. The invention further provides a thin film transistor array substrate having a plurality of storage capacitors, the structure comprising a first metal layer, a second metal layer, an insulating layer, a channel layer, a dielectric layer, a protective layer, a halogen electrode, and color filter film. The first metal layer is disposed on a substrate including a scan line, a gate, and a plurality of first storage capacitor metal layers having a plurality of first openings. The insulating layer covers the first metal layer. The channel layer is disposed on the insulating layer above the gate. The second metal layer is disposed on the substrate, and includes a source, a drain, a data wiring, and a plurality of second storage capacitor metal layers, wherein the source and the drain are disposed on both sides of the channel layer above the gate, and The data wiring and the scanning wiring system form a plurality of halogen regions, and the second storage capacitor metal layer and the first storage capacitor metal layer overlap each other to form a storage capacitor with the insulating layer, and the gate, the channel layer, the source, and the gate The polar system consists of several thin film transistors. The dielectric layer is disposed on the first metal layer, the insulating layer and the second metal layer, wherein the dielectric layer has a plurality of second openings and a plurality of third openings, and the second opening substantially exposes the first opening The second storage capacitor metal layer and the third opening expose the source of the thin film transistor. The pixel electrodes are disposed in the pixel region, wherein the pixel electrodes are electrically connected to the second storage capacitor metal layer through the second opening and the source electrical properties of the corresponding thin film transistor through the third opening connection. Further, the color filter film is disposed on a halogen region other than the second opening. Further, a thin film transistor liquid crystal display panel can be obtained by adding a pair of a substrate and a liquid crystal layer between the two substrates. The present invention further provides a method for fabricating a thin film transistor array substrate, comprising: forming a first metal layer on a substrate, and then patterning the first metal layer to form a trace 18 1335.463 trace wiring, gate, and a plurality of first The storage capacitor metal layer has a plurality of first openings. Thereafter, a gate insulating layer is formed on the substrate, and a patterned amorphous germanium layer is formed on the gates to form a channel layer. Then, a second metal layer is formed on the substrate, and then the second metal layer is patterned to form a source, a drain, a data wiring, and a plurality of second storage capacitor metal layers, wherein the source and the drain are disposed in the gate The two sides of the channel layer on the upper side, and the data wiring and the scanning wiring system form a plurality of halogen regions, and the second storage capacitor metal layer and the first storage capacitor metal layer overlap each other to form a storage capacitor and a gate with the insulating layer The channel layer, the source and the drain electrode form a plurality of thin film transistors. Forming a dielectric layer on the first metal layer, the insulating layer, and the second metal layer, wherein the dielectric layer has a second opening and a third opening, and the second opening substantially exposes the second storage above the first opening The capacitor metal layer and the third opening expose the source of the thin film transistor. Then, a plurality of color filter films are formed in the pixel region other than the second opening. Then, a plurality of pixel electrodes are formed on the substrate, and are electrically connected to the second storage capacitor metal layer through the second opening and electrically connected to the source of the corresponding thin film transistor through the third opening. In addition, a pair of substrates can be further provided, and a thin film transistor liquid crystal display panel can be fabricated by disposing a liquid crystal layer between the opposite substrate and the thin film transistor array substrate with respect to the thin film transistor array substrate. Finally, the present invention provides a method for fabricating a thin film transistor array substrate, comprising forming a first metal layer on a substrate, the first metal layer comprising a plurality of scan lines, a plurality of gates, and a plurality of first storage capacitors a metal layer, wherein the first storage capacitor metal layer has a plurality of first openings. Then, an insulating layer is formed on the substrate, covering the first metal layer, and then forming a plurality of channel layers on the insulating layer above the gate, and then forming a second metal layer on the substrate, wherein the second metal layer comprises a plurality of sources, a plurality of drains, a plurality of data lines, and a plurality of second storage capacitor metal layers, wherein the source and the drain are disposed on both sides of the channel layer above the gate, and the data wiring and the scanning wiring system are formed. 1335463 a plurality of pixel regions, and the second storage capacitor metal layer and the first storage capacitor metal layer overlap each other to form a storage capacitor with the insulating layer, and the gate, the channel layer, the source and the drain are composed of a plurality of pixels Thin film transistor. Thereafter, a dielectric layer is formed on the first metal layer, the insulating layer and the second metal layer, wherein the dielectric layer has a plurality of second openings and a plurality of third openings, and the second opening substantially exposes the first opening The second storage capacitor metal layer and the third opening expose the source of the thin film transistor. Then, a plurality of pixel electrodes are formed in the pixel region, wherein the pixel electrodes are electrically connected to the second storage capacitor metal layer through the second opening and the source of the corresponding thin film transistor through the third opening Electrical connection. Next, a plurality of color filter films are formed on the pixel regions other than the second opening. The present invention saves process time and cost by forming a stacked color filter stack on the thin film transistor instead of the black matrix. Moreover, the edge of the display area of the thin film transistor array substrate of the present invention can be matched with the color filter layer and the partially overlapping metal layer, so that an excellent light-shielding effect can be obtained. In addition, the liquid crystal injection port structure of the edge of the display area of the thin film transistor array substrate adopts a partially overlapping metal layer and can be matched with the color filter block, so that an excellent light shielding effect can be obtained and the diameter of the liquid crystal injection port can be increased. Furthermore, in the present invention, only one protective layer covers the solder joint of the repair structure of the thin film transistor array substrate, so that there is no known dielectric layer on the solder joint, and the dielectric layer bursts during the repair process. phenomenon. In addition, the storage capacitor structure of the color filter film integrated with the transistor array substrate of the present invention can improve the panel caused by poor contact between the metal layer of the storage capacitor and the halogen electrode due to the use of a solder joint such as a repair structure. The situation of poor performance. Moreover, the first metal layer avoids the opening as a defect, so that the conduction of the first and second metal layers can be prevented from occurring when the soldering process is performed. In summary, the present invention replaces the black matrix with a stacked color filter stack, which can greatly save process time and cost. In addition, the invention also improves the process and structure in accordance with the special requirements of various parts of the liquid crystal display panel, and cooperates with the basic manufacturing process, so that the invention can make the production of the thin film transistor liquid crystal display panel the most time-saving and labor-saving. efficacy. The above and other objects, features, and advantages of the present invention will become more apparent and understood by the appended claims appended claims

The invention relates to a different design of a thin film transistor array substrate prepared by integrating a color filter film into a color filter on array (COA) to conform to various processes or applications. Requirements, and the production of the black matrix can be omitted. For a detailed description of the application of the present invention, please refer to the following embodiments. First Embodiment Fig. 2 is a perspective view showing a thin film transistor liquid crystal display panel in accordance with the present invention.

Referring to FIG. 2, the thin film transistor liquid crystal display panel 200 of the present invention is composed of a thin film transistor array substrate 202, a pair of substrates 204 and a liquid crystal layer (not shown), wherein the liquid crystal layer is located in the thin film. The crystal array substrate 202 is between the opposite substrate 204. On the thin film transistor array substrate 202, there are a plurality of scanning lines 210, a plurality of data lines 212, a thin film transistor 216, a pixel electrode 218, a color filter film (not shown), and a plurality of color filter layers 220. The data wiring 212 and the scanning wiring 210 constitute a plurality of pixel regions 214. Further, a thin film transistor 216 is disposed at the intersection of the data wiring 212 and the scanning wiring 210, and is controlled by the data wiring 212 and the scanning wiring 210. The halogen electrodes 218 are disposed in the pixel region 214 and are electrically connected to the corresponding thin film transistors 216, respectively. The color filter film 21 1335463 (not shown) is disposed on the pixel region 214, wherein the color filter film includes a red filter film, a green filter film, and a blue filter film. The color filter stack 220 is disposed on the color filter film above the thin film transistor 216. When the color filter film is the color filter film of the first color light, the color filter stack 220 is, for example, mutually The stacked color filter films of the second color light and the third color light are either a single layer of the second color light or the third color light color filter film. Moreover, when the color filter stack 220 is a color filter film of the second color light and the third color light stacked on each other, the color filter film that is closer to the film transistor 216 is colored than the layer that is farther away from the film transistor 216. The filter film is thick. Furthermore, the blue filter film has the best light absorption efficiency, followed by the red filter film and the green filter film. Therefore, when only one color filter film is selected, the blue filter film should be a better choice. . The manufacturing process of this embodiment is as shown in Figs. 3A to 3D below. 3A to 3D are cross-sectional views showing the manufacturing process of the thin film transistor array substrate in accordance with the first embodiment of the present invention. Referring to FIG. 2 and FIG. 3A simultaneously, a first metal layer is formed on a substrate 202, and the first metal layer is patterned to form a plurality of gates 302 and a plurality of scan lines (see FIG. 2). 210). Thereafter, a gate insulating layer 304 and an amorphous germanium layer are formed on the substrate 202, and an amorphous germanium layer other than above the gate 302 is removed to form a plurality of channel layers 306. Subsequently, a second metal layer is formed on the substrate 202, and the second metal layer is patterned to form a plurality of source and drain electrodes 308 on the gate 302 and form a plurality of data lines on the substrate 300 (please See 212 in Figure 2). The data wiring and the scanning wiring system constitute a plurality of halogen regions (see 214 in Fig. 2), and the gate 302, the channel layer 306, the source, and the drain 308 are combined to form a plurality of thin film transistors 216. Next, referring to FIGS. 2 and 3B, a protective layer 312 is formed on the thin film transistor 216, and a first color filter film 314 is formed on the halogen region 214. Then, a color filter stack 220 is formed on the first color filter film 314 above the thin film transistor 216. The color filter stack 220 includes a second color filter film 316 and a third color filter. Light film 318. The first color filter film 314 in the right half of FIG. 3B is the color filter (C/F) in the pixel to which the thin film transistor 216 belongs, and the second color filter film 316 in the left half of the figure. Then, it is C/F in another element, and the adjacent two color filter films 314 and 316 partially overlap the data line 212 and the scan line 210. Thereafter, referring to FIG. 3C, a dielectric layer 322 is formed on the substrate 202 to cover the entire substrate 202. The material of the dielectric layer 322 is, for example, an Acryiic acid. Then, a halogen electrode 218 is formed on the dielectric layer 322, wherein the halogen electrode 218 is electrically connected to the drain 308 of the thin film transistor 216. Then, referring to FIG. 3D, this figure is a combination diagram of a thin film transistor liquid crystal display panel. The main purpose is to provide a pair of substrates 204 with respect to the substrate (thin film transistor array substrate 202) of the foregoing 3C diagram, wherein The substrate 204 has a common electrode 222. Thereafter, a liquid crystal layer 340 is formed between the opposite substrate 204 and the thin film transistor array substrate 202. In addition, a photo spacer (ps spacer 326) may be formed on the dielectric layer 322 before the formation of the liquid crystal layer 340 for maintaining the cell gap. Further, an alignment film (not shown) may be included between the thin film transistor array substrate 202 and the liquid crystal layer 340. Another alignment film (not shown) may be included between the opposite substrate 204 and the liquid crystal layer 340. In addition, a polarizer (not shown) may be disposed on the outer surfaces of the thin film transistor array substrate 202 and the opposite substrate 204. Further, in order to explain the structure of the present embodiment in detail, please refer to both FIG. 3D and FIG. 4', wherein FIG. 4 is a plan view of the thin film transistor array substrate according to the first embodiment of the present invention. Referring to FIGS. 3D and 4, the color filter stack 220 of the present invention is disposed above the thin film transistor 216, wherein the second and third color calender films 316, 318 are layered on the first color filter. On the film 314. The first color calender film 314 23 1335463 is a color filter as a pixel region 214 (see FIG. 2), and has an opening 400 exposing the halogen electrode 218 and the thin film transistor 216 308 electrical connection. In addition, a second or third color filter film 316 or 318 covers the pixel structure on the other side, and an edge thereof may overlap with the first color filter film 314. This second or third color filter film 316 or 318 is a color filter that serves as another halogen region. Second Paste Embodiment This embodiment mainly improves the border of the display area of the thin silicon oxide liquid crystal display panel of the present invention. Please refer to FIG. 2, and the display area 5 〇〇 means that the pixel area 214 can be used. The area where the pattern and the color are displayed; otherwise, the portion other than the display area 5〇〇, that is, the edge of the display area is the "non-display area". 5A to 5C are schematic cross-sectional views showing a manufacturing process of a thin film transistor liquid crystal display panel according to a second embodiment of the present invention, which is different from the first embodiment as follows: Please refer to FIG. 5A for The first metal layer formed and patterned on the material 202 has a metal layer 502 formed on the edge of the display region 5 in addition to the member in FIG. 3A. Thereafter, a gate insulating layer 3?4 is formed on the substrate 202, and is used only as an insulating layer. Subsequently, a second metal layer is formed on the substrate 202 and patterned, and in addition to the components in FIG. 3A, another metal layer 506' is formed on the edge of the display region 500 and the metal layers 5〇2 and 506 are mutually connected. Adjacent, preferably partially overlapping (as shown in Figure 5D) 'to prevent light leakage from the edge of display area 500. In addition, when the metal layer 5〇2 is used as an external line, it is connected to the scan wiring 210, and the other metal layer 506 is used as a pseudo metal layer of a dummy line; otherwise, when the metal layer 506 is used as an external line When it is connected to the data wiring 212, the pseudo metal layer is the metal layer 502. Furthermore, both the metal layer 5〇2 and the metal layer 5〇6 can serve as a pseudo metal layer at the same time, without being connected to any of the scan lines 210 and the data lines 212, but by the abutment of the metal layer 5〇2 and the metal layer 506, and even further Partial overlap (as shown in Figure 5E) can cover 24^35.463 light incident on the non-display area to prevent light leakage. Next, please refer to FIG. 5B to form a protective layer 312 on the substrate 202. Thereafter, at least one layer of the color light-transmitting film may be selectively formed on the substrate 202 at the edge of the display region 5 to enhance the light-shielding effect, for example, in the figure, formed on the film transistor 216 as shown in FIG. The color filter stack 220 on the first color filter film 314 is exemplified. In addition, the color filter stack 22 can also be a single layer of a second color light-emitting film or a third color filter film. Then, referring to FIG. 5C, a dielectric layer 322 is formed on the substrate 202 to cover the color filter stack 220. Thereafter, a sealant 522 is formed on the substrate 202, such as a sealant having a ball spacer. Next, the opposite substrate 204 is provided and the two substrates are glued. In addition, please pay special attention to the present embodiment. Although the color filter layer 220 is formed on the substrate 202 and the adjacent or partially overlapping metal layers 5, 2, 506, as shown in the 5A and 5D drawings, The edge of the display region 5 of the electro-crystalline array substrate can be formed with a light-shielding effect, so that the above process can omit the fabrication of the color filter stack 220, as long as the adjacent or partially overlapping metal layers 502, 506 are formed; It is not necessary to make the partially overlapping metal layers 502, 506, but only the color filter stack 220 is produced. Further, in order to explain the structure of the present embodiment in detail, please refer to FIG. 5C and FIG. 6 respectively, wherein FIG. 6 is a plan view of the edge of the display region of the thin film transistor array substrate according to the second embodiment of the present invention. Referring to FIGS. 5C and 6 , the color filter stack 220 of the present embodiment is located at the edge of the display area 500 , and the metal layers 502 and 506 are located between the color filter stack 220 and the substrate 202 . 502, 506 are electrically isolated from each other and are adjacent or partially overlapping 'to prevent light leakage. Moreover, similar to the case of the process, the structure of this embodiment can also optionally have only a color filter stack 25 1335463 220 at the edge of the display area 500 or only adjacent or partially overlapping metal layers 502, 506. Whether it is only the color filter stack 220, only the adjacent or partially overlapping metal layers 502, 506 or both, the shading effect can be achieved. Third Embodiment This embodiment mainly improves the liquid crystal injection hole at the edge of the display area of the thin film transistor liquid crystal display panel of the present invention. Referring to FIG. 2, the position of the liquid crystal injection port 700 is displayed. At the edge of zone 500, liquid crystal can be injected from here. 7A to 7B are schematic cross-sectional views showing a manufacturing process of a thin film transistor liquid crystal display panel according to a third embodiment of the present invention, which is substantially the same as the second embodiment, except that adjacent or partially overlapping metal layers are formed. Steps after 502, 506. Please refer to FIG. 7A first. In order to facilitate the injection of the liquid crystal, a large aperture is reserved in the liquid crystal injection port 700, so that the base exposed at the liquid crystal injection port 700 at this time can be used.

A plurality of color filter blocks are formed on the I material 202 to enhance the shading effect. For example, in the figure, three color filter blocks 314, 316, and 318 adjacent to each other are formed at the position of the liquid crystal injection port 700. The color filter stack 314 and the color filter stack 220 are formed in the same manner as in the second embodiment. Then, referring to Fig. 7B, a dielectric layer 322 is formed on the substrate 202 to cover the color filter blocks 314, 316, and 318. The subsequent steps are similar to the second embodiment. In addition, in particular, in this embodiment, although the color filter blocks 314, 316, and 318 are formed on the substrate 202 and the adjacent or partially overlapping metal layers 502 and 506, it is only necessary to have a light-shielding structure. Further, the structure of this embodiment is as shown in Figs. 7B and 8 , and Fig. 8 is a plan view of the liquid crystal injection port of the thin film transistor array substrate according to the third embodiment of the present invention. Referring to FIGS. 7B and 8 , the difference between this embodiment and the second embodiment is that the liquid crystal injection port 700 (see FIG. 2 ) needs to be on the thin film transistor array substrate 26 1335463 plate 202 and the opposite substrate 204 . A large space is reserved to facilitate liquid crystal injection. Therefore, in the structure of the liquid crystal injection port, the color filter film is designed in the form of two adjacent blocks to reduce the height thereof, and the dielectric layer 322 and the base are The distance between the materials 202 is in accordance with the requirements of liquid crystal injection. In addition, similar to the process, the structural portion of the embodiment can also select only the adjacent or partially overlapping metal layers 502, 506, and the color filter films 314, 316, and 318 are omitted, thereby achieving the functions of shading and preventing light leakage. Fourth Embodiment This embodiment is mainly directed to an improvement of the repair structure of the thin film transistor array substrate of the present invention. 9A to 9C are schematic cross-sectional views showing a manufacturing process of a thin film transistor array substrate according to a fourth embodiment of the present invention, which can cooperate with the manufacturing flow of the first embodiment. Referring to FIG. 9A, the first metal layer formed and patterned on the substrate 202 has the same steps as the first embodiment except for the components in FIG. 3A and the plurality of first repair metal layers 902. An insulating layer 304 is formed on the substrate 202. Subsequently, a second metal layer is formed on the substrate 202 and patterned, and in addition to the components in FIG. 3A, a plurality of second repair metal layers 906 are formed, wherein the second repair metal layer 906 and the first repair metal The layers 902 are adjacent to each other or overlapped in a halogen region (see 214 of FIG. 2) to constitute a repair structure. Next, referring to Fig. 9B, a protective layer 312 is formed on the substrate 202 to cover the second repair metal layer 906 and the insulating layer 304. Then, a color filter film 314 and a color filter stack 220 thereon may be formed in a pixel region other than the second repair metal layer 906. For example, the color filter layer 220 in the first embodiment is formed on the pixel filter layer 220. On the thin film transistor 216. Next, a dielectric layer 322 is formed on the substrate 202 to cover the entire substrate 202. Subsequently, referring to FIG. 9C, the dielectric layer 322 and the protective layer 312 are defined, and the shape is 27 1335463 as a solder joint for the repair structure (weldingp〇). The opening 91 of the int) and exposes the second repair metal layer 906. After a small amount, please refer to FIG. 9 to form a pixel electrode 218 on the dielectric layer 322, which is electrically disposed and disposed on the surface of the opening 91 to cover the exposed second repair metal layer 906'. And as a protective layer of the second repair metal layer 9〇6. Of course, in addition to the pixel electrode 218 used as the protective layer, other layers may be used instead. Since the solder joint of the repair structure of the present invention (i.e., at the opening 910) has only one halogen electrode 218 as a protective layer overlying it, there is no conventional repair due to the dielectric layer 322' on the solder joint. A dielectric layer burst occurs during the process. Further, in order to explain the structure of the present embodiment in detail, please refer to FIGS. 9D and 10, respectively, wherein FIG. 10 is a plan view showing a repair structure of the thin film transistor array substrate according to the fourth embodiment of the present invention. Referring to FIGS. 9D and 10, the structure of the present embodiment differs from the first embodiment in that the solder joint of the repair structure of the second repair metal layer 906 and the first repair metal layer 902 (ie, the opening 91〇) Only one pixel electrode 218 as a protective layer is overlaid thereon. Further, the color filter film 314 and the color filter layer 220 in the present embodiment are disposed away from the solder joints of the repair structure (i.e., at the opening 910). [Fourth Embodiment] FIG. 11A to FIG. nc are schematic cross-sectional views showing a manufacturing process of a storage capacitor of a thin film transistor array substrate according to a fifth embodiment of the present invention, which is similar to the fourth embodiment. The metal layer partially overlapped by the first metal layer formed on the substrate 202 and patterned. In addition to the components in FIG. 3A, there are a plurality of first storage capacitor metal layers 1102' as shown in FIG. 11A, wherein the first The storage capacitor metal layer 1102 has a plurality of first openings 1103, and the first storage capacitor metal layer 1102 can be a part of the scan wiring or a common line. The subsequent steps are the same as in the fourth embodiment, and an insulating layer 304 is formed on the substrate 202. Subsequently, a second metal layer is formed on the substrate 202 and patterned, and a plurality of second storage capacitor metal layers 11〇6 are formed in addition to the components in FIG. 3A, wherein the overlapping layers are The second storage capacitor metal layer 1106' first storage capacitor metal layer 11〇2 and the insulating layer 3〇4 constitute a storage capacitor. Next, referring to FIG. 11B, a protective layer 312 is formed on the substrate 2〇2 to cover the second storage capacitor metal layer 1106 and the insulating layer 3〇4. Thereafter, a color filter film 314, 316 or 318 may be formed on the protective layer 312 outside the first opening 1103. Thereafter, a dielectric layer 322 is formed on the substrate 202, where the color filter film 314, 316 or 318 is a color light-passing sheet of each pixel region. Then, referring to FIG. 11C, the dielectric layer 322 and the protective layer 312 are defined to form a second opening 1110 as a contact window, and expose the second storage capacitor metal layer 1106 on the first opening 1103. Next, referring to FIG. 11D, a pixel electrode 218 is formed on the dielectric layer 322, and is electrically connected to the second storage capacitor metal layer ι6 by the second opening 1110. Moreover, after the pixel electrode 218 is formed, a soldering process may be performed to solder the germane electrode 218 and the second storage capacitor metal layer located in the second opening 1110. Since the first storage capacitor metal layer (10) selects a second opening 1110 of the contact contact window, the first and the first steps can be avoided when the pixel electrode 218 and the second storage capacitor metal layer are subjected to a soldering process due to poor contact. An error occurs in the storage of the electrical layer 1002 and the conduction of 1〇〇6. Further, in order to explain the structure of the present embodiment in detail, please refer to both the ud diagram and the 12th diagram. FIG. 12 is a plan view of the storage capacitor of the thin film transistor array substrate according to the fifth embodiment of the present invention. Referring to the UD diagram and the 12th figure, the present embodiment can improve the soldering process by adding a soldering process by using a solder joint (ie, the opening 111) of the fourth embodiment (4). 218 and the second storage capacitor metal layer (10) to solve the problem of poor contact between the two interfaces of 29 1335463 to enhance the efficiency of the storage capacitor. Moreover, the first storage capacitor metal layer 1102 avoids the opening 111〇 as the contact window, so that the error of the conduction between the first and second storage capacitor metal layers 11〇2 and 11〇6 can be avoided during the soldering process. . The features of the present invention include: 1. In the thin film transistor array substrate of the present invention, since the stacked color filter stack is used instead of the black matrix, the loss of alignment error between the thin film transistor array substrate and the opposite substrate can be improved. Yield. 2. The present invention can be matched with a color filter stack and an adjacent or partially overlapping metal & at the edge of the display area of the thin film transistor array substrate, so that an excellent light-shielding effect can be obtained. 3. The liquid crystal injection port structure at the edge of the display area of the thin film transistor array substrate adopts a partially adjacent or partially overlapping metal layer and can be matched with a color filter block, so that an excellent shading effect can be obtained and the liquid crystal injection can be increased. The caliber of the entrance. 4. The present invention only has a protective layer covering the solder joint of the repair structure of the thin film transistor array substrate, so that it is not known that there is a dielectric layer on the solder joint, and the dielectric layer bursts during the repair process ( Burst) phenomenon. 5. The storage capacitor structure of the color illuminating film integrated transistor array substrate of the present invention can improve the interface contact problem of the metal layer disk electrode by using a solder joint such as a repair structure, thereby enhancing the effect of the storage capacitor. And the metal layer therein avoids the opening as the contact window, so that the conduction of the first and second metal layers can be prevented from occurring when the soldering process is performed. In summary, the present invention can greatly reduce the process time and m by using the stacked color light-emitting stack instead of the black car, and the invention also meets the special requirements of various parts of the liquid crystal display panel in the process and structure. Improve it to achieve the most time-saving and labor-saving effect. 1335463 The present invention has been described above by way of a preferred embodiment, and it is not intended to limit the invention, and it is intended that various modifications and changes may be made without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is not a conventional thin film transistor liquid crystal display panel, and FIG. 2 is a perspective view of a thin film transistor liquid crystal display panel according to the present invention, FIG. 3A to FIG. 3D is a schematic cross-sectional view showing a manufacturing process of a thin film transistor array substrate according to a first embodiment of the present invention; and FIG. 4 is a plan view of a thin film transistor array substrate according to a first embodiment of the present invention; 5A to 5C Figure 5 is a cross-sectional view showing a manufacturing process of a thin film transistor liquid crystal display panel according to a second embodiment of the present invention; Figure 5D is a schematic cross-sectional view of a thin film transistor liquid crystal display panel according to a second embodiment of the present invention; Figure 7 is a plan view showing the edge of the display region of the thin film transistor array substrate according to the second embodiment of the present invention; Figs. 7A to 7B are diagrams showing the manufacture of the thin film transistor liquid crystal display panel according to the third embodiment of the present invention. FIG. 8 is a plan view showing a liquid crystal injection port of a thin film transistor array substrate according to a third embodiment of the present invention, and FIGS. 9A to 9C are diagrams. FIG. 10 is a plan view showing a manufacturing process of a thin film transistor array substrate according to a fourth embodiment of the present invention; FIG. 10 is a plan view of a 31 1335463 repair structure of a thin film transistor array substrate according to a fourth embodiment of the present invention; 11C is a schematic cross-sectional view showing a manufacturing process of a storage capacitor of a thin film transistor array substrate according to a fifth embodiment of the present invention; and FIG. 12 is a plan view showing a storage capacitor of a thin film transistor array substrate according to a fifth embodiment of the present invention. . [Main component symbol description] 102, 104, 202, 204: substrate 106, 522: sealant 108, 70 0. Liquid crystal injection port 110: display area edge 112: thin film transistor array 200: thin film transistor liquid crystal display panel 210 : Scanning wiring 212 : Data wiring 214 : pixel area 216 : thin film transistor 218 : halogen electrode 220 : color filter layer 222 : common electrode 302 : gate 304 : insulating layer 306 : channel layer 308 : source and Bungee 314, 316, 318: color filter film 312: protective layer

32 1335463 322: Dielectric layer 326: Photo spacer 340 · Liquid crystal layer 400, 910, 1103, 1110: Opening 500: Display area 502, 506, 902, 906, 1102, 1106: Metal layer

33

Claims (1)

1335463 is the year of the month V曰 repair (more) original ten, the scope of application patent: 1. A thin film transistor array substrate, having a display area and a non-display area, the non-display area has a liquid crystal injection port, including: a plurality of a first metal layer disposed in the non-display area; a plurality of second metal layers disposed adjacent to at least the first metal layers; a color filter stack disposed in the non-display area outside the liquid crystal injection port; A color filter block is located on a region of the non-display area where the liquid crystal injection port is exposed. 2. The thin film transistor array substrate of claim 1, further comprising the second metal layer and a portion of the first metal layer being disposed to overlap each other. 3. The thin film transistor array substrate of claim 1, further comprising: a plurality of scan lines disposed in the display area; a plurality of data lines arranged in the display area, wherein the data lines are arranged And the plurality of thin film transistors are disposed at the intersection of the data lines and the scan lines, and are controlled by the data lines and the scan lines; The individual halogen electrodes are disposed in the halogen regions and electrically connected to the corresponding thin film transistors, and a plurality of color filter films are disposed on the halogen regions. 4. The thin film transistor array substrate of claim 3, wherein the area exposed by the liquid crystal injection port at the edge of the display area further comprises a second color filter block and the first color filter. The light blocks are adjacent. 5. The thin film transistor array substrate of claim 4, wherein the area exposed by the liquid crystal injection port at the edge of the display area further comprises a third color 1335463 color light-emitting block and the second The color filter blocks are adjacent. 6. The thin film transistor array substrate of claim 3, wherein the color filter films extend to an edge of the display area. The thin film transistor array substrate of claim 6, wherein the color filter films comprise a first color filter film. 8. The thin film transistor array substrate of claim 7, wherein the color filter stack comprises a second color filter film and a third color filter film stacked on each other. 9. The thin film transistor array substrate of claim 7, wherein the color filter stack comprises one of a second color filter film and a third color filter film. (7) A thin film transistor array substrate having a display area and a non-display area, the display area edge having a liquid crystal injection port, comprising: a plurality of first metal layers, the liquid crystal injection port disposed at an edge of the display area The substrate is exposed; and a plurality of second metal layers are disposed adjacent to at least the first metal layers to prevent light leakage from the liquid crystal injection port at the edge of the display region. 11. The thin film transistor array substrate of claim 10, further comprising the second metal layer being partially overlapped with the first metal layer. 12. The thin film transistor array substrate of claim 10, further comprising: a plurality of scanning wires disposed on the substrate in the display area; a plurality of data wires arranged in the display area In the inner substrate, the data wires and the scan wires form a plurality of pixel regions; a plurality of thin film transistors are disposed at the intersection of the data wires and the scan wires, and The data wiring and the scanning wiring control; 35 1335463 a plurality of halogen electrodes, disposed in the pixel regions, and electrically connected to the corresponding thin film transistors; and a plurality of color filter films, It is disposed under the pixel electrodes. 13. The thin film transistor array substrate of claim 12, wherein the color filter films comprise a red filter film, a green filter film, and a blue filter film. A method for fabricating a thin film transistor array substrate, comprising: forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area, wherein the display area edge has a liquid crystal method inlet; Patterning the first metal layer to form a plurality of gates and a plurality of scan lines in the display region, wherein the scan lines extend to the liquid crystal injection port at the edge of the display region; forming a gate on the substrate a gate insulating layer; a patterned amorphous germanium layer is formed on the gates to form a plurality of channel layers; a second metal layer is formed on the substrate; and the second metal layer is patterned to serve the gates Forming a plurality of source electrodes and a plurality of drain electrodes on the electrode, forming a plurality of data wires on the substrate, and forming a plurality of pseudo metal layers on the substrate exposed by the liquid crystal injection port at an edge of the display region, wherein the plurality of metal layers are formed on the substrate The data wiring and the scan wiring system form a plurality of halogen regions, and the pseudo metal layers are partially overlapped with the scan lines to prevent light leakage of the liquid crystal injection port at the edge of the display region, and The gates, the channel layers, the source electrodes, and the drain electrodes comprise a plurality of thin film transistors; forming a plurality of color filter films in the pixel regions; and forming in the pixel regions The plurality of halogen electrodes are electrically connected to the corresponding thin film transistors. 15. A method of fabricating a thin film transistor array substrate, comprising: 36 1335463 forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area, wherein the display area edge has a liquid crystal Injecting the first metal layer to form a plurality of gates and a plurality of scan lines in the display region and forming a plurality of stripes on the substrate exposed by the liquid crystal injection port at an edge of the display region a metal layer; forming a gate insulating layer on the substrate; forming a patterned amorphous germanium layer on the gates to form a plurality of channel layers; forming a second metal layer on the substrate; patterning The second metal layer forms a plurality of sources and a plurality of drain electrodes on the gates, and forms a plurality of data lines on the substrate, the data lines extending to the edge of the display area Injecting, wherein the data wires and the scan wires form a plurality of pixel regions, and the metal layers are partially overlapped with the data wires to prevent the liquid crystal injection port at the edge of the display region Light, and the gates, the channel layers, the sources, and the drains form a plurality of thin film electro-crystal bodies; forming a plurality of color filter films in the halogen regions; A plurality of halogen electrodes are formed in the halogen region, and the halogen electrodes are electrically connected to the thin film transistors corresponding to φ. 16. A method of fabricating a thin film transistor array substrate, comprising: a substrate having a display area and a non-display area, the non-display area edge having a liquid crystal injection port, comprising: forming a plurality of edges at the edge of the display area a first metal layer; and forming a plurality of second metal layers on the substrate, the second metal layers partially overlapping the first metal layers to prevent light leakage from the liquid crystal injection port at the edge of the display region. 17. The method of claim 16, further comprising: forming a plurality of scan lines in the display area; 37 1335463 forming a plurality of data lines in the display area, wherein the data lines and the data lines The scanning wiring system constitutes a plurality of halogen regions; a plurality of thin film transistors are formed at the intersection of the data wirings and the scanning wirings, and the thin film electro-crystalline systems are controlled by the data wirings and the scanning wirings; A plurality of halogen electrodes are formed in the halogen regions, and the halogen electrodes are electrically connected to the corresponding thin film transistors respectively; and a plurality of color filter films are formed on the halogen regions. 18. A method of fabricating a thin film transistor array substrate, comprising: forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area, wherein the display area edge has a. Forming the first metal layer in the liquid crystal injection port to form a plurality of gate and reticle scanning lines in the display region, wherein the scan lines extend to the liquid crystal injection port at the edge of the display area; Forming a gate insulating layer on the material; forming a patterned amorphous germanium layer on the gates to form a plurality of channel layers; forming a second metal layer on the substrate; patterning the second metal layer, Forming a plurality of sources and a plurality of drain electrodes on the gates, forming a plurality of data lines on the substrate, and forming a plurality of strips on the substrate exposed by the liquid crystal injection port at an edge of the display area a metal layer, wherein the data lines and the scan lines form a plurality of pixel regions, and the metal layers are partially overlapped with the scan lines, and the gates, the channel layers, and the sources Extremely and some Forming a plurality of thin film transistors on the substrate; forming a color filter film on the substrate; patterning the color filter film to retain a portion of the color filter film in the pixel region and at the edge of the display area Forming a first color filter block on the substrate exposed by the liquid crystal injection port; and 1335463 forming a plurality of pixel electrodes in the halogen region, the pixel electrodes and the corresponding film The transistor is electrically connected. 19. The method of claim 18, wherein the step of patterning the color filter film further comprises forming a substrate on the substrate exposed by the liquid crystal injection port at an edge of the display region. a second color filter block adjacent to the first color filter block. 20. The method according to claim 19, wherein the step of forming the second color filter block further comprises forming on the substrate exposed by the liquid crystal injection port at the edge of the display area. A third color filter block is adjacent to the second color-shifting light block. 21. A method of fabricating a thin film transistor array substrate, comprising: forming a first metal layer on a substrate, the substrate comprising a display area and a non-display area, wherein the display area edge has a liquid crystal injection port Patterning the first metal layer to form a plurality of gates and a plurality of scan lines in the display region and forming a plurality of pseudo-metals on the substrate exposed by the liquid crystal injection port at an edge of the display region Forming a gate insulating layer and an amorphous germanium layer on the substrate; φ removing the amorphous germanium layer except the upper portions of the gates to form a plurality of channel layers; forming a first layer on the substrate Forming the second metal layer to form a plurality of sources and a plurality of drain electrodes on the gates, and forming a plurality of data lines on the substrate, the data lines extending to the display area The liquid crystal injection port of the edge, wherein the data wires and the scan wires form a plurality of pixel regions, and the pseudo metal layers partially overlap the scan wires, and the gates, the channel layers, The sources And the plurality of thin film transistors are formed on the substrate; forming a color filter film on the substrate; 39 1335463 t patterning the color filter film to retain a portion of the color filter in the halogen regions And forming a first color filter block on the substrate exposed by the liquid crystal injection port at the edge of the display area; and forming a plurality of halogen electrodes in the pixel region, the pixel electrodes Electrically connecting with the corresponding thin film transistors. 22. The method of claim 21, wherein the step of patterning the color filter film further comprises forming a surface on the substrate exposed by the liquid crystal injection port at the edge of the display area. Two color filter blocks adjacent to the first color filter block. 23. The method according to claim 22, wherein the step of forming the second color filter block further comprises forming on the substrate exposed by the liquid crystal injection port at the edge of the display area. A third color filter block is adjacent to the second color filter block. 24. A method of fabricating a thin film transistor array substrate, comprising: providing a substrate, the substrate comprising a display area and a non-display area, wherein the non-display area edge has a liquid crystal injection port, wherein: the display Forming a plurality of first metal layers on the edge of the region; forming a plurality of second metal layers on the substrate, the second metal layers partially overlapping the first metal layers; and the liquid crystal injection port at the edge of the display region A first color filter block is formed on the exposed area. 25. The method of claim 24, further comprising: forming a plurality of scan lines in the display area; forming a plurality of data lines in the display area, wherein the data lines and the scan lines Forming a plurality of halogen regions; forming a plurality of thin film electric 1353463 crystals at the intersection of the data wires and the scan wires, and the thin film electro-crystal systems are controlled by the data wires and the scan wires; A plurality of pixel electrodes are formed in the pixel regions, and the pixel electrodes are electrically connected to the corresponding thin film transistors, and a plurality of color filter films are formed on the halogen regions. 26. The method of claim 25, wherein the color filter films extend to an edge of the display area. 27. The method of claim 26, wherein the color filter film comprises a first color filter, a light film. 28. The method of claim 24, wherein the step of forming the first color filter block further comprises forming a first region on the edge of the display region where the liquid crystal injection port is exposed. Two color filter blocks adjacent to the first color filter block. 29. The method of claim 28, wherein the step of forming the second color filter block further comprises forming a surface on the area exposed by the liquid crystal injection port at the edge of the display area. A three color filter block adjacent to the second color filter block. 41