1333100 AU0708053 26219twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種顯示面板的母板及其製作方 法，且特別是有關於一種具有不同尺寸之顯示面板單元的 母板及其製作方法。 • 【先前技術】 液晶顯示器主要是由一液晶顯示面板(liquid crystal φ dlsPlay Panel，LCD panel)以及一背光模組（backlight module)所構成，其中，液晶顯示面板包括彩色濾光基板、 主動元件陣列基板(active device array substrate)以及位於 兩基板之間的液晶層（liquid crystal layer)。 現行液晶顯示面板的製作是先以一整片的主動元件 陣列基板與一整片的彩色濾光基板進行組立，並將液晶層 密封於其間’進而形成具有多個面板單元的液晶顯示面板 的母板。之後，再對液晶顯示面板的母板進行切割 (cutting) ’以形成多個獨立的液晶顯示面板。 ® 液晶顯示面板的產線隨著所製作之液晶顯示面板的母 • 板尺寸不同’也有不同世代的演進。早期一代廠所製作的 液晶顯示面板的母板尺寸大約是300公厘χ400公厘，約可 製作一片15吋的顯示面板。到了 1996年時，技術已進步 到3.5代廠’而其所製作的液晶顯示面板的母板尺寸約為 600公厘X720公厘。演進至今，六代廠的液晶顯示面板的 母板尺寸已達到了 15〇〇公厘X1850公厘，其所製作的液晶 顯示面板的母板可切割為30片15对的面板。與先前的— 5 1333100 AU0708053 26219twf.doc/n 代廠或3·5代勒較，六代礙的產能增加，相對地降低製 程成本。此外，域廠雜晶顯示面板的母板也可以切割 為大尺寸的液晶顯示面板，例如製作8片32pf的液晶顯示 面板，或是6片37吋的液晶顯示面板。 近年來，為了符合使用者對於大尺寸顯示器的需求， 液晶顯示面板也繼續朝向更大的尺寸發展，例如40吋、42 吋、50吋等，而液晶顯示面板的產線也演進到了七代廠與 7.5代廠。以40 的液晶顯示面板為例，七代廠的液晶顯 不:板的母板尺寸為187〇公厘χ22〇〇公厘，而將七代廠的 液晶顯示面板的母板切割為多片的40吋面板時，母板的利 用率約為92%。 相較於前幾代的產線，目前75代廠的液晶顯示面板 的母板尺寸為1950公厘Χ2250公厘，然而，將其切割為多 片的40时或其他尺寸的液晶顯示面板時，母板的利用率卻 不升反降，約只有85%至86%。此乃是因為上述的液晶顯 示面板尺寸無法與母板的尺寸有效匹配，使得母板上的空 間無法被有效利用所導致。 【發明内容】 本發明關於一種顯示面板的母板，其可有效利用母板 上的可用空間，解決母板利用率受到限制的問題。 本發明另關於一種適於製作上述之顯示面板的母板 的方法’其可大幅改善顯示面板的母板利用率，進而提升 整體的產能。 為具體描述本發明之内容，在此提出一種顯示面板的 61333100 AU0708053 26219twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to a motherboard for a display panel and a method of fabricating the same, and more particularly to a mother of a display panel unit having different sizes Board and its making method. • [Prior Art] The liquid crystal display is mainly composed of a liquid crystal display panel (LCD panel) and a backlight module. The liquid crystal display panel includes a color filter substrate and an active device array. An active device array substrate and a liquid crystal layer between the two substrates. The current liquid crystal display panel is formed by first arranging a whole piece of active device array substrate and a whole color filter substrate, and sealing the liquid crystal layer therebetween to form a mother liquid crystal display panel having a plurality of panel units. board. Thereafter, the mother board of the liquid crystal display panel is cut to form a plurality of independent liquid crystal display panels. The production line of the ® liquid crystal display panel has evolved in different generations depending on the size of the mother board of the liquid crystal display panel produced. The size of the mother panel of the LCD panel produced in the early generation was approximately 300 mm to 400 mm, making it possible to produce a 15-inch display panel. By 1996, the technology had advanced to the 3.5th generation, and the size of the mother panel of the liquid crystal display panel produced was about 600 mm x 720 mm. Up to now, the mother panel size of the liquid crystal display panel of the six generations has reached 15 mm × 1850 mm, and the mother panel of the liquid crystal display panel can be cut into 30 15 pairs of panels. Compared with the previous – 5 1333100 AU0708053 26219twf.doc/n or 3·5 Dyle, the capacity of the Sixth Generation has increased, which has reduced the cost of the process. In addition, the mother board of the field plant crystal display panel can also be cut into a large-sized liquid crystal display panel, for example, eight 32-pf liquid crystal display panels or six 37-inch liquid crystal display panels. In recent years, in order to meet the user's demand for large-size displays, liquid crystal display panels have continued to develop toward larger sizes, such as 40 吋, 42 吋, 50 吋, etc., and the production line of liquid crystal display panels has also evolved to seven generations of factories. With the 7.5 generation factory. Taking the liquid crystal display panel of 40 as an example, the liquid crystal display of the seven generations of the factory is not: the mother board size of the board is 187 〇 χ 22 〇〇 mm, and the mother board of the liquid crystal display panel of the seventh generation factory is cut into multiple pieces. When the panel is 40 inches, the utilization rate of the motherboard is about 92%. Compared with the previous generations of production lines, the current 75-generation LCD panel has a mother board size of 1950 mm Χ 2250 mm. However, when cutting it into multiple pieces of 40-hour or other-size LCD panels, the mother The utilization rate of the board is not rising, but only about 85% to 86%. This is because the above-mentioned liquid crystal display panel size cannot be effectively matched with the size of the mother board, so that the space on the mother board cannot be effectively utilized. SUMMARY OF THE INVENTION The present invention is directed to a motherboard for a display panel that can effectively utilize the available space on the motherboard to solve the problem that the utilization of the motherboard is limited. The present invention further relates to a method for fabricating a mother board of the above display panel, which can greatly improve the utilization rate of the mother panel of the display panel, thereby improving the overall productivity. In order to specifically describe the content of the present invention, a display panel 6 is proposed herein.
I33310Q AU0708053 26219twf.d〇c/n 母板丄其具有_第—尺寸的第—面板單元群組與一第二尺 寸的，二面板單元群組β第―面板單元群組中的每一第一 面板，凡具有至少一第一單元間隙而第二面板單元群組 ㈣母—第二面板單元具有至少-第二單元間隙，且第一 尺寸貝貝上不同於第二尺寸。該母板主要由一切換元件陣 '列基板、、一對向基板、一顯示介質層(display medium layer) 以及-襯層所構成。切換元件陣列基板具有陣列排列的多 • 個切換兀件以及對應連接切換元件的多個晝素電極。對向 基板與切換元件陣列基板實質上平行，且對向基板具有一 共用電極層。顯示介質詹配置於切換元件陣列基板與對向 基板之間。此外，襯層配置於切換元件陣列基板與對向基 板之，，襯層對應於第一面板單元群組，且襯層的厚度^ 第一單元間隙的總和實質上等於第二單元間隙。 在此更提出一種顯示面板的母板的製作方法，此顯示 面板的母板具有一第一尺寸的第一面板單元群組與一第二 尺寸的第一面板單元群組。第一面板單元群組中的每一第 験一面板單元具有至少一第一單元間隙，而第二面板單元群 • 、’且中的母一第一面板早元具有至少—第二單元間隙，且第 一尺寸實質上不同於第二尺寸。此母板的製作方法包括： 製作一切換元件陣列基板，該切換元件陣列基板具有陣列 排列的多個切換元件以及對應連接切換元件的多個晝素電 極；製作一對向基板；以及形成一顯示介質層於切換元件 陣列基板與對向基板之間。並且，在製作切換元件陣列基 板及/或對向基板時，更形成一襯層於局部的切換元件陣列 7 1333100 AU0708053 26219twf.doc/n 基板或對向基板上，其中襯層對應於第一面板單元群組， 且襯層的厚度與第一單元間隙的總和實質上等於第二單元 間隙。 、几 基於上述，本發明藉由在同一顯示面板的母板上規劃 多種不同尺寸的顯示面板單元，以有效利用母板上的可用 空間，改善顯示面板的母板利用率，進而提升整體的產能。 此外’者眼於母板需整合不同尺寸的面板單元，本發明更 藉由概層來補償該些不同尺寸之面板單元的單元間降差 異’以符合每一面板單元的規格需求。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉實施例，並配合所附圖式，作詳細說明如 下。 【實施方式】 以下多個實施例所提及的母板，係指將一整片的切換 元件陣列基板與一整片的對向基板進行組立，並將顯示介 質層密封於其間，所形成之具有多個面板單元的成品。對 該母板進行切割，便可形成多個獨立的顯示面板。 該些實施例並不限定顯示面板的型態，其中隨著顯示 介質層的不同’顯示面板具有不同的作用機制。舉例而言， 顯示介質層可為液晶材料，則顯示面板稱為液晶顯示面 板，如：穿透型顯示面板、半穿透型顯示面板、反射型顯 示面板、COA顯示面板、AOC顯示面板、垂直配向型(VA) 顯示面板、水平切換型(IPS)顯示面板、多域垂直配向型 (MVA)顯示面板、扭曲向列型(TN)顯示面板、超扭曲向列 1333100 AU0708053 26219twf.doc/n 型(STN)顯示面板、圖案垂直配向型(pVA)顯示面板、超級 圖案垂直配向型（S-PVA)顯示面板、先進大視角型(ASV) 顯示面板、邊緣電場切換型(FFS)顯示面板、連續焰火狀排 列型(CPA)顯示面板、軸對稱排列微胞型(ASM)顯示面板、 光學補償彎曲排列型（OCB)顯示面板、超級水平切換型 (s-ips)顯示面板、先進超級水平切換型(AS_IPS)顯示面 板、極端邊緣電場切換型(UFFS)顯示面板、高分子穩定配 向型顯示面板、雙視角型(dual_view)顯示面板、三視角型 (triple-view)顯示面板、三維顯示面板(three_dimensi〇nai) 或其它型面板、或上述之組合。另外，若顯示介質層為電 激發光材料，則顯示面板稱為電激發光顯示面板，例如： 螢光電激發光顯示面板、磷光電激發光顯示面板、或上述 之組合，且電激發光顯示面板的電激發光材質包含有機材 質、無機材質、或上述之組合，而電激發光材質之分子， 包含小分子、兩分子或上述之組合。 下述實施例將以液晶顯示面板作為範例來進行說 明，然而本領域中具有通常知識者應能理解該些實施例的 設計概念仍可被合理地應用於其他類型的顯示面板中。 此外，下列實施例所指的切換元件陣列基板至少具有 陣列排列的多個切換元件以及對應連接該些切換元件的多 個晝素電極。在實際的應用上，切換元件陣列基板例如是 具有主動式的薄膜電晶體陣列的基板，對向基板例如是具 有彩色濾光層的彩色濾光基板。在其它實施例亦可使用被 動式的切換元件陣列基板。當然，切換元件陣列基板也可 9 AU0708053 26219twf.doc/n 以是整合了彩色濾光層於主動層上的COA基板或是整合 了主動層於彩色濾光片上的AOC基板’此時，對向基板 上不須製作彩色濾光層。下文會分別就該些變化舉例說明。 本發明猎由在同一顯示面板的母板上規劃多種不同 尺寸的顯示面板單元，以有效利用母板上的可用空間。圖 1續'示依照本發明之一實施例的一種顯示面板之母板的上 視圖。如圖1所示，本實施例的母板100尺寸例如是7.5 代廠所採用的規格，其長寬為丨950公厘X2250公厘，但不 限於此’亦可選用其它規格，如先前技術中之母板尺寸規 格。在母板100上規劃了 32吋的第一面板單元(或稱為第 一顯示面板單元)110的群組與52吋的第二面板單元（或稱 為第二顯示面板單元)12〇的群組，分別排列為兩直行。藉 由這樣的規劃，可以有效利用母板100上的可用空間，改 善顯示面板的母板利用率，進而提升整體的產能。 值得注意的是’上述實施例採用整合兩種尺寸之面板 單元的設計來作說明，但本發明並不以此為限。亦即，在 其它實施例中，亦可採用其它尺寸的面板單元，如：1吋 〜100时間的面板單元或大於100吋的面板單元。實作上， 亦可以整合更多尺寸的面板單元於同一母板上，並且調整 該些面板單元之間的位置關係，以求得最佳化的母板利用 〇 此外’雖然前述實施例提出了在母板上整合不同尺寸 的面板單元的設計概念，但由於既有製程中母板是藉由一 整片的切換元件陣列基板與一整片的彩色濾光基板組立而 1333100 AU0708053 26219twf.doc/n 成，因此在實作上，切換元件陣列基板與彩色濾光基板之 間的單元間隙無法隨不同尺寸的面板單元做彈性的調整。 特別是，當顯示面板需有特定規格時，將受限於既有製程 而無法滿足設計上的需求。 圖2繪示由前述母板1〇〇所製得之顯示面板2〇〇的剖 . 面圖。如圖2所示，本實施例的顯示面板200包括切換元 件陣列基板210、對向基板220、顯示介質層230、間隙物 • 240等元件。切換元件陣列基板21〇例如是由切換元件 212、共用配線214、閘絕緣層216、保護層218以及晝素 電極219等所組成來說明，而對向基板22〇例如是由黑矩 陣222、彩色濾光層224以及共用電極層226等所組成的 彩色濾光基板來說明。在其它實施例中，切換元件陣列基 板210例如是由切換元件212、閘絕緣層216、保護層 以及畫素電極219等所組成，而對向基板22〇例如是由黑 矩陣222以及彩色瀘'光層224等所組成的彩色遽絲板。 鲁 切換元件212於本實施例中，以底閘型電晶體為例，但不 限於此，亦可使用頂閘型、或其它適合之電晶體、或:述 • 之組合。而電晶體之半導體層為單層或多層結構，且其材 質包含非晶矽、多晶矽、單晶矽、微晶矽、上述晶格之石々 化鍺、或其它適合之半導體材質、或上述之組合。在本實 施例中，單元間隙250係指切換元件陣列基板21〇盘對向 基板220之間的距離，更詳細而言，單元間隙25(M系指^ 換元件陣列基板210的晝素電極219與對向基板22〇的乒 用電極層226之間的距離。易言之，單元間隙25〇係指ς 1333100 AU0708053 26219twf.doc/n 12〇的局部剖面結構。換言之，第一面板單元110與第二 面板單元120都會具有單元間隙250，而無法因應面板單 兀的尺寸差異而導致各單元間隙之計算起點或計算終點的 差異所形成的不同大小的單元間隙。 有鑑於此，本發明更進一步對該些不同尺寸之面板單 元的單元間隙差異進行補償，以更佳地實現上述整合不同 尺寸之顯示面板於同一母板上的設計概念。 為了對不同尺寸之面板單元的單元間隙差異進行補 償，本發明可在製作切換元件陣列基板或對向基板的同時 形成襯層於切換元件陣列基板或對向基板的特定區域上， 以在切換元件陣列基板與對向基板組立之後，形成不同大 小的單元間隙。 圖3繪示依照本發明之另一實施例的一種顯示面板之 母板的結構圖。為了便於了解，本實施例同樣採用如圖i 所繪示之具有兩種尺寸之面板單元的佈局來進行說明，即 母板300例如具有第一尺寸的第一面板單元3〇〇A的群組 與第二尺寸的第二面板單元300B的群組，且第一尺寸實 質上不同於第二尺寸。在本實施例中，第一尺寸實質上小 於弟一尺寸。然而’在其它實施例中’兩者的尺寸大小關 係亦可互換。此外’各第一面板單元300A及各第二面板 單元300B皆具有顯示區（未標示）及相鄰顯示區之周邊電 路區（未標示）。 如圖3所示’母板300主要包括切換元件陣列基板 310、對向基板320、顯示介質層330以及襯層340。切換 13 AU0708053 26219twf.doc/n 凡件陣列基板31G具有陣列排列的多個切換元件312以及 對應連接切換元件料個畫素電極314。此外，對向基板 32〇與切換兀件陣列基板310實質上平行，且對向基板no ，、有共用電極322為例，但不限於此，亦可不包含共用 電極層322。在製程上’本實施例例如是分別製作切換元 件陣列基板310與對向基板320,將切換元件陣列基板310 與對向基板320進行組立，並將顯示介質層33〇密封於其 間’以形成具有第—面板單元3〇〇A與第二面板單元3〇〇B 的母板300。當然，在完成該些製成之後，還需對母板 進行切割，使該些第一面板單元3〇〇A與第二面板單元 300B成為獨立的顯示面板。 在本實施例中’切換元件陣列基板31()例如是採用薄 膜電晶體作為切換元件312的薄膜電晶體陣列基板，而對 向基板320例如是彩色濾光基板，其上更具有黑矩陣324 與彩色濾光層326等元件。顯示介質層33〇配置於切換元 件陣列基板310與對向基板320之間，本實施例之顯示介 貝層330例如是液晶層或上述其他可能之材料層。 承上述’襯層340配置於切換元件陣列基板310與對 向基板320之間的特定區域上，例如對應於第一面板單元 300A的群組，使得第一面板單元3〇〇八具有第一單元間隙 350A。相對地，襯層34〇對應於第二面板單元3〇〇B的群 組之外，使得第二面板單元300]B具有第二單元間隙 350B。本實施例藉由在第一面板單元3〇〇a内配置襯層 340 ’而不在第二面板單元300B内配置襯層34〇，以形成 1333100 AU0708053 26219twf.doc/n ^同單元間隙35从與第二單元間隙％⑽ 而’較佳地’讓母板上的第一面板單元3〇〇aI33310Q AU0708053 26219twf.d〇c/n Motherboard, which has a first-sized panel unit group and a second-sized, two-panel unit group β-th panel unit group The panel has at least one first cell gap and the second panel unit group (four) mother-second panel unit has at least a second cell gap, and the first size is different from the second size on the babe. The motherboard is mainly composed of a switching element array 'column substrate, a pair of substrates, a display medium layer, and a liner. The switching element array substrate has a plurality of switching elements arranged in an array and a plurality of halogen electrodes corresponding to the switching elements. The opposite substrate is substantially parallel to the switching element array substrate, and the counter substrate has a common electrode layer. The display medium is disposed between the switching element array substrate and the opposite substrate. Further, the lining layer is disposed on the switching element array substrate and the opposite substrate, and the lining layer corresponds to the first panel unit group, and the thickness of the lining layer ^ the sum of the first unit gaps is substantially equal to the second unit gap. There is further provided a method for manufacturing a motherboard of a display panel, the motherboard of the display panel having a first panel unit group of a first size and a first panel unit group of a second size. Each of the first panel unit groups of the first panel unit group has at least one first unit gap, and the second panel unit group, and the first panel of the first panel panel has at least a second unit gap. And the first size is substantially different from the second size. The manufacturing method of the motherboard includes: fabricating a switching element array substrate having a plurality of switching elements arranged in an array and a plurality of pixel electrodes corresponding to the switching elements; fabricating a pair of substrates; and forming a display The dielectric layer is between the switching element array substrate and the opposite substrate. Moreover, when the switching element array substrate and/or the opposite substrate are fabricated, a lining layer is further formed on the local switching element array 7 1333100 AU0708053 26219 twf.doc/n substrate or the opposite substrate, wherein the lining layer corresponds to the first panel a group of cells, and the sum of the thickness of the liner and the first cell gap is substantially equal to the second cell gap. Based on the above, the present invention can effectively utilize the available space on the motherboard by using a plurality of display panel units of different sizes on the motherboard of the same display panel, thereby improving the utilization rate of the motherboard of the display panel, thereby improving the overall production capacity. . In addition, the panel needs to integrate panel units of different sizes, and the present invention compensates for the difference in the inter-cells of the panel units of different sizes by the layering to meet the specification requirements of each panel unit. The above and other objects, features and advantages of the present invention will become more <RTIgt; [Embodiment] The motherboard referred to in the following embodiments refers to a whole piece of the switching element array substrate and a whole piece of the opposite substrate, and the display medium layer is sealed therebetween. A finished product with multiple panel units. By cutting the motherboard, a plurality of independent display panels can be formed. These embodiments do not limit the type of display panel in which the display panel has a different mechanism of action as the display medium layer is different. For example, the display medium layer can be a liquid crystal material, and the display panel is called a liquid crystal display panel, such as: a transmissive display panel, a semi-transmissive display panel, a reflective display panel, a COA display panel, an AOC display panel, and a vertical Alignment type (VA) display panel, horizontal switching type (IPS) display panel, multi-domain vertical alignment type (MVA) display panel, twisted nematic (TN) display panel, super twisted nematic 1333100 AU0708053 26219twf.doc/n type (STN) display panel, pattern vertical alignment type (pVA) display panel, super pattern vertical alignment type (S-PVA) display panel, advanced large viewing angle (ASV) display panel, edge electric field switching type (FFS) display panel, continuous Fireworks-like display (CPA) display panel, axisymmetric array microcell (ASM) display panel, optically compensated curved alignment (OCB) display panel, super horizontal switching (s-ips) display panel, advanced super level switching type (AS_IPS) display panel, extreme edge electric field switching type (UFFS) display panel, polymer stable alignment display panel, dual view type (dual_view) display panel, triple view (triple-view) display surface , Three-dimensional display panel (three_dimensi〇nai) panel or other type, or a combination of the above. In addition, if the display medium layer is an electroluminescent material, the display panel is referred to as an electroluminescent display panel, such as: a fluorescent photoelectric excitation light display panel, a phosphorescent photoelectric excitation light display panel, or a combination thereof, and an electroluminescent display panel The electroluminescent material comprises an organic material, an inorganic material, or a combination thereof, and the molecule of the electroluminescent material comprises a small molecule, two molecules or a combination thereof. The following embodiments will be described with the liquid crystal display panel as an example, but those of ordinary skill in the art should understand that the design concepts of the embodiments can be reasonably applied to other types of display panels. Furthermore, the switching element array substrate referred to in the following embodiments has at least a plurality of switching elements arranged in an array and a plurality of pixel electrodes corresponding to the switching elements. In practical applications, the switching element array substrate is, for example, a substrate having an active thin film transistor array, and the opposite substrate is, for example, a color filter substrate having a color filter layer. An alternate switching element array substrate can also be used in other embodiments. Of course, the switching element array substrate can also be 9 AU0708053 26219twf.doc/n or a COA substrate integrated with a color filter layer on the active layer or an AOC substrate integrated with an active layer on the color filter. It is not necessary to make a color filter layer on the substrate. Examples of these changes are given below. The invention hunts a plurality of display panel units of different sizes on the motherboard of the same display panel to effectively utilize the available space on the motherboard. Figure 1 is a continuation of a top view of a motherboard of a display panel in accordance with an embodiment of the present invention. As shown in FIG. 1 , the size of the motherboard 100 of the present embodiment is, for example, a specification adopted by the 7.5-generation factory, and the length and width thereof are 丨950 mm×2250 mm, but is not limited thereto. Other specifications may be selected, such as the prior art. Mother board size specifications. A group of 32 吋 first panel units (or referred to as first display panel units) 110 and 52 吋 second panel units (or second display panel units) 12 规划 are planned on the motherboard 100 Groups are arranged in two straight rows. With such a plan, the available space on the motherboard 100 can be effectively utilized, and the utilization rate of the motherboard of the display panel can be improved, thereby improving the overall production capacity. It is to be noted that the above embodiment is described with the design of a panel unit integrating two sizes, but the invention is not limited thereto. That is, in other embodiments, panel units of other sizes may be used, such as panel units of 1 〜 to 100 00 or panel units of more than 100 。. In practice, it is also possible to integrate more sized panel units on the same motherboard and adjust the positional relationship between the panel units to optimize the use of the motherboard. Further, although the foregoing embodiment proposes Integrating the design concept of panel units of different sizes on the motherboard, but since the motherboard in the existing process is assembled by a whole array of switching element array substrates and a whole color filter substrate, 1333100 AU0708053 26219twf.doc/ n is formed, so in practice, the cell gap between the switching element array substrate and the color filter substrate cannot be elastically adjusted with different size panel units. In particular, when the display panel needs to have a specific specification, it will be limited to the existing process and cannot meet the design requirements. 2 is a cross-sectional view showing the display panel 2A made of the above-mentioned mother board 1A. As shown in FIG. 2, the display panel 200 of the present embodiment includes elements such as a switching element array substrate 210, a counter substrate 220, a display medium layer 230, and spacers 240. The switching element array substrate 21 is, for example, composed of a switching element 212, a common wiring 214, a gate insulating layer 216, a protective layer 218, a halogen electrode 219, and the like, and the opposite substrate 22 is, for example, a black matrix 222, color. A color filter substrate composed of a filter layer 224 and a common electrode layer 226 and the like will be described. In other embodiments, the switching element array substrate 210 is composed of, for example, a switching element 212, a gate insulating layer 216, a protective layer, and a pixel electrode 219, and the opposite substrate 22 is, for example, a black matrix 222 and a color 泸' A color stencil composed of a light layer 224 or the like. In the present embodiment, the switching element 212 is exemplified by a bottom gate type transistor, but is not limited thereto, and a top gate type, or other suitable transistor, or a combination of the above may be used. The semiconductor layer of the transistor is a single layer or a multilayer structure, and the material thereof comprises an amorphous germanium, a polycrystalline germanium, a single crystal germanium, a microcrystalline germanium, a germanium germanium, or other suitable semiconductor material, or the above. combination. In the present embodiment, the cell gap 250 refers to the distance between the switching element array substrate 21 and the counter substrate 220. In more detail, the cell gap 25 (M refers to the pixel electrode 219 of the device array substrate 210). The distance between the pedestal electrode layer 226 and the opposite substrate 22. In other words, the cell gap 25 〇 refers to a partial cross-sectional structure of 333 1333100 AU0708053 26219twf.doc/n 12〇. In other words, the first panel unit 110 and The second panel unit 120 will have a cell gap 250, and the cell gap of different sizes formed by the difference between the calculation start point or the calculation end point of each cell gap cannot be obtained according to the difference in the size of the panel unit. In view of this, the present invention further The cell gap difference of the panel units of different sizes is compensated to better realize the design concept of integrating the display panels of different sizes on the same motherboard. In order to compensate for the difference of the cell gap of the panel units of different sizes, The invention can form a lining layer on the switching element array substrate or the opposite substrate while fabricating the switching element array substrate or the opposite substrate In the area, after the switching element array substrate and the opposite substrate are assembled, different sizes of cell gaps are formed. FIG. 3 is a structural diagram of a mother board of a display panel according to another embodiment of the present invention. This embodiment is also illustrated by using a layout of panel units having two sizes as shown in FIG. i, that is, the motherboard 300 has, for example, a group and a second size of the first panel unit 3A of the first size. a group of second panel units 300B, and the first size is substantially different from the second size. In this embodiment, the first size is substantially smaller than the size of the first one. However, in other embodiments, the size of both The size relationship may also be interchanged. In addition, each of the first panel unit 300A and each of the second panel units 300B has a display area (not labeled) and a peripheral circuit area (not labeled) of the adjacent display area. The board 300 mainly includes a switching element array substrate 310, a counter substrate 320, a display medium layer 330, and a liner layer 340. Switching 13 AU0708053 26219twf.doc/n The array substrate 31G has a plurality of arrays arranged The switching element 312 and the corresponding switching element material pixel electrode 314. The opposite substrate 32 is substantially parallel to the switching element array substrate 310, and the counter substrate no, the common electrode 322 is exemplified, but is not limited thereto. Therefore, the common electrode layer 322 may not be included. In the present embodiment, for example, the switching element array substrate 310 and the opposite substrate 320 are separately formed, the switching element array substrate 310 and the opposite substrate 320 are assembled, and the display medium is assembled. The layer 33 is sealed therebetween to form the mother board 300 having the first panel unit 3A and the second panel unit 3B. Of course, after the fabrication is completed, the mother board is also to be cut. The first panel unit 3A and the second panel unit 300B are made independent of each other. In the present embodiment, the 'switching element array substrate 31' is, for example, a thin film transistor array substrate using a thin film transistor as the switching element 312, and the opposite substrate 320 is, for example, a color filter substrate having a black matrix 324 thereon. Elements such as color filter layer 326. The display medium layer 33 is disposed between the switching element array substrate 310 and the opposite substrate 320. The display dielectric layer 330 of the present embodiment is, for example, a liquid crystal layer or other possible material layers. The lining layer 340 is disposed on a specific region between the switching element array substrate 310 and the opposite substrate 320, for example, corresponding to the group of the first panel unit 300A, such that the first panel unit 〇〇8 has the first unit Clearance 350A. In contrast, the lining 34 〇 corresponds to the group outside the second panel unit 3 〇〇 B such that the second panel unit 300 ′ B has the second unit gap 350B. In this embodiment, the lining layer 340 ′ is disposed in the first panel unit 3 〇〇 a without lining 34 〇 in the second panel unit 300B to form 1333100 AU0708053 26219 twf.doc/n ^ the same cell gap 35 Second cell gap % (10) and 'preferably' let the first panel unit 3 〇〇a on the motherboard
表面與第一面板單元3_之對向基板320外表：實 貝上王水平面。換言之’本實施例之襯層鳩的厚卢 =元間隙350A的總和實質上等於第二單元間隙3^卜 再者，第-單元_ 35GA及第二單元嶋3皆是位於 第-面板單元3嶋之顯示區（未標㈣及第二面板單元 300B之顯示區(未標示)來定義之。此外，襯層34〇為單層 或多層結構，且其材質可為無機材質，如氧⑽、氮化石夕曰' 氮氧化石夕、碳化碎、氧化給、氧化紹、或其它材質、或上 述之無機材質的組合；有機材質，如光阻、色阻、苯並環 丁烯(enzocyclobutane，BCB)、環烯類、聚醯亞胺類、聚醯 胺類、聚醋類、聚醇類、聚環氧乙烧類、聚苯類、樹脂類、 水趟類、聚酮類、或其它材料、或上述之有機材質的組合； 甚或是上述之無機材質與有機材質的組合。 本實施例’較佳地，係將襯層340製作於對向基板32〇 上。舉例而言，使襯層340位於顯示介質層；33〇與對向基 板320之間。更詳細而言，本實施例先形成襯層34〇，再 开>成共用電極層322’以使第一面板單元3〇〇a的共用電極 層322覆蓋襯層340，而位於襯層340與顯示介質層330 之間。當然，在其他實施例中，例如：先形成共用電極層 322，再形成襯層340 ’使襯層340配置於共用電極層322 上。在另一實施例中’形成襯層340可形成於下列至少一 種位置上，如對向基板320與彩色濾光層326以及黑矩陣 15 1333100 AU0708053 26219twf.doc/n 324之間、對向基板320與彩色濾光層326之間以及黑矩 陣324之上、或是對向基板32〇與黑矩陣324之間以及彩 色濾光層326之上、或其它膜層位置、上述之組合，以‘ 得襯層340位於對向基板320與顯示介質層33〇之間。易 言之，襯層340位於某一膜層（例如：共用電極層322)之上 及/或之下。此外，本實施例以黑矩陣324及共用電極層 322為例，則黑矩陣324被共用電極層322所覆蓋，但^ 限於此，亦可位於共用電極層322上。 另一方面，在其它實施例中，也可以改為將概層 製作於切換元件陣列基板310的局部區域上，使其^應於 特定尺寸的面板單元。例如，先形成襯層34〇，再形奎 素電極314，或是先形成畫素電極314，再於其上形成觀^ ’或是，先形成襯層340於閘絕緣層216形成之前或 是先形成襯層340於閘絕緣層216與保護層218之間^ 或其它膜層位置、上述之組合，以使襯層34〇位於第 板單元300A的畫素電極遍之上及/或之下。基於前述的 說明，這樣的設計同樣能達到形成不同之單元間隙3 與350B的效果。 本實施例的襯層340為單層或多層結構，且其材 如是光阻或是上述其他材f。以光阻㈣的襯層34 ，，則形成襯層34G的方法例如是藉由塗佈乾膜光阻於局 领切換元件陣列基板及/或對向基板32()上。如圖4 即是緣示一種藉由多排式乾膜光阻塗佈機台400塗佈乾膜 光阻41〇於基板42〇上的製程，此為較佳模式但不限於 1333100 AU0708053 26219twf.doc/n 此，亦可使用單排式機台。應用該製程，可以直接在切換 元件陣列基板310及/或對向基板320的局部區域上形成襯 層340。當然，本實施例也可以採用傳統的微影製程包 括進行光阻塗佈、曝光、顯影等步驟來形成襯層34〇，或 是印刷製程、喷墨製程、或其它合適製程、或上述之組合。 此外’本實施例之切換元件陣列基板310及/或是對向基板 320上的其他膜層也可以採用類似的乾膜塗佈、或是微影 製程、或是印刷製程、喷墨製程、或其它合適製程、或上 述之組合來製作，此處不再逐一贅述。 睛再參考圖3，本實施例的對向基板320具有黑矩陣 324，且黑矩陣324例如是對應於切換元件陣列基板31〇 上的金屬圖案，如切換元件312或相關配線(如掃描線及資 料線等）等。當然，參照其它現有製程，本發明也可以選擇 將黑矩陣製作於切換元件陣列基板上，且黑矩陣可以位於 切換元件之上或之下。亦即，先製作黑矩陣，再製作切換 元件於其上；或是，先製作切換元件，再製作黑矩陣於其 上。此部分應為本領域的技術人員依據現有技術所能理& 者，因此不再贅述。另外，為了維持切換元件陣列基板3 與對向基板320之間的距離，本實施例更在切換元件陣列 基板310與對向基板32〇之間配置多個間隙物36〇。該些 間隙物360的型態包含光間隙物、球間隙物、或其它間隙 物、或上述之組合，而間隙物360的位置可對應黑矩陣324 與切換元件陣列基板310上的金屬圖案配置，以減少開口 率的損失。同樣地，參照現有的製程技術，除了本實施例 17 1333100 AU0708053 26219twf.doc/n 的配置方式之外，本發明也可以藉由不同顏色的彩色濾光 層直接堆疊形成所需的黑矩陣與間隙物，此處不再逐一資 述。 圖5繪示依照本發明之又一實施例的一種顯示面板之 .· 母板的結構圖。為了便於了解，本實施例同樣採用如圖1 • 所繪示之具有兩種尺寸之面板單元的佈局來進行說明，即 母板500例如具有第一尺寸的第一面板單元5〇〇a的群組 φ 與第二尺寸的第二面板單元500B的群組，且第一尺寸實 質上不同於第二尺寸。在本實施例中，第一尺寸實質上小 於第二尺寸。然而，在其它實施例中，兩者的尺寸大小關 係亦可互換。此外，各第一面板單元500A及各第二面板 單元500B皆具有顯示區（未標示)及相鄰顯示區之周邊電 路區（未標示）。 如圖5所示，母板500主要包括切換元件陣列基板 510、對向基板520、顯示介質層530以及襯層540。切換 元件陣列基板510具有陣列排列的多個切換元件5丨2以及 鲁 對應連接切換元件的多個晝素電極514。此外，對向基板 520與切換元件陣列基板51〇實質上平行。在製程上，本 實施例例如是分別製作切換元件陣列基板51()與對向基板 520，將切換元件陣列基板51〇與對向基板52〇進行組立， 並將顯不介質層530密封於其間，以形成具有第一面板單 元500A與第二面板單元5〇〇B的母板5〇〇。本實施例，以 對向基板520具有共用電極層522為範例，但不限於此， 亦可不具共用電極層522。當然，在完成該些製成之後，The surface and the opposite substrate 320 of the first panel unit 3_ are external: the king's horizontal plane on the solid shell. In other words, the sum of the thick linings of the linings of the present embodiment = the gaps 350A is substantially equal to the second unit gaps. Further, the first unit _ 35GA and the second unit 嶋 3 are located in the first panel unit 3 The display area (not labeled (4) and the display area (not labeled) of the second panel unit 300B are defined. In addition, the lining 34 is a single layer or a multi-layer structure, and the material thereof may be an inorganic material such as oxygen (10), Nitride 曰 曰 氮 氮 、, carbonization, oxidation, oxidation, or other materials, or a combination of the above inorganic materials; organic materials, such as photoresist, color resistance, benzocyclobutene (enzocyclobutane, BCB ), cycloolefins, polyimines, polyamines, polyacetates, polyalcohols, polyepoxys, polyphenyls, resins, leeches, polyketones, or other materials Or a combination of the above organic materials; or even a combination of the above inorganic materials and organic materials. In this embodiment, the liner layer 340 is preferably formed on the opposite substrate 32. For example, the liner is provided. 340 is located between the display medium layer; 33〇 and the opposite substrate 320. In more detail, In this embodiment, the lining layer 34 is formed first, and then the common electrode layer 322 ′ is formed so that the common electrode layer 322 of the first panel unit 3 〇〇 a covers the lining layer 340 and is located at the lining layer 340 and the display medium layer 330 . Of course, in other embodiments, for example, the common electrode layer 322 is formed first, and the liner layer 340' is further formed to arrange the liner layer 340 on the common electrode layer 322. In another embodiment, the formation of the liner layer 340 may be Formed in at least one of the following positions, such as the opposite substrate 320 and the color filter layer 326 and the black matrix 15 1333100 AU0708053 26219twf.doc/n 324, between the opposite substrate 320 and the color filter layer 326, and the black matrix 324 Above, or between the opposite substrate 32 and the black matrix 324 and above the color filter layer 326, or other film layer positions, in combination, the liner layer 340 is located on the opposite substrate 320 and the display medium layer. Between the 33 〇, the lining layer 340 is located above and/or below a certain film layer (for example, the common electrode layer 322). In addition, in this embodiment, the black matrix 324 and the common electrode layer 322 are taken as an example. Then the black matrix 324 is covered by the common electrode layer 322, but is limited to Alternatively, in other embodiments, the layering may be formed on a partial area of the switching element array substrate 310 to be applied to a panel unit of a specific size. For example, the liner 34 is formed first, then the quesin electrode 314 is formed, or the pixel electrode 314 is formed first, and then the photoresist electrode 314 is formed thereon, or the liner layer 340 is formed before the gate insulating layer 216 is formed or First, a liner layer 340 is formed between the gate insulating layer 216 and the protective layer 218 or other film layer positions, and the above combination, so that the liner layer 34 is located above and/or below the pixel electrodes of the first plate unit 300A. . Based on the foregoing description, such a design can also achieve the effect of forming different cell gaps 3 and 350B. The lining layer 340 of this embodiment has a single layer or a multi-layer structure, and the material thereof is a photoresist or the other material f described above. The lining 34 of the photoresist (4) is formed by, for example, applying a dry film photoresist to the switching element array substrate and/or the counter substrate 32 (). FIG. 4 is a process for coating a dry film photoresist 41 on a substrate 42 by a multi-row dry film photoresist coater 400. This is a preferred mode but is not limited to 1333100 AU0708053 26219twf. Doc/n This is also possible with a single-row machine. By applying this process, the liner layer 340 can be formed directly on a partial region of the switching element array substrate 310 and/or the opposite substrate 320. Of course, this embodiment can also use a conventional lithography process including photoresist coating, exposure, development, etc. to form the liner 34, or a printing process, an inkjet process, or other suitable process, or a combination thereof. . In addition, the switching element array substrate 310 of the present embodiment and/or other film layers on the opposite substrate 320 may also adopt a similar dry film coating, or a lithography process, or a printing process, an inkjet process, or Other suitable processes, or combinations of the above, are made and will not be described one by one. Referring back to FIG. 3, the opposite substrate 320 of the present embodiment has a black matrix 324, and the black matrix 324 is, for example, a metal pattern corresponding to the switching element array substrate 31, such as the switching element 312 or related wiring (such as a scan line and Data lines, etc.). Of course, with reference to other existing processes, the present invention may also selectively fabricate a black matrix on the switching element array substrate, and the black matrix may be located above or below the switching element. That is, a black matrix is first formed, and then a switching element is formed thereon; or, a switching element is first created, and a black matrix is formed thereon. This part should be considered by those skilled in the art according to the prior art, and therefore will not be described again. Further, in order to maintain the distance between the switching element array substrate 3 and the opposite substrate 320, in the present embodiment, a plurality of spacers 36 are disposed between the switching element array substrate 310 and the opposite substrate 32A. The patterns of the spacers 360 include optical spacers, ball spacers, or other spacers, or a combination thereof, and the locations of the spacers 360 may correspond to the metal patterns on the black matrix 324 and the switching element array substrate 310. To reduce the loss of aperture ratio. Similarly, referring to the existing process technology, in addition to the configuration of the embodiment 17 1333100 AU0708053 26219twf.doc/n, the present invention can also directly form the desired black matrix and gap by color filter layers of different colors. Things, here are no longer one by one. FIG. 5 is a structural diagram of a mother panel of a display panel according to still another embodiment of the present invention. For ease of understanding, the present embodiment is also illustrated by using a layout of panel units having two sizes as shown in FIG. 1 , that is, the motherboard 500 has, for example, a group of first panel units 5 〇〇 a of a first size. The group φ is a group of second panel units 500B of a second size, and the first size is substantially different from the second size. In this embodiment, the first size is substantially smaller than the second size. However, in other embodiments, the size relationships of the two are also interchangeable. In addition, each of the first panel unit 500A and each of the second panel units 500B has a display area (not labeled) and a peripheral circuit area (not labeled) of the adjacent display area. As shown in FIG. 5, the mother board 500 mainly includes a switching element array substrate 510, a counter substrate 520, a display medium layer 530, and a liner layer 540. The switching element array substrate 510 has a plurality of switching elements 5丨2 arranged in an array and a plurality of halogen electrodes 514 corresponding to the connection switching elements. Further, the opposite substrate 520 and the switching element array substrate 51 are substantially parallel. In the process, in this embodiment, for example, the switching element array substrate 51 () and the opposite substrate 520 are separately formed, and the switching element array substrate 51 and the opposite substrate 52 are assembled, and the display medium layer 530 is sealed therebetween. To form a mother board 5A having the first panel unit 500A and the second panel unit 5〇〇B. In the present embodiment, the counter electrode substrate 520 has the common electrode layer 522 as an example. However, the present invention is not limited thereto, and the common electrode layer 522 may not be provided. Of course, after completing the preparations,
1S 1333100 AU0708053 262l9twf.doc/n 全面地形成於第—面板單元3〇〇A或5〇〇A上，即包含顯示 區及周邊電路區，但不限於此，亦可使襯層34〇或54〇形 成於部伤第一面板單元300A或500A上，即僅包含顯示區。 _綜上所述，本發明整合了多種不同尺寸的面板單元於 同一顯示面板的母板上，並且可視實際的需求調整面板單 元的配置。此外，本發明因應於母板上之不同尺寸的面板 單元，更藉由襯層來補償該些不同尺寸之面板單元的單元 間隙差.異，以符合每一面板單元的規格需求。在本發明中， 襯層可以被形成於切換元件陣列基板或是對向基板上，且 切換元件陣列基板與對向基板的型態與内部元件配置可以 有諸多變化。據此，本發明所提出的顯示面板的母板及其 製作方法可被應用於各類型的顯示面板上，以有效利用^ 板上的可用空間，改善顯示面板的母板利用率，並有助於 提升整體的產能。 ' 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬領域中具有通常知識者，在不脫離本發 明之精神和範圍内，當可作些許之更動與潤飾，因此本發 明之保s蔓範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1繪示依照本發明之一實施例的—種顯示面板之 板的上視圖。 圖2繪示由圖1之母板100所製得的顯示面板的1S 1333100 AU0708053 262l9twf.doc/n is integrally formed on the first panel unit 3A or 5A, that is, including the display area and the peripheral circuit area, but is not limited thereto, and the lining 34 or 54 may be provided. The crucible is formed on the first panel unit 300A or 500A, that is, only the display area. In summary, the present invention integrates a plurality of panel units of different sizes on the motherboard of the same display panel, and adjusts the configuration of the panel unit according to actual needs. In addition, the present invention compensates for the difference in cell gaps of the panel units of different sizes by the lining layer in accordance with different sized panel units on the motherboard to meet the specification requirements of each panel unit. In the present invention, the liner layer may be formed on the switching element array substrate or the opposite substrate, and the configuration of the switching element array substrate and the counter substrate may vary widely. Accordingly, the motherboard of the display panel and the manufacturing method thereof provided by the invention can be applied to various types of display panels, so as to effectively utilize the available space on the panel, improve the utilization rate of the motherboard of the display panel, and help To improve the overall production capacity. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a top plan view of a panel of a display panel in accordance with an embodiment of the present invention. 2 shows a display panel made of the motherboard 100 of FIG.
回 0 J W 園0 圖3繪示依照本發明之另-實施例的—種顯示面板之 23 1333100 AU0708053 26219twf.doc/n 母板的結構圖。 圖4繪示一種藉由多排式乾膜光阻塗佈機台塗佈乾膜 光阻於基板上的製程。 圖5繪示依照本發明之又一實施例的一種顯示面板之 ' 母板的結構圖。 • 【主要元件符號說明】 100 :母板 鲁 110:第一面板單元 120 :第二面板單元 200 :顯示面板 210 :切換元件陣列基板 212 :切換元件 214 :共用配線 216 :閘絕緣層 218 :保護層 219 :晝素電極 • 220:對向基板 222 :黑矩陣 224 :彩色濾光層 • 226 :共用電極層 230 :顯示介質層 240 :間隙物 250 :單元間隙 300、500 :母板 24 1333100 AU0708053 26219twf.doc/n 300A、500A :第一面板單元 300B、500B :第二面板單元 310、510 :切換元件陣列基板 312、512 :切換元件 314、514 :畫素電極 320、520 :對向基板 322、522 :共用電極層 324、524 :黑矩陣 326、516 :彩色濾光層 330、530 :顯示介質層 340、540 :襯層 350A、550A :第一單元間隙 350B、550B :第二單元間隙 360、560 :間隙物 400 :乾膜光阻塗佈機台 410 :乾膜光阻 25Back to 0 J W 0 FIG. 3 is a structural diagram of a 23 1333100 AU0708053 26219twf.doc/n motherboard of a display panel in accordance with another embodiment of the present invention. Figure 4 illustrates a process for applying a dry film photoresist to a substrate by a multi-row dry film photoresist coating machine. FIG. 5 is a structural diagram of a mother board of a display panel according to still another embodiment of the present invention. • [Main component symbol description] 100: mother board 110: first panel unit 120: second panel unit 200: display panel 210: switching element array substrate 212: switching element 214: common wiring 216: gate insulating layer 218: protection Layer 219: Alizardin electrode • 220: Counter substrate 222: Black matrix 224: Color filter layer • 226: Common electrode layer 230: Display medium layer 240: Interstitial 250: Cell gap 300, 500: Motherboard 24 1333100 AU0708053 26219twf.doc/n 300A, 500A: first panel unit 300B, 500B: second panel unit 310, 510: switching element array substrate 312, 512: switching elements 314, 514: pixel electrodes 320, 520: opposite substrate 322 522: common electrode layers 324, 524: black matrix 326, 516: color filter layers 330, 530: display medium layers 340, 540: lining layers 350A, 550A: first cell gaps 350B, 550B: second cell gap 360 , 560: spacer 400: dry film photoresist coating machine 410: dry film photoresist 25