TWI331413B - Led flip chip package structure and manufacture method thereof - Google Patents

Led flip chip package structure and manufacture method thereof Download PDF

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TWI331413B
TWI331413B TW96106124A TW96106124A TWI331413B TW I331413 B TWI331413 B TW I331413B TW 96106124 A TW96106124 A TW 96106124A TW 96106124 A TW96106124 A TW 96106124A TW I331413 B TWI331413 B TW I331413B
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Taiwan
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light
layer
emitting diode
group
semiconductor layer
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TW96106124A
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Chinese (zh)
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TW200836365A (en
Inventor
Chien Kai Chung
Chaohsing Chen
Tsunkai Ko
Chengta Kuo
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Epistar Corp
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1331413 096106124修正未劃線版 申請修正日期:99/5/4 九、發明說明: 【發明所屬之技術領域】 本發明係提供一種發光二極體之封裝覆晶結構及其製 造方法’特別是有關於保留發光磊晶層使N型與p型電極塾 等高’以進行覆晶製程。 【先前技術】 現在,覆晶壓合又稱為C4壓合,係屬於平列s(Area_Array) 的壓合,而非如習知技藝之打線壓合及TAB連線技術所提供之周列 式(Peripheral Array)的壓合,因此覆晶壓合能應用於極高密度 的封褒連線製程上。於雜的過程+“會被翻覆過來,以面 朝下方式讓“上面的導電端藉由金料體與基板的電極塾相互 連接的封裝触。細此覆晶封裝技術於發光二極體巾,能有效 使件發光二極體元件之疏量發散至外部,但是習知技藝在將晶 片導電端與基板之電極塾連接時,因晶片導電端的不等高,常^ 成基板上設置之晶片無法保持—平整陳態,而影響 之運作钕能。 $ :參閱第一圖’係為習知技藝之發 -結構剖面圖。此發光二極 :震 晶基請、一第-型半導體請覆括- 二型半導體層106、一 N型雷#執1Λβ a 4、— 半導體層⑽上、一 P==°8位於部份之第- 型電極塾110位於部分之第二型 1331413 096106124修正未劃線版 申請修正日期:99/5/4 導體層106上、子基座114以及凸塊112位於子基座114 上。因此習知技藝的N型電極墊1〇8與P型電極墊11〇的 兩電極墊高度不等高,造成發光二極體於覆晶製程時,當 P型電極墊110與凸塊112壓合116後,N型電極墊1〇8仍 未穩定與凸塊112壓合116,因而常造成施力上的不平均 而使發光二極體難以保持水平的狀態’更甚者將會導致發 光二極體良率不兩的狀況。 為改善上述之缺失,故提出一種發光二極體之封裝覆 晶結構及其製造方法的需求。本發明人基於多年從事研究 與諸多實務經驗,經多方研究設計與專題探討,遂於本發 明提出一種發光二極體之封裝覆晶結構及其製造方法以作 為前述期望一實現方式與依據。 【發明内容】 緣是,為達上述目的,依本發明之發光二極體之封^ 覆晶結構及其製造方法之主要目的是保留發光蟲晶層使^ 與P型電極塾等高,以進行覆晶製程,進而提升覆晶聰 私時,發光二極體與子基座間壓合的製程良率。 本發明之另—目是在發光二極體封料晶製程時, 塾與P型電極塾之兩電極墊高度保持等高,使得N膽 :P型電極錢合於子基座之焊接凸塊時,能達到均勻的 使得發光二極體維持水平狀態。 又 根據本發明之上述目的,提出一種發光二極體之 構’至少包含有至少-發光二極體、—子基座及至少1= 1331413 凸塊,其中焊接凸塊設於子基座上, 式藉由焊接凸塊與子基座連結。 096106124修正未線版 申請修正日期:99/5/4 而發光二極體係以一覆晶方 曰^叙^光二極體之結^少包含有—蟲晶基板、一發光蟲 曰4 —犬起結構、—金屬反射層、-透明電極層、- Ν型電 ρ型電雜,其t發綠晶結構位於該H基板上,更 依序由-緩衝層、―第—型半導體層、— ,,成’且第-型半物層與第二型半物層具^=31331413 096106124Corrected Unlined Edition Application Revision Date: 99/5/4 IX. Invention Description: [Technical Field] The present invention provides a package flip chip structure of a light-emitting diode and a manufacturing method thereof, particularly Regarding the retention of the luminescent epitaxial layer, the N-type and the p-type electrode are equal in height to perform a flip chip process. [Prior Art] Now, flip chip bonding, also known as C4 press-fitting, is a press-fit of the spectroscopy s (Area_Array), rather than the circumferential line type provided by the wire bonding and TAB connection technology as in the prior art. (Peripheral Array) is pressed, so flip chip bonding can be applied to very high density sealing process. In the process of miscellaneous + "will be overturned, face-down way, let the upper conductive end be connected to the package by the gold body and the electrode 基板 of the substrate. The flip chip packaging technology can effectively dissipate the light-emitting diode components to the outside, but the conventional technique is to connect the conductive ends of the wafers to the electrodes of the substrate due to the conductive ends of the wafers. Not equal to the height, the wafers placed on the substrate can not be maintained - flattened, and the operation is affected. $ : Refer to the first figure ' is a haircut of the prior art - a structural section view. The light-emitting diode: a crystal-based semiconductor, a first-type semiconductor, please cover - a two-type semiconductor layer 106, an N-type Lei #1Λβ a 4, a semiconductor layer (10), a P == °8 located in the portion The first type electrode 110 is located in a portion of the second type 1331413 096106124. The unlined version is amended. Date: 99/5/4 The conductor layer 106, the submount 114, and the bump 112 are located on the submount 114. Therefore, the heights of the two electrode pads of the N-type electrode pad 1〇8 and the P-type electrode pad 11〇 of the prior art are not equal, which causes the P-type electrode pad 110 and the bump 112 to be pressed during the flip chip process. After the combination 116, the N-type electrode pad 1〇8 is still not stably pressed and pressed with the bump 112, thus often causing unevenness in the applied force and making it difficult for the light-emitting diode to maintain a horizontal state. The situation in which the yield of the diode is not the same. In order to improve the above-mentioned deficiency, a need has been made for a packaged flip-chip structure of a light-emitting diode and a method of manufacturing the same. The inventors have been engaged in research and many practical experiences for many years, and have been researched and designed by a plurality of parties. In the present invention, a packaged flip-chip structure of a light-emitting diode and a manufacturing method thereof are proposed as the implementation and basis of the foregoing expectation. SUMMARY OF THE INVENTION The reason is that, in order to achieve the above object, the main purpose of the flip-chip structure of the light-emitting diode according to the present invention and the manufacturing method thereof is to keep the luminescent layer and the P-type electrode equal to each other. The capping process is carried out to further improve the process yield of the bonding between the LED and the sub-base when the Cladding is transparent. Another object of the present invention is that in the process of the light-emitting diode sealing process, the heights of the two electrode pads of the 塾 and P-type electrodes are kept at the same height, so that the N-bend: P-type electrode is bonded to the solder bumps of the sub-base. At the same time, uniformity can be achieved so that the light-emitting diode maintains a horizontal state. According to the above object of the present invention, a light-emitting diode structure includes at least a light-emitting diode, a sub-base, and at least 1 = 1331413 bumps, wherein the solder bumps are disposed on the sub-base. The structure is connected to the sub-base by solder bumps. 096106124 Amendment of the non-line version of the application revision date: 99/5/4 and the illuminating two-pole system with a smectic square 曰 ^ ^ ^ light dipole body ^ less contains - insect crystal substrate, a light worm 曰 4 - dog The structure, the metal reflective layer, the transparent electrode layer, and the Ν-type electric p-type electric hybrid, the t-green crystal structure is located on the H substrate, and more sequentially, the buffer layer, the “first-type semiconductor layer, — , into 'and the first type half layer and the second type half layer ^=3

結構係與發光蟲晶結構有相隔職之間隙,且間隙的底 明導射=反射層則位於第二型半導體層上,透 冤層位於金屬反射層上,Ν型電極塾包覆 電極 :隙與第—型半導體層連接,ρ型電極塾位於部分I透明 含r晶基板、-發光 :極墊,其概織構位於該蟲 且第一型半導體層與第二型半導體體層所構成, 導體層,金屬反射独料二辨 第型+ 突起結構,並__與第—料倾N型電轉包覆於 部分之透明電極層上。 _s接,p型電極墊位於 緣是,根麻剌之战目的, -極體 封衷之製造方法,此方法至少包含步驟如下 極體之覆晶 (1)形成至少一發光 1331413 096106124修正未劃線版 申請修正曰期:99/5/4 (3) 設置至少一焊接凸塊於子基座上;以及 (4) 利用一覆晶方式’藉由焊接凸塊使發光二極體與子基座連 4士。 上述之發光二極體之製程至少包含步驟如下: 0)提供一磊晶基板;The structure is separated from the luminescent crystal structure, and the bottom of the gap is guided. The reflective layer is located on the second type semiconductor layer, the transparent layer is on the metal reflective layer, and the Ν-type electrode is coated with the electrode: Connected to the first-type semiconductor layer, the p-type electrode 塾 is located in the portion I transparent r-containing crystal substrate, the illuminating: pole pad, the texture is located in the worm and the first type semiconductor layer and the second type semiconductor body layer are formed, the conductor The layer, the metal reflective material, the second type and the protrusion structure, and the __ and the first material are electrically coated on the transparent electrode layer. _s connection, p-type electrode pad is located at the edge, the purpose of the root paralysis, the manufacturing method of the polar body seal, the method includes at least the steps of the flip-chip of the following polar body (1) forming at least one illuminating 1331413 096106124 correction unmarked Line application correction period: 99/5/4 (3) setting at least one solder bump on the sub-base; and (4) using a flip chip method to make the light-emitting diode and sub-base by solder bumps The seat is 4 people. The process of the above-mentioned light-emitting diode comprises at least the following steps: 0) providing an epitaxial substrate;

⑵形成-發光蟲晶結構,位於遙晶基板上,其锋 構依序由-緩衝層、一第一型半導體層、一主動層及:第° 二型半導體層所構成’且第—型料體層與第二型半導體 層具有相反之電性; ⑶形成-光阻倾層’位於發光m構之第二型半導體 層上,且具有兩間隙;(2) Forming-lighting insect crystal structure, located on the remote crystal substrate, the front structure of which consists of a buffer layer, a first type semiconductor layer, an active layer and a second type semiconductor layer, and the first type The bulk layer and the second type semiconductor layer have opposite electrical properties; (3) forming a photoresist layer is located on the second type semiconductor layer of the light emitting m structure, and has two gaps;

(2)提供一子基座; ⑷製作—突起結構使發綠晶結構形成前叙關隙,且間 隙底面為第一型半導體層; (5)移除光阻保護層; ⑹形成-金屬反騎位於第二群導體層上 (7)形成一透明電極層位於金屬反射層上; (8)製作-n型電轉包覆於突起結構 一型半導體層連接; 並透過兩間隙與第 製造方法 製作-P型電轉在部分之透明電極層上。 藉由上述步驟完成發光二極體之覆㈣裝之 096106124 申請修正曰期..99/5/4 再者,根據本發明之上述目的,再提出一種發光二極體之 曰曰封裝之製造方法,此方法至少包含步驟如下: (1) 形成至少一發光二極體; (2) 提供一子基座; (3) 設置至少一焊接凸塊於子基座上;以及 (4) 利用一覆晶方式,藉由焊接凸塊使發光二極體與子基座連 結。 ' 上述之發光二極體之製程至少包含步驟如下: (1)提供一磊晶基板; ⑵形成-發綠晶結構’位祕晶基板上,其中發光蟲晶結 構依序由—緩衝層、—第—型半導體層、—主動層及一第 二型半導體層所構成,且第—型料體層與第二料導體 層具有相反之電性; ⑶形成-光阻保護層,位於發綠晶結構之第二型半導體 層上’且具有兩間隙; ^突起結構使發絲晶結獅成前述之兩間隙,且 曰 1隙底面為第一型半導體層; (5)移除光阻保護層; ⑹形成—金屬反射層位於第二型半導體層上; 1331413 (7)製作-N型電極墊包覆於突:正曰_ 復於大起結構,並透過兩間隙與 一型半導體層連接;以及 ⑻製作-Ρ型電婦在部分之透明電極層上。 藉由上述步驟完成發《二極體之覆晶封裝之製造方法。 綜上所述,本發明揭露之之發光二極體之封裝覆晶結構(2) providing a sub-base; (4) fabricating-protrusion structure to form a green crystal structure to form a front gap, and the bottom surface of the gap is a first type semiconductor layer; (5) removing the photoresist protective layer; (6) forming a metal counter Riding on the second group of conductor layers (7) to form a transparent electrode layer on the metal reflective layer; (8) fabricating -n-type electrorotation coating on the protrusion-type semiconductor layer connection; and through the two gaps and the first manufacturing method The -P type is electrically transferred to a portion of the transparent electrode layer. By the above steps, the coating of the light-emitting diode is completed. (IV) 096106124 is applied for the correction period.. 99/5/4 Furthermore, according to the above object of the present invention, a method for manufacturing the package of the light-emitting diode is proposed. The method comprises at least the following steps: (1) forming at least one light emitting diode; (2) providing a submount; (3) providing at least one solder bump on the submount; and (4) using a cover In the crystal mode, the light emitting diode is coupled to the submount by solder bumps. The process of the above-mentioned light-emitting diode includes at least the following steps: (1) providing an epitaxial substrate; (2) forming a green-crystal structure on the crystal substrate, wherein the light-emitting crystal structure is sequentially composed of a buffer layer, a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and the first-type material layer and the second material conductor layer have opposite electrical properties; (3) forming a photoresist protective layer, located in the green crystal structure The second type semiconductor layer has 'and has two gaps; ^ the protrusion structure makes the hairline crystal lions form the two gaps mentioned above, and the bottom surface of the 曰1 gap is the first type semiconductor layer; (5) the photoresist protection layer is removed; (6) forming—the metal reflective layer is on the second type semiconductor layer; 1331413 (7) fabricating the -N type electrode pad to be overlaid on the protrusion: 曰 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ (8) Fabrication - The 电 type electrician is on a part of the transparent electrode layer. The manufacturing method of the flip chip package of the diode is completed by the above steps. In summary, the package flip chip structure of the light emitting diode disclosed in the present invention

線版 致使請電㈣與P型電極墊兩者高度相同,触提升覆晶封裝 製程時兩電極墊壓合於子基座之焊接凸塊的製程良率。 兹使貴審查委貞對本發明之技術特徵及所達成之功 效有更進-步之瞭解與認識,下文謹提供較佳之實施例及 相關圖式以為輔佐之用,並以詳細之說明文字配合說明如 後。 【實施方式】 為讓本發明之上述目的、特徵、和優點能更明顯易懂 下文依本發明之-種發光二極體之封裝覆晶結構及其製道 方法,特舉-較佳實施例,並配合所__式,作詳麵 詞如下,其中相同的元件將以相同的元件符號加以說明( 凊參㈣2圖’係繪示本發明之發光二極體之封裝覆 曰曰:構之方塊示意圖。圖中,封職晶結構至少包括有一 ^光-極體216、-子基座220及至少一焊接凸塊218,其中焊招 =218設於子基座220上,而發光二極體216係以一覆晶方式 籍由焊接凸塊218與子基座220連結。 1331413 096106124修正未劃線版 ,申請修正日期:99/5/4 a之子基座220之材料一般係選自由Si、GaAs、Gap、 ZnO及GaN所組成之一族群;焊接凸塊218之材料一般係選自由 鋁金舶、鋅、銀、鎳、鍺、銦、錫、欽、錯、銅、把及其合 金所、、且成之-族群’或可為銀膠,或包含選自於自發性導電高分子及 高分子中掺雜導電材質所構成材料族群中之至少一猜料,或其他可 替代之材料。The wire version causes the power (4) and the P-type electrode pad to have the same height, and the process yield of the solder bumps of the two-electrode pad pressed against the sub-base when the process is lifted. The reviewer will have a better understanding and understanding of the technical features and the efficacies of the present invention. The preferred embodiments and related drawings are provided for the purpose of assisting and explaining in detail. As after. [Embodiment] The above-mentioned objects, features, and advantages of the present invention can be more clearly understood. The package flip-chip structure of the light-emitting diode according to the present invention and a method of manufacturing the same are provided. And in conjunction with the __ formula, the detailed words are as follows, wherein the same components will be described by the same component symbols (凊参(四)2图' shows the package of the light-emitting diode of the present invention: In the figure, the sealing structure includes at least one light-polar body 216, a sub-base 220 and at least one solder bump 218, wherein the solder joint 218 is disposed on the sub-base 220, and the light-emitting diode The body 216 is joined to the sub-base 220 by a solder bump 218 in a flip chip manner. 1331413 096106124 Correction of the unlined version, the date of application of the correction date: 99/5/4 a sub-base 220 is generally selected from Si a group of GaAs, Gap, ZnO, and GaN; the material of the solder bump 218 is generally selected from the group consisting of aluminum, zinc, silver, nickel, bismuth, indium, tin, chin, erbium, copper, and alloys thereof. And the group - may be a silver gum, or comprise a high-level conductive high-altitude At least one of the material groups formed by the doping of the conductive material in the polymer and the polymer, or other alternative materials.

«月參閱第3圖,係繪示本發明之發光二極體之封裝覆 晶結構之-較佳實施例之剖面圖。圖中,封裝覆晶結構之 ,光一極體216至}包括有-蟲晶基板·、—發光蠢晶結構 202、-突起結構206、一金屬反射層2〇8、一透明導電層刖、一 =電極塾212及- P型電極塾214,其中發光蠢晶結構2()2位於 悬晶基板200上,更依序由一緩衝層2〇2卜一第一型半導體層 2022、-主動層2023及一第二型半導體層2〇24所構成,且第 型轉體層2022與第二型半導體層顧具有相反之電性, 、=206係與發光蠢晶結構2〇2有相隔之兩間隙,且間隙底面_ ‘、'、型半導體層2022,金屬反射層2G8則位於第二型半導濟 2024上,透明導電層21 〇位於金屬反縣2〇8上,ν型電極塾批 匕覆於犬起結構206,並由兩間隙底面2042盥第一型半導㉟ 助連接,ρ型電極墊214位於部分之透明導電層_上 於子基座220上,而發光二極體216係以一覆^ 由坏接凸塊218與子基座220連結。 、猎 上述之金屬反射層208之材料一般係選自由鋁、金、鉑 銀、錦、錯、銦、錫及其合金所組成之—族群;透明導⑼= 之材料-般係選自祿化嶋、氧化_、氧鱗、氧化銦^及氣化 1331413 096106124修正未劃線版 申請修正日期:99/5/4 Λα ^ Λ L> · · 卞5円11多也^期:外/5/4 錫所、、且成之一族群;N型電極墊212 —般係選自由Ti/A1、Cr/Au、 OVPt/K^/Pd/Au Μ α/Ti/Au ^之一族群;p 型電極墊 214 -般係選自由 Ni/Au、Pd/Au、pt/Au、、㈣u、免心 以及Ta/Au組成之一族群。«Monday Referring to Figure 3, there is shown a cross-sectional view of a preferred embodiment of the packaged flip-chip structure of the light-emitting diode of the present invention. In the figure, the package flip-chip structure, the light-pole body 216 to include a - crystal substrate, a light-emitting crystal structure 202, a protrusion structure 206, a metal reflective layer 2, a transparent conductive layer, and a transparent conductive layer = electrode 塾 212 and - P type electrode 塾 214, wherein the luminescent silica structure 2 () 2 is located on the suspension substrate 200, more sequentially by a buffer layer 2 〇 2 a first type semiconductor layer 2022, - active layer 2023 and a second type semiconductor layer 2〇24, and the first type of the rotating layer 2022 and the second type semiconductor layer have opposite electrical properties, and the =206 series and the light emitting crystal structure 2〇2 are separated by two gaps. And the bottom surface of the gap _ ', ', the type semiconductor layer 2022, the metal reflective layer 2G8 is located on the second type semi-conductor 2024, the transparent conductive layer 21 〇 is located on the metal anti-county 2〇8, the ν-type electrode is coated In the canine structure 206, and connected by the two gap bottom surface 2042 盥 the first type of semiconductor guide 35, the p-type electrode pad 214 is located on a portion of the transparent conductive layer _ on the sub-base 220, and the light-emitting diode 216 is A cover ^ is connected to the sub-base 220 by the bad bump 218. The material of the metal reflective layer 208 is generally selected from the group consisting of aluminum, gold, platinum silver, brocade, indium, indium, tin and alloys thereof; the transparent conductive (9) = material is selected from the group嶋, oxidation _, ox scale, indium oxide ^ and gasification 1331413 096106124 revised unlined version of the application revised date: 99/5/4 Λα ^ Λ L> · · 卞5円11 more than ^ period: outside/5/ 4 tin, and into a group; N-type electrode pad 212 is generally selected from the group consisting of Ti / A1, Cr / Au, OVPt / K ^ / Pd / Au Μ α / Ti / Au ^; p type The electrode pad 214 is generally selected from the group consisting of Ni/Au, Pd/Au, pt/Au, (4) u, exogenous, and Ta/Au.

印參閱第4圖’係繪示本發明之發光二極體封裝覆晶結構另 -實施例剖關。圖中,發光二極體216之結構亦可為包含有一 蟲晶基板200、-發光遙晶結構2〇2、一突起結構2〇6、一透明導 電層210、一 N型電極墊212及一 p型電極墊214,苴 結構2〇2位於該蟲晶基板上,更依序由一緩衝層2〇2U -型半導體層2022、-主動層2G23及-第二型半導體層雇所 構成’且第-型半導體層2G22與第二型半導體層聰具有相反 之電性’突起結構206係與發光蟲晶結構2〇2有兩間隙,且間隙 底面2042為第-型料體層2〇22,透明導電層21(h立於第二型半 導體層_上’ N型電極墊212包覆於突起結構施,並由兩間 隙底面2042與第-型半導體層2G22連接,p型電極独*位於 部分之透明導電層21Q上,焊接凸塊218於子基座22{)上而發 光-極體216係以-覆晶方式藉由焊接凸塊218與子基座咖連 上=透明導電層21〇之材料一般係選自由氧化铜錫、氧化鑛 錫、乳化鋅、氧化銦以及氧化錫所組成之一族群;關電極塾212 一 般係選自由Ti/Α卜Cr/Au、Cr/Pt/Au、Cr/pd/Au以及的心 組成之一族群;P型電極墊214 -般係選自由Ni/Au、Pd/Au、Referring to Fig. 4, there is shown a cross-sectional view of a flip-chip structure of a light-emitting diode package of the present invention. In the figure, the structure of the LED 216 may also include a crystal substrate 200, a light-emitting crystal structure 2〇2, a protrusion structure 2〇6, a transparent conductive layer 210, an N-type electrode pad 212, and a The p-type electrode pad 214, the germanium structure 2〇2 is located on the insect crystal substrate, and is sequentially composed of a buffer layer 2〇2U-type semiconductor layer 2022, an active layer 2G23, and a second type semiconductor layer. The first-type semiconductor layer 2G22 and the second-type semiconductor layer have opposite electrical properties. The protrusion structure 206 has two gaps with the luminescent crystal structure 2〇2, and the gap bottom surface 2042 is the first-type material layer 2〇22, transparent. The conductive layer 21 (h stands on the second type semiconductor layer _ upper side). The N-type electrode pad 212 is coated on the protrusion structure, and is connected to the first-type semiconductor layer 2G22 by the two gap bottom surfaces 2042, and the p-type electrode is located at a portion. On the transparent conductive layer 21Q, the solder bumps 218 are on the sub-mount 22{) and the light-emitting bodies 216 are connected in a flip-chip manner by solder bumps 218 and sub-bases = transparent conductive layer 21 The material is generally selected from the group consisting of copper tin oxide, tin oxide, zinc emulsified, indium oxide and tin oxide. The gate electrode 212 is generally selected from the group consisting of Ti/ΑCr/Au, Cr/Pt/Au, Cr/pd/Au, and a core; the P-type electrode pad 214 is generally selected from Ni/Au, Pd. /Au,

Pt/Au、Ti/Au、Cr/Au、Sn/Au 以及 Ta/Au 組成之一族群。 請參閱第5圖’係緣示本發明發光二極體之覆晶封裝之製 造方法流程圖。此方法之流程步驟如下: 12A group consisting of Pt/Au, Ti/Au, Cr/Au, Sn/Au, and Ta/Au. Referring to Fig. 5, a flow chart showing a method of manufacturing a flip chip package of the light-emitting diode of the present invention is shown. The process steps of this method are as follows: 12

f SI 0巧麵24修正未劃線版 十_ μ. 〇r « 申請修正日期:99/5/4 步驟S51 :形成至少一發光二極體; 步驟S52 :提供一子基座; 步驟S53 :設置至少一焊接凸塊於子基座上;以及 步驟S54 .利用一覆晶方式,藉由焊接凸塊使發光二極體與 子基座連結。 明參閱第6圖’係繪示本發明—發光二極體之製造方法流程 圖。此方法之流程步驟如下: 步驟S61 :提供一遙晶基板; 步驟S62 .形成-發光蠢晶結構,位於蟲晶基板上,其中發光 磊晶結構依序由一緩衝層、一第一型半導體層、 一主動層及一第二型半導體層所構成,且第一型 半導體層與第二型半導制具有相反之電性; 步驟S63 :軸—光轉制,位於發光級轉之第二型半 導體層上,且具有兩間隙; 步驟S64:製作—突起結構使發綠晶結構形成前步驟之兩間 隙,且間隙底面為第一型半導體層; 步驟S65 :移除光阻保護層; 步驟S66 .形成—金屬反射層位於第二型半導體層上; 步驟S67 :形成—透明導電層位於金屬反射層上; 步驟S68 :製作—關電錄包覆於突起結構,並透過兩間隙 與第一型半導體層連接;以及 1331413 096106124修正未劃線版 申請修正曰期:99/5/4 步驟S69 :製作一 P型電極墊在部分之透明導電層上。 藉由上述步驟完成發光二極體之覆晶封裝之製造方法。 請參閱第7-1〜第7-7圖,係為本發明一較佳實施例的 發光二極體之覆晶封裝製造方法之結構剖面圖。首先請參 閱第7-1結構剖面圖,圖中,發光二極體216結構至少包含: k供一蟲晶基板200;形成一發光蟲晶結構2〇2位於蟲晶基板2〇〇 上,其中發光蟲晶結構202依序形成一緩衝層2021、一第一型半 導體層2022、一主動層2023以及一第二型半導體層2〇24所構成, 且第一型半導體層2022與第二型半導體層2〇24具有相反之電 性’在第二型半導體層2024上塗佈形成一光阻保護層2〇4經圖案 化之微影與蝕刻製程形成具有兩間隙2〇41 ;請再參閱第7_2圖, 圖中,再藉由蝕刻上述之兩間隙2041,直至部分的第一型半導體 層2022暴露出來’亦即為兩間隙底面2〇42為第一型半導體層2〇22 之暴露部分,形成-突起結構2〇6介於兩間隙底面施2中間;請 再參閱第7-3 _ ’圖中’移除7_2圖中的光阻保護層2Q4且保^ 部分發光磊晶結構202 ;請再參閱第7_4圖,圖中,蒸鍍一金屬反 射層208於第二型半導體層麵上,再蒸鑛一透明導電層2ι〇於 金屬反射層2G8上;請再參閱第7_5圖,圖中,蒸鍍—N型電極 墊212包覆於突起結構2〇6,且透過兩間隙底面2〇42與第一型半 導體層2022連接,再蒸鑛一 p型電極塾214形成於透明導電層训 上;請再參閱第7-6 圖巾’翻轉上述所製作完成之發光二極f SI 0 Qiao 24 correction unlined version ten _ μ. 〇r « Application revision date: 99/5/4 Step S51: forming at least one light-emitting diode; Step S52: providing a sub-base; Step S53: Locating at least one solder bump on the submount; and step S54. Using a flip chip method, the light emitting diode is coupled to the submount by solder bumps. Referring to Fig. 6, there is shown a flow chart of a method for manufacturing a light-emitting diode of the present invention. The process steps of the method are as follows: Step S61: providing a remote crystal substrate; Step S62. Forming a light emitting crystal structure, located on the insect crystal substrate, wherein the light emitting epitaxial structure is sequentially composed of a buffer layer and a first type semiconductor layer An active layer and a second type semiconductor layer, and the first type semiconductor layer and the second type semiconductor have opposite electrical properties; step S63: axis-light conversion, the second type semiconductor in the light level On the layer, and having two gaps; Step S64: fabricating the protrusion structure to form the two gaps in the pre-step of the green crystal structure, and the bottom surface of the gap is the first type semiconductor layer; Step S65: removing the photoresist protection layer; Step S66. Forming—the metal reflective layer is located on the second type semiconductor layer; Step S67: forming—the transparent conductive layer is located on the metal reflective layer; Step S68: fabricating the off-circuit recording on the protruding structure, and transmitting the gap through the first type semiconductor Layer connection; and 1331413 096106124 amendment unlined version of the application revision period: 99/5/4 Step S69: A P-type electrode pad is formed on a portion of the transparent conductive layer. The manufacturing method of the flip chip package of the light emitting diode is completed by the above steps. 7-1 to 7-7 are cross-sectional views showing the structure of a flip chip package manufacturing method of a light emitting diode according to a preferred embodiment of the present invention. First, please refer to the sectional view of the structure 7-1. In the figure, the structure of the light-emitting diode 216 includes at least: k for a crystal substrate 200; and a light-emitting crystal structure 2〇2 is formed on the insect crystal substrate 2, wherein The luminescent crystal structure 202 is formed by sequentially forming a buffer layer 2021, a first type semiconductor layer 2022, an active layer 2023, and a second type semiconductor layer 2 〇 24, and the first type semiconductor layer 2022 and the second type semiconductor Layer 2〇24 has the opposite electrical property'coated on the second type semiconductor layer 2024 to form a photoresist protective layer 2〇4 patterned lithography and etching process to form two gaps 2〇41; please refer to 7_2, in the figure, by etching the two gaps 2041 until a portion of the first type semiconductor layer 2022 is exposed, that is, the two gap bottom surfaces 2〇42 are exposed portions of the first type semiconductor layer 2〇22, The formation-protrusion structure 2〇6 is interposed between the bottom surfaces of the two gaps; please refer to the removal of the photoresist protection layer 2Q4 in the 7_2 figure and the partial emission epitaxial structure 202 in the figure 7-3_' Referring again to FIG. 7_4, a metal reflective layer 208 is deposited on the second type of semiconductor On the layer, re-steaming a transparent conductive layer 2 〇 on the metal reflective layer 2G8; please refer to FIG. 7_5, in which the vapor-deposited N-type electrode pad 212 is covered on the protruding structure 2〇6, and through the two gaps. The bottom surface 2〇42 is connected to the first type semiconductor layer 2022, and the p-type electrode 214 is further formed on the transparent conductive layer. Please refer to the 7-6 figure to flip the above-mentioned completed light-emitting diode.

14 [SI 1331413 體 216’ 且焊接凸塊218設於子基座220 096106124修正未劃線版 申請修正日期:99/5/4 上’以封裝覆晶方式將製 作完成之發光二極體216壓合奴於子基座22()上;請再參閱第 7-7圖’圖中,為一完成發光二極體216壓合於子基座上之 結構剖面示意圖。 上述之子基座220之材料一般係選自由Si、GaAs、、 及GaN所組成之一族群;焊接凸塊218 料一般係選自由14 [SI 1331413 body 216' and the solder bump 218 is set on the sub-base 220 096106124 to correct the unlined version of the application revision date: 99/5/4 on the packaged flip-chip method to complete the completed light-emitting diode 216 pressure The slave is on the sub-base 22 (); please refer to the figure 7-7 in the figure, which is a schematic cross-sectional view of the structure in which the light-emitting diode 216 is pressed onto the sub-base. The material of the sub-substrate 220 is generally selected from the group consisting of Si, GaAs, and GaN; the solder bumps 218 are generally selected from

銘”'鋅'銀、錄、鍺、銦、錫、鈦、鉛、銅、絶及其合 金所組成之—族群’或可為銀膠,或包含選自於自發性導電高分子 及高分子巾摻雜導電材質所構成材料族群中之至少一種材料,或其他 可替代之材料;金屬反射層咖之材料-般係選自由鋁、金、鉑、 鋅、銀、錦、鍺、姻、錫及其合金所組成之—族群;透明導電層 2"10之材料-般係選自由氧化銦錫、氧化锡錫、氧化辞、氧化钢以及 氧化錫所組成之一族群;N贱極墊212 一般係選自由侧、Ming "'zinc' silver, recorded, antimony, indium, tin, titanium, lead, copper, and its alloys - the group ' may be silver glue, or contain selected from spontaneous conductive polymers and polymers The towel is doped with at least one material of the material group formed by the conductive material, or other alternative materials; the material of the metal reflective layer is generally selected from the group consisting of aluminum, gold, platinum, zinc, silver, brocade, yttrium, yttrium, tin The group consisting of its alloys; the transparent conductive layer 2"10 is generally selected from the group consisting of indium tin oxide, tin oxide tin, oxidized steel, oxidized steel, and tin oxide; N-polar pad 212 is generally Selected from the side,

Cr/AU、Cr/Pt/Au、Cr/Pd/Au 以 Cr/Ti/Au 組成之一族群;p型電 極塾 m -般係選自由 Ni/Au、Pd/Au、pt/Au、Ti/Au、Cr/Au、Sn/Au 以及Ta/Au組成之一族群。 請參閱第8圖’係顯示本發明另—發光二極體之製造方法流 程圖。此方法之流程步驟如下: 步驟S81 :提供—磊晶基板; 步驟咖:形成—發光遙晶結構位於蟲曰曰曰基板上,其中發光 磊晶結構依序由一、緩衝層、一第一型半導體層、 iSl 15 1331413 096106124 申請修正日期:99/5/4 一主動層及一第二型半導體層所構成,且第一型 半導體層與第二型半導體層具有相反之電性; 步驟S83 :形成一光阻保護層位於發光蠢晶結構之第二型半 導體層上,且具有兩間隙; 步驟S84 ·製作一突起結構使發光蠢晶結構形成前步驟之兩 間隙,且間隙底面為第一型半導體層; 步驟S85 :移除光阻保護層; 步驟S86 .形成一金屬反射層位於第二型半導體層上; 步驟S87 :製作-N型電極塾包覆於突起結構,並透過兩間 隙與第一型半導體層連接;以及 步驟S88 :製作一 p型電極塾在部分之透明導電層上。 藉由上述步驟完成發光二極體之覆晶封裝之製造方法。 請參閱第9-1〜第9-7圖,係為本發明另—實施例的發 光-極體之覆晶封裝製造方法之結構剖面圖。首先請參閱第 9-1結構剖面圖,圖中,發光二極體216結構至少包含··提供 -蟲晶基板200 ;形成-發光蠢晶結構观位於遙晶基板咖上, 其中發光磊晶結構202依序形成一緩衝層2021、一第一型半導體 層2022 主動層2023以及-第二型半導體層2024所構成,且 第一型料體層2022與第二型半導體層顧具有相反之電性, 在第-型半導體層2024上塗佈形成一光阻保護層2Q4經圖案化之 微影與姓刻製程形成兩間隙2G41,請再參閱第9_2圖,圖中,再Cr/AU, Cr/Pt/Au, Cr/Pd/Au are a group consisting of Cr/Ti/Au; p-type electrode 塾m is generally selected from Ni/Au, Pd/Au, pt/Au, Ti/ A group consisting of Au, Cr/Au, Sn/Au, and Ta/Au. Referring to Fig. 8, there is shown a flow chart showing a method of manufacturing the light-emitting diode of the present invention. The process steps of the method are as follows: Step S81: providing - an epitaxial substrate; step coffee: forming - the light-emitting crystal structure is located on the substrate of the insect, wherein the light-emitting epitaxial structure is sequentially composed of a buffer layer and a first type The semiconductor layer, iSl 15 1331413 096106124, the date of application of the amendment: 99/5/4, an active layer and a second type semiconductor layer, and the first type semiconductor layer and the second type semiconductor layer have opposite electrical properties; Step S83: Forming a photoresist protective layer on the second type semiconductor layer of the light emitting crystal structure and having two gaps; Step S84 · fabricating a protrusion structure to form two gaps in the pre-step of the light-emitting stray structure, and the bottom surface of the gap is the first type a semiconductor layer; Step S85: removing the photoresist protective layer; Step S86. Forming a metal reflective layer on the second type semiconductor layer; Step S87: fabricating the -N-type electrode layer to cover the protruding structure, and passing through the two gaps A type of semiconductor layer is connected; and step S88: forming a p-type electrode on a portion of the transparent conductive layer. The manufacturing method of the flip chip package of the light emitting diode is completed by the above steps. Referring to Figures 9-1 to 9-7, there is shown a cross-sectional view showing a method of manufacturing a flip-chip package for a light-emitting body according to another embodiment of the present invention. First, please refer to the cross-sectional view of the structure of the ninth structure. In the figure, the structure of the light-emitting diode 216 at least includes a liquid crystal substrate 200; the structure of the light-emitting crystal structure is located on the remote crystal substrate, wherein the light-emitting epitaxial structure 202 is formed by sequentially forming a buffer layer 2021, a first type semiconductor layer 2022, an active layer 2023, and a second type semiconductor layer 2024, and the first type material layer 2022 and the second type semiconductor layer have opposite electrical properties. Applying a photoresist layer 2Q4 on the first-type semiconductor layer 2024 to form a gap 2G41 by patterning lithography and a surname process, please refer to FIG. 9_2, in the figure,

16 LSI 1^31413 096106124 ^lE^gij^ 申請修正日期:99/5/4 直至部分的第一型半導體層2022 藉由蝕刻上述之兩間隙2041, 暴露出來,亦即為兩間隙底面2Q42為該第一型半導體層2〇22之 暴露部分,形成-突起結構2〇6介於兩間隙底面綱2中間;請再 參閱第9-3圖,圖巾,移除9_2圖巾的光阻保護層且保留部 分發光蟲晶結構202 ;請再參閱第9—4圖,圖中,蒸鍍一金屬反射 層208於第二型半導體層2024上;請再參閱第9一5圖,圖中,蒸16 LSI 1^31413 096106124 ^lE^gij^ Application revision date: 99/5/4 until part of the first type semiconductor layer 2022 is exposed by etching the above two gaps 2041, that is, the two gap bottom surfaces 2Q42 are The exposed portion of the first type semiconductor layer 2〇22, the formation-protrusion structure 2〇6 is interposed between the bottom surfaces of the two gaps; please refer to the figure 9-3, the towel to remove the photoresist layer of the 9_2 towel. And retaining part of the luminescent crystal structure 202; please refer to Figure 9-4, in which a metal reflective layer 208 is deposited on the second type semiconductor layer 2024; please refer to Figure 9-5, in the figure, steaming

錄- N型電轉212包覆於突起結構206,减過兩赚底面2〇42 與第型半導體層2022連接,再蒸鍍一 p型電極塾214形成於金 屬反射層208 _L,请再參閲第9-6目,圖令,轉上述所製作完 成之發光二極體’且焊接凸塊218設於子基座22G上,以封裂覆 晶方式將製作完成之發光二極體2〗6壓合224於子基座22〇上; 請再參閱m圖’圖中’為—完成發光二極體216壓合於子基 座220上之結構剖面示意圖。 上述之子基座220之材料一般係選自由Si、GaAs、Gap、 ,〇及GaN所組成之一族群;焊接凸塊218之材料一般係選自由 'm鋅、銀、鎳、鍺、銦、錫 '鈦、錯、銅、把及其合 金所組成之—族群,或可為銀膠,或包含選自於自發性導電高分子口及 局分子中摻縛電材f所構成材料族群巾之至少 替狀#料;金屬反射層2〇8之材料一般係選自由紹m了 銀鎳、錯、銦、錫及其合金所組成之一族群;N型電極塾犯 係選自由 T·、Cr/Au、Cf/Pt/Au、Cr/Pd/Au 及 Cr/Ti/Au =之-族群;P型電極墊214 一般係選自由Ni/Au、pd/Au、 u、TVAu、cr/Au、Sn/Au 以及 Ta/Au 組成之一族群。Recording - N-type electric relay 212 is wrapped around the protruding structure 206, and the bottom surface 2〇42 is connected to the first semiconductor layer 2022, and a p-type electrode 214 is formed by vapor deposition on the metal reflective layer 208_L. In the case of the light-emitting diodes of the above-mentioned light-emitting diodes 218, the solder bumps 218 are disposed on the sub-mount 22G, and the completed light-emitting diodes 6 Pressing 224 on the sub-base 22 ;; please refer to the m diagram 'in the figure' as a cross-sectional view of the structure of the light-emitting diode 216 pressed onto the sub-base 220. The material of the sub-substrate 220 is generally selected from the group consisting of Si, GaAs, Gap, germanium and GaN; the material of the solder bump 218 is generally selected from the group consisting of 'm zinc, silver, nickel, antimony, indium, tin. 'Titanium, wrong copper, copper, and its alloys - group, or may be silver glue, or at least selected from the material group of the material consisting of the spontaneous conductive polymer mouth and the local molecule The material of the metal reflective layer 2〇8 is generally selected from the group consisting of silver, nickel, wrought, indium, tin and alloys thereof; the N-type electrode is selected from T·, Cr/Au , Cf / Pt / Au, Cr / Pd / Au and Cr / Ti / Au = - group; P-type electrode pad 214 is generally selected from Ni / Au, pd / Au, u, TVAu, cr / Au, Sn / Au and Ta/Au form a group.

f SJ 17 1331413 096106124修正未劃線版 申請修正日期:99/5/4 以上所述僅為舉例性,而非為限制性者。任何未脫離 本創作之精神與範疇,而對其進行之等效修改或變更,均 應包含於後附之申請專利範圍中。 【圖式簡單說明】 第1圖係習知技藝之發光二極體之封裝覆晶結構剖面 圖; 第2圖係繪示本發明之發光二極體之封裝覆晶結構之方 塊示意圖; 第3圖係繪示本發明之發光二極體之封裝覆晶結構之較 佳實施例之剖面圖; 第4圖係繪示本發明之發光二極體之封裝覆晶結構之另 一實施例剖面圖; 第5圖係繪示本發明發光二極體之覆晶封裝之製造方法 流程圖; 第6圖係繪示本發明一發光二極體之製造方法流程圖; 第7-1〜7-7圖係繪示本發明一較佳實施例的發光二極 體之覆晶封裝製造方法結構剖面圖; 第8圖係顯示本發明另一發光二極體之製造方法流程圖;以及 第9-1〜9-7圖係繪示本發明另一實施例的發光二極體 之覆晶封裝製造方法結構剖面圖。f SJ 17 1331413 096106124 Amendment to unlined version. Date of application for amendment: 99/5/4 The above description is for illustrative purposes only and not as a limitation. Any equivalent modifications or alterations to the spirit and scope of this creation shall be included in the scope of the appended patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a packaged flip-chip structure of a light-emitting diode of the prior art; FIG. 2 is a block diagram showing a package flip-chip structure of the light-emitting diode of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 4 is a cross-sectional view showing a preferred embodiment of a package flip chip structure of a light-emitting diode of the present invention; FIG. 4 is a cross-sectional view showing another embodiment of a package flip chip structure of a light-emitting diode of the present invention; 5 is a flow chart showing a manufacturing method of a flip chip package of the light emitting diode of the present invention; and FIG. 6 is a flow chart showing a manufacturing method of a light emitting diode according to the present invention; 7-1~7-7 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 8 is a cross-sectional view showing a method of fabricating a flip-chip package for a light-emitting diode according to a preferred embodiment of the present invention; FIG. 8 is a flow chart showing a method of manufacturing another light-emitting diode of the present invention; FIG. 9-9 is a cross-sectional view showing the structure of a flip chip package manufacturing method of a light-emitting diode according to another embodiment of the present invention.

LSI 18 1331413 096106124修正未劃線版 申請修正曰期:99/5/4 【主要元件符號說明】 10 0 .遙晶基板, 102 :第一型半導體; 104 :主動層; 106 :第二型半導體; 108 : N型電極墊; 110 : P型電極墊; 112 :凸塊; 114 :子基座; 116 :壓合; 2 0 0 .蟲晶基板, 202 :發光磊晶結構; 2021 :緩衝層; 2022:第一型半導體層; 2023 :主動層; 2024:第二型半導體層; 204 :光阻保護層; 2041 :兩間隙; 2042 :間隙底面; 206 :突起結構; 208 :金屬反射層; 210 :透明導電層; 212 : N型電極墊; 214 : P型電極墊; 216 :發光二極體; 218 :焊接凸塊; 220 :子基座; 224 :壓合; S51〜S54 :流程步驟; S61〜S69 :流程步驟;以及 S81〜S88 :流程步驟。LSI 18 1331413 096106124 Amendment to unlined version of application revision period: 99/5/4 [Main component symbol description] 10 0. Remote crystal substrate, 102: First type semiconductor; 104: Active layer; 106: Second type semiconductor 108: N-type electrode pad; 110: P-type electrode pad; 112: bump; 114: sub-base; 116: press-fit; 2 0 0. Insect crystal substrate, 202: luminescent epitaxial structure; 2021: buffer layer 2022: first type semiconductor layer; 2023: active layer; 2024: second type semiconductor layer; 204: photoresist protective layer; 2041: two gaps; 2042: gap bottom surface; 206: protrusion structure; 208: metal reflection layer; 210: transparent conductive layer; 212: N-type electrode pad; 214: P-type electrode pad; 216: light-emitting diode; 218: solder bump; 220: sub-base; 224: press-fit; S51~S54: process step ; S61 ~ S69: process steps; and S81 ~ S88: process steps.

1919

Claims (1)

十、申請專利範圍: 1.-種發光二極體之縣覆晶結構,至少包括: 至少一發光二極體,至少包括: . 一磊晶基板; 一一發光蠢晶結構,位於晶基板上,其中該發遍結構依 序由-_層、—第—型半導體層、—絲層以及—第二型半導X. Patent application scope: 1. The county flip-chip structure of the light-emitting diode includes at least one light-emitting diode, at least: an epitaxial substrate; a light-emitting crystal structure on the crystal substrate , wherein the transmission structure is sequentially composed of a -_ layer, a --type semiconductor layer, a silk layer, and a second type semiconductor 096106124修正未劃線版 申請修正日期:99/5/4 ϋ層_成’__蝴高侧具有相反 之電性; 、-突起結構,與該發光蠢晶結構有相隔狀之間隙,其中該間 隙底面為該第一型半導體層. 垔電極墊&覆於該突起結構,其中透過該間隙與該第一 型半導體層連接;以及 一Ρ型電極墊,位於該第二型半導體層上; 一子基座;以及 至少一焊接凸塊,設於該子基座上; 其中’該發光二極縣.覆晶方式藉由該焊接凸塊與該子基座 連結。 2.如申請專利範圍帛1項所述之發光二極體之封裝覆晶結構,其 中該發光二極體,至少包括: 一金屬反射層,位於該第二型半導體層上;以及 一透明電極層,位於該金屬反射層與該ρ型電極塾之間。 LSI 20 3.如申嗜直士m杜 申請修正曰期:99/5/4 〇範圍第1項所述之發光二極體之封裝覆晶結構,其 中該找座之材料係選自由&、祕、㈣、如〇及_所組成之 一族群。 4·如申凊專利細第丨項所述之發光二極體之龍覆晶結構,盆 焊接凸塊之材料係選自由链、金、m錄、鍺、銦、、 錫”、銅、免及其合金所組成之一族群。 &如申睛專利範圍第i項所述之發光二極體之封裝覆晶結構,里 中該焊接凸塊之材料可為轉,或包含選自於自發性導電高分子及高 分子中摻雜導電材質所構成材料族群令之至少一種材料,或其他可替 代之材料。 ^如申請專利範圍第2項所述之發光二極體之封裝覆晶結構,盆 中该金屬反射層球料係選自由銘、金、敍、鋅、銀、錄、錯、姻、 錫及其合金所組成之一族群。 =申請專利範圍第2項所述之發光二極體之封裝覆晶結構,其中 “明電極叙__ __、氧化_、n -銦以及氧化錫所組成之一族群。 ^如申請柄細第丨俩狀發光二鋪之 中該N型電極墊俜撰白ώτ./Α1 〇 m '、 及 p /r: /AU、Cr/Pt/Au、_w 及Cr/Ti/Au組成之一族群。 1331413 _06]24修正未劃線版 申請修正日期:99/5/4 Q如由往奎U Θ闲你1 甲請修正曰期:99/5/4 .如申明專利祕第1項所述之發光二極體之封«晶結構,其 中該 p 型電極墊係選自由 Ni/Au、Pd/Au、pt/Au、Ti/Au、Cr/Au、 Sn/Au以及Ta/Au組成之一族群。 10.-種發光二極體之覆晶封裝之製造方法,至少包括 形成至少一發光二極體,至少包括: 知·供一遙晶基板;096106124 Amendment of the unlined version of the application amendment date: 99/5/4 ϋ layer _ into the '__ butterfly high side has the opposite electrical; 、, the protrusion structure, and the luminescent crystal structure is separated by a gap, where a bottom surface of the gap is the first type semiconductor layer. The germanium electrode pad & covers the protruding structure, wherein the first semiconductor layer is connected through the gap; and a germanium electrode pad is located on the second type semiconductor layer; a sub-base; and at least one solder bump disposed on the sub-base; wherein the light-emitting diode is flip-chip connected to the sub-base by the solder bump. 2. The package flip chip structure of the light emitting diode according to claim 1, wherein the light emitting diode comprises at least: a metal reflective layer on the second type semiconductor layer; and a transparent electrode a layer between the metal reflective layer and the p-type electrode. LSI 20 3. For example, the application of the singularity of the illuminating diodes is as follows: 99/5/4 〇 〇 〇 〇 发光 发光 发光 发光 发光 , , , , , , , , , , , , , , , , , , , , , , , , , One group consisting of secrets, secrets, (four), such as 〇 and _. 4. The dragon flip-chip structure of the light-emitting diode according to the application of the patent application, the material of the pot welding bump is selected from the group consisting of chain, gold, m-record, bismuth, indium, tin, copper, and And a combination of the alloys and the alloys thereof. The material of the solder bumps may be a rotating material or may be selected from the group consisting of The conductive polymer and the polymer are doped with a conductive material to form at least one material of the material group, or other alternative materials. ^ The packaged flip chip structure of the light emitting diode according to claim 2, The metal reflective layer ball in the basin is selected from the group consisting of Ming, Jin, Syria, Zinc, Silver, Record, Wrong, Marriage, Tin and its alloys. = The light-emitting diode described in claim 2 The packaged flip-chip structure of the body, wherein "the electrode is composed of a group of ____, oxidized_, n-indium and tin oxide. ^If the application handle is fine, the N-type electrode pad is written in white τ./Α1 〇m ', and p /r: /AU, Cr/Pt/Au, _w and Cr/Ti/ Au constitutes a group of people. 1331413 _06]24 Amendment of unlined version of application for amendment date: 99/5/4 Q If you are going to Kui U, you are free of charge. 1 Please correct the period: 99/5/4. As stated in the patent claim item 1 a crystal structure of a light-emitting diode, wherein the p-type electrode pad is selected from the group consisting of Ni/Au, Pd/Au, pt/Au, Ti/Au, Cr/Au, Sn/Au, and Ta/Au . The method for manufacturing a flip-chip package of a light-emitting diode, comprising at least forming at least one light-emitting diode, comprising at least: providing a remote crystal substrate; 形成—發綠晶結構,位於縣晶基板上,其巾該發光蟲晶結 構由一緩衝層、—第—型半導體層、一主動層及-第二型半導體 層所構成,題第—型半導體層與該第二料導體層具有減之 形成一光阻保護層 上’且具有兩間隙; 位於該發光磊晶結構之該第二型半導體層Forming a green-green crystal structure, which is located on a county crystal substrate, and the light-emitting insect crystal structure is composed of a buffer layer, a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and the first-type semiconductor The layer and the second material conductor layer are reduced to form a photoresist protective layer and have two gaps; the second type semiconductor layer located in the light emitting epitaxial structure 製作犬起結構,使該發光m獅成該間隙,其中該間隙 底面為該第一型半導體層; 移除該光阻保護層; 製作—N型電極塾’包覆於該突起結構, 第一型半導體層連接;以及 其中透過該間隙與該 製作一P型電極墊 提供—子基座; ,位於該第二型半導體層上 °又置至上一焊接凸塊於該子基座上;以及 iSJ 22 1331413 ,106124修正未劃線版 田—费B 士』 申請修正曰期:99/5/4 利用-覆阳方式,藉由該焊接凸塊使該發光二極體與該子基座連 結。 11. 如申δ月專利I巳圍第i 〇項所述之發光二極體之覆晶封裝之製 造方法,其中該發光二極體之製程,至少包括: 形成-金屬反射層’位於該第二型半導體層上;以及 形成-透明電極層’位於該金屬反射層與該?型電極藝之間。Making a canine structure, the light ray is formed into the gap, wherein the bottom surface of the gap is the first type semiconductor layer; the photoresist protective layer is removed; and the N-type electrode 塾' is coated on the protruding structure, first a semiconductor layer connection; and wherein a sub-substrate is provided through the gap and the P-type electrode pad; and is disposed on the second semiconductor layer and is disposed on the sub-mount; and iSJ 22 1331413 , 106124 Amendment of unlined version of the field - fee B. Application time limit: 99/5/4 The use of the solder bump to connect the light emitting diode to the submount. 11. The method for manufacturing a flip-chip package of a light-emitting diode according to the above-mentioned item, wherein the process of the light-emitting diode comprises at least: forming a metal reflective layer at the first On the two-type semiconductor layer; and the formation-transparent electrode layer 'is located on the metal reflective layer? Type between electrode art. 12. 如申#專利範圍第1Q項所述之發光二極體之覆晶封裝之製造 方法’其中該光阻保護層係關案化形成該相隔預定之該間隙。 13. 如申α專她圍第12項所述之發光二極體之覆晶封裝之製造 方法,其中該相隔預定之該間隙係以侧該_,使該間隙底面 為該第一型半導體層之暴露部分。 14. 如申#專利細第1G項所述之發光二極體之覆晶封裝之製造 方法’其中該子基座之材料係選自由Si、GaAS、GaP、ZnO及GaN 所組成之一族群。 15.如申明專利圍第1〇項所述之發光二極體之覆晶封裝之製 方法’其中該焊接凸塊之材料係選自由銘、金、叙、辞、銀、錐、 錯、銦、m銅、#及其合金所域之—鱗。”、 6·如申π專她群1()項所述之發光二極體之覆晶封裝之製生 方法’其巾該焊接凸塊之她^轉,或包含選自於自發性 高分子及祕子博縛紐細構成材賊群^ 或其他可替代之材料。 裡材科, 23 修正未劃線版 17·如申請專_第11彻述之發光二極造 方法’其中該金屬反射層之材料係選自由銘、金、翻、辞、銀、 鎳、鍺、銦、錫及其合金所組成之一族群。 18_如申睛專利範圍第u項所述之發光二極體之覆晶封裝之势造 方法,針該透明電極層之材料係選自由氧化銦錫、氧化_碡 化鋅、氧化錮及氧化錫所組成之一族群。12. The method of manufacturing a flip chip package for a light-emitting diode according to the invention of claim 1 wherein the photoresist protection layer is formed to form the gap which is predetermined. 13. The method of manufacturing a flip chip package for a light-emitting diode according to claim 12, wherein the gap is defined by a side of the gap, and the bottom surface of the gap is the first type semiconductor layer The exposed part. 14. The method of fabricating a flip chip package for a light-emitting diode according to the invention of claim 1 wherein the material of the submount is selected from the group consisting of Si, GaAS, GaP, ZnO, and GaN. 15. The method for manufacturing a flip chip package of a light-emitting diode according to the above-mentioned patent, wherein the material of the solder bump is selected from the group consisting of: Ming, Jin, Xu, Ci, Silver, Cone, Wrong, Indium. , m copper, # and its alloys - the scales. "6", such as the method of making a flip-chip package of a light-emitting diode according to the invention of the group 1 (), the wiper of the solder bump, or a material selected from the group consisting of spontaneous polymers And the secrets of the shackles of the scorpion group thief group ^ or other alternative materials. Licai, 23 corrected unlined version 17 · as applied for _ the 11th full description of the light bipolar method 'which metal reflection The material of the layer is selected from the group consisting of Ming, Jin, Turn, Word, Silver, Nickel, Bismuth, Indium, Tin and their alloys. 18_Lensium as described in the scope of claim In the method for forming a flip chip package, the material of the transparent electrode layer is selected from the group consisting of indium tin oxide, zinc oxide, antimony oxide and antimony oxide. 19.如申請專利範圍第1G項所述之發光二極體之覆晶域之製造 方法,其中該N型電極塾係選自由Ti/A1、Cr/Au、、 Cr/Pd/Au及Cr/Ti/Au組成之一族群。 20.如申4專利範ϋ第1〇項所述之發光二極體之覆晶縣之製造 方法’其中該Ρ型電極墊係選自由Ni/Au、pd/Au、pt/Au、Ti/Au、 Cr/Au、Sn/Au及Ta/Au組成之一族群。19. The method for producing a flip-chip of a light-emitting diode according to claim 1G, wherein the N-type electrode is selected from the group consisting of Ti/A1, Cr/Au, Cr/Pd/Au, and Cr/. Ti/Au constitutes a group of people. 20. The method of manufacturing a chemi-type LED of the light-emitting diode according to the invention of claim 4, wherein the 电极-type electrode pad is selected from the group consisting of Ni/Au, pd/Au, pt/Au, Ti/ A group consisting of Au, Cr/Au, Sn/Au, and Ta/Au. f SI 24f SI 24
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CN102593304B (en) * 2012-02-27 2014-07-30 合肥晶恒电子科技有限公司 High-power light-emitting diode (LED) light using ceramic for radiating
TWI483434B (en) * 2013-02-18 2015-05-01 Lextar Electronics Corp Led sub-mount and method for manufacturing light-emitting device using the sub-mount
JP7491769B2 (en) * 2020-08-04 2024-05-28 株式会社ジャパンディスプレイ Circuit board, LED module, display device, and method for manufacturing LED module and method for manufacturing display device

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US9647167B2 (en) 2011-08-26 2017-05-09 Micron Technology, Inc. Solid-state radiation transducer devices having flip-chip mounted solid-state radiation transducers and associated systems and methods
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US10541355B2 (en) 2011-08-26 2020-01-21 Micron Technology, Inc. Solid-state radiation transducer devices having flip-chip mounted solid-state radiation transducers and associated systems and methods
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