JP5581427B2 - Semiconductor light emitting diode element and semiconductor light emitting device - Google Patents

Description

  The present invention relates to a semiconductor light emitting diode element and a semiconductor light emitting device.

  In semiconductor light emitting devices such as LEDs (Light Emitting Diodes), high heat dissipation and high light extraction efficiency are expected. The light emitting layer side of the wafer is brought into contact with the heat sink side, and the emitted light is reflected directly or by a reflective film. Flip-chip type semiconductor light emitting devices that can be taken out from the substrate side have been developed.

  In a flip-chip type semiconductor light emitting device, a technology for forming a highly efficient reflective film is essential, and light generated in the light emitting layer, particularly light in the ultraviolet band, is reflected with high efficiency, and a p-type nitride semiconductor layer and Silver that is easy to make ohmic contact has attracted attention as a p-side electrode candidate for realizing a light-emitting element with high luminance.

  Generally, when the light emitted in the flip-chip type semiconductor light emitting device is extracted outside, the light extraction efficiency in the semiconductor light emitting device is better as it is closer to the center. In addition, when a semiconductor light emitting device manufactured on a sapphire substrate or a gallium nitride substrate is formed into a square or a rectangle, since two or all four sides are not cleaved surfaces, the element end face shape is formed by breaking into elements. Therefore, the closer the light emitting region is to the center part, the better the light output reproducibility is.

  On the other hand, in order to efficiently extract emitted light reflected in the semiconductor light emitting device to the outside, it is advantageous to design a wide reflective region on the electrode formation surface. However, in the conventional structure, since the p-side electrode also serves as a reflection region, the above condition is a trade-off.

  In Patent Document 1, an attempt is made to achieve both electrical characteristics and reflection characteristics by a structure in which a segmented ohmic electrode is provided on a contact layer and a reflection layer is formed therebetween. Also in this method, the planar shape of the electrode has not been sufficiently studied, and there is room for improvement in light extraction efficiency and light output reproducibility.

JP 2005-116794 A

  The present invention provides a semiconductor light emitting diode element and a semiconductor light emitting device having high light extraction efficiency and high light output reproducibility.

According to one aspect of the present invention, a first semiconductor layer including a first portion and a second portion aligned with the first portion in the first direction, and the second portion in a direction intersecting the first direction. A laminated structure having a first main surface on the second semiconductor layer side, and a second semiconductor layer spaced apart from the second semiconductor layer, and a light emitting layer provided between the second portion and the second semiconductor layer A first electrode connected to the first portion of the first semiconductor layer, and a first electrode provided on the first main surface side of the stacked structure. A second electrode connected to the second semiconductor layer and having reflectivity for light emitted from the light emitting layer, and provided between a part of the second electrode and the second semiconductor layer, An insulating layer having a light-transmitting property to the light, the insulating layer including a region overlapping the second electrode, and the second semiconductor And an insulating layer for confining current by restricting an ohmic contact region between the first electrode and the second electrode, the first main surface is rectangular, and the first electrode extends along an outer edge of the first main surface. Provided around the second electrode, and at least a part of the outer edge of the second electrode is along the inner edge of the first electrode, and the first of the first electrodes. the width of a portion located at a corner portion of the main surface, the wider than the width located on the side portion of the first main surface, from the previous SL outer edge of the first main surface to said outer edge of said second electrode The distance is longer at the corner than at the side, and the distance from the outer edge of the second electrode to the inner edge of the insulating layer in the region overlapping the second electrode of the insulating layer is The second semiconductor layer and the insulating layer are longer at the side portion than at the corner portion. Becomes wide, in the corner portion, the semiconductor light emitting diode element being shorter than the side portions is provided.

  According to another aspect of the present invention, the semiconductor light-emitting diode element according to any one of the above and the light emitted from the semiconductor light-emitting diode element are absorbed and light having a wavelength different from that of the light is emitted. A semiconductor light emitting device is provided.

  According to the present invention, a semiconductor light-emitting diode element and a semiconductor light-emitting device with high light extraction efficiency and high light output reproducibility are provided.

1 is a schematic view illustrating the configuration of a semiconductor light emitting element according to a first embodiment of the invention. FIG. 6 is a schematic view illustrating characteristics of the semiconductor light emitting element according to the first embodiment of the invention. It is a schematic diagram which illustrates the structure of the semiconductor light emitting element of a 1st comparative example. It is a schematic diagram which illustrates the structure of the semiconductor light emitting element of the 2nd comparative example. FIG. 5 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to a second embodiment of the invention. FIG. 5 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to a third embodiment of the invention. FIG. 6 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to a fourth embodiment of the invention. FIG. 10 is a schematic view illustrating the configuration of a semiconductor light emitting element according to a fifth embodiment of the invention. FIG. 10 is a schematic view illustrating the configuration of a semiconductor light emitting element according to a sixth embodiment of the invention. It is a schematic diagram which illustrates the structure of the semiconductor light-emitting device concerning the 7th Embodiment of this invention. FIG. 10 is a schematic plan view illustrating the configuration of another semiconductor light emitting element according to the seventh embodiment of the invention. FIG. 10 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting device according to an eighth embodiment of the invention.

  Embodiments of the present invention will be described below with reference to the drawings.

Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio coefficient of the size between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratio coefficient may be represented differently depending on the drawing.
Further, in the present specification and each drawing, the same reference numerals are given to the same elements as those described above with reference to the previous drawings, and detailed description thereof will be omitted as appropriate.

(First embodiment)
FIG. 1 is a schematic view illustrating the configuration of a semiconductor light emitting element according to the first embodiment of the invention.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 1, the semiconductor light emitting device 101 according to the first embodiment of the present invention includes an n-type semiconductor layer (first semiconductor layer) 1, a p-type semiconductor layer (second semiconductor layer) 2, A stacked structure 1 s having a light emitting layer 3 provided between an n-type semiconductor layer 1 and a p-type semiconductor layer 2 is provided. The laminated structure 1s has a structure in which the p-type semiconductor layer 2 and the light emitting layer 3 are selectively removed, and a part of the n-type semiconductor layer 1 is exposed on the first main surface 1a on the p-type semiconductor layer 2 side. have.

  The semiconductor light emitting device 101 further includes an n-side electrode (first electrode) 7 provided on the first major surface 1a on the p-type semiconductor layer 2 side of the stacked structure 1s and connected to the n-type semiconductor layer 1. A p-side electrode (second electrode) 4 provided on the first main surface 1a of the multilayer structure 1s and connected to the p-type semiconductor layer 2 and reflecting the light emitted from the light-emitting layer 3; An insulating layer 11 is provided between a part of the electrode 4 and the p-type semiconductor layer 2 and has a light-transmitting property with respect to light emitted from the light-emitting layer 3.

  The distance from the outer edge of the p-side electrode 2 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap is more central than the peripheral part of the first main surface 1a. In short.

In this specific example, the planar shape of the semiconductor light emitting device 101 is substantially rectangular.
In the peripheral portion of the semiconductor light emitting element 101, the distance from the outer edge of the p-side electrode 2 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap is rectangular. In addition to the width a on the diagonal line, the width a1 in the vertical direction of the rectangle and the width a2 in the horizontal direction of the rectangle can be included.

  On the other hand, the central portion of the semiconductor light emitting device 101 is a portion where the p-side electrode 4 and the n-side electrode 7 face away from the rectangular outer peripheral portion of the semiconductor light emitting device 101. That is, in the central portion of the semiconductor light emitting device 101, the distance from the outer edge of the p-side electrode 2 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap is the width b. It is.

  The width b in the central portion is narrower than the width a, the width a1, and the width a2 in the peripheral portion.

  The insulating layer 11 constricts the current flowing between the p-side electrode 4 and the laminated structure 1s. Then, by narrowing the width b in the central portion rather than the width a, width a1 and width a2 in the peripheral portion, the path of the current flowing between the p-side electrode 4 and the laminated structure 1s can be as much as possible. It can arrange | position in the center part. That is, the insulating layer 11 constricts the current flowing between the p-side electrode 4 and the laminated structure 1s, and the width constricted by the insulating layer 11 is smaller in the central portion than in the peripheral portion of the first main surface 1a. .

  On the other hand, the emitted light emitted from the light emitting layer 3 is transmitted through the insulating layer 11 that is transparent to the light, is efficiently reflected by the p-side electrode 4, and travels again to the laminated structure 1s side. The light is emitted from the second main surface 1b opposite to the first main surface 1a. That is, in the portion of the p-side electrode 4 on the first main surface 1 a side, the current path is localized at the central portion of the semiconductor light emitting element 101 while reflecting the emitted light on the entire surface of the p-side electrode 4. As a result, the p-side electrode 4 can pass a current only to the central part of the element having high efficiency while reflecting the emitted light in the widest possible area. That is, the entire area of the reflection region is enlarged while the current is confined in the portion of the p-side electrode 4 where the insulating layer 11 is not provided and the light emitting region is arranged in the center.

  When the light emitted in the flip-chip type semiconductor light emitting device is extracted outside like the semiconductor light emitting device 101 according to the present embodiment, the light extraction efficiency in the semiconductor light emitting device is better as it is closer to the center.

  In addition, for example, when a semiconductor light emitting device manufactured on a sapphire substrate or a gallium nitride substrate is formed into a square or rectangle, two or four sides are not cleaved surfaces, so that the device is formed by breaking into a device. The reproducibility of the end face shape is deteriorated.

In the semiconductor light emitting device 101 according to the present embodiment, the light extraction efficiency is improved by confining the current in the portion of the p-side electrode 4 where the insulating layer 11 is not provided and placing the light emitting region in the center. Since the light emitting region can be as close as possible to the central portion of the semiconductor light emitting element 101, the influence of the element end face can be suppressed, and the reproducibility of the light output is improved.
On the other hand, since the emitted light is reflected by the entire surface of the p-side electrode 4, the reflection area is wide.

  Thereby, according to the semiconductor light emitting device 101 according to the present embodiment, a semiconductor light emitting device having high semiconductor light extraction efficiency and high light output reproducibility can be provided.

  In this specific example, the n-side electrode 7 is provided at one corner of the semiconductor light emitting element 101. In this case, the portion where the n-side electrode 7 and the p-side electrode 4 face each other is Arranged at the center of the element. Therefore, in the case of such a structure, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap is the n-side electrode. 7 and the p-side electrode 4 are set to be short. That is, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is longer in the other parts than the part where the n-side electrode 7 and the p-side electrode 4 face each other.

In the semiconductor light emitting device 101, the p-side electrode 4 can contain silver or a silver alloy. Thereby, the p-side electrode 4 has good ohmic connection characteristics with respect to the p-type semiconductor layer 2, and the contact resistance with respect to the p-type semiconductor layer 2 can also be lowered.
Any conductive material can be used for the n-side electrode 7, and a conductive laminated film such as Ti / Al / Ni / Au can be used. Further, by using a single layer film or a laminated film containing silver or a silver alloy for the n-side electrode 7, the reflection region can be further widened, and the light output can be improved.
As the insulating layer 11, any insulating layer that transmits light emitted from the light emitting layer 3 can be used.

  The semiconductor light emitting device 101 according to the present embodiment is made of, for example, a nitride semiconductor formed on the substrate 10 made of sapphire.

That is, for example, using a metal organic chemical vapor deposition method, a first AlN buffer layer having a high carbon concentration (carbon concentration: 3 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ²⁰⁾ is formed on the substrate 10 whose surface is a sapphire c-plane. cm ⁻³ ) of ³ nm to 20 nm, high-purity second AlN buffer layer (carbon concentration 1 × 10 ¹⁶ cm ^{−3 to} 3 × 10 ¹⁸ cm ⁻³ ) of 2 μm, non-doped GaN buffer layer of 3 μm, Si-doped n-type GaN contact 4 μm of the layer (Si concentration 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ ) and the Si-doped n-type Al _0.10 Ga _0.90 N cladding layer (Si concentration 1 × 10 ¹⁸ cm ⁻³ ) 0.02 [mu] m, Si-doped n-type _Al 0.11 _{Ga 0.89} n barrier layer (Si concentration 1.1~2.0 × ¹⁰ 19 ^{cm -3)} and GaInN light-emitting layer (wavelength 380 nm) and is alternately 0.075μm emitting layer having the multiple quantum well structure formed by periodically laminating, the first final _Al 0.11 _{Ga 0.89} N barrier layer having a multiple quantum well (Si concentration 1.1~2.0 × ¹⁰ 19 cm ^{- 3} ) 0.01 μm, and the second final Si-doped n-type Al _0.11 Ga _0.89 N barrier layer (Si concentration 0.8 to 1.0 × 10 ¹⁹ cm ⁻³ ) of the multiple quantum well 0.01 μm The non-doped Al _0.11 Ga _0.89 N spacer layer is 0.02 μm, the Mg-doped p-type Al _0.28 Ga _0.72 N cladding layer (Mg concentration 1 × 10 ¹⁹ cm ⁻³ ) is 0.02 μm, Mg The doped p-type GaN contact layer (Mg concentration 1 × 10 ¹⁹ cm ⁻³ ) is 0.1 μm, and the high-concentration Mg-doped p-type GaN contact layer (Mg concentration 2 × 10 ²⁰ cm ⁻³ ) is 0.02 μm in thickness, Layered one after another It is possible to adopt the structure.

  In this specific example, the n-type semiconductor layer 1 includes the Si-doped n-type GaN contact layer, and the p-type semiconductor layer 2 includes the Mg-doped p-type GaN contact layer.

  In this specific example, the laminated structure 1 s has the substrate 10 made of sapphire on the side of the second main surface 1 b facing the first main surface 1 a. However, the present invention is not limited to this, and the substrate 10 may be removed after the laminated structure is formed on the substrate 10 made of, for example, sapphire as described above.

Next, formation of electrodes on the semiconductor layer will be described.
As shown in FIG. 1, the p-type semiconductor layer 2 and the light-emitting layer 3 are removed by dry etching using a mask until the n-type contact layer is exposed on the surface in a part of these semiconductor layers. A SiO ₂ film to be the insulating layer 11 is formed to a thickness of 400 nm on the entire semiconductor layer including the exposed n-type semiconductor layer 1 by using a thermal CVD (Chemical Vapor Deposition) apparatus.

In order to form the n-side electrode 7, a patterned resist for registry shift-off is formed on the semiconductor layer (n-type semiconductor layer 1 and p-type semiconductor layer 2), and SiO ₂ on the exposed n-type contact layer is formed. The membrane is removed with ammonium fluoride treatment. A conductive film to be an n-side electrode 7 made of, for example, Ti / Al / Ni / Au is formed with a film thickness of 500 nm in the region from which the SiO ₂ film has been removed, and a sintering process is performed in a nitrogen atmosphere at 550 ° C.

In order to form the p-side electrode 4, first, a patterned resist for registry shift-off is formed on the semiconductor layer, and the SiO ₂ film on the p-type contact layer is removed by ammonium fluoride treatment. After that, a resist for resist shift-off that opens a region wider than the region from which the SiO ₂ film has been removed is formed on the semiconductor layer, and the Ag film that becomes the p-side electrode 4 is formed to 200 nm by using, for example, a vacuum deposition apparatus. And a sintering process is performed in a nitrogen atmosphere at 350 ° C. for 1 minute.

  Next, backside polishing is performed, and cutting is performed by cleaving or using a diamond blade to produce individual LED elements having a width of 400 μm and a thickness of 100 μm, thereby producing the semiconductor light emitting element 101 according to the present embodiment.

FIG. 2 is a schematic view illustrating characteristics of the semiconductor light emitting device according to the first embodiment of the invention.
That is, this figure illustrates the result of simulating the relationship between the ratio between the element width of the semiconductor light emitting element and the current injection region width and the light extraction efficiency by ray tracing.
FIG. 6A is a schematic cross-sectional view illustrating the configuration of the semiconductor light emitting element used in the ray tracing simulation. FIG. 5B illustrates the simulation result, where the horizontal axis represents the ratio R (ie, Wx / W1) of the current injection region width Wx to the element width W1 of the semiconductor light emitting element, and the vertical axis represents the light. The extraction efficiency E is shown. Here, the current injection region is a region where the p-side electrode 4 is in direct contact with the multilayer structure 1s, that is, a region of the p-side electrode 4 where the insulating layer 11 is not provided. In FIG. 2A, the semiconductor layer is omitted as a semiconductor layer 3a including the light emitting layer 3.
As shown in FIG. 2A, in this simulation, the structure of the semiconductor light emitting element 101 is bilaterally symmetric. Therefore, the element width W1 and the current injection region width Wx are each ½ of the actual width. It is said that. In addition, sapphire is used for the substrate 10, and an Ag film is used for the p-side electrode 4 serving as a current injection region.

  In this ray tracing simulation, the element width W1 of the semiconductor light emitting element is 400 μm and the thickness D1 is 100 μm. Then, the light extraction efficiency of the semiconductor light emitting device was simulated by changing the current injection region width Wx.

At this time, the center of the current injection region width Wx is always at the center of the semiconductor light emitting device, and light is emitted from the light emitting layer of the semiconductor layer 3a immediately below the current injection region.
Further, only the light extracted outside the semiconductor light emitting element without being reflected is converted as the light extraction efficiency.

  As shown in FIG. 2B, the smaller the ratio R of the current injection region width Wx to the element width W1, that is, the width that the p-side electrode 4 is directly in contact with the semiconductor layer is relative to the element width W1. The smaller the size, the more the light extraction efficiency increases. A similar trend is seen when reflection is taken into account.

  Here, in a two-dimensional semiconductor light emitting device model in which the aspect ratio between the element width W1 and the thickness D1 is 4, the light emission has an angle that is totally reflected on the surface of the substrate 10 and transmitted on the side surface of the substrate 10. Consider the ray path of light.

  Light emitted from the center of the semiconductor light emitting element travels from the light emitting layer to the substrate surface, is totally reflected by the substrate surface, and then reaches the side surface of the substrate with almost no absorption.

  On the other hand, in the case of light emitted near the side surface of the semiconductor light emitting element, the component incident on the nearby substrate side surface reaches the substrate side surface with little absorption, but the component going in the opposite direction is the substrate surface or electrode. After repeating the reflection on the formation surface, it reaches the side surface of the substrate. In the latter case, the light output is attenuated by being reflected by a reflective electrode having a lower reflectivity compared to total reflection or passing through a semiconductor layer having a defect serving as an absorber many times. In comparison, the light extraction efficiency is low. Further, in the case of ultraviolet light, which generally has a low metal reflectivity, the difference appears more significantly.

  As described above, the light extraction efficiency is higher when the light emitting region is closer to the center of the element, that is, when light is emitted near the center of the element.

  However, if the area where the p-side electrode 4 and the p-type contact layer (p-type semiconductor layer 2) are in contact with each other is reduced, the contact resistance with the p-type contact layer increases, and the operating voltage increases.

  Considering these effects, by appropriately determining the area of the surface where the p-side electrode 4 and the p-type contact layer are in contact with the arrangement in the device, the light extraction efficiency is improved and the light output is reproducible. Can be increased. That is, by appropriately determining the planar shape of the insulating layer 11 provided between a part of the p-side electrode 4 and the p-type contact layer, the light extraction efficiency can be improved and the light output reproducibility can be improved. it can.

  For example, in the case of designing the shape of the surface where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact (that is, the planar shape of the insulating layer 11) in the semiconductor light emitting device 101 of this specific example illustrated in FIG. In the central portion of the light emitting element 101 (that is, the region where the p-side electrode 4 and the n-side electrode 7 face each other), the edge of the p-type semiconductor layer 2 is considered in consideration of process conditions such as exposure accuracy and the design of the insulating layer 11. It is better that the p-side electrode 4 is formed as close as possible to the end.

  In the peripheral portion of the semiconductor light emitting device 101, that is, on the three sides that are not opposed to the n-side electrode 7, the p-side electrode 4 is separated from the end of the p-type contact layer to some extent in consideration of the trade-off. It is better to form up to the region.

  That is, the width of the insulating layer 11 that is in contact with the p-type contact layer (that is, the p-type semiconductor layer 2) and narrows the current path is preferably narrower at the center than at the periphery.

Thus, in the region where the p-side electrode 4 and the insulating layer 11 overlap, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is defined as the peripheral portion (width) of the first main surface 1a. By setting the central portion (width b) shorter than the width a, the width a1, and the width a2), a region through which a current is supplied to the stacked structure 1s can be disposed in the central portion of the semiconductor light emitting device 101.
Then, the width b of the region where the insulating layer 11 is in contact with the p-type semiconductor layer 2 in the central portion, and the width of the region where the insulating layer 11 is in contact with the p-type semiconductor layer 2 in the peripheral portion of the semiconductor light emitting element 101. Since the current is confined by the insulating layer 11 by narrowing the width a (including the width a1 and the width a2), the current is concentrated at the center of the semiconductor light emitting device 101, and the light emitting region in the semiconductor light emitting device 101 is centered. Can be placed in the part.

  Thereby, the reflective region can be enlarged while the light emitting region is arranged at the center of the highly efficient element.

  At this time, for example, the semiconductor layer near the step with the light emitting layer 3 interposed therebetween may be damaged by dry etching for exposing the n-type contact layer to the surface. Even if current is injected into the damaged light emitting layer, not only high efficiency cannot be expected, but also the reliability of the device is affected.

  In the semiconductor light emitting device 101 according to the present embodiment, the current injection region (the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact) is moved away from the vicinity of the step sandwiching the light emitting layer 3 except for a part. Therefore, a current can be efficiently injected into the light emitting layer 3 that is not damaged, and the light output and reliability can be improved.

  One of the efficiencies that represent the characteristics of a semiconductor light emitting diode is the external quantum efficiency that indicates the number of photons emitted outside the semiconductor light emitting diode relative to the number of electrons injected into the light emitting layer of the semiconductor light emitting diode. It is expressed as the product of the chip's internal quantum efficiency and light extraction efficiency. The present embodiment is a technique for increasing the light extraction efficiency.

  The current dependence of external quantum efficiency in a 400 μm square semiconductor light emitting diode used at an operating current of about 20 mA shows a maximum value at a low current value of about 10 mA in the case of a blue light emitting semiconductor light emitting diode. However, at higher current values, it decreases rapidly as the current value increases. On the other hand, in the case of a semiconductor light emitting diode emitting ultraviolet light of 400 nm or less, the maximum value of the external quantum efficiency is in the region above the operating current value, and the subsequent decrease is slow.

  As in the present embodiment, when the area of the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other is reduced, the current indicating the maximum value of the external quantum efficiency decreases. At this time, in the case of a blue light emitting element, this influence is enormous, and it is considered that the external quantum efficiency is reduced more than the light extraction efficiency improved by the structure of the present embodiment. However, in the case of an ultraviolet light emitting element, the external quantum efficiency is rather increased, and the external quantum efficiency is greatly improved in combination with the light extraction efficiency improvement in the present embodiment.

  Thus, according to the semiconductor light emitting device 101 according to this embodiment, a semiconductor light emitting device with high light extraction efficiency and high light output reproducibility is provided.

(First comparative example)
FIG. 3 is a schematic view illustrating the configuration of the semiconductor light emitting device of the first comparative example.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 3, in the semiconductor light emitting device 90 of the comparative example, the insulating layer 11 is not provided between the p-side electrode 4 and the p-type contact layer (p-type semiconductor layer 2). The electrode 4 is formed as wide as possible on the p-type contact layer.

Note that the semiconductor light emitting device 90 of the comparative example having such a configuration is manufactured as follows.
In order to form the n-side electrode 7, a patterned lift-off resist is formed on the semiconductor layer, the SiO ₂ film on the n-type contact layer is removed by an ammonium fluoride treatment, and the region where the SiO ₂ film is removed A Ti / Al / Ni / Au film to be the n-side electrode 7 is formed with a thickness of 500 nm, and a sintering process is performed in a nitrogen atmosphere at 550 ° C.

In order to form the p-side electrode 4, a patterned lift-off resist is formed on the semiconductor layer, and the SiO ₂ film on the p-type contact layer is removed by ammonium fluoride treatment. In a region where the SiO ₂ film has been removed, Ag is formed to a thickness of 200 nm as a p-side electrode 4 using a vacuum deposition apparatus, and after the lift-off, sintering is performed in a nitrogen atmosphere at 350 ° C. for 1 minute.

In the case of this comparative example, there is a trade-off between securing the reflective area and the light emitting area that is optimal for light extraction efficiency and light output reproducibility. For this reason, the electrode design is not necessarily optimal for the light output characteristics, the light extraction efficiency is low, and the light output reproducibility is poor. That is, since the p-side electrode 4 is a reflection region and at the same time an ohmic connection region with respect to the p-type contact layer, the reflection region is enlarged and the current is confined in the central portion of the element to improve the light emission efficiency. Is a trade-off and is not an optimal electrode design.
For this reason, light extraction efficiency is low and reproducibility of light output is low.

(Second comparative example)
FIG. 4 is a schematic view illustrating the configuration of the semiconductor light emitting device of the second comparative example.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 4, in the semiconductor light emitting device 91 of the second comparative example, a part of the p-side electrode 4 and the p-type contact layer (p-type semiconductor) are formed as in the semiconductor light-emitting device 101 according to this embodiment. Between the layers 2), an insulating layer 11 is provided. However, in the case of the semiconductor light emitting device 91 of the second comparative example, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap. Is the same in the peripheral part and the central part of the semiconductor light emitting device 91.

  That is, in the case of the semiconductor light emitting device 91 of the second comparative example, the distance from the outer edge of the p-side electrode 2 to the inner edge of the insulating layer 11 in the peripheral portion of the semiconductor light emitting device 91, that is, FIG. And the distance from the outer edge of the p-side electrode 2 to the inner edge of the insulating layer 11 at the center of the semiconductor light emitting device 91, that is, the width b shown in FIG. Are the same. In this case, the width b is larger than the width a1 and the width a2 illustrated in FIG.

  For this reason, in the semiconductor light emitting device 91 of the second comparative example, the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other is not disposed in the optimum portion of the central portion of the semiconductor light emitting device 91. That is, the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other is shifted from the semiconductor light emitting device 101 according to this embodiment. For this reason, the light emitting region is shifted from the center of the element, the light extraction efficiency is low, and the light output reproducibility is low.

  On the other hand, as already described, in the semiconductor light emitting device 101 according to this embodiment, the inner side of the insulating layer 11 from the outer edge of the p-side electrode 4 in the region where the p-side electrode 4 and the insulating layer 11 overlap. By setting the distance to the edge of the semiconductor light-emitting element 101 to be shorter at the center than at the periphery of the semiconductor light emitting element 101, that is, the width of the region where the insulating layer 11 is in contact with the p-type semiconductor layer 2 By making the central portion narrower than the peripheral portion of the light emitting element 101, a region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact can be arranged in the central portion of the device as much as possible. As a result, the current flowing between the p-side electrode 4 and the laminated structure 1s is narrowed, the current is concentrated at the center of the element, and the entire area of the reflective region is reduced while the light emitting region is disposed at the center. Can be enlarged. This provides a semiconductor light emitting device with high light extraction efficiency and high light output reproducibility.

In the semiconductor light emitting device 101 according to this embodiment, the Mg concentration of the Mg-doped p-type GaN contact layer is set to a high level of 1 × 10 ²⁰ cm ⁻³ , thereby providing ohmic connectivity with the p-side electrode 4. Will improve. However, in the case of a semiconductor light emitting diode, unlike the semiconductor laser diode, since the distance between the contact layer and the light emitting layer 3 is short, there is a concern about deterioration of characteristics due to Mg diffusion. Therefore, by utilizing the fact that the contact area between the p-side electrode 4 and the contact layer is wide and the current density during operation is low, the Mg concentration is suppressed to 1 × 10 ¹⁹ cm ⁻³ without significantly impairing electrical characteristics. As a result, Mg diffusion can be prevented and the light emission characteristics can be improved.

The first AlN buffer layer having a high carbon concentration serves to alleviate the difference in crystal type from the substrate, and particularly reduces screw dislocations.
Further, the surface of the high purity second AlN buffer layer is flattened at the atomic level. Therefore, defects in the non-doped GaN buffer layer grown thereon are reduced. For this purpose, the thickness of the high purity second AlN buffer layer is preferably thicker than 1 μm. In order to prevent warping due to distortion, the thickness of the high purity second AlN buffer layer is desirably 4 μm or less. The high-purity second AlN buffer layer is not limited to AlN, and may be Al _x Ga _1-x N (0.8 ≦ x ≦ 1), and can compensate for warpage of the wafer.

  The non-doped GaN buffer layer plays a role of reducing defects by performing three-dimensional island growth on the high purity second AlN buffer layer. In order to flatten the growth surface, the average film thickness of the non-doped GaN buffer layer needs to be 2 μm or more. From the viewpoint of reproducibility and warpage reduction, the total film thickness of the non-doped GaN buffer layer is suitably 4 to 10 μm.

  By employing these buffer layers, defects can be reduced to about 1/10 compared to conventional low-temperature grown AlN buffer layers. With this technique, it is possible to produce a highly efficient semiconductor light-emitting device that emits high-concentration Si into the n-type GaN contact layer and emits light in the ultraviolet band. Further, by reducing crystal defects in the single crystal buffer layer, light absorption in the single crystal buffer layer can also be suppressed.

  Although the luminous efficiency of the light emitting layer is improved by doping the barrier layer of the multiple quantum well with high concentration Si, the crystal quality of the barrier layer is deteriorated. Due to the deterioration of the crystal quality, holes sensitive to defects are inactivated before reaching the light emitting layer, so that the efficiency of hole injection into the light emitting layer is lowered, and as a result, the light emitting efficiency as a semiconductor light emitting element is lowered. Further, the barrier layer doped with Si to the limit deteriorates rapidly when Mg diffuses, and further promotes the diffusion of Mg.

  The hole concentration in the final barrier layer injected from the p-type semiconductor layer 2 during operation is higher on the p-type semiconductor layer 2 side than on the light-emitting layer side. Quality improvement on the p-type semiconductor layer 2 side is the key.

  As in this specific example, the final barrier layer of the multiple quantum well was doped with a high concentration Si-doped first final barrier layer as well as a barrier layer in the quantum well and with a lower concentration Si doping than the first final barrier layer. The second final barrier layer has a two-layer structure, the well layer side is set to a high concentration, and the p-type semiconductor layer 2 side is set to a low concentration, so that the light emission efficiency of the light emitting layer 3 is maintained while maintaining the hole injection efficiency. As a result, the light emission efficiency of the semiconductor light emitting device can be improved.

  Furthermore, by using the buffer layer, high quality GaN can be formed on a sapphire substrate, and crystal growth can be performed at a high growth temperature and a high group / group III ratio, which are usually difficult to employ due to abnormal growth. Become. For this reason, generation | occurrence | production of a point defect is suppressed and higher Si doping is attained with respect to a barrier layer, Therefore The luminous efficiency of a semiconductor light-emitting device can be improved more.

The semiconductor light emitting device 101 according to this embodiment includes at least an n-type semiconductor layer, a p-type semiconductor layer, and a semiconductor layer including a light emitting layer sandwiched between them, and the material of the semiconductor layer is particularly limited. For example, a gallium nitride-based compound semiconductor such as Al _x Ga _1-xy In _y N (x ≧ 0, y ≧ 0, x + y ≦ 1) is used. The method for forming these semiconductor layers is not particularly limited. For example, techniques such as metal organic chemical vapor deposition and molecular beam epitaxial growth can be used.

  In the semiconductor light emitting device 101 according to this embodiment, the material used for the substrate 10 is not particularly limited, but a general substrate such as sapphire, SiC, GaN, GaAs, or Si can be used. . Further, the substrate 10 may be finally removed.

  Note that in the case of a semiconductor light emitting element using a sapphire substrate, since the difference in refractive index between the substrate and the semiconductor layer is large, most of the emitted light is reflected at the interface and is easily confined within the semiconductor layer. In the case of a nitride semiconductor layer on a general sapphire substrate, many defects existing in the semiconductor layer, an amorphous or polycrystalline low-temperature growth buffer layer, etc. serve as an absorber and repeat reflection inside the semiconductor layer. Therefore, the effect of increasing the high-efficiency reflective region is relatively limited.

  On the other hand, in the semiconductor light emitting device 101 according to the present embodiment, the use of the single crystal AlN buffer layer not only makes absorption difficult in the buffer layer, but also dramatically reduces defects in the semiconductor layer, The cause of light absorption in the semiconductor layer can be reduced as much as possible, and since the emitted light is repeatedly reflected in the semiconductor layer, the effect of increasing the high-efficiency reflective region is higher.

  For the insulating layer 11, an oxide such as silicon (Si), aluminum (Al), zirconium (Zr), titanium (Ti), niobium (Nb), nitride, oxynitride, or the like can be used. The thickness of the insulating layer 11 is desirably 50 nm or more and 1000 nm or less. That is, when the thickness is less than 50 nm, the insulating property is lowered, and when the thickness is more than 1000 nm, the insulating layer 11 may be cracked. Furthermore, the insulating layer 11 may be composed of a plurality of layers. With the laminated structure, it is possible to form the insulating layer 11 thicker than 1000 nm while suppressing the generation of cracks.

  The p-side electrode 4 is composed of a metal film containing at least silver or a silver alloy on the side facing the p-type contact layer (p-type semiconductor layer 2). The material of the metal film may be a silver single layer or an alloy layer containing a metal other than silver. The reflection efficiency of a normal metal single layer film in the visible light band tends to decrease as the wavelength becomes shorter in the ultraviolet region of 400 nm or less, but silver has a high reflection efficiency even for light in the ultraviolet region of 370 nm to 400 nm. Has characteristics. Therefore, when the semiconductor light emitting element emits ultraviolet light and the metal film is a silver alloy, it is desirable that the metal film facing the p-type contact layer has a larger silver component ratio.

  Further, the film thickness of the p-side electrode 4 is preferably 100 nm or more in order to ensure the light reflection efficiency.

  A pad may be separately provided on the p-side electrode 4 in order to improve bondability of wire bonding, improve die shear strength when forming gold bumps by a ball bonder, flip chip mounting, and the like. The film thickness of the pad is not particularly limited, and can be selected between 100 nm and 1000 nm, for example.

  On the other hand, the material of the n-side electrode 7 is not particularly limited, and is composed of a conductive single layer film or multilayer film used as an ohmic electrode of the n-type semiconductor layer 1. The formation method is not particularly limited, and for example, a sintering process may be performed after the multilayer structure is formed by an electron beam evaporation method. When the sintering process is performed, it is preferable to separately provide a pad on the n-side electrode 7 in order to improve bondability.

  In addition, since the insulating layer 11 is provided in the region of the p-side electrode 4 facing the n-side electrode 7, an electric field is applied to the insulating layer 11 in this region. Thereby, the concentration of the electric field applied to the portion of the p-side electrode in the region facing the n-side electrode 7 can be relaxed, the characteristics are stabilized, and a more reliable semiconductor light emitting device is provided. Can do.

  In the specific example illustrated in FIG. 1, the insulating layer 11 is provided so as to cover the side surfaces of the p-type semiconductor layer 2 and the light emitting layer 3 in addition to being provided on a part of the upper surface of the p-type semiconductor layer 2. Yes. Thereby, the side surface of the p-type semiconductor layer 2 and the light emitting layer 3 can be protected by the insulating layer 11, and reliability is improved more.

  The insulating layer 11 is further provided on the n-type semiconductor layer 1 in addition to being provided on a part of the upper surface of the p-type semiconductor layer 2 and on the side surfaces of the p-type semiconductor layer 2 and the light emitting layer 3. . Thereby, the side surfaces of the p-type semiconductor layer 2 and the light emitting layer 3 can be more reliably protected, and the peripheral portion of the multilayer structure 1s can be protected, thereby further improving the reliability.

The semiconductor light emitting device 101 according to this embodiment can be variously modified.
(First modification)
In the semiconductor light emitting device 101, an Ag film having a thickness of 200 nm is used as the p-side electrode 4, but in the first modification, a laminated film made of Ag / Pt having a thickness of 200 nm is used as the p-side electrode 4. Used.

  By forming the p-side electrode 4 with an Ag / Pt laminated film and then performing a sintering process, very little Pt can be diffused at the interface between the p-type GaN contact layer and Ag. As a result, the adhesion of Ag is improved, and the contact resistance can be lowered without impairing the high-efficiency reflection characteristic peculiar to Ag. Therefore, the high-efficiency reflection characteristic and the low operating voltage characteristic required for the p-side electrode 4 are achieved. Can be made highly compatible.

  Specifically, compared with the case where an Ag single layer film is used for the p-side electrode 4, when an Ag / Pt laminated film is used, the optical output shows almost the same value and the operating voltage at 20 mA is shown. Was reduced by 0.3V.

  Since Ag and Pt are in a solid solution relationship, Ag migration can be suppressed by mixing Pt with Ag. As a result, high reliability can be obtained even during high current injection.

  In addition, when the reflectance of the p-side electrode 4 that desirably has good ohmic contact characteristics is low, the p-side electrode 4 is used to prevent the emitted light from being absorbed by the p-side electrode 4 itself. Although another method of providing a reflective electrode is conceivable, there is a possibility that a new problem may occur due to an increase in the number of processes and a complicated structure. When the p-side electrode 4 has a high degree of both ohmic contact characteristics and high-efficiency reflection characteristics, a simple structure can be adopted while suppressing the number of processes, so the cost can be reduced and high reliability can be achieved. can get.

(Second modification)
Further, in the second modification of the semiconductor light emitting element 101 according to the present embodiment, the element is formed using a laser scriber device in the element forming step.

  The laser scriber device is a simple, high-throughput, and highly reproducible device method that can be expected to improve mass productivity. However, the laser scribe marks formed on the device end face become an absorption region for the emitted light. Light absorption at the end face cannot be ignored, and light extraction efficiency is reduced.

  In the modified example of the semiconductor light emitting device according to the present embodiment, the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact, that is, the light emitting region is kept away from the end of the device, so that it is less affected by the end surface of the device. .

  As described above, by combining the semiconductor light emitting element according to this embodiment and the elementization method using the laser scriber device, it is possible to improve the mass productivity and minimize the light absorption loss at the element end face. Furthermore, the light extraction efficiency can be improved.

(Third Modification)
In the third modification of the semiconductor light emitting device 101 according to this embodiment, an Ag / Pt film having a thickness of 200 nm is employed as the n-side electrode 7.

The electrode of the semiconductor light emitting device of the third modification is manufactured as follows.
First, a patterned resist for resist lift-off is formed on the semiconductor layer, and the SiO ₂ film on the p-type contact layer is removed and the SiO ₂ film on the n-type contact layer, with ammonium fluoride treatment. Thereafter, a resist for resist off-off in which a region where the SiO ₂ film on the n-type contact layer is removed and a region wider than the region where the SiO ₂ film on the p-type contact layer is removed are opened. Is formed on the semiconductor layer, Ag / Pt is formed with a film thickness of 200 nm using a vacuum deposition apparatus, and after the lift-off, sintering is performed in a nitrogen atmosphere at 650 ° C. for 1 minute.

  If the crystal on the single crystal AlN buffer is used, the n-type GaN contact layer can be doped with high-concentration Si, and the contact resistance with the n-side electrode 7 can be greatly reduced. Silver (Ag / Pt), which is a highly efficient reflective film having a high resistance, can be used as the n-side electrode 7.

  By constituting the n-side electrode 7 with a high-efficiency reflective film, most of the first main surface 1a of the laminated structure 1s on which the electrodes are formed can be made into a reflective structure, and light emission is repeatedly reflected in the semiconductor layer. Since most of the light can be reflected to the substrate side, further improvement in light extraction efficiency is expected.

  In consideration of light absorption in the n-side electrode 7, the light emitting region (ohmic region) and the n-side electrode 7 may be kept away. At this time, since the n-side electrode 7 has a high-efficiency reflecting structure, it is not necessary to consider the influence of light absorption in the n-side electrode 7, and the light emitting region (that is, the p-side electrode 4 and the p-type semiconductor layer 2 is The contact region) and the n-side electrode 7 can be brought close to each other. With these effects, the effect of improving the light extraction efficiency in the structure of the semiconductor light emitting device according to this embodiment can be exhibited to the maximum.

(Second Embodiment)
FIG. 5 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to the second embodiment of the invention.
As shown in FIG. 5, the semiconductor light emitting device 102 according to the second embodiment of the present invention is provided so as to cover the p-side electrode 4, and further includes a conductive protective layer 5 (first conductive layer). Prepare. The protective layer 5 is in electrical contact with the p-side electrode 4. Other than that, since it can be equivalent to the semiconductor light emitting device 101 according to the first embodiment, the description is omitted.

Also in this case, in the region where the p-side electrode 4 and the insulating layer 11 overlap, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is the peripheral portion of the semiconductor light emitting element (for example, The central part (eg width b) is shorter than the width a).
Further, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is larger than the portion (for example, width b) where the n-side electrode 7 and the p-side electrode 4 are opposed to each other. A portion other than the portion where 7 and the p-side electrode 4 face each other, for example, a peripheral portion (for example, width a) of the semiconductor light emitting element 102 is longer.
The width of the region where the insulating layer 11 is in contact with the p-type semiconductor layer 2 is narrower at the center than at the periphery of the semiconductor light emitting element 102.

  In the semiconductor light emitting device 102 according to the present embodiment, by covering the p-side electrode 4 with the protective layer 5, for example, silver used for the p-side electrode 4 can be prevented from being exposed to the atmosphere. Deterioration of the electrode 4 can be suppressed.

The protective layer 5 is desirably provided so as to cover all of the p-side electrode 4. Thereby, reliability is further improved.
The protective layer 5 is not in direct contact with the p-type semiconductor layer 2. For example, at least one of the p-side electrode 4 and the insulating layer 11 is disposed between the protective layer 5 and the p-type semiconductor layer 2. .

  After forming the p-side electrode 4, the protective layer 5 forms a protective layer 5 so as to cover the entire p-side electrode 4, for example, by forming a patterned resist for registry ftoff, for example, Pt / Au The film can be formed by forming a film with a thickness of 500 nm and peeling the resist.

For the protective layer 5, a metal containing no silver can be used.
The material used for the protective layer 5 is not particularly limited, and may be a metal single layer film or multilayer film, a metal alloy layer, a conductive oxide film single layer film or multilayer film, or a combination thereof. good.

  The film thickness of the protective layer 5 is not specifically limited, For example, it can select between 100 nm and 1000 nm.

  Thus, according to the semiconductor light emitting device 102 according to the present embodiment, it is possible to provide a semiconductor light emitting device with high light extraction efficiency, high light output reproducibility, and high reliability.

(Third embodiment)
FIG. 6 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to the third embodiment of the invention.
As shown in FIG. 6, the semiconductor light emitting device 103 according to the third embodiment of the present invention is provided between the p-side electrode 4 and the protective layer 5, and has a conductive diffusion prevention layer 6 (second A conductive layer). Other than that, since it can be equivalent to the semiconductor light emitting device 102 according to the second embodiment, the description is omitted.

  The diffusion prevention layer 6 is provided at least between the main surface of the p-side electrode 4 and the protective layer 5, but may be further provided between the side surface of the p-side electrode 4 and the protective layer 5. This further improves the effect of preventing diffusion. However, since the diffusion of the material contained in the protective layer 5 to the p-side electrode 4 often occurs with respect to the main surface of the p-side electrode 4, the diffusion preventing layer as in the specific example illustrated in FIG. 6. 6 may be provided only between the main surface of the p-side electrode 4 and the protective layer 5.

  For the diffusion preventing layer 6, for example, a material that suppresses the material contained in the protective layer 5 from diffusing into the p-side electrode 4 can be used. However, the present invention is not limited to this, the diffusion prevention layer 6 is such that the material contained in the protective layer 5 diffuses into the p-side electrode 4, the material contained in the p-side electrode 4 diffuses into the protective layer 5, And it has the function which prevents at least any one of the material contained in the protective layer 5, and the material contained in the p side electrode 4 reacting.

  The diffusion preventing layer 6 can be made of a material that does not react with silver or does not actively diffuse into silver. The diffusion prevention layer 6 is in electrical contact with the p-side electrode 4 and the protective layer 5.

  The material of the diffusion prevention layer 6 includes a refractory metal that can be used as the diffusion prevention layer, for example, vanadium (V), chromium (Cr), iron (Fe), cobalt (Co), nickel (Ni), niobium (Nb ), Molybdenum (Mo), ruthenium (Ru), rhodium (Rh), tantalum (Ta), tungsten (W), rhenium (Re), osmium (Os), iridium (Ir), platinum (Pt), etc. Examples thereof include a film and a laminated film.

  More preferably, iron (Fe), cobalt (Co), nickel is preferable as a metal having a high work function so that there is no problem even if it diffuses slightly to the p-side electrode 4 and an ohmic connection characteristic with the p-type contact layer is easily obtained. (Ni), rhodium (Rh), tungsten (W), rhenium (Re), osmium (Os), iridium (Ir), platinum (Pt).

  In the case of a single layer film, the film thickness of the diffusion preventing layer 6 is preferably in the range of 5 nm to 200 nm which can maintain the film state. In the case of a laminated film, it is not particularly limited, and can be selected, for example, from 10 nm to 10000 nm.

The semiconductor light emitting device 103 according to this embodiment having such a configuration can be manufactured as follows.
That is, after the p-side electrode 4 is formed, a resist for patterning for the registry shift-off is formed, and then, for example, six layers of W / Pt laminated films are laminated as the diffusion preventing layer 6. The total thickness of six layers of (W / Pt) is, for example, 900 nm.
Similarly, a patterned resist for registry lift-off is formed, and for example, Pt / Au, which becomes the protective layer 5, is formed with a film thickness of 1000 nm.

  In the semiconductor light emitting device 103 according to the present embodiment, even when using AuSn solder or the like that requires a relatively high temperature heat treatment of 300 ° C. or higher when fixing to the submount, the W / Pt that is the diffusion preventing layer 6 is used. Since the laminated film functions as a barrier layer, for example, the material of the protective layer 5 does not diffuse into Ag of the p-side electrode 4.

  Thus, by laminating refractory metals having different linear expansion coefficients with a thin film thickness, it is possible to secure a thick film as the diffusion preventing layer 6 while alleviating the distortion.

  In addition, after forming the p-side electrode 4, the protective layer 5 and the diffusion prevention layer 6 can be heat-treated at a temperature equal to or lower than the sintering temperature of the p-side electrode 4 in order to improve adhesion.

  As described above, according to the semiconductor light emitting device 103 according to the present embodiment, it is possible to provide a semiconductor light emitting device having high light extraction efficiency, high light output reproducibility, high reliability, and low manufacturing cost. .

(Fourth embodiment)
FIG. 7 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting element according to the fourth embodiment of the invention.
As shown in FIG. 7, in the semiconductor light emitting device 104 according to the fourth embodiment of the present invention, the thickness of the portion sandwiched between the p-side electrode 4 and the p-type semiconductor layer 2 in the insulating layer 11. Is thinner than other portions of the insulating layer 11. Since the exception can be equivalent to that of the semiconductor light emitting device 102 according to the second embodiment, description thereof is omitted.

The semiconductor light emitting device 104 according to this embodiment having such a configuration can be manufactured as follows.
In order to form the p-side electrode 4, first, a patterned resist for registry shift-off is formed on the semiconductor layer, and the SiO ₂ film on the p-type contact layer is etched by ammonium fluoride treatment. At this time, the treatment time of ammonium fluoride is adjusted so that the p-type contact layer is not exposed. Specifically, when the etching rate is 400 nm / min, the processing is performed within 1 minute, for example, 40 seconds. After that, a resist for resist-off that opens a region wider than the region where the SiO ₂ film is etched is formed on the semiconductor layer, and the SiO ₂ film on the p-type contact layer is etched by ammonium fluoride treatment. At that time, the processing time of the ammonium fluoride is adjusted so that the p-type contact layer in the region treated by the etching is exposed and the p-type contact layer directly under the SiO ₂ film in the region not treated by the etching is not exposed. To do. Specifically, when the etching rate is 400 nm / min, the processing is performed within 1 minute, for example, 40 seconds. The SiO ₂ film becomes the insulating layer 11.

  And Ag used as the p side electrode 4 is formed with a film thickness of 200 nm using a vacuum evaporation apparatus, and a sintering process is performed for 1 minute in 350 degreeC nitrogen atmosphere.

  In this specific example, the strength of the electric field applied to the insulating layer 11 can be adjusted by adjusting the film thickness of the portion of the insulating layer 11 sandwiched between the p-side electrode 4 and the p-type contact layer. As a result, the electric field distribution around the p-side electrode 4 can be adjusted in accordance with the operating current, shape, size, and arrangement relationship of the semiconductor light emitting element 104.

  Furthermore, by reducing the film thickness of the portion of the insulating layer 11 sandwiched between the p-side electrode 4 and the p-type contact layer, the proportion of the emitted light reflected by the p-side electrode 4 being absorbed by the insulating layer 11 is reduced. be able to. As a result, absorption inside the semiconductor light emitting device 104 can be reduced, and light extraction efficiency is improved.

Also, with the above configuration, the surface of the p-type contact layer can be protected with the SiO ₂ film until just before the p-side electrode 4 is formed, so that the p-type contact layer can be prevented from being contaminated by the resist or developer.

  In this specific example, in the semiconductor light emitting device 102 according to the second embodiment, the thickness of the insulating layer 11 sandwiched between the p-side electrode 4 and the p-type semiconductor layer 2 is the other portion. Although it is thinner than the thickness of the insulating layer 11, such a structure may be implemented in the semiconductor light emitting devices 101 and 103 according to the first and third embodiments.

  As described above, according to the semiconductor light emitting device 104 according to the present embodiment, the light extraction efficiency is further improved, the light output is highly reproducible, and the semiconductor layer can be stably manufactured while suppressing contamination of the semiconductor layer. Can be provided.

(Fifth embodiment)
FIG. 8 is a schematic view illustrating the configuration of a semiconductor light emitting element according to the fifth embodiment of the invention.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 8, in the semiconductor light emitting device 105 according to the fifth embodiment of the present invention, the n-side electrode 7 is provided so as to surround the p-side electrode 4. For example, the element size of the semiconductor light emitting element 105 is 1000 μm square, and the element thickness is 100 μm.

  Also in the semiconductor light emitting device 105, in the region where the p-side electrode 4 and the insulating layer 11 overlap, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is the periphery of the semiconductor light-emitting device. The center is shorter than the center.

That is, in the semiconductor light emitting device 105, the n-side electrode 7 is provided so as to surround the p-side electrode 4, and the n-side electrode 7 facilitates connection with other wiring at the corner portion of the semiconductor light emitting device 105. For this reason, the corner portion is wider than the side portion. Along with the fact that the n-side electrode 7 is increased, the area in the corner portion, the outer edge of the p-side electrode 4, the co Na portion of the semiconductor light emitting element 105, located in the center side of the semiconductor light emitting element 105 doing.

  In the semiconductor light emitting device 105 having such a configuration, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 in the peripheral portion is the width a in the side portion, and in the central portion. The distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is the width b at the corner. The width b is narrower than the width a.

  According to the semiconductor light emitting device 105 according to the present embodiment, the p-side electrode 4 and the p-type are formed in a region excluding the minimum region necessary for the n-side electrode 7 while realizing a current injection structure with high light extraction efficiency. By optimally arranging the region in contact with the semiconductor layer 2, the reflective region can be expanded to the maximum.

Note that the semiconductor light emitting element 105 may be configured such that the cross section of the semiconductor layer sandwiching the light emitting layer 3 has a taper, and the insulating layer 11 covers the tapered portion obliquely.
As in the semiconductor light emitting device 105 according to the present embodiment, when the ratio of the width and thickness of the device is large, multiple reflections are repeated in the device, so a taper is provided to change the light reflection angle. Thus, the effect of improving the light extraction efficiency becomes higher.

(Sixth embodiment)
FIG. 9 is a schematic view illustrating the configuration of a semiconductor light emitting element according to the sixth embodiment of the invention.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 9, in the semiconductor light emitting device 106 according to the sixth embodiment of the present invention, the n-side electrode 7 is provided so as to surround the p-side electrode 4, and the n-side electrode 7 further includes semiconductor light emission. A central portion of the element 106 is also provided. In this specific example, the insulating layer 11 is provided between the p-side electrode 4 and the p-type semiconductor layer 2 in the peripheral portion of the element, but the insulating layer 11 is formed of the p-type semiconductor layer 2 in the central portion. The p-side electrode 4 and the insulating layer 11 do not overlap each other. The rest is the same as the semiconductor light emitting device 105 according to the fifth embodiment, and a description thereof will be omitted.

  In this way, the n-side electrode 7 is formed not only in the peripheral portion of the element but also in the central portion, thereby effectively reducing the distance between the p-side electrode 4 and the n-side electrode 7 as a whole. Therefore, in addition to improving the electrical characteristics, the n-type contact layer can be designed to be thin without greatly affecting the electrical characteristics, and the crystal growth time and cost can be improved. Further, the light output and reliability can be improved by relaxing the current concentration of the p-side electrode 4 at the time of high current injection and expanding the light emitting region of the p-side electrode 4 thereby.

  Since the insulating layer 11 does not overlap the p-side electrode 4 and is provided only on the p-type semiconductor layer 2 in the center of the element, the p-side electrode 4 facing the n-side electrode 7 is exposed. As long as process conditions such as accuracy allow, the edge of the p-type semiconductor layer 2 can be formed. As a result, the light output characteristics can be improved by increasing the light emitting region in the region near the center of the element, and the electrical characteristics can be improved by increasing the ohmic area.

  Also in the semiconductor light emitting device 106, the distance from the outer edge of the p side electrode 4 to the inner edge of the insulating layer 11 in the region where the p side electrode 4 and the insulating layer 11 overlap is as follows. The center is shorter than the periphery.

That is, also in the semiconductor light emitting device 106, the n-side electrode 7 is provided so as to surround the p-side electrode 4, and the n-side electrode 7 is wider at the corner portion than at the side portion. The outer edge of the p-side electrode 4, the co Na portion of the semiconductor light emitting element 106 is located in the center side of the semiconductor light emitting element 106.
For example, the distance from the outer edge of the p-side electrode 4 in the peripheral part to the inner edge of the insulating layer 11 is the width a in the side part, and the outer edge of the p-side electrode 4 in the center part. The distance from the inner edge of the insulating layer 11 to the inner edge of the insulating layer 11 is the width b at the corner. The width b is narrower than the width a.

(Seventh embodiment)
FIG. 10 is a schematic view illustrating the configuration of a semiconductor light emitting element according to the seventh embodiment of the invention.
That is, FIG. 4B is a plan view, and FIG. 4A is a cross-sectional view taken along the line AA ′ in FIG.
As shown in FIG. 10, in the semiconductor light emitting device 107 according to the seventh embodiment of the present invention, the n-side electrode 7 is provided so as to surround the p-side electrode 4, and the n-side electrode 7 further emits semiconductor light. A central portion of the element 107 is also provided. An insulating layer 11 is provided between a part of the p-side electrode 4 and the p-type semiconductor layer 2 at the peripheral portion and the central portion of the semiconductor light emitting element 107. Other than this, it is the same as the semiconductor light emitting element 106, and thus the description thereof is omitted.

Also in the semiconductor light emitting device 107, the distance from the outer edge of the p side electrode 4 to the inner edge of the insulating layer 11 in the region where the p side electrode 4 and the insulating layer 11 overlap is the peripheral portion of the semiconductor light emitting device 107. The center is shorter than it is.
That is, also in the semiconductor light emitting device 107, the n-side electrode 7 is provided so as to surround the p-side electrode 4, and the n-side electrode 7 is wider at the corner portion than at the side portion. Then, edge end of the p-side electrode 4, the co Na portion of the semiconductor light emitting element 107 is positioned in the center side of the semiconductor light emitting element 107.
For example, the distance from the outer edge of the p-side electrode 4 in the peripheral part to the inner edge of the insulating layer 11 is the width a in the side part, and the outer edge of the p-side electrode 4 in the center part. The distance from the inner edge of the insulating layer 11 to the inner edge of the insulating layer 11 is the width b at the corner. The width b is narrower than the width a.

  Furthermore, if the light emitting region in the vicinity of the center of the element is wide, the light extraction efficiency increases. For this reason, in order to increase the area where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other, the width c where the insulating layer 11 formed in the central portion of the element overlaps with the p-side electrode 4 has a width c It is preferable that the width is smaller than the width a (the distance between the outer edge of the p-side electrode 4 and the inner edge of the insulating layer 11) where the insulating layer 11 and the p-side electrode 4 overlap each other.

  In this specific example, the width c at the portion where the n-side electrode 7 and the p-side electrode 4 provided at the center face each other is smaller than the width b at the center, but the width c is at least at the periphery. What is necessary is just to be smaller than the width a.

  Thereby, while realizing a current injection structure with high light extraction efficiency, the region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other except the minimum region necessary for the n-side electrode 7 is optimal. By disposing in, the reflection area can be expanded to the maximum.

  Also in the semiconductor light emitting device 106 according to the present embodiment, as described in the fifth embodiment, the cross section of the semiconductor layer sandwiching the light emitting layer 3 is processed into a tapered shape, and the insulating layer 11 covers the tapered portion obliquely. It can also be configured.

  As in the semiconductor light emitting device 106 according to this embodiment, when the aspect ratio of the width and thickness of the device is large, the number of reflections of the emitted light reflected in the semiconductor layer increases, and the effect of the tapered portion that changes the reflection angle is achieved. Therefore, by arranging a region where the p-side electrode 4 and the p-type semiconductor layer 2 are in contact with each other at the center of the element and forming a taper, the light extraction efficiency is greatly improved.

FIG. 11 is a schematic plan view illustrating the configuration of another semiconductor light emitting element according to the seventh embodiment of the invention.
As shown in FIG. 11, in another semiconductor light emitting device 108 according to the seventh embodiment of the present invention, the n-side electrode 7 is provided so as to surround the p-side electrode 4. The semiconductor light emitting device 108 is provided so as to enter two places in the central portion. The insulating layer 11 is provided between a part of the p-side electrode 4 and the p-type semiconductor layer 2 at the peripheral portion and the central portion of the semiconductor light emitting device 108.

  That is, the p-side electrode 4 is provided in a region excluding a part of the central portion of the first main surface 1 a, and the n-side electrode 7 is provided with the p-side electrode 4 while surrounding the p-side electrode 4. Not provided in the center. Also in this case, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 in the region where the p-side electrode 4 and the insulating layer 11 overlap is from the peripheral portion of the semiconductor light emitting device 108. The center is shorter.

  That is, the distance from the outer edge of the p-side electrode 4 in the peripheral portion to the inner edge of the insulating layer 11 (for example, the width a in the side portion) is insulated from the outer edge of the p-side electrode 4 in the central portion. It is longer than the distance to the inner edge of the layer 11 (for example, the width b at the corner).

  Furthermore, the width c where the insulating layer 11 and the p-side electrode 4 formed at the center of the element overlap is narrower than the width a where the insulating layer 11 and the p-side electrode 4 overlap on the outer peripheral side of the element.

  Thus, the p-side electrode 4 is provided in a region excluding at least a part of the central portion of the first main surface 1a, and the n-side electrode 7 is provided with the p-side electrode 4 while surrounding the p-side electrode. In this case, the distance from the outer edge of the p-side electrode 4 to the inner edge of the insulating layer 11 is more in the center than in the periphery of the first main surface 1a. Is set shorter.

  Here, the central portion is a central portion in a planar shape when the semiconductor light emitting element is viewed from a direction parallel to the stacking direction of the semiconductor layers, as in the “cross-shaped” structure illustrated in FIGS. 9 and 10. A part may be sufficient, and as illustrated in FIG. 11, it may be a central part relatively to the peripheral part of the planar shape of the semiconductor light emitting element. That is, in the case of the semiconductor light emitting device 108 illustrated in FIG. 11, the p-side electrode 4 is not a strict central portion but is provided except for a portion of the central portion relative to the peripheral portion. . And the n side electrode 7 is provided in the part provided except the p side electrode 4. FIG. Thus, the shape and arrangement of the p-side electrode 7, the n-side electrode 4, and the insulating layer 11 can be variously modified.

(Eighth embodiment)
FIG. 12 is a schematic cross-sectional view illustrating the configuration of a semiconductor light emitting device according to the eighth embodiment of the invention.
As shown in FIG. 12, the semiconductor light emitting device 201 according to the eighth embodiment of the present invention includes the semiconductor light emitting elements 101 to 108 according to the above embodiment and any of their modifications, and a phosphor. It is a combined white LED. That is, a semiconductor light emitting device 201 according to the present embodiment includes any one of the above semiconductor light emitting elements, a phosphor that absorbs light emitted from the semiconductor light emitting element, and emits light having a wavelength different from that of the light. .
In the following description, the semiconductor light emitting element 101 and a phosphor are combined.

  As shown in FIG. 12, in the semiconductor light emitting device 201 according to this embodiment, the reflective film 23 is provided on the inner surface of the container 22 made of ceramic or the like, and the reflective film 23 is provided on the inner side surface and the bottom surface of the container 22. Separately provided. The reflective film 23 is made of, for example, aluminum. Among these, the semiconductor light emitting element 101 is installed via the submount 24 on the reflective film 23 provided on the bottom of the container 22.

  Gold bumps 25 are formed on the semiconductor light emitting element 101 by, for example, a ball bonder, and are fixed to the submount 24. In addition, you may fix to a submount directly, without using a gold bump.

  For fixing the semiconductor light emitting element 101, the submount 24, and the reflective film 23, adhesion using an adhesive, solder, or the like can be used.

  Electrodes patterned so as to insulate the p-side electrode 4 and the n-side electrode 7 of the semiconductor light-emitting element 101 are formed on the surface of the submount 24 on the semiconductor light-emitting element side. A bonding wire 26 is connected to the electrode (not shown). This connection is made at a portion between the reflection film 23 on the inner side surface and the reflection film 23 on the bottom surface.

  A first phosphor layer 211 containing a red phosphor is provided so as to cover the semiconductor light emitting element 101 and the bonding wire 26, and blue, green or yellow phosphors are provided on the first phosphor layer 211. The 2nd fluorescent substance layer 212 containing is formed. A lid portion 27 made of silicon resin is provided on the phosphor layer.

The first phosphor layer 211 includes a resin and a red phosphor dispersed in the resin.
As the red phosphor, for example, Y ₂ O ₃ , YVO ₄ , Y ₂ (P, V) O ₄ can be used as a base material, and trivalent Eu (Eu ³⁺ ) is used as an activator. Include. That is, Y ₂ O ₃ : Eu ³⁺ , YVO ₄ : Eu ^3+, etc. can be used as the red phosphor. The concentration of Eu ³⁺ can be 1% to 10% in terms of molar concentration. As a base material of the red phosphor, LaOS, Y ₂ (P, V) O ₄ or the like can be used in addition to Y ₂ O ₃ and YVO ₄ . In addition to Eu ³⁺ , Mn ⁴⁺ or the like can be used. In particular, by adding a small amount of Bi together with trivalent Eu to the YVO ₄ matrix, absorption at 380 nm increases, so that the luminous efficiency can be further increased. Further, as the resin, for example, silicon resin or the like can be used.

  The second phosphor layer 212 includes a resin and at least one of blue, green, and yellow phosphors dispersed in the resin. For example, a phosphor combining a blue phosphor and a green phosphor may be used, or a phosphor combining a blue phosphor and a yellow phosphor may be used, and a blue phosphor, a green phosphor and a yellow phosphor may be used. You may use the fluorescent substance which combined the fluorescent substance.

As the blue phosphor, for example, (Sr, Ca) ₁₀ (PO ₄ ) ₆ Cl ₂ : Eu ²⁺ , BaMg ₂ Al ₁₆ O ₂₇ : Eu ^2+, or the like can be used.
As the green phosphor, for example, Y ₂ SiO ₅ : Ce ³⁺ , Tb ³⁺ having trivalent Tb as the emission center can be used. In this case, energy is transferred from Ce ions to Tb ions, so that the excitation efficiency is improved. For example, Sr ₄ Al ₁₄ O ₂₅ : Eu ²⁺ can be used as the green phosphor.
For example, Y ₃ Al ₅ : Ce ³⁺ can be used as the yellow phosphor.
Further, as the resin, for example, a silicon resin or the like can be used.
In particular, trivalent Tb exhibits sharp light emission near 550 nm where the visibility is maximized. Therefore, when combined with sharp red light emission of trivalent Eu, the light emission efficiency is significantly improved.

  According to the semiconductor light emitting device 201 according to the present embodiment, the ultraviolet light of 380 nm generated from the semiconductor light emitting element 101 is emitted to the substrate 10 side of the semiconductor light emitting element 101, and also uses the reflection in the reflective film 23, The phosphors included in each phosphor layer can be excited efficiently.

For example, the phosphor having the emission center of trivalent Eu contained in the first phosphor layer 211 is converted into light having a narrow wavelength distribution around 620 nm, and red visible light can be obtained efficiently. .
In addition, the blue, green, and yellow phosphors included in the second phosphor layer 212 are efficiently excited, and blue, green, and yellow visible light can be efficiently obtained.
As these mixed colors, white light and various other colors can be obtained with high efficiency and good color rendering.

Next, a method for manufacturing the semiconductor light emitting device 201 according to this embodiment will be described.
In addition, since the method demonstrated previously can be used for the process of manufacturing the semiconductor light-emitting device 101, below, the process after the semiconductor light-emitting device 101 is completed is demonstrated.

  First, a metal film to be the reflection film 23 is formed on the inner surface of the container 22 by, for example, sputtering, and this metal film is patterned to leave the reflection film 23 on the inner surface and the bottom surface of the container 22 respectively.

  Next, a gold bump 25 is formed on the semiconductor light emitting element 101 by a ball bonder, and is fixed on a submount 24 having electrodes patterned for the p-side electrode 4 and the n-side electrode 7. Installed and fixed on the reflective film 23 on the bottom surface of the container 22. For these fixings, adhesion with an adhesive or soldering can be used. In addition, the semiconductor light emitting element 101 can be directly fixed on the submount 24 without using the gold bumps 25 by the ball bonder.

  Next, an n-side electrode and a p-side electrode (not shown) on the submount 24 are connected to electrodes (not shown) provided on the container 22 side by bonding wires 26.

  Furthermore, a first phosphor layer 211 containing a red phosphor is formed so as to cover the semiconductor light emitting element 101 and the bonding wire 26, and a second phosphor containing a blue, green or yellow phosphor on the first phosphor layer 211. The phosphor layer 212 is formed.

  Each of the methods for forming the phosphor layer is a method in which each phosphor is dispersed in a resin raw material mixed solution, and the resin is cured by heat treatment to cure the resin. In addition, the resin raw material mixed solution containing each phosphor is dropped and allowed to stand for a while and then cured, so that the fine particles of each phosphor are settled, and each fluorescent material is deposited under the first and second phosphor layers 211 and 212. The fine particles of the body can be unevenly distributed, and the luminous efficiency of each phosphor can be appropriately controlled. Thereafter, the lid 27 is provided on the phosphor layer, and the semiconductor light emitting device 201 according to the present embodiment, that is, the white LED is manufactured.

  As already described, in the semiconductor light emitting device 201 according to this embodiment, any of the semiconductor light emitting elements 101 to 108 according to the above embodiment and their modifications can be used.

In this specification, “nitride semiconductor” means B _x In _y Al _z Ga _1-xyz N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z ≦ 1) Semiconductors having all compositions in which the composition ratios x, y, and z are changed within the respective ranges are included. Furthermore, in the above chemical formula, those further including a group V element other than N (nitrogen) and those further including any of various dopants added for controlling the conductivity type are also referred to as “nitride semiconductors”. Shall be included.

The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, a person skilled in the art is concerned with the shape, size, material, arrangement relationship, etc. of each element such as a semiconductor layer, a conductive layer, an insulating layer, a semiconductor multilayer film, a metal film and a dielectric film constituting a semiconductor light emitting device, and a manufacturing method Is appropriately included in the scope of the present invention as long as the present invention can be carried out in the same manner and the same effects can be obtained by appropriately selecting from the known ranges.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

  In addition, all semiconductor light-emitting elements and semiconductor light-emitting devices that can be implemented by those skilled in the art based on the semiconductor light-emitting elements and semiconductor light-emitting devices described above as embodiments of the present invention are also included in the gist of the present invention. As long as it is included, it belongs to the scope of the present invention.

  In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

1 n-type semiconductor layer (first semiconductor layer)
DESCRIPTION OF SYMBOLS 1a 1st main surface 1b 2nd main surface 1s Laminated structure 2 p-type semiconductor layer (2nd semiconductor layer)
3 Light emitting layer 3a Semiconductor layer 4 P-side electrode (second electrode)
5 Protective layer (first conductive layer)
6 Diffusion prevention layer (second conductive layer)
7 n-side electrode (first electrode)
DESCRIPTION OF SYMBOLS 10 Substrate 11 Insulating layer 22 Container 23 Reflective film 24 Submount 25 Gold bump 26 Bonding wire 27 Lid 90, 91, 101-108 Semiconductor light emitting element 201 Semiconductor light emitting device 211, 212 Phosphor layer

Claims (11)

A first semiconductor layer including a first portion and a second portion aligned with the first portion in a first direction; a second semiconductor layer spaced from the second portion in a direction intersecting the first direction; comprises a light emitting layer provided between the pre-Symbol second portion said second semiconductor layer, and a stacked structure having a first main surface side of said second semiconductor layer,
A first electrode provided on the first main surface side of the multilayer structure and connected to the first portion of the first semiconductor layer;
A second electrode provided on the first main surface side of the multilayer structure, connected to the second semiconductor layer, and having reflectivity for light emitted from the light emitting layer;
An insulating layer that is provided between a part of the second electrode and the second semiconductor layer and has a light-transmitting property with respect to the light, and includes a region overlapping the second electrode; An insulating layer for confining current by limiting an ohmic contact region between the layer and the second electrode;
With
The first main surface is rectangular;
The first electrode is provided around the second electrode along an outer edge of the first main surface,
At least a portion of the outer edge of the second electrode is along the inner edge of the first electrode;
Of the first electrode, the width of the portion located at the corner portion of the first main surface is wider than the width located at the side portion of the first main surface,
Before Symbol distance from the outer edge of the first principal surface to the outer edge of the second electrode is longer in the corner portions than the side portions,
The distance from the outer edge of the second electrode to the inner edge of the insulating layer in the region overlapping the second electrode of the insulating layer is longer at the side than at the corner,
Said second semiconductor layer and the width of the insulating layer overlap, before Symbol corner, the semiconductor light emitting diode element being shorter than the side portions. The ohmic contact region between the second semiconductor layer and the second electrode is disposed in a portion far from the outer edge of the first main surface, the current is confined by the insulating layer, and the current is concentrated in the far portion. 2. The semiconductor light emitting diode device according to claim 1, wherein a light emitting region is disposed in the distant portion and the light is reflected by the entire surface of the second electrode.   The insulating layer is further provided on at least one of a side surface of the second semiconductor layer and the light emitting layer and a side of the first main surface of the first semiconductor layer. A semiconductor light-emitting diode device according to 1.   The thickness of the part pinched | interposed between the said 2nd electrode and the said 2nd semiconductor layer in the said insulating layer is thinner than the other part in the said insulating layer, Any one of Claims 1-3 characterized by the above-mentioned. The semiconductor light-emitting diode element according to any one of the above.   The semiconductor light emitting diode element according to claim 1, wherein the second electrode includes at least one of silver and a silver alloy.   The semiconductor light-emitting diode element according to claim 1, further comprising a first conductive layer provided to cover the second electrode and having conductivity.   The semiconductor light-emitting diode device according to claim 6, wherein the first conductive layer covers all of the second electrode.   The semiconductor light-emitting diode device according to claim 6, wherein the first conductive layer is not in direct contact with the second semiconductor layer. Wherein the first conductive layer, a semiconductor light emitting diode device according to one claims 6 to 8 or Re without noise, characterized in that the silver-free.   And a second conductive layer that is provided between the first conductive layer and the second electrode, and that suppresses diffusion of a material contained in the first conductive layer into the second electrode. The semiconductor light-emitting diode device according to any one of claims 6 to 9. A semiconductor light-emitting diode element according to any one of claims 1 to 10,
A phosphor that absorbs light emitted from the semiconductor light emitting diode element and emits light having a wavelength different from that of the light;
A semiconductor light emitting device comprising:

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