JPH11186598A - Nitride semiconductor light-emitting device having reflecting p-electrode, its manufacture and semiconductor optical electronic device - Google Patents

Nitride semiconductor light-emitting device having reflecting p-electrode, its manufacture and semiconductor optical electronic device

Info

Publication number
JPH11186598A
JPH11186598A JP34558497A JP34558497A JPH11186598A JP H11186598 A JPH11186598 A JP H11186598A JP 34558497 A JP34558497 A JP 34558497A JP 34558497 A JP34558497 A JP 34558497A JP H11186598 A JPH11186598 A JP H11186598A
Authority
JP
Japan
Prior art keywords
layer
led
silver
metal
nitride semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP34558497A
Other languages
Japanese (ja)
Other versions
JP4118370B2 (en
Inventor
Takeshi Kondo
雄 近藤
Satoshi Watanabe
智 渡辺
Kazu Kaneko
和 金子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP34558497A priority Critical patent/JP4118370B2/en
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Priority to EP98310251A priority patent/EP0926744B8/en
Priority to DE69839300T priority patent/DE69839300T2/en
Priority to US09/212,150 priority patent/US6194743B1/en
Priority to EP08001025A priority patent/EP1928034A3/en
Publication of JPH11186598A publication Critical patent/JPH11186598A/en
Priority to US09/764,024 priority patent/US6900472B2/en
Priority to US11/104,310 priority patent/US7262436B2/en
Application granted granted Critical
Publication of JP4118370B2 publication Critical patent/JP4118370B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body

Abstract

PROBLEM TO BE SOLVED: To improve the characteristics of a reflecting electrode of a P-type nitride semiconductor. SOLUTION: A silver layer 101 is arranged on a P-type nitride semiconductor layer. The silver layer is set thicker than 20 nm, so as to act as both a reflecting P-electrode and a reflecting layer of a short wavelength light. It is preferable that the silver layer be covered with a stabilizing layer of metal or dielectric, in order to improve mechanical and electrical characteristics of silver. It is possible that the stabilizing layer is provided with a metal layer 103 for circuit connection, and a diffusion preventing layer 102 which is interposed and inserted between the metal layer and the silver layer, the diffusion to silver of which is small and which prevents the diffusion of the metal layer to silver, in order to improve reflectivity. An LED(light-emitting diode) having the P-electrode can obtain more benefit of high reflectivity of the P-electrode, when mounting is performed on a package 110 by using a flip-chip method, so as to generate light from a substrate side.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、窒化物半導体を備えた
電子装置に関し、特にp型窒化物半導体に銀を含む反射
電極をそなえて光学特性と光電気特性を改善した光電子
装置とその製造方法とに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device provided with a nitride semiconductor, and more particularly to an optoelectronic device having a p-type nitride semiconductor provided with a reflective electrode containing silver to improve optical and photoelectric characteristics, and to manufacture the same. And how to.

【0002】本明細書において「窒化物半導体」とは
「III族窒化物半導体」であり、「発光ダイオード」す
なわち「LED」とはp−n接合部あるいは活性層を介挿
したp−n接合部(以下「広義のp−n接合部」と称
す)を有するものを含み、インコヒーレント光を出力す
る電子装置であり、「LED部材」とはこれをさらに加
工してLEDとするため必ずしも半導体ではない単結晶基
板上にひとつあるいは複数の半導体薄膜層を成長して形
成したもので広義のp−n接合部を有する半導体多層膜
構造体であり、「LEDチップ」とはLED部材であってp型
領域とn型領域とがそれぞれの電極であるp電極とn電
極とを有しこれら電極から電気的に駆動されるLED部材
であり、LEDチップは単独であるいはウェーハに多数が
集積されて存在し電極からボンディングワイヤをひきだ
してもよいLED部材であり、「LED製品」とはLEDチップ
を有し、該LEDチップは広義のp−n接合部を駆動する
ための電気配線を有しリード・フレームや印刷基板、セ
ラミック基板等(以下パッケージと総称する)の表面
(ダイ・パッドと総称する)にダイ・ボンディングされ
ている光電子装置であり、例えばLEDランプ、7素子表
示装置等である。
[0002] In this specification, the term "nitride semiconductor" refers to "group III nitride semiconductor", and the term "light-emitting diode", that is, "LED" refers to a pn junction or a pn junction with an active layer interposed. (Hereinafter, referred to as a "p-n junction" in a broad sense), and is an electronic device that outputs incoherent light. Is a semiconductor multilayer film structure having a pn junction in a broad sense formed by growing one or more semiconductor thin film layers on a single crystal substrate which is not an LED chip. A p-type region and an n-type region are LED members that have respective electrodes, a p-electrode and an n-electrode, and are electrically driven from these electrodes. Bondy from existing electrodes An LED member from which a wire can be pulled out. An “LED product” has an LED chip, which has electric wiring for driving a pn junction in a broad sense. An opto-electronic device die-bonded to the surface (collectively referred to as a die pad) of a ceramic substrate or the like (hereinafter collectively referred to as a package), such as an LED lamp or a seven-element display device.

【0003】[0003]

【従来の技術】短波長発光装置の開発が活発におこなわ
れている。一般に波長が550nm以下である短波長光が効
率的に発生できれば、長波長発光装置とともに用いてフ
ルカラーディスプレイや白色光源が実現でき、本装置の
応用機器の機能の拡充や消費エネルギーの低減などが期
待されている。これら短波長発光装置の多くはIII族窒
化物半導体に基づいて組立られており、「III族窒化物
半導体」にはGaN、AlN, InN, BN, AlInN, GaInN,
AlGaN,BAlN, BInN, BGaN、BAlGaInN等が含まれる。特
にGaNを筆頭に、GaInN, AlGaN, BGaN、BAlGaInN等のG
aNを主成分とするIII族窒化物半導体を「GaN系半導体」
と称する。
2. Description of the Related Art Short wavelength light emitting devices are being actively developed. In general, if short-wavelength light with a wavelength of 550 nm or less can be efficiently generated, a full-color display or white light source can be realized with a long-wavelength light-emitting device, and it is expected to expand the functions of applied equipment of this device and reduce energy consumption. Have been. Many of these short-wavelength light-emitting devices are assembled based on III-nitride semiconductors, and "III-nitride semiconductors" include GaN, AlN, InN, BN, AlInN, GaInN,
AlGaN, BAlN, BInN, BGaN, BAlGaInN and the like are included. In particular, GaN and other GInN, AlGaN, BGaN, BAlGaInN, etc.
Group III nitride semiconductors with aN as the main component are "GaN-based semiconductors"
Called.

【0004】短波長発光装置の一つであるLEDの例とし
てGaN系半導体に基づいて構成したLED(以下「GaN系LE
D」と称す)を図1を参照して説明する。以下において
混同しないときは「薄膜層」を単に「層」とも称する。
また各層は例えば特願平9−30204号において山田
等が開示する図1の(A)ように複数の異なる組成の亜
層からなるが本発明の理解に必要な範囲で図1の(B)
の簡明な記載を選んで今後の説明をおこなう。
As an example of an LED which is one of the short-wavelength light emitting devices, an LED configured based on a GaN-based semiconductor (hereinafter referred to as a “GaN-based LE”)
D) will be described with reference to FIG. In the following, when not confused, the “thin film layer” is simply referred to as a “layer”.
Each layer is composed of a plurality of sub-layers having different compositions as shown in FIG. 1A disclosed by Yamada et al. In Japanese Patent Application No. 9-30204, for example.
We will choose a concise description for the future.

【0005】図1の(A)においてGaN系LED21’はサ
ファイア基板22’、AlNバッファ層23’、n型GaNコ
ンタクト層24’、n型AlGaNクラッド層26’、ドープ
InGaN層28’、p型AlGaNクラッド層30'、p型GaNコ
ンタクト層31’、蒸着金属33’、p電極32’、n
電極25’からなっている。図1の(A)においてGaN
系LED21’は次の図1の(B)のひとつの実現形であ
る。
[0005] In FIG. 1A, a GaN-based LED 21 'includes a sapphire substrate 22', an AlN buffer layer 23 ', an n-type GaN contact layer 24', an n-type AlGaN cladding layer 26 ', and a doped layer.
InGaN layer 28 ', p-type AlGaN cladding layer 30', p-type GaN contact layer 31 ', deposited metal 33', p-electrode 32 ', n
It consists of an electrode 25 '. In FIG. 1A, GaN
The system LED 21 'is one implementation form of the following FIG. 1 (B).

【0006】一方、図1の(B)においてGaN系LED1は
サファイア基板2、n層3、一般には窒化物半導体の多
重量子井戸層である活性層4、p層5、透明p電極6、
ボンディング用p電極6a、n電極7からなるGaN系LED
チップ10を、パッケージ8のダイ・パッド8aにダイ
・ボンディングして組立てられる。ボンディング用p電
極6a、n電極7は一般にパッケージ8に備え付けられ
たリード線(図示せず)にボンディングワイヤ6b、7
aで接続されている。ボンディングワイヤ6b、7a間
に駆動電圧を印加してGaN系LED1に入力電流を流し、該
入力電流により活性層4から出力光を発生させる。少な
くともボンディング用p電極6aの表面部分とn電極7
の表面部分とは回路接続用金属手段である。
On the other hand, in FIG. 1B, the GaN-based LED 1 has a sapphire substrate 2, an n-layer 3, an active layer 4, which is generally a multiple quantum well layer of a nitride semiconductor, a p-layer 5, a transparent p-electrode 6,
GaN-based LED consisting of p electrode 6a for bonding and n electrode 7
The chip 10 is assembled by die bonding to the die pad 8a of the package 8. The bonding p-electrode 6a and the n-electrode 7 are generally connected to bonding wires 6b and 7
a. A drive voltage is applied between the bonding wires 6b and 7a to cause an input current to flow through the GaN-based LED 1, and output light is generated from the active layer 4 by the input current. At least the surface portion of the bonding p-electrode 6a and the n-electrode 7
Is the metal means for circuit connection.

【0007】図1の(A)の発光ダイオード21’と図
1の(B)のGaN系LED1間には下記の対応が成り立って
いる。 サファイア基板2:はサファイア基板22’、 、 n層3:AlNバッファ層23’; n型GaNコンタクト層24’; n型AlGaNクラッド層26’、 活性層4:ドープInGaN層28’、 p層5:p型AlGaNクラッド層30'; p型GaNコンタクト層31’、 p電極6;p電極6a:蒸着金属33’;p電極32’、 n電極7:蒸着金属33’;n電極25’。 AlNバッファ層23’は本願発明の説明においてサファ
イア基板2に対応する1要素と解しても当業者が本願発
明を実施するに特に支障はないが、本願発明の理解を容
易にするため上記の対応を基礎に以下の明細書は記載さ
れている。
The following correspondence is established between the light emitting diode 21 'of FIG. 1A and the GaN-based LED 1 of FIG. 1B. Sapphire substrate 2: sapphire substrate 22 ', n-layer 3: AlN buffer layer 23'; n-type GaN contact layer 24 '; n-type AlGaN cladding layer 26', active layer 4: doped InGaN layer 28 ', p-layer 5 : P-type AlGaN cladding layer 30 '; p-type GaN contact layer 31'; p-electrode 6; p-electrode 6a: vapor-deposited metal 33 '; p-electrode 32'; n-electrode 7: vapor-deposited metal 33 '; Although the AlN buffer layer 23 'may be interpreted as one element corresponding to the sapphire substrate 2 in the description of the present invention, there is no particular hindrance for a person skilled in the art to carry out the present invention. The following description is given on a corresponding basis.

【0008】上記の構造を有するGaN系LED1では、した
がって、(イ)できるだけ小さな駆動電力(=入力電流
×駆動電圧)で、できるだけ多くの光を活性層4から発
生させ、(ロ)活性層4で発生した光をなるべく多く出
力光として外に取り出す、ことが重要である。
In the GaN-based LED 1 having the above structure, therefore, (a) as much light as possible is generated from the active layer 4 with as little drive power (= input current × drive voltage) as possible. It is important to extract as much output light as possible as output light to the outside.

【0009】できるだけ小さな駆動電力で、できるだけ
多くの光を活性層4から発生させるため、多くの努力が
はらわれた。p型窒化物半導体層の抵抗率はn型窒化物
半導体層の抵抗率に比べかなり大きく、p型窒化物半導
体層にp電極を形成するとn型窒化物半導体層にn電極
を形成した場合に比べ金属−半導体接合により大きな接
触電圧を生じ窒化物半導体素子の消費電力を増加させる
主因となっていた。そのため、p電極は接触電圧を低下
させるためn電極よりかなり広くなっている。
Many efforts have been made to generate as much light from the active layer 4 as possible with as little drive power as possible. The resistivity of the p-type nitride semiconductor layer is considerably larger than the resistivity of the n-type nitride semiconductor layer, and when the p-electrode is formed on the p-type nitride semiconductor layer, when the n-electrode is formed on the n-type nitride semiconductor layer, On the other hand, the metal-semiconductor junction generates a large contact voltage, which is a main cause of increasing the power consumption of the nitride semiconductor device. Therefore, the p-electrode is much wider than the n-electrode to reduce the contact voltage.

【0010】上記接触電圧の低減のため、p電極として
p型窒化物半導体層上にパラジュームを蒸着する技術
(特願平9−30204号)やp電極を形成する前のp
型窒化物半導体層の清浄化技術(特願平9−48402
号)やp型窒化物半導体層とp電極金属の間にV族置換
型窒化物半導体層を挿入する技術(特願平9−5339
号)などが開発された。一方LEDではこの広い面積を
有するp電極が活性層で発生した光の多くに遭遇するた
め、活性層で発生した光をなるべく多く出力光として外
に取り出すのに好ましい光学的特性、すなわち透過率や
反射率、を合わせ持つことが望まれる。
In order to reduce the contact voltage, a technique for depositing palladium on a p-type nitride semiconductor layer as a p-electrode (Japanese Patent Application No. 9-30204) or a p-electrode before forming a p-electrode.
Technology for cleaning type nitride semiconductor layer (Japanese Patent Application No. 9-48402)
) Or a technique of inserting a group V substitutional nitride semiconductor layer between a p-type nitride semiconductor layer and a p-electrode metal (Japanese Patent Application No. 9-5339).
No.) was developed. On the other hand, in the LED, since the p-electrode having this large area encounters much of the light generated in the active layer, it is preferable to take out the light generated in the active layer as output light as much as possible as the output light, that is, the transmittance and the transmittance. It is desirable to have both reflectance and reflectance.

【0011】図1の(B)において活性層4で発生した
光は全方向に進行するが、そのうち、GaN系LED1の出力
光として有効な光は透明p電極6から外部に放出される
光である。したがって、透明p電極6は透過率が大きく
なければならない。活性層4からパッケージ8側では光
を反射して透明p電極6の方向にむける工夫がなされ
る。
In FIG. 1B, light generated in the active layer 4 travels in all directions. Among them, light effective as output light of the GaN-based LED 1 is light emitted from the transparent p-electrode 6 to the outside. is there. Therefore, the transparent p-electrode 6 must have a high transmittance. On the package 8 side from the active layer 4, light is reflected and directed toward the transparent p-electrode 6.

【0012】透明電極6としては厚さ数nmのニッケルと
金の多層膜(例えばニッケル1nmに8nmの2層膜)が用い
られ、その透過率は40〜50%程度である。また、この透
明電極6は、薄すぎてボンディングには適さず、ボンデ
ィング部分にはさらに厚いボンディング用の電極6aが
必要となる。ボンディング用の電極6aとしては、数1
00nmの厚みをもったニッケルと金の多層膜などがよく
用いられ、その面積はボンディング作業の簡便性を確保
するため最小でも一辺が80〜100μmの矩形程度の面積を
必要とする。
As the transparent electrode 6, a multi-layer film of nickel and gold having a thickness of several nm (for example, a two-layer film of 8 nm for 1 nm of nickel) is used, and its transmittance is about 40 to 50%. The transparent electrode 6 is too thin to be suitable for bonding, and a thicker bonding electrode 6a is required at the bonding portion. Equation 1 is used as the bonding electrode 6a.
A multilayer film of nickel and gold having a thickness of 00 nm is often used, and its area is required to be at least a rectangular area of 80 to 100 μm on a side in order to secure the simplicity of the bonding operation.

【0013】一方、n電極側にはその直下に活性層4が
ないため、光出力を透過させる工夫はされないのが一般
的で、n電極7としてはチタンやアルミなどの多層膜が
ボンディング用電極として形成されている。これらのボ
ンディング用電極はその厚みのために光を透過すること
ができないので、ボンディング作業の簡便性を損なわな
い限りなるべく小さな面積になるように設計される。
On the other hand, since there is no active layer 4 immediately below the n-electrode side, it is general that no means for transmitting the optical output is devised. As the n-electrode 7, a multilayer film such as titanium or aluminum is used as the bonding electrode. It is formed as. Since these bonding electrodes cannot transmit light due to their thickness, they are designed to be as small as possible as long as the simplicity of the bonding operation is not impaired.

【0014】また、パッケージ8側に向った光は、パッ
ケージ表面すなわちダイ・パッド8aに形成された反射
手段によって反射される。例えば、良く用いられる反射
手段としては、反射率が高い白色ダイ・パッド自体や、
ダイ・パッドに設けた反射率の高いテープなどである。
パッケージ自体を金属とし、その表面にアルミニューム
などをめっきして反射手段とすることもある。いずれの
場合にも実装時の表面状態、実装までの保存状態などの
影響を受けるが、その反射率は50〜80%である。
The light directed toward the package 8 is reflected by the reflection means formed on the surface of the package, that is, the die pad 8a. For example, commonly used reflecting means include a white die pad itself having a high reflectance,
High reflectivity tape provided on the die pad.
In some cases, the package itself is made of metal, and the surface thereof is plated with aluminum or the like to serve as reflection means. In any case, the surface state at the time of mounting and the storage state before mounting are affected, but the reflectance is 50 to 80%.

【0015】[0015]

【発明が解決しようとする課題】したがって、従来のL
EDでは、活性層から発生した光が透明p電極側から出
力されて外に取り出される場合、透明p電極側へ向った
光はボンディング用電極やボンディングワイヤなどで反
射、吸収されるだけでなく、透明p電極でもその50〜60
%が反射、吸収される。一方、パッケージ側に出力され
た光は、ダイ・パッドに設置された反射手段によって、
その50〜80%が反射されるが、この反射光と直進光を合
計しても活性層で発生した光の総量の半分程度しか出力
光として取り出すことができない。
Therefore, the conventional L
In the ED, when light generated from the active layer is output from the transparent p-electrode side and taken out, the light directed to the transparent p-electrode side is not only reflected and absorbed by a bonding electrode or a bonding wire, but also, 50-60 even with transparent p-electrode
% Is reflected and absorbed. On the other hand, the light output to the package side is reflected by the reflection means installed on the die pad.
Although 50 to 80% of the light is reflected, even if the reflected light and the straight light are summed up, only about half of the total amount of light generated in the active layer can be extracted as output light.

【0016】外に取り出す出力光の強度すなわちLEDの
発光強度を増加させるために、p電極の透過率をさらに
高くしようとして薄くすると、透明p電極の面積抵抗が
大きくなり、入力電流の広がりが制限される。そのため
LEDの端子間電圧を上昇させざるをえず、結果的にLEDの
発光効率を低下させてしまう。また、p電極は光の透過
とボンディングという2つの機能を持たせるために、複
雑な膜構造をとらざるをえない。さらに、パッケージ側
へ出力した光を反射させるための手段が必要となるた
め、部品点数の増加、製造プロセスの複雑化につなが
り、ひいてはLEDのコストの上昇を招いている。また、
ボンディング用電極やボンディングワイヤなどで反射、
吸収される光を有効に出力光とすることができることが
望ましい。さらに、p電極として他の光電子装置に広く
応用できるすぐれた機械的、電気的、光学的特性、光電
気特性あるいはそれらの協同的特性の改善されたp電極
や装置構成が得られることが望ましい。
If the transmittance of the p-electrode is reduced in order to further increase the intensity of the output light taken out, that is, the emission intensity of the LED, the sheet resistance of the transparent p-electrode increases and the spread of the input current is limited. Is done. for that reason
The voltage between the LED terminals must be increased, and as a result, the luminous efficiency of the LED is reduced. Further, the p-electrode has to have a complicated film structure in order to have two functions of light transmission and bonding. Further, a means for reflecting the light output to the package side is required, which leads to an increase in the number of components, a complicated manufacturing process, and an increase in the cost of the LED. Also,
Reflected by bonding electrodes and bonding wires, etc.
It is desirable that the absorbed light can be effectively used as output light. Further, it is desirable to obtain a p-electrode or device configuration that has excellent mechanical, electrical, optical, opto-electrical properties or improved cooperative properties thereof that can be widely applied to other optoelectronic devices as a p-electrode.

【0017】[0017]

【課題を解決するための手段】本発明は、抵抗率の低い
銀すなわちAgをp電極の少なくとも一部分の第1層金属
として用い電気的にすぐれた特性と光学的にすぐれた特
性を有するp電極を安定に実現できる新規な技術に基づ
いている。本発明の半導体光電子装置はp型窒化物半導
体層を備える電子装置であって該p型窒化物半導体層に
蒸着した銀層を備え、該銀層が電極として機能するとと
もに光の、限定的ではないが短波長光の、反射層として
機能するようにしている。その厚さを調整して銀層やそ
の一部分を反射率の高い反射p電極としている。
SUMMARY OF THE INVENTION The present invention provides a p-electrode having excellent electrical characteristics and optical characteristics by using silver having a low resistivity, that is, Ag, as a first layer metal of at least a portion of the p-electrode. Based on a new technology that can be realized stably. The semiconductor optoelectronic device of the present invention is an electronic device including a p-type nitride semiconductor layer, including a silver layer deposited on the p-type nitride semiconductor layer, and the silver layer functions as an electrode and emits light. Although it is not, it is designed to function as a reflection layer for short wavelength light. By adjusting the thickness, the silver layer or a part thereof is used as a reflective p-electrode having a high reflectance.

【0018】上記銀の機械的、電気的特性とを向上する
ため金属や誘電体の安定化層で銀層を覆うのが好まし
い。また反射率を高くするため拡散防止層で反射p電極
の銀を覆ってから拡散防止層の上に回路接続用金属を設
けるようにしてもよい。また、透明基板を備えるLEDチ
ップでは透明基板側から出力光を外部に取り出すよう
に、p電極を反射p電極としパッケージにLEDチップを
フリップチップ・ボンディングするようにしてもよい。
In order to improve the mechanical and electrical properties of the silver, it is preferable to cover the silver layer with a metal or dielectric stabilizing layer. Further, in order to increase the reflectance, the silver for the reflective p-electrode may be covered with a diffusion preventing layer, and then the circuit connecting metal may be provided on the diffusion preventing layer. In the case of an LED chip having a transparent substrate, the LED chip may be flip-chip bonded to a package using a p-electrode as a reflective p-electrode so that output light is extracted from the transparent substrate side to the outside.

【0019】[0019]

【実施例】以下に窒化物半導体LEDの製造に関する本発
明を理解するためGaN系LEDの製造に関する本発明の実施
例を説明する。当業者は以下の実施例から他の窒化物半
導体LEDを組立てる場合の知識をも得ることができる。
また、透明p電極や反射p電極のLED以外の電子装置へ
の応用の可能性についても見通しが立とう。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to understand the present invention relating to the manufacture of a nitride semiconductor LED, an embodiment of the present invention relating to the manufacture of a GaN-based LED will be described below. Those skilled in the art can also gain knowledge when assembling other nitride semiconductor LEDs from the following examples.
In addition, the prospect of applying the transparent p-electrode and the reflective p-electrode to electronic devices other than LEDs can be expected.

【0020】図2は、p電極を構成する第1層金属とし
て銀(Ag)層21を蒸着した本発明の第1の実施例のGa
N系LED20の断面図である。図1のLED1におけると同
様の機能、性能を発揮する部分には図1におけると同じ
参照番号が付されている。銀層21には図1におけると
同様にボンディング用の電極金属層21aがニッケル・
金等で構成される。ボンディング用の電極金属層21a
の少なくとも表面部分は金等の回路接続に適した回路接
続用金属とする。図2のLEDは、基板2と該基板上の
n型窒化物半導体層3と、n型窒化物半導体層上の窒化
物半導体からなる活性層4と、活性層上のp型窒化物半
導体層5と、p型窒化物半導体層上の銀層21と、を備
えたLED部材をパッケージ8にボンディングしたLED
の一実施形態として窒化物半導体としてGaN系半導体を
選択したものである。また、各窒化物半導体層の主要部
は周知のように必要な組成の層を必要な数だけ含む多層
膜として形成されている。
FIG. 2 shows a first embodiment of the present invention in which a silver (Ag) layer 21 is deposited as a first layer metal constituting a p-electrode.
FIG. 2 is a sectional view of an N-type LED 20. Parts that exhibit the same functions and performances as those of the LED 1 in FIG. 1 are given the same reference numerals as in FIG. An electrode metal layer 21a for bonding is formed on the silver layer 21 in the same manner as in FIG.
It is composed of gold or the like. Electrode metal layer 21a for bonding
At least the surface portion is made of a metal for circuit connection suitable for circuit connection such as gold. The LED in FIG. 2 includes a substrate 2, an n-type nitride semiconductor layer 3 on the substrate, an active layer 4 made of a nitride semiconductor on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer on the active layer. 5 in which an LED member having a silver layer 21 on a p-type nitride semiconductor layer is bonded to a package 8
In one embodiment, a GaN-based semiconductor is selected as a nitride semiconductor. As is well known, a main part of each nitride semiconductor layer is formed as a multilayer film including a required number of layers having a required composition.

【0021】以下に図3の工程図を参照してLED20の
組立プロセスを説明する。まずCVD法などの従来の素
子形成プロセス(例えば前記特願平9−30204号参
照)を用いて、不透明基板を含む他の基板であってもよ
いサファイア基板2上に、n層3、活性層4とp層5を
順次形成しLED部材を組立てた(工程31)。次いで
該LED部材を他の金属であってもよいニッケルをマスク
としフォトリソグラフィ法でパターニングし、反応性イ
オンエッチングによって、該LED部材をn電極7を形成
するn層3の一部分(図1の(A)ではn型GaN層2
4’の蒸着金属33’取り付け部分)まで掘り下げた
(工程32)。その後、室温でマスクとして使用したニ
ッケルをLED部材から王水で除去した(工程33)。
Hereinafter, the assembling process of the LED 20 will be described with reference to the process chart of FIG. First, an n-layer 3 and an active layer are formed on a sapphire substrate 2 which may be another substrate including an opaque substrate by using a conventional element forming process such as a CVD method (for example, see Japanese Patent Application No. 9-30204). 4 and the p layer 5 were sequentially formed to assemble the LED member (step 31). Next, the LED member is patterned by photolithography using nickel, which may be another metal, as a mask, and the reactive ion etching is used to convert the LED member into a part of the n-layer 3 forming the n-electrode 7 (( A) shows the n-type GaN layer 2
It was dug down to the 4 'deposition metal 33' mounting portion (step 32). Thereafter, nickel used as a mask at room temperature was removed from the LED member with aqua regia (step 33).

【0022】ニッケルの除去に燐酸を用いたり、王水を
室温より昇温して用いることも可能であるが王水を用い
てニッケルを除去する方法は窒化物半導体表面の洗浄も
兼ねておこなえるので好ましい。ニッケルの除去は数分
で終了するがLED部材を王水に浸漬する時間は通常この
ような処理で採用される5分(特願平9−30204参
照)よりかなり長い30分から1時間程度とした。30
分より短くしてゆくとp層表面の清浄化効果が次第に失
われ、後工程で該表面に蒸着された銀の安定性が失われ
ることが判明したのでこの浸漬時間を30分からあまり
短くすることは避けなければならない。
It is possible to use phosphoric acid to remove nickel or to use aqua regia at a temperature higher than room temperature. However, the method of removing nickel using aqua regia can also be used to clean the surface of the nitride semiconductor. preferable. Nickel removal can be completed in a few minutes, but the time for immersing the LED member in aqua regia is 30 minutes to 1 hour, which is much longer than 5 minutes (see Japanese Patent Application No. 9-30204) which is usually employed in such a treatment. . 30
When the time is shorter than 30 minutes, it has been found that the cleaning effect of the surface of the p-layer is gradually lost, and the stability of silver deposited on the surface in the subsequent process is lost. Must be avoided.

【0023】その後サファイア基板2を900℃とし窒素
雰囲気中で5分間LED部材の活性化を行った(工程3
4)。該活性化後LED部材を室温でふっ酸により10
分間洗浄し(工程35)、p電極の第1層21を形成す
るためp層5の表面(図1の(A)のp型GaN層31’
の表面に相当)の大部分に、Agを100nm蒸着した(工程
36)。ふっ酸による表面清浄化は前記特願平9−48
402号の開示が参考になる。
Thereafter, the sapphire substrate 2 was set at 900 ° C., and the LED members were activated in a nitrogen atmosphere for 5 minutes (step 3).
4). After the activation, the LED member was treated with hydrofluoric acid at room temperature for 10 minutes.
(Step 35), and the surface of the p-layer 5 (the p-type GaN layer 31 'in FIG. 1A) to form the first layer 21 of the p-electrode.
100 nm of Ag was vapor-deposited on most of the surface (step 36). The surface cleaning with hydrofluoric acid is described in Japanese Patent Application No. Hei 9-48.
Reference is made to the disclosure of No. 402.

【0024】次にp電極のボンディング用の電極金属層
21aを形成するためニッケル300nmと金50nm程度を順
次蒸着してパターニングし、第1回目のアニール(アニ
ール1)をおこなった(工程37)。その後n電極7を
形成するためのn型GaN部分に、Tiを10nm、Alを200nm順
次蒸着してパターニングしLED部材をLEDチップとし
て形成し、第2回目のアニール(アニール2)をおこな
った(工程38)アニールについては後述する。形成し
たLEDチップをパッケージ8のダイ・パッド8aに取り
付け、ボンディングワイヤを配線して樹脂封じなどの処
理をおこなってLED製品を完成させた(工程39)。n
電極7は別の材料構成でもよいが、少なくとも表面部分
は金等の回路接続のための回路接続用金属とする。な
お、アニール1を省略しアニール2だけとしてもよい。
アニール1を200℃以下でおこないアニール2を200℃以
上で好ましくは400℃以上でおこなうのがよい。
Next, in order to form an electrode metal layer 21a for bonding a p-electrode, nickel was deposited in a thickness of about 300 nm and gold was deposited in a thickness of about 50 nm, followed by patterning, followed by a first annealing (annealing 1) (step 37). Thereafter, on the n-type GaN portion for forming the n-electrode 7, 10 nm of Ti and 200 nm of Al were sequentially deposited and patterned to form LED members as LED chips, and a second annealing (annealing 2) was performed (annealing 2). Step 38) annealing will be described later. The LED chip thus formed was attached to the die pad 8a of the package 8, a bonding wire was wired, and processing such as resin sealing was performed to complete an LED product (step 39). n
The electrode 7 may have another material configuration, but at least the surface portion is made of a metal for circuit connection such as gold for circuit connection. Note that annealing 1 may be omitted and annealing 2 alone may be used.
Annealing 1 is performed at 200 ° C. or less, and annealing 2 is performed at 200 ° C. or more, preferably 400 ° C. or more.

【0025】Agを蒸着するときの蒸着速度、および蒸着
中のサファイア基板2の温度を変えることにより形成さ
れたLEDチップの特性が変化する。この特性変化を調べ
るためまずこれら蒸着速度と温度とを変えてLED部材を
多数形成した。これらLED部材は、図3の工程36を終
了した時点のLED部材でアニール1をおこなう前に得ら
れる。各LEDチップを入力電流20mAで室温連続動作さ
せその発光強度の時間変化を測定した。銀の蒸着時にサ
ファイア基板2の温度を室温とし、蒸着速度を0.1nm/秒
として形成したLEDチップの発光強度は連続動作開始後
30分でに、連続動作開始時の発光強度の5%以下に減少
した。
The characteristics of the formed LED chip are changed by changing the deposition rate when depositing Ag and the temperature of the sapphire substrate 2 during the deposition. In order to examine this characteristic change, a large number of LED members were formed by changing these deposition rates and temperatures. These LED members are obtained before annealing 1 is performed on the LED members at the time when step 36 in FIG. 3 is completed. Each LED chip was operated continuously at room temperature with an input current of 20 mA, and the time change of the light emission intensity was measured. The luminous intensity of the LED chip formed at a temperature of the sapphire substrate 2 at the time of silver vapor deposition at room temperature and a vapor deposition rate of 0.1 nm / sec is less than 5% of the luminous intensity at the beginning of the continuous operation 30 minutes after the start of the continuous operation. Diminished.

【0026】これに対して、サファイア基板2の温度を
200℃にし、蒸着速度を0.03nm/秒として形成したLEDチ
ップでは30分以上連続動作させても発光強度はまったく
減少せず、長時間連続動作でも発光強度が減少しないこ
とが確かめられた。サファイア基板2の温度を室温と
し、蒸着速度を0.03nm/秒として形成したLEDチップでは
30分以上連続動作させると発光強度が動作開始時の60〜
80%になる。サファイア基板2の温度を200℃とし、蒸
着速度を0.1nm/秒として形成したLEDチップでは30分以
上連続動作させると発光強度が動作開始時の約90%にな
る。
On the other hand, the temperature of the sapphire substrate 2 is
It was confirmed that the LED chip formed at 200 ° C. and the deposition rate was 0.03 nm / sec did not reduce the luminous intensity at all even after continuous operation for more than 30 minutes, and that the luminous intensity did not decrease even after continuous operation for a long time. In an LED chip formed with a sapphire substrate 2 at a room temperature and a deposition rate of 0.03 nm / sec.
If you operate continuously for 30 minutes or more, the emission intensity will be 60 to
80%. When the LED chip formed with the sapphire substrate 2 at a temperature of 200 ° C. and a deposition rate of 0.1 nm / sec is operated continuously for 30 minutes or more, the light emission intensity becomes about 90% of that at the start of operation.

【0027】極端な高温では蒸着された銀が島状になっ
てしまうので電極として使用することはできない。サフ
ァイア基板2の温度を更に高くすると蒸着速度が0.03nm
/秒でも400℃近くから銀の被着が不均一になりだし、蒸
着速度が高いと更に低い温度でも銀の被着が不均一が生
じる。この不均一が生じると銀層の抵抗値が上昇し、そ
の光散乱が増加するとともにLEDの上記発光強度の経時
減衰が速くなりLEDは実用に供し得ない。以下に詳細に
述べるが実施例のLEDチップはアニール1、2の前後い
ずれにおいてもこのような測定結果となった。
At extremely high temperatures, the deposited silver becomes island-shaped and cannot be used as an electrode. When the temperature of the sapphire substrate 2 is further increased, the deposition rate becomes 0.03 nm.
Even at a rate of about 400 ° C./sec, the deposition of silver becomes non-uniform, and when the deposition rate is high, the deposition of silver becomes non-uniform even at lower temperatures. When this non-uniformity occurs, the resistance value of the silver layer increases, the light scattering increases, and the decay of the emission intensity of the LED with time increases, so that the LED cannot be put to practical use. As will be described in detail below, the measurement results of the LED chip of the example were obtained before and after annealing 1 and 2.

【0028】このような実験の結果、銀層の蒸着は蒸着
速度を約0.05nm/秒以下とし、サファイア基板2の温度
を200℃以下とするのが好ましいと判明した。LED製造の
効率を考えれば、蒸着速度は高い方がよいが、高速過ぎ
れば銀の層の品質がさがる。また、製造の容易さからサ
ファイア基板2の温度を室温等のより低温とすれば、良
好な銀層の品質を得るため蒸着速度をより低くする必要
があり、0.03nm/秒以下にするのがよい。上記のように
サファイア基板2の温度を200℃近傍にし、蒸着速度を
0.03nm/秒近傍に選ぶのが得策である。
As a result of such an experiment, it was found that it is preferable to set the deposition rate of the silver layer to about 0.05 nm / sec or less and the temperature of the sapphire substrate 2 to 200 ° C. or less. Considering the efficiency of LED manufacturing, the higher the deposition rate, the better, but if the rate is too high, the quality of the silver layer decreases. Further, if the temperature of the sapphire substrate 2 is set to a lower temperature such as room temperature for ease of manufacture, it is necessary to lower the deposition rate in order to obtain a good quality of the silver layer. Good. As described above, the temperature of the sapphire substrate 2 was set at around 200 ° C.
It is advisable to choose near 0.03nm / sec.

【0029】また、銀層の蒸着速度とLED部材の基板温
度とを可変して、発光強度を測定し製造プロセスに対す
るより適切な銀層の蒸着速度と基板温度とを決定するの
がさらに好ましい。この場合、Ag層における出力光の輝
度分布の均一性も良好であることが好ましい。
Further, it is more preferable that the deposition rate of the silver layer and the substrate temperature of the LED member are varied to measure the luminous intensity to determine a more appropriate deposition rate and the substrate temperature of the silver layer for the manufacturing process. In this case, it is preferable that the uniformity of the luminance distribution of the output light in the Ag layer is also good.

【0030】従来のLED製造プロセスでは、LEDの動
作電圧を下げるために、電極を蒸着した後にLEDチッ
プを400〜500℃でアニールする方法がよく用いられてき
た。本発明の第1の実施例のLEDチップを形成する際
は、Agを蒸着した直後は、LEDチップを窒素雰囲気中
で通常知られている温度(400〜500℃)よりも低い200
℃でアニール1を行い、ボンディング用の金属電極やn
電極をつけたあとは500℃でアニール2をおこなった。
前述のようにアニール1を省略してもよい。
In the conventional LED manufacturing process, a method of annealing an LED chip at 400 to 500 ° C. after depositing an electrode has been often used in order to lower the operating voltage of the LED. In forming the LED chip according to the first embodiment of the present invention, immediately after the deposition of Ag, the LED chip is placed in a nitrogen atmosphere at a temperature lower than a generally known temperature (400 to 500 ° C.).
Annealing 1 is performed at ℃, and a metal electrode for bonding and n
After attaching the electrodes, annealing 2 was performed at 500 ° C.
As described above, annealing 1 may be omitted.

【0031】図4は、アニールの時間効果を確認するた
めの実験結果を示すグラフである。図4は、p層5と同
じ特性を有するp型GaN基板上に蒸着された2つのAg電
極間の電圧降下を該電極の間に500uAの電流を流して測
定した結果を示している。p型GaN基板はAg蒸着後に窒
素雰囲気中、200℃でアニールされたもので、Ag電極間
電圧降下は該アニール時間を変えてプロットしてある。
図4はAg蒸着中のp型GaN基板の温度Tsが室温でのカー
ブ41と200℃でのカーブ42とを示しているが、温度T
sがその他の値の場合でも、20分以上アニールすること
で、2つのAg電極間の電圧降下はアニール前よりも低下
した。温度Tsによらずアニールの効果を見積もれる点は
有利である。
FIG. 4 is a graph showing experimental results for confirming the time effect of annealing. FIG. 4 shows a result of measuring a voltage drop between two Ag electrodes deposited on a p-type GaN substrate having the same characteristics as the p-layer 5 by flowing a current of 500 uA between the electrodes. The p-type GaN substrate was annealed at 200 ° C. in a nitrogen atmosphere after Ag deposition, and the voltage drop between the Ag electrodes is plotted by changing the annealing time.
FIG. 4 shows a curve 41 when the temperature Ts of the p-type GaN substrate during Ag deposition is room temperature and a curve 42 when the temperature Ts is 200 ° C.
Even when s was any other value, the voltage drop between the two Ag electrodes was lower than before annealing by annealing for 20 minutes or more. It is advantageous that the effect of annealing can be estimated regardless of the temperature Ts.

【0032】なお、上記電圧降下の値はp型GaN基板に
よるアニール非依存抵抗の寄与が大きい。実際に形成さ
れたLEDチップ間の端子間電圧が3〜4ボルトになる
ことを考慮すると、最終製品としてのLEDに対するAg電
極の接触電圧のアニールによる変化は50%を越えると
いえる。したがって、アニールによるLEDの効率(出力
光電力/入力電力)の改善がおこなえる。ここでのアニ
ールは前述のアニール1に相当しアニール温度は200℃
以上とするのが効果的である。特にn電極7を形成して
からアニールする場合(アニール2)は400〜500℃でア
ニールするのがよい。上記したように本発明の第1の実
施例のGaN系LEDおよびGaN系LEDチップは第1層が銀層で
あるp電極を有するLEDの製造プロセスの確立に役立
つ。
The value of the above voltage drop largely depends on the annealing-independent resistance of the p-type GaN substrate. Considering that the voltage between terminals between actually formed LED chips becomes 3 to 4 volts, it can be said that the change in the contact voltage of the Ag electrode with respect to the LED as the final product due to annealing exceeds 50%. Therefore, the efficiency of the LED (output light power / input power) can be improved by annealing. The annealing here corresponds to the above-mentioned annealing 1, and the annealing temperature is 200 ° C.
The above is effective. In particular, when annealing after forming the n-electrode 7 (annealing 2), it is preferable to anneal at 400 to 500 ° C. As described above, the GaN-based LED and the GaN-based LED chip of the first embodiment of the present invention are useful for establishing a manufacturing process of an LED having a p-electrode whose first layer is a silver layer.

【0033】図5は本発明の第2の実施例のLED50の
部分断面図である。なお、TiO2層52はボンディング用
の電極金属層21aよりかなり薄くなっており図5では
寸法を信用すべき出ない。図2のLED20におけると同
様の機能、性能を発揮する部分には図2におけると同じ
参照番号が付されている。本発明の第2の実施例と第1
の実施例との違いは、p電極として蒸着される銀層51
厚さを10nmと薄くし出力光に対する透過率を改善した点
と、該銀層の保護、安定化と透過率の更なる改善をする
ため、p電極の上にTiO2層52を蒸着した点にある。
FIG. 5 is a partial sectional view of an LED 50 according to a second embodiment of the present invention. Note that the TiO 2 layer 52 is much thinner than the bonding electrode metal layer 21a, and the dimensions are not to be trusted in FIG. Portions that exhibit the same function and performance as those of the LED 20 in FIG. 2 are denoted by the same reference numerals as in FIG. Second Embodiment of the Invention and First Embodiment
Is different from the embodiment in that the silver layer 51 deposited as a p-electrode
The thickness was reduced to 10 nm to improve the transmittance for output light, and the TiO 2 layer 52 was deposited on the p-electrode to protect, stabilize and further improve the transmittance of the silver layer. It is in.

【0034】ボンディング用の電極金属層51aはボン
ディング用の電極金属層21aと実質的におなじもので
ある。2枚のTiO2膜により透明銀電極をサンドウィッチ
し透過率を改善する技術は周知であるが(「薄膜ハンド
ブック」、496頁、オーム社、東京(1983)参照)、
銀層上にTiO2層52を蒸着した本第2の実施例の構成で
も出力光に対する透過率を改善できることが判明した。
金属層は厚さが20nm以下で透明となるが、透明導電膜
としての膜厚は3〜15nmの範囲に限定されるといわ
れ、また波長が500nm以下では銀の吸収が金より少ない
といわれている(「薄膜ハンドブック」、495頁、オ
ーム社、東京(1983)参照)。本第2の実施例ではLED
の効率を改善し信頼性を確保する観点から該膜厚を10
nmとした。
The electrode metal layer 51a for bonding is substantially the same as the electrode metal layer 21a for bonding. Techniques for improving the transmittance by sandwiching a transparent silver electrode with two TiO 2 films are well known (see “Thin Film Handbook”, page 496, Ohmsha, Tokyo (1983)).
It has been found that the configuration of the second embodiment in which the TiO 2 layer 52 is deposited on the silver layer can also improve the transmittance for output light.
The metal layer becomes transparent when the thickness is 20 nm or less, but it is said that the thickness of the transparent conductive film is limited to the range of 3 to 15 nm, and that when the wavelength is 500 nm or less, the absorption of silver is smaller than that of gold. (See “Thin Film Handbook,” p. 495, Ohmsha, Tokyo (1983)). In the second embodiment, the LED
From the viewpoint of improving the efficiency of
nm.

【0035】なお、p電極の第1層として蒸着された銀
層上にTiO2を蒸着することの効果を測定してLEDの設計
に役立てるため次の実験をおこなった。まず光学部品の
透明基板として一般に用いられている光学ガラスである
BK7基板(「理科年表」、518−519頁、丸善、東
京(1992))上に銀を蒸着した。BK7基板温度を室温に
し、蒸着速度0.03nm/秒で厚さ10nmのAg層を蒸着した
試料1と、さらにその上に厚さ25nmのTiO2層を蒸着した
試料2を作成した。
The following experiment was conducted to measure the effect of depositing TiO 2 on the silver layer deposited as the first layer of the p-electrode and to use it in designing an LED. First is the optical glass commonly used as a transparent substrate for optical components
Silver was deposited on a BK7 substrate ("Science Table", pp. 518-519, Maruzen, Tokyo (1992)). Sample 1 was prepared by depositing a 10-nm-thick Ag layer at a deposition rate of 0.03 nm / sec at a BK7 substrate temperature of room temperature, and sample 2 was further formed by depositing a 25-nm-thick TiO 2 layer thereon.

【0036】図6は、このようにして作成された試料
1、2の透過率の測定結果を示している。測定光の波長
が450nmでの透過率は、試料1がカーブ61から透過率4
9%なのに対して試料2ではカーブ62から透過率66%ま
で増加している。上記試料2ではTiO2膜の膜厚として25
nmを選んだが、これは波長が450nmでのAg層とTiO2膜の
合成多層膜の透過率を最大にする厚さであるためであ
る。従来良く使用されるニッケル1nmと金8nmの2層膜
の透過率は47%であった。波長が450nmより短い領域で
はさらにAg層とTiO2膜の合成多層膜が有利となることが
分った。(なおAg層の層厚が7nmではAg層と合成多層膜
の透過率はそれぞれ52%、71%であった。)
FIG. 6 shows the measurement results of the transmittance of Samples 1 and 2 thus prepared. When the wavelength of the measurement light is 450 nm, the transmittance of the sample 1 is 4
In Sample 2, the transmittance increases from curve 62 to 66%, compared to 9%. In the above sample 2, the thickness of the TiO 2 film was 25
nm was chosen because it is the thickness that maximizes the transmittance of the composite multilayer of Ag and TiO 2 films at a wavelength of 450 nm. The transmittance of a conventionally used two-layer film of nickel of 1 nm and gold of 8 nm was 47%. It has been found that in the region where the wavelength is shorter than 450 nm, a composite multilayer film of an Ag layer and a TiO 2 film is more advantageous. (Note that when the thickness of the Ag layer was 7 nm, the transmittances of the Ag layer and the synthetic multilayer film were 52% and 71%, respectively.)

【0037】本発明の発明者等は、他の金属薄膜層に比
べAg層の吸収が少なく反射率に透過率が依存しているこ
とを突き止め(図8も参照)、所望波長での透過率を最
大にするためには該波長λに比例してTiO2膜の膜厚を変
えればよいことも見出した。ひとつの方法として膜厚を
25×λ/450(nm)とする方法がある。本発明の第
2の実施例ではTiO2膜の膜厚を25nmとし波長が450nmで
のAg層の透過率を最大にしている。TiO2膜は透過率を高
める光学整合層として機能しその所要膜厚はAg層の膜厚
に依らず膜厚制御が容易な点は有利である。勿論、ボン
ディング用の金属電極51a下部を除く部分のみを銀層
としても出力光を増す効果が得られることは明白であ
る。あるいはボンディング用の金属電極51aの下部近
傍を含む銀層51の厚さを増加させて金属電極51aと
銀層の接続を容易にしてもよい。
The inventors of the present invention have found that the absorption of the Ag layer is smaller than that of other metal thin film layers, and that the transmittance depends on the reflectance (see also FIG. 8). Was found that the thickness of the TiO 2 film should be changed in proportion to the wavelength λ in order to maximize the value. One method is to make the film thickness 25 × λ / 450 (nm). In the second embodiment of the present invention, the thickness of the TiO 2 film is 25 nm, and the transmittance of the Ag layer at a wavelength of 450 nm is maximized. The TiO 2 film functions as an optical matching layer for increasing the transmittance, and its required thickness is advantageous in that the thickness can be easily controlled regardless of the thickness of the Ag layer. Of course, it is obvious that the effect of increasing the output light can be obtained even if only the portion excluding the lower portion of the bonding metal electrode 51a is formed of a silver layer. Alternatively, the thickness of the silver layer 51 including the vicinity of the lower portion of the bonding metal electrode 51a may be increased to facilitate the connection between the metal electrode 51a and the silver layer.

【0038】図7は本発明の第2の実施例のGaN系LEDを
製造するために図3の工程図に工程381と工程382
とを追加すべきことを示している。工程38においてn
電極7を形成し、引き続きアニール2を実施した後、Ti
O2を蒸着しパターニングしてTiO2層52を形成し(工程
381)、該TiO2層52にボンディング用の金属電極5
1a上部の穴をパターニングして形成したのち第3回目
のアニール(アニール3)をおこなった(工程38
2)。その後形成したLEDチップをパッケージ8のダイ
・パッド8aに取り付け、ボンディングワイヤを配線し
て樹脂封じなどの処理をおこなってLED製品を完成させ
た(工程39)。
FIG. 7 shows steps 381 and 382 for manufacturing a GaN-based LED according to the second embodiment of the present invention.
And should be added. In step 38, n
After forming the electrode 7 and subsequently performing the annealing 2, Ti
O 2 is deposited and patterned to form a TiO 2 layer 52 (step 381), and a metal electrode 5 for bonding is formed on the TiO 2 layer 52.
After patterning and forming the hole at the top of 1a, the third annealing (annealing 3) was performed (step 38).
2). Thereafter, the formed LED chip was attached to the die pad 8a of the package 8, a bonding wire was wired, and processing such as resin sealing was performed to complete an LED product (step 39).

【0039】TiO2層52を用いる場合、銀層51の蒸着
時の条件が緩和され、サファイア基板2の温度が同一で
も銀の蒸着速度を高くできる。すなわちTiO2層52は光
学整合層として機能するだけでなく、銀層51の機械
的、電気的特性とを向上するための誘電体安定化層とし
ても機能している点が好ましい。代替誘電体透明薄膜と
して、SiO2、Al2O3なども効果があるがTiO2層52が最
も効果的であった。また、第1の実施例におけると同様
に、アニールはアニール1、2をおこなってもよいし、
アニール2のみ、あるいはアニール3のみとしてもよ
い。
When the TiO 2 layer 52 is used, the conditions at the time of depositing the silver layer 51 are relaxed, and the deposition rate of silver can be increased even if the temperature of the sapphire substrate 2 is the same. That is, it is preferable that the TiO 2 layer 52 not only functions as an optical matching layer but also functions as a dielectric stabilizing layer for improving mechanical and electrical characteristics of the silver layer 51. As an alternative dielectric transparent thin film, SiO 2 , Al 2 O 3 and the like are effective, but the TiO 2 layer 52 is the most effective. As in the first embodiment, annealing may be performed by annealing 1 or 2.
Only annealing 2 or only annealing 3 may be performed.

【0040】第2の実施例のLEDチップはその電圧電
流特性が図15のカーブ151とほとんど同じであり、
良好な特性が得られた。またその光出力は透明電極の透
過率に略比例したので銀層51が10nmでTiO2層52が25
nmのとき、ニッケル層の場合、ニッケル1nmと金8nmの
2層膜で図2の銀層51とTiO2層52とを置換した従来
技術によるLED(LED-P)に比べ少なくとも1.4倍以上の効
率(光強度/入力電力)を得ることができた。
The LED chip of the second embodiment has almost the same voltage-current characteristics as the curve 151 in FIG.
Good characteristics were obtained. Since the light output was substantially proportional to the transmittance of the transparent electrode, the silver layer 51 was 10 nm and the TiO 2 layer 52 was 25 nm.
When the nickel layer is a nickel layer, the silver layer 51 and the TiO 2 layer 52 of FIG. 2 are replaced by a two-layer film of nickel 1 nm and gold 8 nm at least 1.4 times or more as compared with the conventional LED (LED-P). Efficiency (light intensity / input power) could be obtained.

【0041】一方発明者等は上記銀層が良好な反射膜と
して機能するp電極を構成できることを見出し本発明の
第3の実施例を構成した。銀の光吸収が少ない点はここ
でも有利である。まず図8を参照して銀が反射率の高い
p電極を実現する金属として優れている点について説明
する。
On the other hand, the present inventors have found that the above-mentioned silver layer can constitute a p-electrode functioning as a good reflection film, and constituted a third embodiment of the present invention. The low light absorption of silver is also advantageous here. First, the point that silver is excellent as a metal for realizing a p-electrode having a high reflectance will be described with reference to FIG.

【0042】図8にはガラスに蒸着した膜厚100nmの各
種金属層の反射率の波長依存特性がプロットされてい
る。図8において、それぞれ、カーブ80は銀層、カー
ブ81はパラジウム層、カーブ82は白金層、カーブ8
3はニッケル層、カーブ84は金層、カーブ85はアル
ミニウム層、カーブ86はクロム層、カーブ87はチタ
ン層の各反射率を表している。GaN系LEDの出力光である
青から緑付近の波長において90%以上の反射率が得られ
る薄膜材料は、銀もしくはアルミニウムであることが分
った。
FIG. 8 plots the wavelength dependence of the reflectance of various metal layers having a thickness of 100 nm deposited on glass. 8, a curve 80 is a silver layer, a curve 81 is a palladium layer, a curve 82 is a platinum layer, and a curve 8 respectively.
3 represents a nickel layer, curve 84 represents a gold layer, curve 85 represents an aluminum layer, curve 86 represents a chromium layer, and curve 87 represents a titanium layer. It has been found that the thin film material that can obtain a reflectance of 90% or more at a wavelength near blue to green, which is the output light of the GaN-based LED, is silver or aluminum.

【0043】また、p電極としてオーミック接合を形成
できる金属は、銀、パラヂウム、白金、ニッケルが知ら
れている。銀以外のこれら金属の薄膜の反射率は、青か
ら緑付近の波長においていずれも65%以下であり、これ
らの金属をp電極として使用しても、従来の反射p電極
に比較して明らかな優位性を示すことはできない。一
方、金、アルミニウム、クロム、チタンなどはp電極と
してオーミック接合が形成できないことが分かってい
る。したがって、より高い反射率が得られ、p電極とし
て良好に機能する金属薄膜としては銀が最も適している
ことがわかった。
Further, silver, palladium, platinum and nickel are known as metals capable of forming an ohmic junction as a p-electrode. The reflectance of a thin film of these metals other than silver is 65% or less in all wavelengths from blue to near green, and even when these metals are used as p-electrodes, they are clear compared to conventional reflective p-electrodes. We cannot show advantage. On the other hand, it is known that gold, aluminum, chromium, titanium and the like cannot form an ohmic junction as a p-electrode. Therefore, higher reflectance was obtained, and it was found that silver was most suitable as a metal thin film that functions well as a p-electrode.

【0044】銀薄膜について、波長470nmの光に対する
反射率を膜厚を変えてプロットすると図9のとおりであ
る。膜厚の増加に伴って反射率も大きくなるが、膜厚が
50nm付近で飽和する。従来のp電極に対して顕著な優位
性を得るためには少なくとも20nm以上の膜厚が必要であ
ることがわかる。また、銀の量を50nm以上とすれば少な
い銀で十分な効果が得られる。100nm以上は反射率を得
るためには光学的には殆ど意味がない。しかし、銀に他
の金属が拡散して銀そのものの反射率が得られない恐れ
のある場合は銀の厚さを拡散する金属と量に応じてさら
に増加させるのがよい。
FIG. 9 shows a plot of the reflectance of the silver thin film with respect to light having a wavelength of 470 nm while changing the film thickness. As the film thickness increases, the reflectance also increases.
Saturates around 50 nm. It can be seen that a film thickness of at least 20 nm is necessary to obtain a remarkable advantage over the conventional p-electrode. If the amount of silver is 50 nm or more, a sufficient effect can be obtained with a small amount of silver. Above 100 nm, there is almost no optical significance for obtaining the reflectance. However, when there is a possibility that the reflectance of silver itself cannot be obtained due to the diffusion of other metal into silver, it is better to further increase the thickness of silver according to the amount of the metal to be diffused and the amount.

【0045】以上の知見と銀層がp型窒化物半導体上に
透明電極として安定に形成できる本発明の技術に基づき
本発明の発明者等は、LED素子(チップ)をパッケージ
にフリップ・ボンディングしてLEDを構成する考えに至
った。
Based on the above findings and the technology of the present invention in which a silver layer can be stably formed as a transparent electrode on a p-type nitride semiconductor, the inventors of the present invention have conducted flip bonding of an LED element (chip) to a package. Led to the idea of configuring LEDs.

【0046】図10には本発明の第3、第4の実施例の
LEDチップ100A(図10の(A))とLEDチップ10
0B(図10の(B))の断面が示されている。これ
ら、第3、第4の実施例ではサファイア基板2が活性層
4から発生する光に対し高い透過率をもつので出力光は
サファイア基板2から外に放射される。サファイア基板
2とは別の透明基板を用いてもよい。図10において図
2のLED20におけると同様の機能、性能を発揮する部
分には図2におけると同じ参照番号が付されている。パ
ッケージ8を除きLEDチップ100の組立はLED20を組
立てる場合と同様であるが、蒸着される銀層101の膜
厚が銀層51の膜厚に比較し厚くなっている。
FIG. 10 shows the third and fourth embodiments of the present invention.
LED chip 100A (FIG. 10A) and LED chip 10
0B (FIG. 10B) is shown. In these third and fourth embodiments, since the sapphire substrate 2 has a high transmittance for light generated from the active layer 4, output light is emitted from the sapphire substrate 2 to the outside. A transparent substrate different from the sapphire substrate 2 may be used. In FIG. 10, parts that exhibit the same functions and performances as those of the LED 20 in FIG. 2 are given the same reference numerals as in FIG. Except for the package 8, the assembly of the LED chip 100 is the same as that of assembling the LED 20, except that the thickness of the deposited silver layer 101 is thicker than the thickness of the silver layer 51.

【0047】第3の実施例のLEDチップ100Aはp電
極が銀層101(厚さ100nm)と層103Aのみを有
し、それら薄膜間に拡散阻止層102を有しないLEDチ
ップ20である。層103Aが銀層101の安定化層で
あり銀層101の反射率を低下させない金属や誘電体で
銀層の全体あるいは一部を覆うように構成される。まず
LEDチップ100Aが誘電体からなる層103Aを用い
る場合はその一部に穴を設け銀層へ接続される回路接続
用金属層が必要である。銀層の厚さが20nm以上で反射層
として形成する工程(図3の工程36)を除けば製造工
程は第2の実施例におけると同様に工程31から工程3
8、工程381〜工程382を経てLEDチップ100A
が形成される。
The LED chip 100A of the third embodiment is an LED chip 20 in which the p-electrode has only the silver layer 101 (thickness 100 nm) and the layer 103A, and has no diffusion blocking layer 102 between the thin films. The layer 103A is a stabilizing layer of the silver layer 101, and is configured to cover the whole or a part of the silver layer with a metal or a dielectric that does not decrease the reflectance of the silver layer 101. First
When the LED chip 100A uses the layer 103A made of a dielectric, a hole is provided in a part of the layer 103A, and a circuit connection metal layer connected to the silver layer is required. Except for the step of forming a reflective layer having a silver layer thickness of 20 nm or more (step 36 in FIG. 3), the manufacturing steps are the same as those in the second embodiment, from step 31 to step 3
8. LED chip 100A through steps 381 to 382
Is formed.

【0048】さらにLEDチップ100Aは工程382か
らは後述の図12に記載の工程391に移行して銀層上
の回路接続用金属層とn電極7上にボールボンディング
法によって金バンプ等のボンディング電極116を形成
しLEDチップ100Aが実装できる状態となる(図11
の(A))。次にLEDチップのフリップチップ・ボンデ
ィングをおこなう。まず、LEDチップ100Aをウェー
ハ上に多数形成した場合は該ウェーハ裏面をラッピング
し該ウェーハをスクライビングによって1つ1つのLED
チップ100Aに分割した(工程392)。また、図1
1の(B)に示すようにパッケージ118のダイ・パッ
ド上のリード線118a上に、インジウム系の低融点金
属から成るバンプ118bを形成した(工程393)。
最後にLEDチップ100Aとパッケージ118とを位置
合わせして、加熱・加圧してボンディング電極116と
バンプ118bとを接合し図11の(C)に示すLED11
0が得られた(工程394)。チップ保護等のため必要
に応じてLED110を樹脂封止してもよい。なお上記LED
チップ100AとLED製品の製造工程でのアニールにつ
いては第2の実施例におけると同じである。金属層10
3Aを用いる場合は後述の第4の実施例のLEDチップの
製造工程において第2層102を欠く場合と同じなの
で、ここでは述べない。また、層103Aが金属であれ
誘電体であれ銀層に対する安定化層として機能する点は
共通である。
Further, the LED chip 100A moves from the step 382 to a step 391 shown in FIG. 12 to be described later. The bonding electrode such as a gold bump is formed on the metal layer for circuit connection on the silver layer and the n-electrode 7 by a ball bonding method. Then, the LED chip 100A is ready to be mounted (FIG. 11).
(A)). Next, flip chip bonding of the LED chip is performed. First, when a large number of LED chips 100A are formed on a wafer, the back surface of the wafer is wrapped, and the wafer is scribed to each LED.
It was divided into chips 100A (step 392). FIG.
As shown in FIG. 1B, a bump 118b made of an indium-based low melting point metal was formed on the lead wire 118a on the die pad of the package 118 (step 393).
Finally, the LED chip 100A and the package 118 are aligned, heated and pressed to bond the bonding electrode 116 and the bump 118b, and the LED 11 shown in FIG.
0 was obtained (step 394). The LED 110 may be resin-sealed as needed for chip protection or the like. The above LED
Annealing in the process of manufacturing the chip 100A and the LED product is the same as in the second embodiment. Metal layer 10
The case where 3A is used is the same as the case where the second layer 102 is omitted in the LED chip manufacturing process of the fourth embodiment described later, and therefore will not be described here. Further, it is common that the layer 103A functions as a stabilizing layer for the silver layer, whether it is a metal or a dielectric.

【0049】本発明の第4の実施例のLEDチップ100
Bも図3の工程35までを経過したLED部材にさらに
図12に記載の工程を加えることで形成される。工程3
6Aにおいて銀層101銀層101を20nm以上、第4の
実施例では100nm蒸着し、工程371においてニッケル
の拡散阻止層102を厚さ300nmまで蒸着した。ただしL
ED部材のアニールはおこなわない。拡散阻止層102
は、必須ではないが、銀層101の側面をも覆いp層5
とともに該銀層101を封止するようにした。次に回路
接続用金属、ここでは金を50nm厚まで蒸着した(工程3
72)。n電極7はn層3上にチタン層(厚さ10nm)を
蒸着しさらにその上に回路接続用金属としてアルミニウ
ム層(厚さ200nm)を蒸着して形成した(工程38)。
良好なオーミック接合を得るためのアニールは前記図3
の工程でのアニール2と同様に、基板温度450℃、3
0分実施した(工程38)。
LED chip 100 according to a fourth embodiment of the present invention
B is also formed by adding the steps shown in FIG. 12 to the LED member that has passed through step 35 in FIG. Step 3
In step 6A, the silver layer 101 was deposited to a thickness of 20 nm or more, in the fourth embodiment, to a thickness of 100 nm, and in step 371, a nickel diffusion blocking layer 102 was deposited to a thickness of 300 nm. Where L
ED members are not annealed. Diffusion blocking layer 102
Is not essential, but covers the side surface of the silver layer 101 as well.
At the same time, the silver layer 101 was sealed. Next, a metal for circuit connection, here gold was deposited to a thickness of 50 nm (Step 3).
72). The n-electrode 7 was formed by evaporating a titanium layer (thickness 10 nm) on the n-layer 3 and further evaporating an aluminum layer (thickness 200 nm) as a circuit connecting metal thereon (step 38).
The annealing for obtaining a good ohmic junction is shown in FIG.
Substrate temperature 450 ° C., 3
Run for 0 minutes (step 38).

【0050】次に工程373は省略して前述の工程39
1に移行して金層103とn電極7上にボールボンディ
ング法によって金バンプ電極等のボンディング電極11
6を形成しLEDチップ100Bが実装できる状態となる
(図11の(A))。次に上記第3の実施例でLEDチッ
プ100Aについておこなったと同様に、工程392〜
工程394によりLEDチップ100Bをパッケージ11
8にフリップチップ・ボンディングする。チップ保護等
のため必要に応じてLED110を樹脂封止してもよい。
Next, step 373 is omitted, and step 39 described above is omitted.
The bonding electrode 11 such as a gold bump electrode is formed on the gold layer 103 and the n-electrode 7 by a ball bonding method.
6, and the LED chip 100B can be mounted (FIG. 11A). Next, as in the case of the LED chip 100A in the third embodiment, steps 392 to 392 are performed.
Step 394 packages the LED chip 100B into the package 11
8 is flip-chip bonded. The LED 110 may be resin-sealed as needed for chip protection or the like.

【0051】本発明の第3の実施例において銀層101
上に直接蒸着されるボンディング電極116として金層
や金バンプ電極を採用すると金の拡散により銀層110
側の反射率が劣化してしまうことがある。本発明の第4
の実施例はp電極を3層構造として上記不都合を解消し
たものである。
In the third embodiment of the present invention, the silver layer 101
When a gold layer or a gold bump electrode is employed as the bonding electrode 116 directly deposited on the silver layer 110, the silver layer 110 is diffused by gold.
Side reflectance may be degraded. Fourth Embodiment of the Present Invention
In the embodiment of the present invention, the above-mentioned disadvantage is solved by forming the p-electrode into a three-layer structure.

【0052】すなわちp電極の3層構造は第1層101
が半導体とのオーミックな接続が得られ、かつ、反射率
の高い材料、第2層102は後工程での第1層への金属
拡散を抑制し第1層の反射率の減少を押さえる材料、そ
して、第3層103はボンディングやバンプ形成を可能
にする材料が選択されるのが好ましい場合が多い。以下
に、それら条件満たすように各層の材料選択をおこなっ
た場合について図13を用いて説明する。
That is, the three-layer structure of the p-electrode is the first layer 101
Is a material that provides an ohmic connection with a semiconductor and has a high reflectance, and a material that suppresses a decrease in the reflectance of the first layer by suppressing the metal diffusion to the first layer in a later step. For the third layer 103, it is often preferable to select a material that enables bonding and bump formation. Hereinafter, the case where the material of each layer is selected so as to satisfy these conditions will be described with reference to FIG.

【0053】図13はp電極の第2層の必要性を説明す
るためp電極の反射率を測定光の波長にたいしてプロッ
トした図である。オーミック接合を得るための前述のア
ニールによりp電極の光に対する反射率の変化がわか
る。カーブ131はp電極として銀層101を蒸着した
直後のサファイア基板2側からみた反射率、カーブ13
2は拡散阻止層102として第2層のニッケル層を第1
層である銀と第3層である金層103の間に設置した三
層構造でのアニール後の反射率、カーブ133は第2層
を設置しない銀層101と金層103の二層構造でのア
ニール後の反射率である。
FIG. 13 is a diagram in which the reflectance of the p-electrode is plotted with respect to the wavelength of the measurement light in order to explain the necessity of the second layer of the p-electrode. The change in the reflectance of the p-electrode with respect to light can be seen by the above-described annealing for obtaining an ohmic junction. Curve 131 is the reflectance as viewed from the sapphire substrate 2 side immediately after the silver layer 101 was deposited as a p-electrode, and curve 13
Reference numeral 2 denotes a second nickel layer serving as a diffusion blocking layer 102 as a first nickel layer.
The reflectance after annealing in the three-layer structure provided between the silver layer as the third layer and the gold layer 103 as the third layer, and the curve 133 shows the two-layer structure of the silver layer 101 and the gold layer 103 without the second layer. Is the reflectance after annealing.

【0054】上記2層構造では、アニールによって金が
銀層101側に拡散し、顕微鏡による目視観察でも顕著
な色の変化があり、結果として反射率が減少している。
一方、第2層としてニッケルを設置した場合(カーブ1
32)については、アニール後も反射率の減少は5%程度
であり、顕微鏡による目視観察でも顕著な色の変化は認
められなかった。第2層102のニッケルが拡散防止層
として機能し、第3層103の金が第1層101である
銀層への拡散を阻止している。第4の実施例では金拡散
を重視しボンディング性をやや犠牲にした金厚みの選定
をおこなっている。
In the above two-layer structure, gold diffuses to the silver layer 101 side by annealing, and there is a remarkable color change even by visual observation with a microscope, resulting in a decrease in reflectance.
On the other hand, when nickel is provided as the second layer (curve 1
Regarding (32), even after annealing, the decrease in reflectance was about 5%, and no remarkable color change was observed by visual observation with a microscope. Nickel of the second layer 102 functions as a diffusion preventing layer, and gold of the third layer 103 prevents diffusion to the silver layer as the first layer 101. In the fourth embodiment, the gold thickness is selected while emphasizing gold diffusion and slightly sacrificing the bonding property.

【0055】次に図14、図15を用いて本発明の第4
の実施例についてさらに説明する。図14は、本発明の
第4の実施例によるLEDの出力光の発光強度141と従
来のLEDの出力光の発光強度142の入力電流に対する
変化を任意単位(au)で比較プロットしたものである。
この従来のLED(前記LED-P)のLEDチップは図1のLEDチ
ップ10と同じで、第4の実施例のチップと電極構成が
異なるがそれ以外の構成は等価であり、同一チップ面
積、同一p層面積とを有する。p層面積の約15%がボン
ディング用の金属p電極であり、フリップチップ方式実
装によりこの程度の出力光の増加は予測される。図15
は、本発明の第4の実施例によるLEDの駆動電圧151
と従来のLEDの駆動電圧152の入力電流に対する変化
を比較プロットしたものである。
Next, the fourth embodiment of the present invention will be described with reference to FIGS.
Example will be further described. FIG. 14 is a plot obtained by comparing the change in the luminous intensity 141 of the output light of the LED according to the fourth embodiment of the present invention with the luminous intensity 142 of the output light of the conventional LED with respect to the input current in arbitrary units (au). .
The LED chip of this conventional LED (the LED-P) is the same as the LED chip 10 of FIG. 1 and has a different electrode configuration from the chip of the fourth embodiment, but the other configurations are equivalent. And have the same p-layer area. About 15% of the area of the p-layer is the metal p-electrode for bonding, and it is expected that the output light will increase by this degree by flip-chip mounting. FIG.
Is the LED driving voltage 151 according to the fourth embodiment of the present invention.
7 is a plot in which the change of the drive voltage 152 of the conventional LED with respect to the input current is plotted for comparison.

【0056】図14、図15から明らかなように、本発
明の第4の実施例のLEDは従来のLEDに比較して約2倍明
るく、駆動電圧は同等か少し低いことがわかる。前記第
3層103を金層からアルミニウム層としても同様の効
果を得ることができる。また、銀層101の上に第2層
102等を設けたので銀層の安定度が増し、それがない
場合に比較し銀層101の蒸着形成時に基板温度をより
低温とし蒸着速度をより高速にできる点は有利である。
すなわち第2層101は拡散阻止層として機能するだけ
でなく、銀層101の機械的、電気的特性を向上するた
めの金属安定化層としても機能している点が好ましい。
As is clear from FIGS. 14 and 15, the LED according to the fourth embodiment of the present invention is about twice as bright as the conventional LED, and the driving voltage is equal or slightly lower. The same effect can be obtained even if the third layer 103 is changed from a gold layer to an aluminum layer. In addition, since the second layer 102 and the like are provided on the silver layer 101, the stability of the silver layer is increased. Is advantageous.
That is, the second layer 101 preferably functions not only as a diffusion blocking layer but also as a metal stabilizing layer for improving the mechanical and electrical characteristics of the silver layer 101.

【0057】また、第2層102や第3層103はそれ
自体多層薄膜であってもよいし、それら多層膜の構成が
それらの面積的広がりにわたり均一である必要もない。
第2層102を安定化層としてのみ機能させ安定化層と
して用いる場合は第2層が銀層100に拡散しないこと
が特にもとめられる。第2層102を拡散阻止層として
機能させるばあいは第2層が銀層100に拡散しないと
ともに第3層の銀層への拡散を阻止する能力が高い必要
がある。第3の実施例において第2層102を欠くばあ
い第3層103は回路接続に適するとともに銀層100
に拡散しないことが特にもとめられる。
The second layer 102 and the third layer 103 may themselves be multilayer thin films, and the configurations of the multilayer films need not be uniform over their area.
When the second layer 102 functions as only a stabilizing layer and is used as a stabilizing layer, it is particularly required that the second layer does not diffuse into the silver layer 100. When the second layer 102 functions as a diffusion blocking layer, it is necessary that the second layer does not diffuse into the silver layer 100 and has a high ability to prevent the third layer from diffusing into the silver layer. In the third embodiment, if the second layer 102 is omitted, the third layer 103 is suitable for circuit connection and the silver layer 100
It is particularly required that they do not spread to

【0058】第1層である銀層101への第2層102
や第3層103の金属の拡散は高温アニールを行ってい
るときに著しいので、第4の実施例において次のような
工程変更をおこなって、第5の実施例を得た。 (1)工程372を省略し第4の実施例では省略した工
程373に置いて回路接続用金属電極の蒸着をおこな
う。この場合工程372でおこなったよりも第3層を厚
く蒸着してボンディング性を改善できよう。このように
すると第3層103の拡散は極めて少なくなり、銀層1
01の反射率の低下が少なくなりLEDの光量すなわち
発光強度を更に多くすることができる。ただし、第2層
102の表面がが工程38のアニール2の中で酸化する
などの第3層との密着性を損なう変化を生じないように
注意しなければならない。そのような変化が生じたばあ
いは、変化した表面の除去プロセスを追加してもよい。 (2)また、上記表面の変化による密着性の悪化を軽減
するため、工程371と工程373とを実施し、工程3
72では第3層103を第4の実施例での工程371に
おけるより薄く蒸着し、工程373では追加の第3層蒸
着をおこなうようにしてもよい。
The second layer 102 on the silver layer 101 as the first layer
Since the diffusion of the metal of the third layer 103 is remarkable during the high-temperature annealing, the following steps were changed in the fourth embodiment to obtain the fifth embodiment. (1) The step 372 is omitted, and in the fourth embodiment, the step 373 is omitted, and the metal electrode for circuit connection is deposited. In this case, the third layer could be deposited thicker than in step 372 to improve bonding. In this way, the diffusion of the third layer 103 is extremely reduced, and the silver layer 1
01, the decrease in the reflectance is reduced, and the light amount of the LED, that is, the light emission intensity can be further increased. However, care must be taken so that the surface of the second layer 102 does not undergo a change such as oxidation during the annealing 2 in the step 38, which deteriorates the adhesion to the third layer. If such a change occurs, a process for removing the changed surface may be added. (2) Step 371 and step 373 are performed to reduce the deterioration of the adhesion due to the change in the surface.
At 72, the third layer 103 may be deposited thinner than in step 371 of the fourth embodiment, and at step 373, an additional third layer may be deposited.

【0059】上記第3〜第5の実施例では工程371に
おけるアニール11を行っていないが工程管理等の目的
で該アニール11をおこなって工程371までの工程を
経たLED部材の種々の測定をおこなってもよい。上記第
3〜第5の実施例ではフリップチップ構造をとるため、
従来の方法では、出力された光が反射、吸収する原因と
なっていた透明電極、ボンディング用電極、ボンディン
グワイヤなどが出力光射出方向には存在せず多くの光を
LEDチップから外に取り出せる。また、p電極の銀層1
01の反射率が高いためさらに光の取り出し効率を高め
られると同時に、LEDチップの薄膜構造が簡略化し、ダ
イ・パッドの反射率を高めるための手段も必要もないた
めLED製品の構造を簡略化でき、コストを削減できる。
In the third to fifth embodiments, the annealing 11 in the step 371 is not performed. However, the annealing 11 is performed for the purpose of process control or the like, and various measurements of the LED member after the steps up to the step 371 are performed. You may. In the third to fifth embodiments, a flip-chip structure is used.
In the conventional method, the transparent electrode, the bonding electrode, the bonding wire, etc., which caused the output light to be reflected and absorbed, do not exist in the output light emitting direction, and a large amount of light is output.
Can be taken out of the LED chip. Also, the silver layer 1 of the p-electrode
01 has high reflectivity, which further enhances the light extraction efficiency, and at the same time simplifies the LED chip thin film structure and simplifies the structure of LED products because there is no need to increase the reflectivity of die pads. And reduce costs.

【0060】さらに、前記第2の実施例のLEDチップに
おいて銀層51の厚さを20nmより厚くし、該LEDチップ
をフリップチップ・ボンディングして前記第3、第4の
実施例のLEDと同様なLED製品が本発明の第6の実施例の
LEDとして得られる。また、フリップチップ・ボンディ
ングをするためのボンディング電極とインジウム系の低
融点金属から成るバンプとはLEDチップとパッケージ間
で互いに交換することもできるし、適宜の別の金属とす
ることもできる。
Further, in the LED chip of the second embodiment, the thickness of the silver layer 51 is made larger than 20 nm, and the LED chip is flip-chip bonded to be similar to the LEDs of the third and fourth embodiments. LED product of the sixth embodiment of the present invention
Obtained as an LED. Further, the bonding electrode for flip chip bonding and the bump made of indium-based low melting point metal can be exchanged between the LED chip and the package, or can be made of another suitable metal.

【0061】以上本発明の実施例について説明したが、
本発明は実施例に限定されるものではなく、種々の変形
や追加をおこなってより多くの電子装置に応用できるも
のである。以下に本発明の実施態様のいくつかを列挙し
て本発明の多様な実施への参考に供したい。
The embodiments of the present invention have been described above.
The present invention is not limited to the embodiments, but can be applied to more electronic devices by making various modifications and additions. The following is a listing of some of the embodiments of the present invention for reference to various implementations of the invention.

【0062】(実施態様1):基板と該基板上のn型窒
化物半導体層と、n型窒化物半導体層上の窒化物半導体
からなる活性層と、活性層上のp型窒化物半導体層と、
p型窒化物半導体層上の前記活性層が発生する光を反射
させるための厚さ20nm超過の銀層と、を備えたLED部
材。
(Embodiment 1): A substrate, an n-type nitride semiconductor layer on the substrate, an active layer made of a nitride semiconductor on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer on the active layer When,
An LED member comprising: a silver layer having a thickness of more than 20 nm for reflecting light generated by the active layer on a p-type nitride semiconductor layer.

【0063】(実施態様2):前記銀層の表面に該銀層
の表面の一部分に安定化のため誘電体を設けて成る実施
態様1に記載のLED部材。 (実施態様3):前記銀層上に銀に容易には拡散せず少
なくとも一つの他の金属の銀への拡散を阻止できる金属
層を設けて成る実施態様1あるいは実施態様2に記載の
LED部材。 (実施態様4):前記金属層は前記銀層に接触する部分
がニッケル、パラジウム、プラチナのいずれかであるこ
とを特徴とする実施態様3に記載のLED部材。
(Embodiment 2): The LED member according to Embodiment 1, wherein a dielectric is provided on the surface of the silver layer for stabilizing a part of the surface of the silver layer. (Embodiment 3): The method according to embodiment 1 or 2, wherein a metal layer which does not easily diffuse into silver and prevents diffusion of at least one other metal into silver is provided on the silver layer.
LED components. (Embodiment 4): The LED member according to embodiment 3, wherein a portion of the metal layer that contacts the silver layer is any one of nickel, palladium, and platinum.

【0064】(実施態様5):前記n型窒化物半導体層
上と前記金属層あるいは前記銀層上に回路接続用金属手
段を設けて成る実施態様2〜実施態様4のいずれかに記
載のLED部材。 (実施態様6):前記回路接続用金属手段の前記金属層
から遠位の表面が金あるいはアルミニウムの部分を有す
ることを特徴とする実施態様5に記載のLED部材。 (実施態様7):前記金あるいはアルミニウムの部分が
前記金属層より薄い薄膜層であることを特徴とする実施
態様6に記載のLED部材。
(Embodiment 5): The LED according to any one of Embodiments 2 to 4, wherein a circuit connecting metal means is provided on the n-type nitride semiconductor layer and on the metal layer or the silver layer. Element. (Embodiment 6): The LED member according to embodiment 5, wherein a surface of the metal means for circuit connection distal from the metal layer has a portion of gold or aluminum. (Embodiment 7): The LED member according to embodiment 6, wherein the gold or aluminum portion is a thin film layer thinner than the metal layer.

【0065】(実施態様8):前記回路接続用金属手段
上にボンディング電極を設けたことを特徴とする実施態
様6あるいは実施態様7のいずれかに記載のLED部材。 (実施態様9):前記ボンディング電極が金バンプであ
ることを特徴とする実施態様8に記載のLED部材。 (実施態様10):前記銀層実施態様3〜実施態様9の
いずれかに記載のLED部材を複数個集積したウェーハ。
(Embodiment 8): The LED member according to any one of Embodiments 6 and 7, wherein a bonding electrode is provided on the circuit connecting metal means. (Embodiment 9): The LED member according to embodiment 8, wherein the bonding electrode is a gold bump. (Embodiment 10): A wafer on which a plurality of the LED members according to any one of Embodiments 3 to 9 are integrated.

【0066】(実施態様11):実施態様8あるいは実
施態様9に記載のLED部材をパッケージにフリップチッ
プ・ボンディングして形成したLED製品。 (実施態様12):前記ボンディング電極が金バンプで
前記パッケージのリード線上のインジューム系低融点金
属から成るバンプバンプと接続していることを特徴とす
る実施態様11に記載のLED製品。
(Embodiment 11): An LED product formed by flip-chip bonding the LED member according to Embodiment 8 or 9 to a package. (Embodiment 12): The LED product according to embodiment 11, wherein the bonding electrode is connected to a bump bump made of an indium-based low melting point metal on a lead wire of the package by a gold bump.

【0067】(実施態様13):LED部材を形成するた
めの方法であって、基板を用意する工程と、基板上にn
型窒化物半導体層を成長させる工程と、n型窒化物半導
体層上に窒化物半導体からなる活性層を成長させる工程
と、活性層上にp型窒化物半導体層を成長させる工程
と、前記基板を加熱して前記p型窒化物半導体層の活性
化をおこなう工程と、該p型窒化物半導体層上に20nm以
上の所定の厚さの銀層を設ける工程と、前記銀層に安定
化層を蒸着する工程と、を含むLED部材の製造方法。
(Embodiment 13) A method for forming an LED member, comprising the steps of: preparing a substrate;
Growing a nitride semiconductor layer, growing an active layer of a nitride semiconductor on the n-type nitride semiconductor layer, growing a p-type nitride semiconductor layer on the active layer, Heating the p-type nitride semiconductor layer to activate the p-type nitride semiconductor layer; providing a silver layer having a predetermined thickness of 20 nm or more on the p-type nitride semiconductor layer; And a method of manufacturing an LED member.

【0068】(実施態様14):前記安定化層が誘電体
であることを特徴とする成る実施態様13に記載のLED
部材の製造方法。 (実施態様15):前記安定化層が銀に容易には拡散せ
ず少なくとも一つの他の金属の銀への拡散を阻止できる
金属層である実施態様13に記載のLED部材の製造方
法。 (実施態様16):前記金属層は前記銀層に接触する部
分がニッケル、パラジウム、プラチナのいずれかである
ことを特徴とする実施態様15に記載のLED部材の製造
方法。
(Embodiment 14): The LED according to embodiment 13, wherein the stabilizing layer is a dielectric.
Manufacturing method of the member. Embodiment 15: The method of manufacturing an LED member according to embodiment 13, wherein the stabilizing layer is a metal layer that does not easily diffuse into silver and can prevent diffusion of at least one other metal into silver. (Embodiment 16) The method of manufacturing an LED member according to embodiment 15, wherein a portion of the metal layer that contacts the silver layer is one of nickel, palladium, and platinum.

【0069】(実施態様17):前記n型窒化物半導体
層上と前記金属層あるいは前記銀層上に回路接続用金属
手段を設ける工程を追加して成る実施態様15あるいは
実施態様16のいずれかに記載のLED部材の製造方法。 (実施態様18):前記回路接続用金属手段の前記金属
層から遠位の表面が金あるいはアルミニウムの部分を有
することを特徴とする実施態様17に記載のLED部材の
製造方法。 (実施態様19):前記回路接続用金属手段が前記金属
層のより薄い金あるいはアルミニウムの薄膜層であるこ
とを特徴とする実施態様18に記載のLED部材の製造方
法。
(Embodiment 17): Either of Embodiment 15 or Embodiment 16 further comprising a step of providing a circuit connecting metal means on the n-type nitride semiconductor layer and on the metal layer or the silver layer. 3. The method for manufacturing an LED member according to 1. (Embodiment 18): The method of manufacturing an LED member according to embodiment 17, wherein a surface of the metal means for circuit connection distal from the metal layer has a portion of gold or aluminum. (Embodiment 19) The method of manufacturing an LED member according to embodiment 18, wherein the metal means for circuit connection is a thin layer of gold or aluminum having a thinner metal layer.

【0070】(実施態様20):前記回路接続用金属手
段にボンディング電極を設ける工程を追加したことを特
徴とする実施態様17〜実施態様19に記載のLED部材
の製造方法。 (実施態様21):前記銀層実施態様3〜実施態様9の
いずれかに記載のLED部材をウェーハに複数個集積し該
ウェーハをラッピングしてからダイシングしてLEDチッ
プを分離する工程を含むLED製品の製造方法。 (実施態様22):前記分離されたLEDチップをフリッ
プチップ・ボンディングする工程を追加して成る実施態
様21に記載のLED製品の製造方法。
(Embodiment 20): The method for manufacturing an LED member according to any one of Embodiments 17 to 19, wherein a step of providing a bonding electrode on the circuit connecting metal means is added. (Embodiment 21): An LED comprising a step of integrating a plurality of the LED members according to any one of Embodiments 3 to 9 on a wafer, lapping the wafer, and dicing to separate LED chips. Product manufacturing method. (Embodiment 22): The method of manufacturing an LED product according to embodiment 21, further comprising a step of flip-chip bonding the separated LED chips.

【0071】(実施態様23):前記n型窒化物半導体
層上に第1の回路接続用金属手段を設けて第1のLED部
材を形成する工程と窒素雰囲気中で該第1のLED部材を
200℃以上でアニールする工程とを追加して成る実施
態様15〜実施態様16のいずれかに記載のLED部材の
製造方法。 (実施態様24):前記金属層に第2の回路接続用金属
手段を設ける工程と前記第1、第2の回路接続用金属手
段にボンディング電極を設ける工程を追加したことを特
徴とする実施態様23に記載のLED部材の製造方法。
(Embodiment 23): A step of providing a first circuit connecting metal means on the n-type nitride semiconductor layer to form a first LED member, and a step of forming the first LED member in a nitrogen atmosphere. The method for manufacturing an LED member according to any one of Embodiments 15 to 16, further comprising a step of annealing at 200 ° C. or higher. (Embodiment 24): An embodiment characterized by adding a step of providing a second circuit connection metal means on the metal layer and a step of providing a bonding electrode on the first and second circuit connection metal means. 24. The method for manufacturing an LED member according to 23.

【0072】(実施態様25):前記金属層に第3の回
路接続用金属手段を設けかつ前記n型窒化物半導体層上
に第1の回路接続用金属手段を設けて第2のLED部材を
形成する工程と窒素雰囲気中で該第2のLED部材を20
0℃以上でアニールする工程とを追加して成る実施態様
15〜実施態様16のいずれかに記載のLED部材の製造
方法。 (実施態様26):前記第3の回路接続用金属手段上に
ボンディング電極を設ける工程を追加して成る実施態様
24に記載のLED部材の製造方法。
(Embodiment 25): A third circuit connecting metal means is provided on the metal layer, and a first circuit connecting metal means is provided on the n-type nitride semiconductor layer to form a second LED member. Forming the second LED member in a nitrogen atmosphere.
The method for manufacturing an LED member according to any one of Embodiments 15 to 16, further comprising a step of annealing at 0 ° C. or higher. (Embodiment 26): The method for manufacturing an LED member according to embodiment 24, further comprising a step of providing a bonding electrode on the third circuit connection metal means.

【0073】(実施態様27):p型窒化物半導体層を
備える電子装置であって該p型窒化物半導体層に蒸着し
た厚さ20nm超過の銀層を備え、該銀層が電極として機能
するとともに短波長光の反射層として機能することを特
徴とする半導体光電子装置。 (実施態様28):前記銀層が安定化層を有することを
特徴とする実施態様27に記載の半導体光電子装置。 (実施態様29):前記安定化層が前記銀層に接し銀に
容易には拡散しない金属層と該金属層に接するボンディ
ング性のすぐれた金属層とを順次前記銀層に蒸着して蒸
着光学整合層として機能することを特徴とする実施態様
28に記載の半導体光電子装置。
(Embodiment 27): An electronic device including a p-type nitride semiconductor layer, including a silver layer having a thickness of more than 20 nm deposited on the p-type nitride semiconductor layer, and the silver layer functions as an electrode. A semiconductor optoelectronic device characterized by functioning as a reflection layer for short-wavelength light. (Embodiment 28) The semiconductor optoelectronic device according to embodiment 27, wherein the silver layer has a stabilizing layer. (Embodiment 29): A metal layer in which the stabilizing layer is in contact with the silver layer and is not easily diffused into silver, and a metal layer having excellent bonding properties in contact with the metal layer are sequentially deposited on the silver layer to form a vapor deposition optical system. 29. The semiconductor optoelectronic device according to embodiment 28, functioning as a matching layer.

【0074】[0074]

【発明の効果】本発明を実施することによって、従来の
ものに比較して明るいダイオードが得られる。また下記
の効果が得られる。 1)動作電圧の低く、連続動作に対して安定に動作するLE
Dを効率的に実現できる。 2)LEDにおいて低い動作電圧を維持したまま、光の取り
出し効率を増加できる。られる。 3)反射p電極として銀層を用いるのでLEDの構造が簡単
化され、製造プロセスが簡略化され、信頼性の向上とコ
ストの低減ができる。 4)また、これらによって、例えば、従来2つのLEDが
用いられていたような発光装置において、1つのLEDで
同等の性能を得ることができ、LEDの個数削減ができる
などため、発光装置の小型化、低コスト化が実現可能と
なる。 5)また、受光装置等のp型窒化物半導体層を備える光
電子装置であれば本発明の銀層を備え、該銀層が電極と
して機能するとともに光の、限定的ではないが特に短波
長光の、透過層あるいは反射層として良好に機能する半
導体光電子装置で広く応用できるので有益である。
According to the present invention, a brighter diode can be obtained as compared with the conventional one. Further, the following effects can be obtained. 1) LE with low operating voltage and stable operation for continuous operation
D can be realized efficiently. 2) The light extraction efficiency can be increased while maintaining a low operating voltage in the LED. Can be 3) Since the silver layer is used as the reflective p-electrode, the structure of the LED is simplified, the manufacturing process is simplified, and the reliability and the cost can be reduced. 4) Further, with these, for example, in a light emitting device in which two LEDs are conventionally used, the same performance can be obtained with one LED, and the number of LEDs can be reduced. And cost reduction can be realized. 5) In addition, any optoelectronic device including a p-type nitride semiconductor layer such as a light receiving device includes the silver layer of the present invention, and the silver layer functions as an electrode and emits light, particularly, but not limited to, short-wavelength light. This is useful because it can be widely applied to semiconductor optoelectronic devices that function well as a transmission layer or a reflection layer.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来技術によるGaN系半導体に基づいて構成し
たGaN系LEDの断面図である
FIG. 1 is a cross-sectional view of a GaN-based LED configured based on a GaN-based semiconductor according to a conventional technique.

【図2】p電極を構成する第1層金属として銀(Ag)層
21を蒸着した本発明の第1の実施例のGaN系LED20の
断面図である。
FIG. 2 is a cross-sectional view of a GaN-based LED 20 according to a first embodiment of the present invention in which a silver (Ag) layer 21 is deposited as a first layer metal forming a p-electrode.

【図3】LED20の組立プロセスを説明するための工程
図である。
FIG. 3 is a process chart for explaining an assembly process of the LED 20;

【図4】アニールの効果を確認するための実験結果を示
すグラフである。
FIG. 4 is a graph showing experimental results for confirming the effect of annealing.

【図5】本発明の第2の実施例のLED50の部分断面図
である。
FIG. 5 is a partial sectional view of an LED 50 according to a second embodiment of the present invention.

【図6】試料1、2の透過率の測定結果を示す測定光の
波長が450nmでの透過率のグラフである。
FIG. 6 is a graph showing the transmittance of Samples 1 and 2 when the wavelength of the measurement light is 450 nm showing the measurement results of the transmittance.

【図7】本発明の第2の実施例のGaN系LEDを製造するた
めに図3の工程図に工程381と工程382とを追加す
べきことを示す部分肯定図である。
FIG. 7 is a partial affirmative diagram showing that steps 381 and 382 should be added to the step diagram of FIG. 3 to manufacture the GaN-based LED of the second embodiment of the present invention.

【図8】にはガラスに蒸着した膜厚100nmの各種金属層
の反射率の波長依存特性をプロットしたグラフである。
FIG. 8 is a graph plotting the wavelength dependence of the reflectance of various metal layers having a thickness of 100 nm deposited on glass.

【図9】銀層について、波長470nmの光に対する反射率
を膜厚を変えてプロットしたグラフである。
FIG. 9 is a graph in which the reflectance of a silver layer with respect to light having a wavelength of 470 nm is plotted while changing the film thickness.

【図10】本発明の第4の実施例のLEDチップ100の
断面図である。
FIG. 10 is a sectional view of an LED chip 100 according to a fourth embodiment of the present invention.

【図11】LEDチップ100をパッケージにボンディン
グする手順を説明するための図である。
FIG. 11 is a diagram illustrating a procedure for bonding the LED chip 100 to a package.

【図12】本発明の第4の実施例のLEDチップ100B
の製造とその実装とをおこなう工程を示す工程図であ
る。
FIG. 12 shows an LED chip 100B according to a fourth embodiment of the present invention.
FIG. 4 is a process diagram showing a process of manufacturing and mounting the device.

【図13】p電極の第2層の必要性を説明するためp電
極の反射率を測定光の波長にたいしてプロットしたグラ
フである。
FIG. 13 is a graph in which the reflectance of the p-electrode is plotted against the wavelength of the measurement light to explain the necessity of the second layer of the p-electrode.

【図14】 本発明の第4の実施例によるLEDの発光強度
141と従来のLEDの発光強度142の入力電流に対す
る変化を任意単位(au)で比較プロットしたグラフであ
る。
FIG. 14 is a graph in which the change in the light emission intensity 141 of the LED according to the fourth embodiment of the present invention and the light emission intensity 142 of the conventional LED with respect to the input current is plotted in arbitrary units (au).

【図15】本発明の第4の実施例によるLEDの駆動電圧
151と従来のLEDの駆動電圧152の入力電流に対す
る変化を比較プロットしたグラフである。
FIG. 15 is a graph showing comparison plots of a change in an input current between an LED driving voltage 151 according to a fourth embodiment of the present invention and a conventional LED driving voltage 152.

【符号の説明】[Explanation of symbols]

1 GaN系LED 2 サファイア基板 3 n層 4 活性層4、 5 p層5、 6 透明p電極6 6a ボンディング用p電極 7 n電極 8 パッケージ 8a ダイ・パッド 10 従来技術のGaN系LEDチップ 20 本発明の第1の実施例のGaN系LED 21 銀(Ag)層 21a ボンディング用の電極金属層 100A、100B LEDチップ 101 銀層(第1層) 102 拡散阻止層(第2層) 103 回路接続用金属層(第3層) 103A 回路接続用金属層 110 LED 116 ボンディング電極 118 パッケージ 118a リード線 118b 低融点金属から成るバンプ REFERENCE SIGNS LIST 1 GaN-based LED 2 sapphire substrate 3 n-layer 4 active layer 4, 5 p-layer 5, 6 transparent p-electrode 6 6 a bonding p-electrode 7 n-electrode 8 package 8 a die pad 10 conventional GaN-based LED chip 20 present invention GaN-based LED 21 of the first embodiment 21 Silver (Ag) layer 21a Electrode metal layer for bonding 100A, 100B LED chip 101 Silver layer (first layer) 102 Diffusion blocking layer (second layer) 103 Metal for circuit connection Layer (third layer) 103A Metal layer for circuit connection 110 LED 116 Bonding electrode 118 Package 118a Lead wire 118b Bump made of low melting point metal

───────────────────────────────────────────────────── フロントページの続き (72)発明者 渡辺 智 神奈川県川崎市高津区坂戸3丁目2番2号 ヒューレット・パッカードラボラトリー ズジャパンインク内 (72)発明者 金子 和 神奈川県川崎市高津区坂戸3丁目2番2号 ヒューレット・パッカードラボラトリー ズジャパンインク内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Satoshi Watanabe 3-2-2, Sakado, Takatsu-ku, Kawasaki-shi, Kanagawa Prefecture Hewlett-Packard Laboratories Japan Inc. Chome No.2-2 Hewlett-Packard Laboratories Japan Inc.

Claims (29)

【特許請求の範囲】[Claims] 【請求項1】基板と該基板上のn型窒化物半導体層と、 n型窒化物半導体層上の窒化物半導体からなる活性層
と、 活性層上のp型窒化物半導体層と、 p型窒化物半導体層上の前記活性層が発生する光を反射
させるための厚さ20nm超過の銀層と、 を備えたLED部材。
A substrate, an n-type nitride semiconductor layer on the substrate, an active layer made of a nitride semiconductor on the n-type nitride semiconductor layer, a p-type nitride semiconductor layer on the active layer, And a silver layer having a thickness of more than 20 nm for reflecting light generated by the active layer on the nitride semiconductor layer.
【請求項2】前記銀層の表面に該銀層の表面の一部分に
安定化のため誘電体を設けて成る請求項1に記載のLED
部材。
2. The LED according to claim 1, wherein a dielectric is provided on the surface of the silver layer for stabilizing a part of the surface of the silver layer.
Element.
【請求項3】前記銀層上に銀に容易には拡散せず少なく
とも一つの他の金属の銀への拡散を阻止できる金属層を
設けて成る請求項1あるいは請求項2に記載のLED部
材。
3. The LED member according to claim 1, further comprising a metal layer provided on the silver layer, the metal layer not easily diffusing into silver but preventing diffusion of at least one other metal into silver. .
【請求項4】 前記金属層は前記銀層に接触する部分が
ニッケル、パラジウム、プラチナのいずれかであること
を特徴とする請求項3に記載のLED部材。
4. The LED member according to claim 3, wherein a portion of the metal layer that contacts the silver layer is one of nickel, palladium, and platinum.
【請求項5】前記n型窒化物半導体層上と前記金属層あ
るいは前記銀層上に回路接続用金属手段を設けて成る請
求項2〜請求項4のいずれかに記載のLED部材。
5. The LED member according to claim 2, wherein a metal means for circuit connection is provided on the n-type nitride semiconductor layer and on the metal layer or the silver layer.
【請求項6】前記回路接続用金属手段の前記金属層から
遠位の表面が金あるいはアルミニウムの部分を有するこ
とを特徴とする請求項5に記載のLED部材。
6. The LED member according to claim 5, wherein a surface of the metal means for connecting a circuit, which is distal from the metal layer, has a portion of gold or aluminum.
【請求項7】前記金あるいはアルミニウムの部分が前記
金属層より薄い薄膜層であることを特徴とする請求項6
に記載のLED部材。
7. The method according to claim 6, wherein said gold or aluminum portion is a thin film layer thinner than said metal layer.
LED member according to the above.
【請求項8】前記回路接続用金属手段上にボンディング
電極を設けたことを特徴とする請求項6あるいは請求項
7のいずれかに記載のLED部材。
8. The LED member according to claim 6, wherein a bonding electrode is provided on the circuit connecting metal means.
【請求項9】前記ボンディング電極が金バンプであるこ
とを特徴とする請求項8に記載のLED部材。
9. The LED member according to claim 8, wherein said bonding electrode is a gold bump.
【請求項10】前記銀層請求項3〜請求項9のいずれか
に記載のLED部材を複数個集積したウェーハ。
10. A wafer on which a plurality of the LED members according to claim 3 are integrated.
【請求項11】請求項8あるいは請求項9に記載のLED
部材をパッケージにフリップチップ・ボンディングして
形成したLED製品。
11. An LED according to claim 8 or claim 9.
An LED product formed by flip chip bonding components to a package.
【請求項12】前記ボンディング電極が金バンプで前記
パッケージのリード線上のインジューム系低融点金属か
ら成るバンプバンプと接続していることを特徴とする請
求項11に記載のLED製品。
12. The LED product according to claim 11, wherein said bonding electrode is connected to a bump bump made of an indium-based low melting point metal on a lead wire of said package by a gold bump.
【請求項13】LED部材を形成するための方法であっ
て、 基板を用意する工程と、 基板上にn型窒化物半導体層を成長させる工程と、 n型窒化物半導体層上に窒化物半導体からなる活性層を
成長させる工程と、 活性層上にp型窒化物半導体層を成長させる工程と、 前記基板を加熱して前記p型窒化物半導体層の活性化を
おこなう工程と、 該p型窒化物半導体層上に20nm以上の所定の厚さの銀層
を設ける工程と、 前記銀層に安定化層を蒸着する工程と、を含むLED部材
の製造方法。
13. A method for forming an LED member, comprising: providing a substrate; growing an n-type nitride semiconductor layer on the substrate; and forming a nitride semiconductor on the n-type nitride semiconductor layer. A step of growing an active layer consisting of: a step of growing a p-type nitride semiconductor layer on the active layer; a step of heating the substrate to activate the p-type nitride semiconductor layer; A method for manufacturing an LED member, comprising: providing a silver layer having a predetermined thickness of 20 nm or more on a nitride semiconductor layer; and depositing a stabilizing layer on the silver layer.
【請求項14】前記安定化層が誘電体であることを特徴
とする成る請求項13に記載のLED部材の製造方法。
14. The method according to claim 13, wherein the stabilizing layer is a dielectric.
【請求項15】前記安定化層が銀に容易には拡散せず少
なくとも一つの他の金属の銀への拡散を阻止できる金属
層である請求項13に記載のLED部材の製造方法。
15. The method for manufacturing an LED member according to claim 13, wherein the stabilizing layer is a metal layer which does not easily diffuse into silver and can prevent diffusion of at least one other metal into silver.
【請求項16】 前記金属層は前記銀層に接触する部分
がニッケル、パラジウム、プラチナのいずれかであるこ
とを特徴とする請求項15に記載のLED部材の製造方
法。
16. The method according to claim 15, wherein a portion of the metal layer that contacts the silver layer is one of nickel, palladium, and platinum.
【請求項17】前記n型窒化物半導体層上と前記金属層
あるいは前記銀層上に回路接続用金属手段を設ける工程
を追加して成る請求項15あるいは請求項16のいずれ
かに記載のLED部材の製造方法。
17. The LED according to claim 15, further comprising a step of providing a circuit connecting metal means on the n-type nitride semiconductor layer and on the metal layer or the silver layer. Manufacturing method of the member.
【請求項18】前記回路接続用金属手段の前記金属層か
ら遠位の表面が金あるいはアルミニウムの部分を有する
ことを特徴とする請求項17に記載のLED部材の製造方
法。
18. The method according to claim 17, wherein a surface of the metal means for connecting a circuit, which is distal to the metal layer, has a portion of gold or aluminum.
【請求項19】前記回路接続用金属手段が前記金属層の
より薄い金あるいはアルミニウムの薄膜層であることを
特徴とする請求項18に記載のLED部材の製造方法。
19. The method for manufacturing an LED member according to claim 18, wherein said metal means for circuit connection is a thin layer of gold or aluminum thinner than said metal layer.
【請求項20】前記回路接続用金属手段にボンディング
電極を設ける工程を追加したことを特徴とする請求項1
7〜請求項19に記載のLED部材の製造方法。
20. The method according to claim 1, further comprising the step of providing a bonding electrode on said metal means for circuit connection.
The method for manufacturing an LED member according to any one of claims 7 to 19.
【請求項21】前記銀層請求項3〜請求項9のいずれか
に記載のLED部材をウェーハに複数個集積し該ウェーハ
をラッピングしてからダイシングしてLEDチップを分離
する工程を含むLED製品の製造方法。
21. An LED product comprising a step of integrating a plurality of the LED members according to claim 3 on a wafer, lapping the wafer, and dicing to separate LED chips. Manufacturing method.
【請求項22】前記分離されたLEDチップをフリップチ
ップ・ボンディングする工程を追加して成る請求項21
に記載のLED製品の製造方法。
22. The method according to claim 21, further comprising a step of flip-chip bonding the separated LED chips.
Manufacturing method of LED product described in.
【請求項23】前記n型窒化物半導体層上に第1の回路
接続用金属手段を設けて第1のLED部材を形成する工程
と窒素雰囲気中で該第1のLED部材を200℃以上でア
ニールする工程とを追加して成る請求項15〜請求項1
6のいずれかに記載のLED部材の製造方法。
23. A step of providing a first circuit connecting metal means on the n-type nitride semiconductor layer to form a first LED member, and forming the first LED member at 200 ° C. or more in a nitrogen atmosphere. 2. The method according to claim 1, further comprising an annealing step.
7. The method for manufacturing an LED member according to any one of 6.
【請求項24】前記金属層に第2の回路接続用金属手段
を設ける工程と前記第1、第2の回路接続用金属手段に
ボンディング電極を設ける工程を追加したことを特徴と
する請求項23に記載のLED部材の製造方法。
24. The method according to claim 23, further comprising the step of providing a second circuit connecting metal means on the metal layer and the step of providing a bonding electrode on the first and second circuit connecting metal means. 3. The method for manufacturing an LED member according to 1.
【請求項25】前記金属層に第3の回路接続用金属手段
を設けかつ前記n型窒化物半導体層上に第1の回路接続
用金属手段を設けて第2のLED部材を形成する工程と窒
素雰囲気中で該第2のLED部材を200℃以上でアニー
ルする工程とを追加して成る請求項15〜請求項16の
いずれかに記載のLED部材の製造方法。
25. A step of providing a third circuit connecting metal means on the metal layer and providing a first circuit connecting metal means on the n-type nitride semiconductor layer to form a second LED member. 17. The method of manufacturing an LED member according to claim 15, further comprising a step of annealing the second LED member at 200 ° C. or more in a nitrogen atmosphere.
【請求項26】前記第3の回路接続用金属手段上にボン
ディング電極を設ける工程を追加して成る請求項24に
記載のLED部材の製造方法。
26. The method of manufacturing an LED member according to claim 24, further comprising a step of providing a bonding electrode on said third circuit connection metal means.
【請求項27】p型窒化物半導体層を備える電子装置で
あって該p型窒化物半導体層に蒸着した厚さ20nm超過の
銀層を備え、該銀層が電極として機能するとともに短波
長光の反射層として機能することを特徴とする半導体光
電子装置。
27. An electronic device comprising a p-type nitride semiconductor layer, comprising a silver layer having a thickness of more than 20 nm deposited on the p-type nitride semiconductor layer, wherein the silver layer functions as an electrode and has a short wavelength light. A semiconductor optoelectronic device characterized by functioning as a reflective layer.
【請求項28】前記銀層が安定化層を有することを特徴
とする請求項27に記載の半導体光電子装置。
28. The semiconductor optoelectronic device according to claim 27, wherein said silver layer has a stabilizing layer.
【請求項29】前記安定化層が前記銀層に接し銀に容易
には拡散しない金属層と該金属層に接するボンディング
性のすぐれた金属層とを順次前記銀層に蒸着して蒸着光
学整合層として機能することを特徴とする請求項28に
記載の半導体光電子装置。
29. A metal layer in which the stabilizing layer is in contact with the silver layer and is not easily diffused into silver, and a metal layer having good bonding properties in contact with the metal layer are sequentially deposited on the silver layer, and vapor deposition optical matching is performed. 29. The semiconductor optoelectronic device according to claim 28, which functions as a layer.
JP34558497A 1997-12-15 1997-12-15 Nitride semiconductor light-emitting device having reflective p-electrode, method for manufacturing the same, and semiconductor optoelectronic device Expired - Lifetime JP4118370B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP34558497A JP4118370B2 (en) 1997-12-15 1997-12-15 Nitride semiconductor light-emitting device having reflective p-electrode, method for manufacturing the same, and semiconductor optoelectronic device
DE69839300T DE69839300T2 (en) 1997-12-15 1998-12-15 Light-emitting device
US09/212,150 US6194743B1 (en) 1997-12-15 1998-12-15 Nitride semiconductor light emitting device having a silver p-contact
EP08001025A EP1928034A3 (en) 1997-12-15 1998-12-15 Light emitting device
EP98310251A EP0926744B8 (en) 1997-12-15 1998-12-15 Light emitting device
US09/764,024 US6900472B2 (en) 1997-12-15 2001-01-16 Semiconductor light emitting device having a silver p-contact
US11/104,310 US7262436B2 (en) 1997-12-15 2005-04-11 III-nitride semiconductor light emitting device having a silver p-contact

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