TWI310839B - Ic tester - Google Patents

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Publication number
TWI310839B
TWI310839B TW095142055A TW95142055A TWI310839B TW I310839 B TWI310839 B TW I310839B TW 095142055 A TW095142055 A TW 095142055A TW 95142055 A TW95142055 A TW 95142055A TW I310839 B TWI310839 B TW I310839B
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TW
Taiwan
Prior art keywords
voltage
offset
converter
measurement
integrated circuit
Prior art date
Application number
TW095142055A
Other languages
Chinese (zh)
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TW200718958A (en
Inventor
Hideki Naganuma
Original Assignee
Yokogawa Electric Corp
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Publication of TW200718958A publication Critical patent/TW200718958A/en
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Publication of TWI310839B publication Critical patent/TWI310839B/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167Testing of combined analog and digital circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924Voltage or current aspects, e.g. driver, receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters

Description

1310839 九、發明說明: 【發明所屬之技術領域】 行測ίϊ:2ϊ於:例如液晶驅動裝置之積體電路進 仍可正確地進^定的|=^=試對象供應或抽取電流, 【先前技術】 液晶2;ί動出多階段(多階層)賴,以驅動 明之。 於戚公報4,以下參照圖1說 為液置受; DeviceUnderfet)1 輸出因應DUT1之多階段電階段糕。產生部2 DUT1的每支輸出接腳,用以&入。偏移減算器3裝設於 之多階段電壓與電壓產生部2別生部2的輸出,並將DUT1 後,再輪出之。門們 二 弘堅二者間的電壓差加以放大 將偏移減偏移減算器3並列而裝置。A/D轉換哭5 將偏移減^ 3或開關4之輸出加以輸入。 縣口。 器5之ί S t ^之^ 5=於DUT1之輸出在A/D轉換 之信號產生部所輪入的切換為[〇N]。而雨1依未圖示 4,輸入到A/D轉換哭/: 以輸出階段電壓;再經由開關 位資料,未圖示的計^ 將所輸人的電壓轉換成數 好。 邛即依遠數位資料,以判斷〇1711是否良 關4切換為[OFF] 器5之輸入範圍外時’將開 圖示之信號產生部24將輸出偏移電壓。而依未 算器3從DUT1的輪=將偏二3 ’以輸出階段電壓。偏移減 5。A/D轉換器5將所!^入堅減去之後,輸出到A/D轉換器 所輪入的琶壓轉換成數位資料,未圖示的計算 1310839 部即=該難資料與偏移電壓值,關❹而 2而,如前述之裝置存在有以下的問題點。 ^ 。 若未_當之偏以以輪 值必須於^程式中=器5的輸人範圍之外。並且,偏移電壓 【發明内容】 於不t明所欲解決之課題,在於實現—種積體電路、m。。 2_測試程式而設定偏移電壓,即可供應,用 而月b夠抑制超過範圍的情形。 ’、心田的偏f夕電壓, 【實施方式】 以下利用圖式詳細說明本發明。 (實施例1) 同部= 構成圖。在此,與圖!相1310839 IX. Description of the invention: [Technical field of invention] Measure: ϊ ϊ ϊ ϊ ϊ ϊ ϊ ϊ ϊ ϊ ϊ ϊ 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 例如 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶 液晶Technology] LCD 2; ί out of multiple stages (multi-level) Lai to drive the Ming. In the 戚 戚 4 , , , , 戚 戚 戚 Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Device Each output pin of the generating unit 2 DUT1 is used for & The offset reducer 3 is mounted on the output of the multi-stage voltage and voltage generating unit 2, and the DUT1 is turned on. The voltage difference between the two gates is magnified and the offset subtraction offset reducer 3 is arranged in parallel. A/D conversion crying 5 Input the offset minus 3 or the output of switch 4. County mouth. The output of the DUT1 is switched to [〇N] by the signal generated by the A/D conversion signal generation unit. The rain 1 is not shown in the figure 4, input to the A/D conversion crying /: to output the phase voltage; and then through the switch bit data, the unillustrated ^ converts the voltage of the input person into a good number.邛 依 依 依 依 依 依 依 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 On the other hand, the wheel 3 from DUT1 will be biased by two 3' to output the phase voltage. The offset is reduced by 5. After the A/D converter 5 subtracts the input, the output voltage outputted to the A/D converter is converted into digital data, and the calculation of 1310839 which is not shown is the difficult data and the offset voltage. The value, in relation to 2, has the following problems as described above. ^. If it is not _, the deviation must be outside the range of the input of the program. Further, the offset voltage [Summary of the Invention] The object to be solved is to realize an integrated circuit and m. . 2_ Test program and set the offset voltage, it can be supplied, and the monthly b can be suppressed to exceed the range. The present invention is described in detail below with reference to the drawings. (Embodiment 1) Same part = composition diagram. Here, with the map!

轉換器ΐ加^比幸 6 =UT1的每支接腳之輪出與A/D 壓,再將,轉換器5 產生部2之偏移電 擴大測定範圍。由於:大a/d轉換器5的輸入範圍,並 定精度降低。去換益5的輸出位元數不變’以致於測 以輸出階段電歷;經由示=信號產生部所輪入的輸入模式, 5將所輸入的_轉換:H入到A/D轉換器' 5。A/D轉換器 良好與否之4 判斷DUT1是錢好。至於 内的判斷或接腳間之變__^輸出是否在希望之期望值範圍 又,必須進行高精度之測定時,將開關4切換為网,縮小 l3l〇839 ^轉換器5的輪入範圍, 之信號產生部所輸 未圖示 將该DUT1之輸出加以粗略 、= 出階段電壓。電壓測定部6 依電廢測定部6之測定結果出到控制部7。控制部7 «產生部2輸出偏移賴 ;偏移予電驗生部2。電 電屢減去之後,輪出到A/D 3從DUT1的輸出將偏移 電麼轉換成數位資料。控 A/D轉換器5將所輸入的 求出DUT1的輸出,以判斷〇〇曰θ 數位貧料與偏移電壓值以 如前述’電塵測定部6 ^否良好。 ίίΪ^定。由於控制部7依測定範圍進 j產生。卩2 ’因此不須_試程式以—、=而W偏移電壓予電 的偏移電覆,而能夠抑制超過範移琶壓,即可供應適當 又,由於可縮小A/j)轉換哭^ ^ 是精度低的A/D轉換器5亦可^ ^的測定範圍,因此即使 因此= 段趨穩時間。 並使電m生部2輪出—偏^ ’用電壓測定部6測定電壓, 進行偏移電壓的設定。 i。亦即在不影響測試時間下, (實施例2) 产上,3 =示第2實施例的構成圖。在此,盘H 2 3 私上问—符號,並省略h兒明。 仕此與圖2相同部份亦 _=^^與多工器22取代圖2所示之電 準電壓源所形成,壓源部a由多數個i 基準電Μ源部21之相異的鱗土电々 V3。多卫器22選擇 輸出到偏移減算器3。農^ t〜V3 ’以作為偏移電壓而 為糕測定部,以將61以取代電_定部6,成 VL(V3>VH>V2>VL>V1)八二支f腳之輸出與比較電壓VH、 , 6] 7 ❹&22’以指示偏 1310839 移電愿二更輸入A/D轉換器5的輪出。 如前述之裝置的動作與圖2所示 其相異點。兩比較器6】對於〇 ^置約略相同,以下說明 塵V;[〜V3之電顧園内,進行的:出是否在用以選擇基準電 器61之比較電壓VH、VL ㈠即’DUT1的輪出在比較 選擇基準電壓源部21之基。壓1空制部71使多工器22 VH為大之時,控制部71使 哭’ T】的輸出較比較電壓 ^出較比較電壓VL為小之時,^ 电壓VI。之後,多工器 22再將偏 =71使夕工器22選擇基準 此不Ϊ此例中,由於偏移電壓係依據偏移減算器3。 標上符號丁 構成圖。在此,與圖2相同部份亦 電_^到:移5轉^取代電壓產生部2 ’將偏移 設置,並於寬廣之G鬥轉換器62則取代電壓測定部6而 62之測定鈐 、,卩7而叹置,將A/D轉換器The converter is added to the 6/UT1 pinout of each pin and the A/D voltage, and the offset of the converter 5 generating section 2 is further expanded. Due to the input range of the large a/d converter 5, the accuracy is lowered. The number of output bits of the converter 5 is unchanged 'so that the output stage is recorded; the input mode is rotated by the indication signal generation section, 5 the input _ conversion: H is input to the A/D converter ' 5. A/D converter Good or bad 4 Judging DUT1 is good money. As for the internal judgment or the change between the pins __^ whether the output is in the desired range of expectations, and the high-precision measurement must be performed, the switch 4 is switched to the net, and the round-in range of the converter 5 is reduced by l3l〇839^, The output of the signal generating unit is not shown, and the output of the DUT 1 is roughly and = the phase voltage is output. The voltage measuring unit 6 outputs the measurement result to the control unit 7 based on the measurement result of the electric waste measuring unit 6. The control unit 7 «the generation unit 2 outputs an offset lag; the offset is supplied to the electric verification unit 2. After the electric power is repeatedly subtracted, it is turned to the A/D 3. The output of the DUT1 is converted into digital data by the offset. The A/D converter 5 determines the input of the input DUT1 to determine whether the 〇〇曰θ digital lean and offset voltage values are as good as the above-mentioned 'dust dust measuring unit 6'. ίίΪ^定. Since the control unit 7 is generated in accordance with the measurement range.卩 2 ' Therefore, it is not necessary to use _ test program to -, = and W offset voltage to the electric offset of the electric cover, and to suppress the excess of the range shift pressure, can be supplied properly, because of the reduction of A / j) conversion cry ^ ^ is the measurement range of the A/D converter 5 with low precision, so even if the = segment is stable. The voltage measurement unit 6 measures the voltage and sets the offset voltage. i. That is, without affecting the test time, (Example 2) production, 3 = the configuration diagram of the second embodiment. Here, the disk H 2 3 privately asks for a symbol, and omits it. The same part as in FIG. 2 is also formed by the multiplexer 22 replacing the quasi-voltage source shown in FIG. 2, and the voltage source part a is different from the plurality of i-reference e-source parts 21. Earth electricity 々 V3. The multi-guard 22 selects the output to the offset reducer 3. The agricultural ^ t ~ V3 ' is the cake measuring unit as the offset voltage, and 61 is substituted for the electric_fixing portion 6, and the output and comparison of the VL (V3 > VH > V2 > VL > V1) The voltages VH, , 6] 7 ❹ & 22' are indicated by the bias 1310839, and the input is further input to the A/D converter 5. The operation of the device as described above is different from that shown in Fig. 2. The two comparators 6 are approximately the same for the ,^, and the following description of the dust V; [~V3 in the garden, the following: whether the comparison voltage VH, VL (1) for selecting the reference device 61 is the round trip of the 'DUT1 The basis of the selection reference voltage source unit 21 is compared. When the pressure 1 empty portion 71 makes the multiplexer 22 VH large, the control unit 71 causes the output of the crying 'T' to be smaller than the comparison voltage VL to be the voltage VI. Thereafter, the multiplexer 22 sets the bias = 71 to cause the circumstance 22 to select the reference. This is not the case, since the offset voltage is based on the offset reducer 3. Mark the symbol to form a diagram. Here, in the same manner as in FIG. 2, the voltage is generated by shifting 5 turns, and the voltage generating unit 2' is set to offset, and the wide G-compressor 62 is replaced by the voltage measuring unit 6 and 62. , 卩7 and sigh, will A / D converter

轉換^ 5 ^輸二以=定D/A轉換器23的偏移電壓,也將A/D 換器23⑴’由於僅是將電壓產生部2改為D/A轉 6" 同之;份;4貝施例的構成圖。在此,與圖2所示農置相 於圖if 符號,並省略其說明。 73係取^拎L與圖2相異地未裝有電壓測定部6 ;又,控制部 入_轉L ; 2設置’以控制開關4及A/D轉換器5 ’並輸 ^的輪出;於此同時,也設定電壓產生部2的偏移 1310839 電麗。 所示Si裝置中’ Γ須進行高精度之測定時的動作與圖2 控制部ϋ 1,料略纟賴。祕賴妨純紅測定時, 」^ 73將開關4切換為[〇Ν],並擴大Α : 定顧。之彳[翻依未圖示 定予電^生=將,出= 制部73。控制部73將偏移電壓設 小A/D轉換器5之 換為[OFF],並縮 出偏移電壓.低Pi、## q ~ nT;T 疋乾圍。電壓產生部2輸 輪出到异的輪出將偏移電麗減去之後, 賁料輪出到控制部73。 將所輪人的電壓轉換隸位 ^再度將開關4切換為_,並擴===情形時,控制 A/D轉換器5、經由開關4測定DUT11 I換裔5之輸入範圍; ^。控制部73將偏移電壓設定予= 產出^將其輸出到控制 73將開關4切換為[〇FF],並縮 生邻2。此知,控制部 ,生部2輪出偏移電壓;偏移減算哭圍。電 電墨減去之後,輸出到A/D轉換的輸出將偏移 電壓轉換成數位資料,以輸出顺。Af轉換^將所輸入的 =控制部73再藉由偏移減去而^之^二2進巧前述之動 判斷DUT1是否良好。 貝料與偏移電壓值,以 與此例中’由於A/D轉換界 ^多電屢,因此不須裝置電壓測定部。、n^測定,以設定偏 成。 亦即,能夠以低廉的價袼構 行電ίί出ίΠ並不限定於此;關於咖之例子,雖接-、隹 仃电屋輸出之液晶驅動裝置,但 以夕汁雖&不進 有機EL(Electr〇nic Lumine_t ^用進=階段電流輸出之 置於Dum靖纽,轉輸 °叫’將ι/ν轉換器設 卞掏出电流轉換成電壓。 1310839 ^ 但若 但亦可由電壓測定部6 壓設定予電壓產生部2, ^吏控制部7取得Dlm 移=予,產生部2。此時, 定結果輪出到控制部7。别 电整測疋部6當然必須將測 以:之數量增加時,裝置多=SP,= J3' f選擇D如的接腳之掃描器,而,亦可採用用 A/D轉換器5、電壓測定部6,以進行測—為私減异器3、開關4、 又,所提示的構成雖係以控制部丁^。 f否之判斷’但亦可藉由其他計算° '〜^進行DUT1良好 的設定。而在採用數位電壓產生部之 後,用數位比較器將其數值和預期值二者加上偏移電藥復 【圖式簡單說明】 圖1係顯示習用之積體電路測試 圖2係顯示本發明之第1實施例的。 圖3係顯示本發明之第2實施例的】2。 【主要元件符號說明】 圖4係顯示本發明之第3實施 圖5係顯示本發明之第4實關 g。 1310839 1〜受測試對象 2〜電壓產生部 3〜偏移減算器 4〜開關 5〜A/D轉換器 6〜電壓測定部 7,71,72,73〜控制部 21〜基準電壓源部 22〜多工器 23〜D/A轉換器 61〜比較器 62〜A/D轉換器 VH,VL〜比較電壓 V1,V2,V3〜基準電壓Converting ^ 5 ^ input two to = the offset voltage of the D / A converter 23, also the A / D converter 23 (1) ' because only the voltage generating part 2 is changed to D / A to 6 "same; 4 composition diagram of the example. Here, the illustration shown in Fig. 2 corresponds to the figure of the figure, and the description thereof is omitted. The 73 series is different from that of Fig. 2, and the voltage measuring unit 6 is not installed; in addition, the control unit is turned into L; 2 is set to 'control the switch 4 and the A/D converter 5' and the rounding of the input; At the same time, the offset 1310839 of the voltage generating unit 2 is also set. In the Si device shown, the operation in the case where the measurement is not required to be performed with high precision is slightly inferior to that in the control unit of Fig. 2. When you want to measure pure red, "^ 73 switches switch 4 to [〇Ν], and expands Α :. After that, the refurbishment is not shown. The control unit 73 changes the offset voltage setting A/D converter 5 to [OFF], and reduces the offset voltage. Low Pi, ## q ~ nT; T 疋 dry circumference. After the voltage generating portion 2 outputs the wheel to the different wheel, the offset lamp is subtracted, and the pick-up wheel is sent to the control portion 73. Converting the voltage of the person to the position ^ Switching the switch 4 to _ again, and expanding the === situation, controlling the A/D converter 5, and measuring the input range of the DUT11 I by the switch 4; ^. The control section 73 sets the offset voltage to = output ^ to output it to the control 73 to switch the switch 4 to [〇FF], and to attenuate the neighbor 2. Therefore, the control unit and the birth unit 2 rotate the offset voltage; the offset subtracts the crying circumference. After the electric ink is subtracted, the output to the A/D conversion converts the offset voltage into digital data to output the output. The Af conversion ^ returns the input control unit 73 by offset subtraction and determines whether the DUT 1 is good. The material and the offset voltage value are in the same example as in the example of the A/D conversion boundary, so the device voltage measuring unit is not required. , n ^ measurement, to set the bias. That is to say, it is not limited to this, and it is not limited to this. For the example of coffee, although the liquid crystal driving device of the electric house output is connected to the electric house, it is not organic. EL (Electr〇nic Lumine_t ^ used in the stage = current output is placed in Dum Jing New, transfer ° called 'I/O converter set current to convert into voltage. 1310839 ^ But if it can also be by the voltage measurement department 6 The voltage is set to the voltage generating unit 2, and the control unit 7 obtains the Dlm shift=proximity generating unit 2. At this time, the result is rounded up to the control unit 7. The electric measuring unit 6 must of course be measured. When the number is increased, the device is more than SP, = J3' f selects the scanner of the pin of D, and the A/D converter 5 and the voltage measuring unit 6 can also be used for the measurement - for the private subtractor 3. Switch 4, and the configuration of the prompt is determined by the control unit. However, the judgment of D is not performed. However, the DUT1 can be set well by other calculations, and after the digital voltage generating unit is used, Using a digital comparator to add both the value and the expected value to the offset electro-drug complex [simplified illustration] Figure 1 shows the Xi 2 is a first embodiment of the present invention. Fig. 3 is a view showing a second embodiment of the present invention. [Main element symbol description] Fig. 4 is a view showing a third embodiment of the present invention. The fifth system shows the fourth real-time g of the present invention. 1310839 1 to the test subject 2 to the voltage generating unit 3 to the offset reducer 4 to the switch 5 to the A/D converter 6 to the voltage measuring unit 7, 71, 72, 73 to control unit 21 to reference voltage source unit 22 to multiplexer 23 to D/A converter 61 to comparator 62 to A/D converter VH, VL to comparison voltage V1, V2, V3 to reference voltage

Claims (1)

1310839 十、申請專利範圍: 1·一種積體電路測試器,係 其特徵為具備、象之輪出減去偏 电ι測疋口ρ,用以测定該受測 偏移電 移電ί壓產生部,用以依據該電壓:‘⑵丄果 象之輪出減去偏移電 2.-種積體電路測試器,係將4 ‘果’產生該偏 w 王土成掏抄霉题· 生;爾該電壓測定‘,定結果, 圍内,對於受測試對象之輪“去⑵所以 種積體電路測試器,係將受測試 电 ^而藉由A/D轉換器於狹小之測定範 之輪出減去偏移 具備: ^進行測定;其特 ι,Μ進行測定;其特徵為具備〆、4對象之輪 電壓測定部,肋測定該受測 電壓產生部,用以產生該偏移電象之輪出; 把糾如.《........ > 徵為 φ e、 w何徵肩 出 電壓測定部,於寬廣之測定範圍内 ' 、 崎對象之輪 電壓產生部,產生該偏移電壓; 控制部’依據該電壓測定部的剛定社 之偏移電壓。 設定該電壓產生部 楚5·如申請專利範圍第卜2、4項中任— =中,該電壓测定部係A/D轉換器,該、之積體電路測試器, 為。 4生部則係D/A轉賴 复6·如申請專利範圍第1、2、4項中任—項 ± 、 /、中’該受測試對象係液晶驅動裝置。 、之積體電路測試器, 12 1310839 7.如申請專利範圍第1、2、4項中任一項之積體電路測試器, 其中,該受測試對象的輸出路線上裝有I/V轉換器,用以將電流轉 換成電壓。 十一、圖式: 131310839 X. Patent application scope: 1. An integrated circuit tester, characterized in that it has a rounding off and subtracting the biasing voltage ρ, which is used to determine the measured offset electric shift voltage. Department, according to the voltage: '(2) 丄 象 之 减 减 减 偏移 2 2 2 2 2 2 2 2 2 2 2 2 2 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种 种The voltage measurement ', the result, within the circumference, for the wheel of the object to be tested "go (2) so the integrated circuit tester, will be tested by the ^ ^ and by the A / D converter in the narrow measurement of the round The offset has: ^ is measured; the measurement is performed by ι, ;; and it is characterized in that the wheel voltage measuring unit of the 对象 and 4 objects is provided, and the rib is measured by the rib to generate the wheel of the offset electric image. Out; "........ > is φ e, w 征 肩 shoulder voltage measurement unit, within the wide measurement range', the Saki object wheel voltage generation part, the deviation The voltage is shifted; the control unit' is based on the offset voltage of the voltage measurement unit.产生部楚5· If any of the applications in the scope of the patent scopes 2, 4 - =, the voltage measurement unit is an A / D converter, the integrated circuit tester, the 4 section is D / A is transferred to 66. If the scope of the patent application is 1, 2, and 4, the items are ±, /, and the 'subject to the test is the liquid crystal drive device. The integrated circuit tester, 12 1310839 7. If applying The integrated circuit tester of any one of the items 1, 2, and 4, wherein the output path of the test object is equipped with an I/V converter for converting a current into a voltage. Type: 13
TW095142055A 2005-11-14 2006-11-14 Ic tester TWI310839B (en)

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