JP2005229257A - Analog/digital converter and microcomputer mounted with it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an analog/digital converter having a small circuit scale and capable of obtaining a sufficient minimum decomposition voltage depending on the range of an input signal, and to provide a microcomputer mounted with it. <P>SOLUTION: The analog/digital converter comprises an input terminal selecting circuit 13 for selecting one of a plurality of analog input terminals 12, an analog/digital conversion circuit 14 for converting an analog input signal having a predetermined number of bits within a range between an upper limit reference voltage and a lower limit reference voltage into a digital value, a variable reference power supply 15 capable of varying the upper limit reference voltage and the lower limit reference voltage, and a register 17 for storing reference voltage alteration information. The variable reference power supply 15 has a reference power supply 41 outputting a predetermined reference voltage, and variable resistor circuits 42 and 43 comprising a parallel circuit of a resistive element and a switching element. An optimal upper limit reference voltage and a lower limit reference voltage are selected by turning switching elements of the variable resistor circuits 42 and 43 on/off, respectively. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an analog / digital converter that converts analog data obtained by measuring an object to be measured into digital data, and more particularly, an analog / digital converter that is optimal for obtaining a minimum resolution voltage sufficient depending on the range of an analog input signal. The present invention relates to a digital converter and a microcomputer on which the digital converter is mounted.

  In a conventional analog / digital converter (hereinafter also referred to as A / D converter), when performing higher resolution A / D conversion, a plurality of A / D converters each having a predetermined bit resolution are connected in parallel. (For example, refer to Patent Document 1).

  The A / D converter disclosed in Patent Document 1 will be described with reference to the drawings. FIG. 10 is a block diagram showing the configuration of the A / D converter, and FIG. 11 is a circuit diagram showing the specific configuration of the reference power supply unit.

  As shown in FIG. 10, the A / D converter 100 includes a level detection unit 101 that detects the voltage level of the analog input signal Ain at the analog input terminal IN, and in which range of the reference voltage the voltage level of the analog input signal Ain is. Thus, a reference power supply unit 102 for selectively switching the reference voltage, an A / D converter 103 connected to one reference voltage of the reference power supply unit 102, and an A / D converter connected to the other reference voltage 104.

  First, when the analog input signal Ain is input to the input terminal IN, the level detection unit 101 detects which range of the reference voltages V1 to V4 shown in FIG. The detection result is output to the reference power supply unit 102 as a 2-bit parallel signal.

  As shown in FIG. 11B, the reference power supply unit 102 determines the reference voltage Vref (TOP) for the A / D converters 103 and 104 depending on where the signal level of the analog input signal Ain is between the reference voltages V1 to V4. Vref (BOTTOM) selection switching is performed by the first and second multiplexers (MUX) 105 and 106.

  The reference power supply unit 102 includes resistors R11 to R14 having equal resistance values connected in series, and five reference values GND, (1/4) Vref, (1/1) by a voltage dividing circuit interposed between Vref and GND. 2) Vref, (3/4) Vref and Vref are generated.

  Then, GND, (1/4) Vref, (1/2) Vref, (3/4) Vref are transferred to the second MUX 106, (1/4) Vref, (1/2) Vref, (3/4). Vref and Vref are input to the first MUX 105, and the respective reference values are selectively output by the MUXs 105 and 106 according to the detected values of V1 to V4.

  Vref and GND are respectively supplied to Vref (TOP) and Vref (BOTTOM) of the A / D converter 103, and outputs of the MUXs 105 and 106 are respectively Vref (TOP) and Vref (Vref (A) of the A / D converter 104. BOTTOM).

  The A / D converter 103 has a 2-bit output, and the A / D converter 104 has an 8-bit output. Further, it is assumed that the reference voltage selected by the reference power supply unit 102 for the analog signal levels V1 to V4 is set as follows.

  That is, when the analog signal level is V1, Vref (TOP) = (1/4) Vref, Vref (BOTTOM) = GND (0V), and when V2 is Vref (TOP) = (1/2) Vref, Vref (BOTTOM) When V = (1/4) Vref, V3, Vref (TOP) = (3/4) Vref, Vref (BOTTOM) = (1/2) When Vref, V4, Vref (TOP) = Vref, Vref (BOTTOM) = (3/4) Vref.

In the above configuration, first, after setting a reference voltage for the A / D converter 104 in an initial state, the A / D converter 103 and the A / D converter 104 perform A / D conversion. As a result, 10 bits, which is the sum of the 2 bits output from the A / D converter 103 and the 8 bits output from the A / D converter 104, is the 10-bit conversion value for the analog signal.
Japanese Patent Laid-Open No. 7-15331 (page 4, FIG. 1 to FIG. 2)

  The A / D converter disclosed in Patent Document 1 uses the two A / D converters in order to perform A / D conversion with higher resolution, which causes a problem that the circuit scale increases. It is also necessary to match the characteristics of these two A / D converters.

  Further, a predetermined reference voltage is equally divided into a plurality of stages according to the number of bits of the A / D converter 103 that outputs the upper bits, and the divided reference voltages that are shifted by one stage from each other are output to the A / D that outputs the lower bits. Since the reference voltage of the D converter 104 is used, there is a problem that the reference voltage cannot be freely selected according to the range of the input voltage.

  Depending on the input voltage range, the A / D converter reference voltage is changed according to the input voltage range, rather than combining multiple A / D converters to increase the number of bits for A / D conversion. There is a case where A / D conversion with substantially high resolution can be performed by reducing the voltage.

  For example, a single A / D converter is used to perform A / D conversion for an input signal whose input voltage is in the vicinity of the upper reference voltage and for A / D conversion of an input signal in the vicinity of the lower reference voltage. .

  The present invention has been made to solve the above problems, and provides an analog / digital converter having a small circuit scale and capable of obtaining a sufficient minimum resolution voltage according to the range of an input signal, and a microcomputer equipped with the analog / digital converter. The purpose is to do.

  In this specification, the minimum resolution voltage means a value obtained by dividing the difference between the upper limit reference voltage and the lower limit reference voltage by 2 to the nth power, where n is the number of bits for A / D conversion.

  In order to achieve the above object, an analog / digital converter of one embodiment of the present invention includes an input terminal selection circuit that selects one of a plurality of analog input terminals as an input terminal that performs analog / digital conversion, and a predetermined number of bits. The analog / digital conversion circuit that converts an analog input signal in the range of the upper limit reference voltage and the lower limit reference voltage into a digital value, a reference power source that outputs a predetermined reference voltage, and one end of a parallel circuit of a resistance element and a switching element are A first variable resistance circuit connected to a reference power supply and having the other end connected to the upper limit reference voltage input end of the analog / digital conversion circuit; one end of a parallel circuit of the resistance element and the switching element is connected to the ground line; A variable reference power supply having a second variable resistance circuit having an end connected to a lower limit reference voltage input end of the analog / digital conversion circuit And, wherein respectively on or off the switching elements of the first and second variable resistance circuit according to the range of the analog input signal, it is characterized by changing the upper limit reference voltage and the lower limit reference voltage.

  According to the present invention, the optimum upper limit reference voltage and lower limit reference voltage are selected for each input terminal according to the range of the input signal, so that the minimum is sufficient as compared with the A / D converter having the same number of bits. A resolution voltage is obtained, and high-resolution A / D conversion can be performed.

  Thereby, sufficient A / D conversion accuracy can be obtained for each input terminal, and the circuit scale can be reduced, which is suitable for integration. Therefore, it is possible to provide a highly reliable A / D converter and a microcomputer equipped with the A / D converter.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a microcomputer equipped with an A / D converter according to Embodiment 1 of the present invention.

  As shown in FIG. 1, the A / D converter 11 mounted on the microcomputer 10 of this embodiment selects one of a plurality of analog input terminals 12 as an input terminal for A / D conversion. The circuit 13 and the A / D conversion circuit 14 for A / D converting the input voltage Vin of the input terminal selected by the input terminal selection circuit 13 are provided.

  Further, a variable reference voltage generation circuit 15 that supplies a reference voltage for A / D conversion to the A / D conversion circuit 14, a reference voltage change information storage register 16 that stores reference voltage change information, and an A / D converter 11 And a control circuit 17 for controlling the timing.

  Further, the microcomputer 10 includes a CPU 21 that performs predetermined processing based on the A / D conversion result of the A / D conversion circuit 14, and an output terminal 22 that outputs the processing result of the CPU 21 to the outside. . The output terminal 22 is connected to the external device 23.

  The upper limit reference voltage Vref (H) of the variable reference voltage generation circuit 15 is connected to the upper limit reference voltage input terminal 18 of the A / D conversion circuit 14, and the lower limit reference voltage Vref (L) is the lower limit reference voltage of the A / D conversion circuit 14. It is connected to the input end 19.

  The A / D conversion circuit 14 A / D converts the input voltage Vin with reference to the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L).

  The reference voltage change information storage register 16 has a plurality of registers, and stores information necessary for changing to the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) corresponding to the range of the input voltage Vin. ing.

  Upon receiving a command from the CPU 21, the control circuit 17 issues an input terminal selection command to the input terminal selection circuit 13, and changes the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) to the variable reference voltage generation circuit 15. Issue a command. Also, an A / D conversion start command is issued to the A / D conversion circuit 14.

  The CPU 21 sends information necessary for changing the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) to the reference voltage change information storage register 16. Also, a predetermined process based on the A / D conversion result is performed. The processing result is sent to an external device 23 such as an alarm or a display device via the output terminal 22 and transmitted to the outside.

  Next, specific configurations of the A / D conversion circuit 14 and the variable reference voltage generation circuit 15 will be described. FIG. 2 is a block diagram showing the configuration of the A / D conversion circuit 14 and the variable reference voltage generation circuit 15, and shows an example in which 2-bit A / D conversion is performed.

  As shown in FIG. 2, the A / D conversion circuit 14 includes a comparator 31, a comparison register 32, a comparison D / A conversion circuit 33, and an A / D conversion result storage register 34.

  The comparison D / A conversion circuit 33 includes resistance elements R1 to R4 having the same resistance value connected in series, and is interposed between an upper limit reference voltage Vref (H) and a lower limit reference voltage Vref (L). Reference values (1/4) (Vref (H) -Vref (L)), (1/2) (Vref (H) -Vref (L)), (3/4) (Vref (H) -Vref ( L)) is generated.

  The comparator 31 compares the input voltage Vin with the output voltage Vout of the comparison D / A conversion circuit 33, and the comparison register 32 controls the output voltage Vout of the comparison D / A conversion circuit 33 so that the difference is reduced. Outputs a digital value.

  Based on the digital value, the comparison D / A conversion circuit 33 turns on one of the switching elements S1 to S3 and outputs one of the three reference values as the output voltage Vout. When the output voltage Vout and the input voltage Vin match, the digital value last output to the comparison D / A conversion circuit 33 is stored in the A / D conversion result storage register 34 as a conversion result.

  The variable reference voltage generation circuit 15 includes a reference power supply 41 that outputs a predetermined reference voltage Vref therein, a first variable resistance circuit 42 that includes a parallel circuit of a resistance element RH and a switching element SH, a resistance element RL, and a switching element. And a second variable resistance circuit 43 having an SL parallel circuit.

  One end of the first variable resistance circuit 42 is connected to the reference power supply 41, and the other end is connected to the upper limit reference voltage input terminal 18 of the A / D conversion circuit 14. Similarly, one end of the second variable resistance circuit 43 is connected to the ground line GND, and the other end is connected to the lower limit reference voltage input terminal 19 of the A / D conversion circuit 14.

  Next, the range of the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) will be described. FIG. 3 is a diagram showing the relationship between the ON / OFF of the switching elements SH and SL and the ranges of the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L).

  As shown in FIG. 3, when the switching elements SH and SL are on, (SH) = 0, (SL) = 0, and when the switching elements SH and SL are off, (SH) = 1, (SL) = 1, and resistance elements R1 to R4 Assuming that the sum of RS is RS, the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) are expressed by the following equations.

RZ = RH (SH) + RS + RL (SL) (1)
Vref (H) = Vref × [RS + RL (SL)] / RZ (2)
Vref (L) = Vref × RL (SL) / RZ (3)
For example, when the reference voltage Vref = 5V and the resistance elements RH, RL, and RS are equal, four reference values 0 to 5V, 2.5 to 5V, 0 to 2.5V, (1/3) 5 to (2 / 3) 5V is generated.

  Accordingly, when the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) are selected from two reference values of 2.5 to 5V and 0 to 2.5V according to the range of the input voltage Vin, When the reference value of (1/3) 5 to (2/3) 5V is selected, the minimum resolution voltage becomes 1/3, so that the resolution can be improved equivalently.

  Next, the relationship between the A / D conversion result by the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) corresponding to the range of the input voltage Vin and the measured value will be described. FIG. 4 shows the relationship between the input voltage Vin and the A / D conversion result in comparison with the conventional example. The solid line a in the figure is according to this embodiment, and the broken line b is according to the conventional example.

  As is apparent from FIG. 4, when the lower limit reference voltage Vref (L) = (1/3) Vref and the upper limit reference voltage Vref (H) = (2/3) Vref, a 2-bit resolution can be obtained between them. Therefore, the minimum resolution voltage becomes 1/3, and the resolution is equivalently improved three times.

  Thereby, the relationship between the range of the input voltage Vin and the A / D conversion result is expressed by the following equation, where the A / D conversion result is (AD) = 0 to 3.

Vin = (AD) × {Vref (H) −Vref (L)} / 3 + Vref (L) (4)
That is, when the input voltage Vin is between (3/9) Vref and (4/9) Vref, A / D conversion result (AD) = 1 is obtained.

  Next, a specific operation of the microcomputer equipped with the A / D converter 11 will be described with reference to the drawings. FIG. 5 is a flowchart showing the operation of the microcomputer equipped with the A / D converter 11.

  As shown in FIG. 5, first, the control circuit 17 sends a command signal for selecting an input terminal to the input terminal selection circuit 13, and the input terminal selection circuit 13 selects the input terminal AIN_0 (step S10).

  Next, the control circuit 17 sends a change command for the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) to the variable reference voltage generation circuit 15, and the variable reference voltage generation circuit 15 receives an input from the change information storage register 16. The change information corresponding to the input voltage range of the terminal AIN_0 is read, and the switching elements SH and SL are turned on or off according to the change information to change the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) (step S11). ).

  Next, the control circuit 17 sends an A / D conversion start command to the A / D conversion circuit 14, and the A / D conversion circuit 14 performs A / D conversion. When the output voltage of the comparison D / A conversion circuit 33 and the input voltage AIN_0_Vin match, the digital value of the comparison register 32 is finally stored in the A / D conversion result storage register 34 as the A / D conversion result, and the input terminal AIN_0 The A / D conversion operation ends (step S12).

  Next, the CPU 21 takes in the A / D conversion result from the A / D conversion result storage register 34 (step S13), and converts the A / D conversion result into a measurement result by a predetermined conversion formula (4) (step S14). As a result, it is possible to obtain a correct measurement result of the input voltage Vin.

  Further, the CPU 21 performs a predetermined process based on the measurement result, and outputs the process result to the external device 23 (step S15).

  Next, when the input terminal AIN_1 is selected, Steps S10 to S15 are repeated again.

  Next, the reference voltage change information will be specifically described. FIG. 6 is a reference voltage change information table showing reference voltage change information.

  As shown in FIG. 6, a reference voltage change information table 52 is provided in the data storage area 51 in the CPU 21, and a switching element SL predetermined according to the range of input signals to be measured for each of the input terminals AIN_ 0 to AIN_ 3. SH on / off information, an upper limit reference voltage Vref (H) and a lower limit reference voltage Vref (L) are stored.

  Writing and reading of the reference voltage change information to the reference voltage change information table 52 is controlled by a program stored in the program storage area 53 in the CPU 21.

  As described above, in the A / D converter 11 according to the first embodiment, the optimum upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) are set for each input terminal according to the range of the input signal. Since it is selected, a sufficient minimum resolution voltage can be obtained as compared with an A / D converter having the same number of bits, and high-resolution A / D conversion can be performed.

  Thereby, sufficient A / D conversion accuracy is obtained for each input terminal. Moreover, since the circuit scale is small, it is suitable for integration. Therefore, it is possible to provide a highly reliable A / D converter and a microcomputer equipped with the A / D converter.

  Although the case where the resistance elements RH and RL are equal to RS has been described here, RH and RL can be appropriately determined so as to obtain the necessary upper reference voltage Vref (H) and lower limit reference voltage Vref (L).

  FIG. 7 is a circuit diagram showing a variable reference voltage generating circuit according to Embodiment 2 of the present invention. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof will be omitted, and only different portions will be described.

  This embodiment differs from the first embodiment in that the first and second variable resistance circuits of the variable reference voltage generation circuit are circuits in which a plurality of parallel circuits of resistance elements and switching elements are connected in series.

  That is, as shown in FIG. 7, the variable reference voltage generation circuit 61 includes a first variable resistance circuit 62 in which a parallel circuit of a resistance element RH and a switching element SH and a parallel circuit of a resistance element RH1 and a switching element SH1 are connected in series. And a second variable resistance circuit 63 in which a parallel circuit of the resistance element RL and the switching element SL and a parallel circuit of the resistance element RL1 and the switching element SL1 are connected in series.

  One end of the first variable resistance circuit 62 is connected to the reference power supply 41, and the other end is connected to the upper limit reference voltage input terminal 18 of the A / D conversion circuit 14. One end of the second variable resistance circuit 62 is connected to the ground line GND, and the other end is connected to the lower limit reference voltage input terminal 19 of the A / D conversion circuit 14.

  Next, the range of the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) of the variable reference voltage generation circuit 61 will be described. FIG. 8 is a diagram showing the relationship between the ON / OFF of the switching elements SH, SH1, SL, and SL1 and the ranges of the upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L).

  As shown in FIG. 8, for example, when the resistance elements RH1 and RL1 are RS / 2, 16 independent reference values can be generated in all combinations of the switching elements SH, SH1, SL, and SL1. .

  As described above, according to the variable reference voltage generation circuit 61 according to the second embodiment, the number of steps for changing the resistance values of the first and second variable resistance circuits is increased, and therefore, according to the range of the input voltage Vin. The upper limit reference voltage Vref (H) and the lower limit reference voltage Vref (L) can be set more finely.

  Here, the first and second variable resistance circuits have been described in the case where two parallel circuits of resistance elements and switching elements are connected in series, but two or more parallel circuits may be provided. The first and second variable resistance circuits may be different.

  Furthermore, although the case where the resistance elements RH1 and RL1 are equal to RS / 2 has been described, RH1 and RL1 can be appropriately determined so as to obtain the necessary upper reference voltage Vref (H) and lower limit reference voltage Vref (L).

  FIG. 9 is a circuit diagram showing a variable reference voltage generating circuit according to Embodiment 3 of the present invention. In the present embodiment, the same components as those in the second embodiment are denoted by the same reference numerals, description thereof is omitted, and only different portions will be described.

  This embodiment differs from the second embodiment in that the first and second variable resistance circuits of the variable reference voltage generation circuit are circuits in which switching elements are further connected in parallel.

  That is, as shown in FIG. 9, the variable reference voltage generation circuit 71 has a switching element SH2 connected in parallel to the internal first variable resistance circuit 72 and a switching element SL2 connected in parallel to the second variable resistance circuit 73.

  Accordingly, when the switching elements SH and SH1 are simultaneously turned on, the switching element SH2 is also turned on, so that the on-resistance of the switching element can be reduced.

  For example, when the on-resistances of the switching elements SH, SH1, and SH2 are equal, the on-resistance is doubled when the switching elements SH and SH1 are simultaneously turned on, while the on-resistance is (2 / 3) Reduced by a factor of 2.

  As described above, according to the variable reference voltage generation circuit 71 according to the third embodiment, since the on-resistance of the switching elements of the first and second variable resistance circuits is reduced, the upper limit reference voltage Vref (H) and Variations in the lower limit reference voltage Vref (L) can be suppressed.

1 is a block diagram showing a configuration of a microcomputer equipped with an A / D converter according to Embodiment 1 of the present invention. 1 is a block diagram showing specific configurations of an A / D conversion circuit and a variable reference voltage generation circuit according to Embodiment 1 of the present invention. The figure which shows the variable range of the reference voltage of the variable reference voltage generation circuit which concerns on Example 1 of this invention. 3 is a flowchart showing the operation of the A / D converter according to Embodiment 1 of the present invention. The figure which shows the relationship between the input signal of the A / D conversion circuit which concerns on Example 1 of this invention, and an A / D conversion result. The reference voltage change information table which shows the specific structure of the reference voltage change information which concerns on Example 1 of this invention. The block diagram which shows the specific structure of the variable reference voltage generation circuit which concerns on Example 2 of this invention. The figure which shows the variable range of the reference voltage which concerns on Example 2 of this invention. FIG. 9 is a block diagram showing a specific configuration of a variable reference voltage generation circuit according to Embodiment 3 of the present invention. The block diagram which shows the structure of the conventional A / D converter. The block diagram which shows the structure of the reference | standard power supply part of the conventional A / D converter.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Microcomputer 11 A / D converter 12 Input terminal 13 Input terminal selection circuit 14 A / D conversion circuit 15, 61, 71 Variable reference voltage generation circuit 16 Reference voltage change information storage register 17 Control circuit 18 Upper limit reference voltage input terminal 19 Lower limit reference voltage input terminal 21 CPU
22 output terminal 23 external device 31 comparator 32 comparison register 33 comparison D / A conversion circuit 34 A / D conversion result storage register 41 reference power supply 42, 62, 72 first variable resistance circuit 43, 63, 73 second variable resistance circuit 51 Data storage area 52 Reference voltage change information table 53 Program storage area Vin Input voltage Vout Output voltage Vref Reference voltage Vref (H) Upper limit reference voltage Vref (L) Lower limit reference voltages R1, R2, R3, R4, RH, RH1, RL , RL1 resistance elements S1, S2, S3, SH, SH1, SH2, SL, SL1, SL2 switching elements

Claims (5)

An input terminal selection circuit for selecting one of a plurality of analog input terminals as an input terminal for analog / digital conversion;
An analog / digital conversion circuit that converts an analog input signal in a range between an upper limit reference voltage and a lower limit reference voltage into a digital value with a predetermined number of bits;
A reference power supply that outputs a predetermined reference voltage, and a first circuit in which one end of a parallel circuit of a resistance element and a switching element is connected to the reference power supply, and the other end is connected to an upper limit reference voltage input terminal of the analog / digital conversion circuit A variable resistor circuit, and a variable resistor circuit and a second variable resistor circuit in which one end of a parallel circuit of the resistor element and the switching element is connected to a ground line and the other end is connected to a lower limit reference voltage input terminal of the analog / digital conversion circuit. A reference power supply,
Comprising
An analog / digital converter characterized in that the upper limit reference voltage and the lower limit reference voltage are changed by turning on or off the switching elements of the first and second variable resistance circuits, respectively, according to the range of the analog input signal.   2. The analog / digital converter according to claim 1, wherein the first and second variable resistance circuits are circuits in which a plurality of parallel circuits of resistance elements and switching elements are connected in series.   The analog / digital converter according to claim 2, wherein a switching element is further connected in parallel to the first and second variable resistance circuits.   4. The switching elements of the first and second variable resistance circuits are turned on or off according to a table in which the upper limit reference voltage and the lower limit reference voltage are determined for each of the input terminals. The analog / digital converter according to any one of the above. An analog input terminal;
The analog / digital converter according to any one of claims 1 to 4, which converts an input voltage of the analog input terminal into digital data.
A CPU for performing predetermined processing on the conversion result of the analog / digital converter;
An output terminal for outputting the processing result of the CPU to an external device;
A microcomputer comprising:

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