TWI309541B - Method for fabricating punch type leadless ic packages - Google Patents

Description

• 1309541 * Rui Nine, invention description: [Technical Field of the Invention] The present invention relates to a singularization of semiconductor packaging technology, and in particular to the manufacture of a punched external lead package structure. method. [Prior Art] In the semiconductor package manufacturing technology that has been witnessed, it is quite common and economical to integrate a plurality of carrier units _ on a substrate for a packaging process. After most of the packaging process is completed, the cell separation is performed to separate a plurality of semiconductor package structures. For example, the use of a lead frame as a substrate to create an external lead package structure (leadless IC (4) -) is also: 匕 at the end of the I process for monomer separation. As far as the known separation type is concerned, the structure can be further differentiated into a punching type (p_hing (10)) and a mine cutting type. In the blanking type external lead package structure, a plurality of ^ / systems are individually formed to achieve the effect of separate separation of the lead wires by punching the lead pins of the lead frame. In the case of the cut-off type, the sealant is continuously covered with all the carrier sheets. 70 The saw blade must be cut at the same time to cut the sealant and the pins at the same time, which has a great influence on the wear of the cutter and is time consuming. As shown in Figure 1, the conventional blanking type external package structure is a single-cutting operation to complete the unit separation. The lead frame 1] is fixed on a punching device A! ! ° And the punching blade 12 is used to cut the lead of the lead frame 11 ' without cutting the sealing body 13 预定 of a predetermined shape. Referring to FIG. 2, the punched external lead package structure 100 mainly includes the lead frame 110, the wafer 120, and a gel 130. The wafer 120 is set: 1309541

The lead frame 110 is placed on the lead frame 110 and is electrically connected to the legs 1 by a plurality of bonding wires 121. The encapsulant forms the encapsulant 13 : the pins (1) are combined, but: should: the sheet: the junction is punched. The combination of these pins U i . Before the blanking, the surface is also = exposed. It can be used to expose the surface to form a y y ^ to form a first (four) (4) (1) connection. However, as shown in the figure; Fig. :': avoiding the W and contributing to the Schematic, in the conventional blanking process, the punching force of the punching U1 will cause the pin U1 to be easily used by the encapsulant 130. Peeling, even falling problems occur. In addition, as shown in Fig. 2, there is a burr phenomenon on the punched surface of the pins (1), and the body (4) is injured in the human body or electronic components. SUMMARY OF THE INVENTION The main object of the present invention is to provide a manufacturing method of a punched external lead package structure, which is used to solve the problem of a conventional one-way blanking process which causes a punched external lead package structure. Problems such as pin peeling, dropping and burrs can improve the process yield and increase the plating area of the pins. The object of the present invention and solving the technical problems thereof are mainly achieved by the following technical solutions. According to the present invention, a method of manufacturing a punched outer bowless package structure is disclosed. First, a lead frame having a plurality of carrier units is provided, each of which is formed with a plurality of pins, and a dam bar is formed between adjacent carrier units. A plurality of wafers are then not placed on the leadframe and the wafers are electrically connected to the pins in a suitable manner. Thereafter, a plurality of encapsulants are individually formed on the corresponding carrier units to bond the pins but the blocking rods are exposed. After the sealant, 1309541 is half-punched (four), and a plurality of semi-recessed openings are formed along the outer circumference of the seals. Thereafter, the electro-penetration step is performed to form an electro-mineral layer in which the exposed surfaces of the semi-concave notches are included. Finally, a full blanking step is performed to cut the pins along the semi-concave notches and separate into individual encapsulants. Further, a blanking type external lead made by the above process is disclosed. In the foregoing manufacturing method, the upper surface of the pins is used. In the aforementioned manufacturing method, the lower surface of these pins. In the foregoing manufacturing method, the wires are electrically connected to the leads, and the semi-concave notches may be formed therein, and the semi-concave notches may be formed in the plurality of solder pads in the foregoing In the manufacturing method, the depth of the τ °H + recessed notch can be about 三 the thickness of the pins is three-thirds - $ _ people ^ one of the soil knife 0 in the aforementioned manufacturing method, the above 4 plating The steps are chemical lightning plating or electrolytic plating. 4 In the foregoing manufacturing method, the tin plating layer may be selected from the group consisting of tin, lead, and tin. [Embodiment] In the first concrete 3G diagram of the present invention, a method for manufacturing a structure in which a embossing (four) is constructed in a process is disclosed in the context of the embossing of the text. Such as the pen - lead frame diagram of the staff. f First, as shown in Figures 3 and 4, the 21G line has a plurality of loads: ''1 line frame 21G' is provided. The guide is 7^21〇a, and each carrier unit 21〇18130954 is formed. A plurality of pins 211 are formed, and a dam bar 212 is formed between adjacent carrier units 21A to connect the pins 2 11. In the present embodiment, at least one wafer holder 213 may be additionally formed in each carrier unit 207A. Typically, the leadframe 210 is of all metal and has a thickness of about 2 millimeters (mm). However, the pins 211 do not have the length of a conventional j, j or seagull-shaped outer pin. Each pin 211 has an upper surface 2Ua and a lower surface 211B.

As shown in FIG. 3B, a plurality of wafers 22 are disposed to the lead frame 21A, and one of the wafers 22 can be adhered to the wafer holders 213 of the lead frame 210 by a known die bonding technique. . In addition, in different types of lead frames, its pins are also available for die bonding. The wafers 220 are electrically connected to the pins 211. As shown in FIG. 3C, a plurality of bonding wires 2 2 1 are formed by a wire bonding technique, and the wires 220 are electrically connected to the upper surface 211A of the pins 2 ι by the bonding wires 221 . In addition, the electrical interconnection of the wafer 220 and the lead frame 2 1 can be achieved by techniques such as internal pin bonding and flip chip bonding. Then, as shown in FIG. 3D, a plurality of encapsulants 230 may be formed by using a stamper, a printing or a dispensing method to correspond to the carrier units 21A, to form the pins 2U but reveal the plugs. Rod 212. In other words, each of the body units 2l〇A胄 can correspond to one sealant 230. In the present embodiment, the one of the gels 23G is formed by a stamper. Usually, the sealant system is an insulating material 匕3 curable resin, an inorganic filler, a curing accelerator, a colorant, and the like. Each of the encapsulants 230 seals most of the upper surface 2UA of the pins 211 in addition to the wafers on the corresponding carrier unit. However, in the embodiment Γ309541, the lead frame 21 堵 blocking rod 212, the lower surface 211B of the lead 211, the lower surface of the wafer holder 213, and the upper surface 211A of the pin 211 are not sealed. The colloid is covered by 23 inches. As shown in Fig. 3E, a half-punching step is performed after the formation of the sealant 23 is formed. The lead frame 21 is fixed to the stage 2 of the punching apparatus. A plurality of semi-concave notches 211C are formed on the outer leads 23 of the sealant 23 by a plurality of punching blades 22, and it is noted that

The semi-recess σ 211C formed after the half-punching step is not limited in its development, and may be concave or U-shaped or other geometric shapes. In this embodiment, the semi-recessed notches 211C are formed on the upper surface 211A of the pins 211. The depth of the semi-concave notches 2nc is about one-half to one-half the thickness of the pins. That is, the pins 211 cannot be cut in the half-punching step to facilitate plating. As shown in FIG. F, an electroplating step is performed to form an electro-depositor. The pins 211 include the semi-concave notches 2nc exposed surfaces. In the embodiment, the pins 2i i can supply power. The exposed surface of the layer (10) comprises the above-mentioned exposed surface of the sealant 23 212, the surface 211B of the pin m, and the wafer holder 213. The surface of the holder 213 is placed on the lower surface of the seat 213. Surface 211A and semi-recessed notch 2uc. In addition, the ^ step can be other methods such as chemical ore or electrolytic plating. The material of the electric layer 240 may be selected from one of tin, tin-displacement, and tin-secret. Finally, as shown in the 30th W, the _ full-cutting step is carried out, and the ferrule is fixed to the electroplated lead frame 21 in the other (four) two-head "# U疋 on the stage of the other-punching device. The road is provided with a full punching stroke of the punching blade 32. And: Γ309541 is used to cut the pins 2 1 along the semi-recessed notches 2UC to separate the individual sealing bodies 230. In this embodiment, the pins 211 are combined with the sealing bodies 230 to be separated from the blocking rods 212. The invention is not limited to the type of punching equipment, in the semi-punching step and the full blanking step. The punching equipment used in the punching equipment may be the same or different. As shown in Fig. 5, the all-punching step of the 稽田琢 can obtain a plurality of punched external lead package constructions using the above-mentioned half blanking step in the sealing step

Between the step of plating and the plating step and before the full blanking step, the destructive punching stress on the joint of the pin 211 and the sealant 230 at the full blanking step is reduced. Therefore, it is possible to prevent the pins 211 from being cracked at the interface with the sealing body 230. There is no problem that the pin is peeled off and the pins are dropped due to the conventional full-punching, and the problem of the pin burr is further solved. . Moreover, as shown in Fig. 6, the plating layer in the original wide concave notch 2UC "can increase the pin area of the lead 211:> side edge of the product" reduces the scaling of the (4) foot 2ii and increases the upper plate. The bonding ability of the solder ball or the solder paste. Therefore, in the first-stage two-stage blanking method of the present invention, the above-mentioned 6-frame-out blank-out package structure is disclosed. No, the plurality of punching type I outer frames no: the mounting structure 200 mainly includes a - wire < a plurality of W feet 21], - a plating layer 240. Each of the - pin pieces 22 〇, - sealant And the outer end of the outer surface of the sealant formed by the two-stage punching has the first-cut surface 2UD4-cut surface 2UD and a second cut surface 211E, 2UC<-side·彳a^ Covered by a semi-recessed notch (such as 3F (S| into (as shown in Figure 3E), and shown by the plating layer 240 ^ t). The poor second) 6 Hai second section 211E is the aforementioned Rushing 1309541

The exposed end face of the formed pin. In this embodiment, the first cut surface 211D of the foot 211 is connected to the upper surface 2uA of the corresponding pin 211. In various embodiments, the first slice 211D of the pins 2U may also be connected to the lower surface of the corresponding pin. The wafer 22() is disposed on the sunday support 213 of the lead frame and is electrically connected to the pins by a wire bonding technique or a plurality of bonding wires 22i. connection. The sealing body 230 is formed on the lead frame 2 and is connected to the pins 211; preferably, the pins 211 may have a surface slightly protruding from the side of the side of the sealing body (4) and Lower surface 2UB. The electric ore layer is formed at least on the first cut surface 2UD of the pins 211, and may be formed on the surface 211 of the pin 2 ιι which protrudes slightly from the side of the sealant 23 The lower surface 211B and the lower surface of the wafer holder 213. In a second embodiment of the present invention, another method of fabricating a blanked external lead package structure is disclosed. The packaging step before the half-punching step,

For example, the lead frame is provided, the die bond and the sealant are the same as the first embodiment, and will not be described again. After that, half the punching step is performed. As shown in Fig. 7A, a plurality of wafers 320 are disposed on a lead frame 31A and electrically connected to a plurality of pins 311 of the lead frame 310 by a plurality of bonding wires 321 before the half-punching step. A sealing body 330 is formed on the corresponding carrier unit of the lead frame 3 1 , to combine the pins 3 11 but expose the plurality of blocking rods 3 2 of the lead frame 3 。. In the semi-punching step, the lead frame 310 can be reversely fixed to the table 3 1 of the punching device, and a plurality of semi-concavees are formed along the outer periphery 331 of the sealant by a plurality of punching blades 42. The gap 3UC is at the pins 31丨. In the embodiment of the present invention, the lead frame 310 is reversely disposed on the stage 31, and the semi-concave notches 311C are formed on the lower surface 3Ub of the pins 311. As shown in FIG. 7B, after the half-punching, the electroplating step is performed to form a plating layer 340 on the pins 311 including the exposed surfaces of the semi-concave notches 3nc, that is, a part of the upper surface of the pins 311. 3Ua, lower surface Ha, and semi-recessed notches 311C. - one / outside, soft guard 3 3 can 2

Is placed on the stage 51 of the punching device in the forward direction, and utilizes a plurality of punches; 52 cuts the pins 3" along the semi-recessed notches 3UC, and separates into 4 = this half of the invention The concave notch is formed in the 〗 〖Curving... It can solve the problems of the one-way blanking process, such as the peeling, falling and burrs of the foot package structure, and the increase of the lead yield. Mine area. The present invention is merely a preferred embodiment of the present invention and is not intended to be used in the present invention. However, although the present invention has been disclosed in its preferred embodiments, the application of the present invention is ??? Early modification between the non-sexual change and (4) material, etc., within the scope of the simple material delivery technology. The head-punched external lead package construction is not intended. ~m as shown in Figure 2: @ i Section 3A to 3G diagram of the outline of the external lead package structure. No outer seal:: a specific embodiment, a type of punching 5 foot package structure in the manufacturing process of the cross-section schematic 12: 1309541 figure. In accordance with a first embodiment of the present invention, a top plan view of a leadframe for use in the blanked outer package structure is omitted. According to a first embodiment of the present invention, a schematic view of a carrier surface of the punched type outer package structure is omitted. + Fig. In accordance with a first embodiment of the present invention, the blanking type without outer bow I. Figure 7C is a cross-sectional view of another blanking package without the outer lead package construction in the two blanking steps of the manufacturing process in accordance with the second embodiment of the present invention. Main component symbol description] 11 Stage 12 21 Stage 22 31 Stage 32 41 Table 42 51 Stage 52 Punching knife punching knife 100 punching type No external lead package structure 110 Lead frame ill pin 120 wafer 121 Bonding wire 130 encapsulant 140 plating layer 211 pin 211 C semi-concave grass surface two-section 200 punching type external lead package structure 21 〇 lead frame 210 Α Α Α upper surface 211 Β 211D first section 211 Ε 13 :1309541 212 blocking rod 213 wafer holder 220 wafer 221 bonding wire 230 sealing body 231 outer circumference 240 plating layer 310 lead frame 311 pin 311B lower surface 311C semi-recessed notch 312 blocking rod 320 wafer 321 bonding wire 330 sealing body 331 Outer periphery 340 plating layer 311A upper surface

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Claims (1)

1309541 X. Patent application scope: kh Yuebu plant type punching type no (4) cover manufacturing system - lead frame 'the system has a plurality of carrier unit elements formed by a plurality of pins; the carrier is set a plurality of early Wafer to the lead frame, and electrically connecting the chips to the pins; electrically connecting to form a plurality of sealants in the scorpion, va, 隹> To join the pins; to enter a half-punching step, along the sealing body, a semi-concave notch is formed on the pins; the peripheral edge forms a plurality of-electric clock steps to form a plating layer on the pins Including the concave notch exposed surface; and performing a full-punching step to cut the pins along the semi-concave notches and separating into individual encapsulants. 2. As described in the first paragraph of the patent application, the Φ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Bar), the sealant is formed during the formation of the smear 3, as in the manufacturing method of the punched type external lead-free package dry structure described in the scope of claim [i] wherein the semi-recessed notches are formed The method of manufacturing the punched type outer lead-free sealing method according to the above-mentioned item, wherein the semi-concave notches are formed on the lower surface. 5. A method of manufacturing a blanking type external lead as described in claim i, wherein the wafers are connected to the pins by a plurality of bonding wires electrically 15 '1309541. 6. The method of manufacturing the terracotta..., the outer bow and the shackle, and the method for the construction of the semi-concave notch, wherein the thickness of the semi-concave notch is one-third to two-half of the ice. And about these pins - 〇 7, as described in the scope of the application of the scope of the manufacturing process, wherein the upper ^ # # + type ... outer bow and foot package structure electrolytic plating. ...the plating step is a chemical ore or 8 , as claimed in the patent application, the manufacturer has a manufacturing method, and the method of manufacturing the method is as follows: Among them - kick-gas, tin _ 9, - a type of blanking no-outer package structure, including: :=::==:::_ a segment of ST placed on the lead frame and with these pins Electrically connected, and 胄, formed on the lead frame and combined with the leads; / electroplated layer, which is formed at least in the first 10 of the arches, as claimed in the patent scope 9, described, in which _-cut Jit: the outer pin seals the tangential surface to be connected to the lower surface of the corresponding pin. 'The lapped external lead package as described in the ninth patent scope The structure, wherein the first-cut surface is connected to the upper surface of the corresponding pin. 12. The blanking type external lead package structure according to claim 9 of the patent application scope has a One is judging from the upper surface of the side of the sealant. 16 13〇9541 j 13 14 ~~—-If the patent application scope is $12, the weight of the punch is a bow structure, wherein the plating layer is also formed in the prominent package of the chat, as described in item 9 of the patent application: in the middle plant, wherein the:: S cut-out type has no outer pin seal The structure-month 1 is called a hot outer 3 foot-foot seal. The wafer is electrically connected to tb Θ RSP by wire bonding or flip chip bonding. 9. The blanking type outer lead package structure according to claim 9, wherein the lead frame has a wafer holder for the wafer to be set to 0 0 φ 丨6, as described in claim 15 of the patent scope. An external lead package construction 'where the plating layer is formed on the lower surface of the wafer holder. 17