1305683 : 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種發光二極體元件及其製作方 法；特別是有關於一種以自行對準晶圓切割技術 (self-aligned wafer singulation technique)製作之發光二極 體元件。 【先前技術】 傳統發光二極體元件之製造方法係於藍寶石（sapphire) | 或碳化矽（SiC)晶圓成長例如氮化鎵銦鋁（AlInGaN)磊晶 層，該氮化鎵銦鋁磊晶層係至少包含N型及P型磊晶層以 及介於兩者間的發光層，該晶圓並經處理以分別提供歐姆 接觸（ohmic contacts)予該N型及P型磊晶層，接著使用晶 圓切割技術以從晶圓上分離發光二極體晶粒。第一 A圖係 傳統發光二極體晶粒成長於晶圓上的俯視示意圖，第一 B 圖係沿第一 A圖A-A線的剖面示意圖及第一 c圖係沿b_b 線的剖面示意圖。參第一 B圖所示’傳統發光二極體晶粒 10的結構至少包含一基底100例如藍寶石、碳化;g夕或其它 材料、一 N型半導體層101磊晶成長於該基底ι〇〇上、一 半導體發光層102磊晶成長於該N型半導體層1〇1及一 p 型半導體層103磊晶成長於該半導體發光層1〇2上，並且 於該N型半導體層101及P型半導體層1〇3上方分別形成 N型接觸層104及P型接觸層1〇5,以提供歐姆接觸予該N 型接觸層104及P型接觸層105。復參第一 a圖，傳統的 晶圓切割技術係於晶圓上依序執行刻劃（scribing)、斷裂 (breaking)及分離步驟，以將發光二極體晶粒從晶圓 上分離。但在晶圓100上進行刻劃動作之前，會使用微影 及蝕刻製程先在晶圓100上相鄰發光二極體晶粒1〇之間形 成渠溝式的切割道(street)106 ’以在該等切割道1〇6上形成 1305683 刻劃線107。該等切割道i〇6係可蝕刻至發光二極體晶粒 10内部的半導體磊晶層或蝕刻至該基底1〇〇表面（參第一B 圖及第一 C圖所示p接著，沿著該等切割道1〇6以機械性 方法或雷射刻劃方法（mechanical scriber or laser scriber)於 晶圓100上進行刻劃，以形成刻劃線(scribe line)107。該等 刻劃線107可形成於具有發光二極體晶粒丨〇的晶圓正面或 晶圓背面。之後，進行斷裂及分離步驟，該晶圓100即會 沿著該等刻劃線107產生斷裂，並藉由分離步驟，使該等 發光二極體晶粒10沿著斷裂處從晶圓100上分離，以完成 發光二極體元件的製作。 復參第一 A圖，晶圓1〇〇上切割道1〇6的寬度通常約 在40至50微米，由於該等切割道1〇6佔據相鄰的發光二 極體晶粒10周緣面積lb，使得每一顆發光二極體晶粒1〇 從面積la縮減為面積la，，而減少其發光面積，因而對該 發光二極體晶粒1〇的發光效率有不利影響。 傳統的發光二極體晶粒係呈正方形幾何形狀，其尺寸 大小可為14x14密爾（mil)、24x 24密爾或4〇χ4〇密爾。 鲁=機料斷提高’制是應隸可攜式電子產品上。由二 這些可攜式電子產品愈做愈輕薄短小，使得其液 : 的導光板(waveguide)厚度愈做愈薄，而發光二梅二= 但近年來丨使，發光二極體晶粒做為液晶顯示器的背光源</ RTI> </ RTI> < Desc/Clms Page number> ) A light-emitting diode component produced. [Prior Art] The manufacturing method of the conventional light-emitting diode element is based on sapphire or SiC wafer growth, such as an indium gallium nitride (AlInGaN) epitaxial layer, the gallium nitride indium aluminum epitaxial layer The layer system comprises at least an N-type and a P-type epitaxial layer and a light-emitting layer interposed therebetween, and the wafer is processed to provide ohmic contacts to the N-type and P-type epitaxial layers, respectively, and then used Wafer dicing techniques to separate light-emitting diode dies from the wafer. The first A is a top view of a conventional light-emitting diode die grown on a wafer. The first B-picture is a cross-sectional view along the line A-A of the first A and a cross-sectional view of the first c-picture along the b_b line. Referring to FIG. 2B, the structure of the conventional light-emitting diode die 10 includes at least one substrate 100 such as sapphire, carbonization, or other materials, and an N-type semiconductor layer 101 is epitaxially grown on the substrate. a semiconductor light-emitting layer 102 is epitaxially grown on the N-type semiconductor layer 1〇1 and a p-type semiconductor layer 103 is epitaxially grown on the semiconductor light-emitting layer 1〇2, and the N-type semiconductor layer 101 and the P-type semiconductor An N-type contact layer 104 and a P-type contact layer 1〇5 are formed over the layers 1 to 3, respectively, to provide ohmic contact to the N-type contact layer 104 and the P-type contact layer 105. In the first step, the conventional wafer dicing technique performs sequential scribing, breaking, and separation steps on the wafer to separate the luminescent diode dies from the wafer. However, prior to the scribing operation on the wafer 100, a trench-type street 106' is formed between the adjacent LED die 1 on the wafer 100 using a lithography and etching process. A 1305683 scribe line 107 is formed on the scribe lines 1〇6. The dicing lines i 〇 6 can be etched into the semiconductor epitaxial layer inside the luminescent diode die 10 or etched to the surface of the substrate 1 (refer to the first B diagram and the first C diagram, p followed by The scribe lines 1 〇 6 are scribed on the wafer 100 by a mechanical method or a mechanical scriber or laser scriber to form a scribe line 107. The scribe lines 107 107 may be formed on the front side of the wafer or the back side of the wafer having the light emitting diode chip 。. Thereafter, the breaking and separating steps are performed, and the wafer 100 is broken along the scribe lines 107 by The separating step is performed to separate the light-emitting diode crystal grains 10 from the wafer 100 along the break to complete the fabrication of the light-emitting diode element. Referring to the first A-picture, the wafer 1 is cut on the wafer 1 The width of the crucible 6 is usually about 40 to 50 micrometers, since the dicing streets 1 〇 6 occupy the peripheral area lb of the adjacent light-emitting diode crystal grains 10, so that each of the light-emitting diode crystal grains 1 〇 from the area la Reduced to the area la, and reduced its light-emitting area, thus the luminous efficiency of the light-emitting diode crystal 1〇 There are adverse effects. The traditional LED pattern has a square geometry and can be 14x14 mil, 24x 24 mil or 4 〇χ 4 mil. Lu = machine break improvement It is a portable electronic product. The two portable electronic products are made lighter and thinner, making the thickness of the liquid: the lighter and thinner, and the lighter two plums = but in recent years Light-emitting diode dies are used as backlights for liquid crystal displays
八〜狀…一你，租日日耻叼赞光效率十分不利。 【發明内容】 1305683 本發明之一目的係提供一種發光二極體元件，係在該 發光二極體元件周緣至少一方向上未蝕刻切割道 (streets)，使得該發光二極體元件之半導體疊層可延伸至該 發光二極體元件未蝕刻有切割道之周緣，進而增加該發光 二極體元件的發光面積，以提高其發光效率。 本發明之另一目的係提供一種發光二極體元件製作方 法，其係以晶圓上發光二極體晶粒的電極做為形成刻劃線 (scribing line)的對準標記(alignment mark)，使晶圓上至少 一方向上無需預先蝕刻切割道，可增加每一顆發光二極體 晶粒佔據晶圓的面積，進而提高其發光效率。 為達上述目的，本發明提供一種發光二極體元件，其 包括一基底、一半導體疊層、一具第一導電性接觸層及一 具第二導電性接觸層。該半導體疊層係形成於該基底之一 第一表面，該半導體疊層包含一具第一導電性半導體層、 一具第二導電性半導體層及一半導體發光層介於前述兩 者之間。該具第一導電性接觸層係電性連接至該具第一導 電性半導體層，及該具第二導電性接觸層係電性連接至該 具第二導電性半導體層，而該半導體疊層係朝至少一方向 延伸至該發光二極體元件之周緣。 另一方面，本發明提供一種發光二極體元件製作方 法，其包括提供一基底，形成一半導體疊層於該基底之一 第一表面上，該半導體疊層包含一具第一導電性半導體 層、一具第二導電性半導體層及一半導體發光層介於前述 兩者之間，該半導體疊層對應該發光二極體元件周緣處在 至少一方向上未#刻有切割道(streets)，及形成一具第一導 電性接觸層於該具第一導電性半導體層上，以及形成一具 第二導電性接觸層於該具第二導電性半導體層上。 1305683 據上述，本發明方法使發光二極體元件之半導體疊層 在至少一方向上可延伸至其周緣，增加其佔據晶圓的面 積。本發明方法可在不增加製造成本的情況下，增加發光 二極體元件的發光面積，進而提高其發光效率。 【實施方式】 本發明提供一種自行對準晶圓切割方法（self-aligned wafer singulation method)，係可在晶圓上至少一方向上無 需預先蝕刻切割道(streets)以分離晶圓上的發光二極體晶 粒。本發明方法可撰擇在晶圓上至少一方向上無需預先蝕 刻切割道，例如選擇晶圓上至少沿最容易斷裂之晶格方向 上無需預先蝕刻切割道’或者在晶圓之二方向上皆無需預 先蝕刻切割道。由於晶圓面積沿至少一方向上未被蝕刻切 割道佔據，故可增加每一顆發光二極體晶粒佔據的晶圓面 積，進而增加其發光面積，使本發明製作之發光二極體元 件之發光效率提高。 ^ 本發明之發光二極體元件及其製作方法藉由以下具體 • 實施例配合所附圖式，將予以詳細說明如下。 第二A圖係本發明第一具體實施例之發光二極體晶粒 、長於晶圓上的俯視示意圖，第二β圖係沿第二A圖I-I 線的面視意圖，及第二c圖係沿第二A圖π_π線的剖 意圖。參第二Α圖所示，本發明第一具體實施例中僅 —f圓上平行Π-Π線的方向上預先蝕刻切割道2〇6，使得 =一顆發光二極體晶粒20之周緣面積僅在平行π_π線的 向被切割道206佔據，而在平行丨—丨線的方向上，該發 極體晶粒20的半導體疊層可延伸至周緣，進而使該發 光二極體晶粒20擁有發光面積lc，其係大於第一 Α圖所^ 1305683 ::::光二極體晶粒i。的發光面積la’。參第二b圖及第 底9^所不，該發光二極體晶粒2 〇之結構係至少包含一基 第二道、♦一半導體疊層、一具第一導電性接觸層204及一具 之性接觸層2G5。該半導體4層係形成於該基底2〇〇 幻ot:面’該半導體疊層包含-具第一導電性半導體 曰 例如N型半導體層、一具第二導電性 半導體層及-半導體發光層2〇2介於前述兩者之 係弟—導電性接觸層2〇4例如是第一導電性電極層 • 至該具第一導電性半導體層2〇1，及該具第二導 具第-道曰2〇5例如是第二導電性電極層係電性連接至該 層儀:正電性半導體層2G3。如第二C 該半導體疊 緣，、作"平!111-11線之方向延伸至該發光二極體晶粒20的周 ί-Ι線士弟一 Β圖所示，該發光一極體晶粒20周緣沿平行 於兮^方向被姓刻至該基底200表面，以形成切割道206 圖，二、、彖處。第四圖係該發光二極體晶粒2〇的俯視示意 該具f本發明中，較佳地，該具第一導電性接觸層2〇4及 g 弟二導電性接觸層205係形成於該發光二極體晶粒20 ^ 區域’以避免在該晶圓200上執行刻劃(scribing)步 具於相鄰發光二極體晶粒20之間形成刻劃線時損壞到該 ^可〜導電性接觸層204及該具第二導電性接觸層2〇5，進 °防止本發明製作的發光二極體元件產生漏電流。 本'毛明係以自行對準晶圓切告J技術（self-aligned wafer 麵gUlati〇n technique)從晶圓200上分離該等發光二極體晶 其係以該等發光二極體晶粒20上的電極即該具第 刻^電性接觸層204及該具第二導電性接觸層205做為具 在二圖案光罩(mask with a scribing pattern)之對準標記，以 違晶圓200的正面或背面形成刻劃線207。在本發明第 13〇5683 一具體實施例中，在該晶圓200上形成刻劃線207之前， 係先在該晶圓200上沿平行ΙΙ-Π線的方向上以微影及蝕刻 製程先形成切割道206於相鄰發光二極體晶粒20周緣處。 該等切割道206係可蝕刻至該基底200表面（如第二B圖所 示）或該發光二極體晶粒20的該半導體疊層内部。在該 曰圓200上完成刻劃線207之後’接著採用傳統的斷裂 (breaking)及分離技術，即可將該等發光二極體晶粒20沿 著該等刻劃線207從該晶圓200分離。Eight ~ shape ... one you, renting a day, shame, praise light efficiency is very unfavorable. SUMMARY OF THE INVENTION 1305683 An object of the present invention is to provide a light-emitting diode element in which a street is not etched in at least one of the periphery of the light-emitting diode element such that the semiconductor stack of the light-emitting diode element The light-emitting diode element can be extended to the periphery of the dicing street, thereby increasing the light-emitting area of the light-emitting diode element to improve the luminous efficiency. Another object of the present invention is to provide a method for fabricating a light emitting diode device, wherein an electrode of a light emitting diode die on a wafer is used as an alignment mark for forming a scribing line. The etched track is not required to be etched in at least one side of the wafer, and the area of the wafer occupied by each of the light-emitting diodes is increased, thereby improving the luminous efficiency. To achieve the above object, the present invention provides a light emitting diode device comprising a substrate, a semiconductor laminate, a first conductive contact layer and a second conductive contact layer. The semiconductor laminate is formed on a first surface of the substrate, the semiconductor laminate comprising a first conductive semiconductor layer, a second conductive semiconductor layer and a semiconductor light emitting layer interposed therebetween. The first conductive contact layer is electrically connected to the first conductive semiconductor layer, and the second conductive contact layer is electrically connected to the second conductive semiconductor layer, and the semiconductor laminate It extends in at least one direction to the periphery of the light emitting diode element. In another aspect, the present invention provides a method of fabricating a light emitting diode device, comprising: providing a substrate, forming a semiconductor layer on a first surface of the substrate, the semiconductor layer comprising a first conductive semiconductor layer a second conductive semiconductor layer and a semiconductor light-emitting layer interposed between the two, the semiconductor stack corresponding to the periphery of the light-emitting diode element in at least one direction without a cut street, and Forming a first conductive contact layer on the first conductive semiconductor layer and forming a second conductive contact layer on the second conductive semiconductor layer. 1305683 In accordance with the above, the method of the present invention extends the semiconductor stack of the light-emitting diode element to at least one of its circumferences, increasing its area occupied by the wafer. The method of the invention can increase the light-emitting area of the light-emitting diode element without increasing the manufacturing cost, thereby improving the luminous efficiency. [Embodiment] The present invention provides a self-aligned wafer singulation method capable of separating light-emitting diodes on a wafer without pre-etching streets at least in one direction on the wafer. Body grain. The method of the present invention can eliminate the need to pre-etch the scribe lines in at least one direction on the wafer, for example, selecting the wafer to be etched at least in the direction of the most easily broken lattice, without pre-etching the scribe lines' or in the two directions of the wafer The scribe line is pre-etched. Since the wafer area is not occupied by the etched scribe line in at least one direction, the area of the wafer occupied by each of the illuminating diode dies can be increased, thereby increasing the illuminating area, and the illuminating diode component fabricated by the present invention can be used. The luminous efficiency is improved. The light-emitting diode element of the present invention and its manufacturing method will be described in detail below by the following specific embodiments in conjunction with the drawings. 2A is a top plan view of a light-emitting diode of the first embodiment of the present invention, which is longer than the wafer, and the second β-picture is taken along the second line A and FIG. It is a cross-sectional view along the π_π line of the second A diagram. As shown in the second embodiment, in the first embodiment of the present invention, the scribe line 2 〇 6 is pre-etched in the direction of the parallel Π-Π line on the -f circle, so that = the periphery of one of the light-emitting diode dies 20 The area is only occupied by the parallel π_π line by the dicing street 206, and in the direction of the parallel 丨-丨 line, the semiconductor stack of the emitter body 20 can extend to the periphery, thereby making the luminescent diode crystal grain 20 has a light-emitting area lc, which is larger than the first map of the ^ 1305683 :::: photodiode grain i. The luminous area la'. Referring to the second b-figure and the bottom, the structure of the light-emitting diode die 2 至少 comprises at least a base second, a semiconductor stack, a first conductive contact layer 204 and a Sexual contact layer 2G5. The semiconductor 4 layer is formed on the substrate 2, and the semiconductor layer includes a first conductive semiconductor, for example, an N-type semiconductor layer, a second conductive semiconductor layer, and a semiconductor light-emitting layer 2 〇2 is in the middle of the two--the conductive contact layer 2〇4 is, for example, the first conductive electrode layer • to the first conductive semiconductor layer 2〇1, and the second conductive device For example, the second conductive electrode layer is electrically connected to the layer: the positive electrode semiconductor layer 2G3. As shown in the second C, the semiconductor overlap, the direction of the line <111-11 line extends to the periphery of the light-emitting diode die 20, as shown in the figure of the line, the light-emitting body The periphery of the die 20 is engraved to the surface of the substrate 200 along a direction parallel to the ,^ to form a scribe line 206, a second, and a crucible. The fourth figure is a plan view of the light-emitting diode die 2〇. In the present invention, preferably, the first conductive contact layer 2〇4 and the second conductive contact layer 205 are formed on the second conductive contact layer 2205. The light-emitting diode die 20 ^ region 'to avoid performing a scribing step on the wafer 200 to damage the adjacent light-emitting diode die 20 when the scribe line is formed The conductive contact layer 204 and the second conductive contact layer 2〇5 prevent the leakage current from being generated in the light-emitting diode element produced by the present invention. The 'Mao Ming system separates the light-emitting diode crystals from the wafer 200 by self-aligned wafer surface gUlati〇n technique with the light-emitting diode crystal grains The electrode on the 20 is the first electrically conductive contact layer 204 and the second conductive contact layer 205 is used as an alignment mark with a mask with a scribing pattern to violate the wafer 200. The front or back side is formed with a score line 207. In a specific embodiment of the thirteenth aspect of the present invention, before the scribe line 207 is formed on the wafer 200, the lithography and etching process is first performed on the wafer 200 in the direction of the parallel ΙΙ-Π line. A scribe line 206 is formed at a periphery of the adjacent light emitting diode die 20. The dicing streets 206 are etchable to the surface of the substrate 200 (as shown in Figure 2B) or to the interior of the semiconductor stack of the LED die 20. After the scribe line 207 is completed on the dome 200, the conventional lithography die 20 can be removed from the wafer 200 along the scribe lines 207, using conventional breaking and separation techniques. Separation.
第六A圖及弟六B圖係本發明發光二極體晶粒2〇的一 變化例，係在該發光二極體晶粒20的基底200相對該半導 體疊層的另一表面形成一反射片，藉該反射片的設計，使 穿透該基底200的大部份發射光於該基底2〇〇與該反射片 的介面產生全反射，藉以使朝向該基底2〇〇的發射光被導 引朝晶粒正面發光，進而提高該發光二極體晶粒2〇的光輸 出率，以利於增加晶粒發光強度。該反射片具有至少一透 光介電層208相鄰於該基底200及至少一金屬層2〇9 ,並 且该透光介電層208具有一折射係數小於該基底2〇〇及具 有一足夠厚度例如至少〇·1微米（#m)，藉以使該發光二極 體晶粒20朝向該基底200的大部份發射光於該基底2〇〇 與該透光介電層208的介面產生全反射，增加其朝向晶粒 正面發光的機會。 ▲第八A圖及第八B圖係本發明發光二極體晶粒2〇的另 道ί ^例係在該發光一極體晶粒2〇的基底200相對該半 導肢疊層的另-表面形成類似—布拉格反射器的反射片 ^反射片22係由複數層第—透光介電層222及第二透 =電層224交互堆疊組成’其中該第一透光介電層222 的折射係數小於該基底的折射係數，而該第二透光介 13056836A and 6B are a variation of the light-emitting diode die 2〇 of the present invention, in which the substrate 200 of the light-emitting diode die 20 forms a reflection with respect to the other surface of the semiconductor laminate. The sheet is designed such that a large portion of the light that penetrates the substrate 200 emits light at the interface of the substrate 2 and the reflective sheet to cause total reflection, so that the emitted light toward the substrate 2 is guided. Leading to the front side of the crystal grain, thereby increasing the light output rate of the light-emitting diode die 2〇, in order to increase the grain light-emitting intensity. The reflective sheet has at least one transparent dielectric layer 208 adjacent to the substrate 200 and at least one metal layer 2〇9, and the transparent dielectric layer 208 has a refractive index smaller than the substrate 2 and has a sufficient thickness. For example, at least 1 micron (#m), the light emitting diode die 20 is emitted toward a large portion of the substrate 200 to generate total reflection at the interface between the substrate 2 and the transparent dielectric layer 208. , increasing its chances of illuminating the front side of the grain. ▲Athe eighth diagram and the eighth diagram B are another example of the light-emitting diode die 2〇 of the present invention. The substrate 200 of the light-emitting one-pole die 2 is laminated with respect to the semiconductor package. - the surface is formed similarly - the reflection sheet of the Bragg reflector ^ the reflection sheet 22 is formed by alternately stacking a plurality of layers of the first transparent dielectric layer 222 and the second transparent dielectric layer 224, wherein the first transparent dielectric layer 222 The refractive index is smaller than the refractive index of the substrate, and the second transparent medium 1305683
'哗拉格反射器，可將朝向 以提高發光二極體晶粒2〇 該基底200的發射光反射回去， 的光輸出率。 反第二透光介電層224交互堆疊組成，並 層兩兩之間的折射係數呈高低週期性變 係设計成類似一布拉格反射器，可 第十A圖及第十b圖係本發明發光二極體晶粒2〇的 又另-變化例’其係在該發光二極體晶粒2()的基底2〇〇 相對該半導财層的另—表面形細似布拉格反射器的該 反射片22外，又在該反射片22相對該基底2〇〇的另一表 面形成至少一金屬層24，以進一步將穿透該反射片22的 發射光反射回去。 第三A圖係本發明第二具體實施例之發光二極體晶粒 成長於晶圓上的俯視示意圖，第三B圖係沿第三A圖 11 I-Ι 11線的剖面視意圖，及第三c圖係沿第三A圖 線的剖面視意圖。參第三A圖所示，在第二具體實施例中， 並未在該晶圓300上預先刻蝕切割道，而係直接以晶圓3〇〇 上發光二極體晶粒的電極層做為具刻劃圖案光罩的對準標 記’而在晶圓300的正面或背面形成刻劃線3〇6，接著再 執行斷裂及分離步驟，以將該等發光二極體晶粒3〇從晶圓 300分離。由於未在晶圓3〇〇上預先蝕刻切割道’因此該 等發光二極體晶粒30的周緣面積不會被蝕刻切割道佔 據’使得該等發光二極體晶粒30擁有刻劃線306所界定的 完整晶圓面積lc。第一 A圖所示傳統發光二極體晶粒1〇 11 1305683 積被切割道106所佔據’使該發光二極體晶粒ι〇 的囟，la小於刻劃線107所界定的面積。故本發明發光二 極體晶粒30相較於傳統發光二極體晶粒10會擁有較大發 光面積。參第三㈣及第三c圖所示。 』： 3丄之結構係至少包含一基底3〇〇、一半導體疊層，= ‘，性接觸層304及一具第二導電性接觸層305。該丰 導體疊層係形成於該基底3〇〇之—笛本 μ 層包m ίίΐΐ :二 表面’該半導體疊 -具第二導電性半導體層303例如ρ型半導體： =是第-導電性電極層係電:連以 301 ’及該具第二導電性接觸層305例如ϊί -導电性電極層係、電性連接至該具第n 3〇3。如第三C圖所示該半導料層係沿平行叫 ^ 方向延伸至該發光二極體晶粒30兩端的周緣，但^ ，所示’該半導體疊層沿平行切切線方向僅^伸至^ 光二極體晶粒30—端的周緣。 "χ 第七Α圖及第七Β圖係本發明發光二極體晶粒3〇的一 變化例’係在該發光二極L 3〇的基底3〇〇才目對 體疊層的P表面形成-反射片’該反射片之設計與第六 圖反射片的設計-樣，係具有至少一透光介電層3〇7及至 少-金屬層308。第九A圖及第九_該發光二極體晶 粒30的另-變化例，係在該發光二極體晶粒3〇的基底3〇〇 相對該半導體豐層的另-表面形成類似—布拉格反射器的 反射片32。該反射片32之設計與第八圖之反射月22設計 -樣」係由，數層第，透光介電層322及第四透光介電層 324父互堆豐組成。第十- A _及第十一 B圖係本發明發 12 1305683 * . 光二極體晶粒3〇的又另一變化例，其係在該發光二極體晶 粒30的基底300相對該半導體登層的另一表面形成類似布 拉格反射器的該反射片32外，又在該反射片32相對該基 底300的另一表面形成至少一金屬層34’以進一步將穿透 該反射片32的發射光反射回去。 本發明自行對準晶圓分割技術製作之發光二極體晶粒 可接著進行封裝製程，以形成具封裝結構之發光二極體元 件。本發明具封裝結構之發光二極體元件即可應用在各種 發光糸統做為其光源，例如可應用在液晶顯示器之背光源 > 上。 ’、 第五圖係本發明自行對準晶圓分割技術製作之發光二 極體元件相對於以姓刻切割道定義面積之傳統發光二極體 元件之發光強度分佈比較圖。從圖中可明顯看出，就本發 明發光二極體晶粒而言，每六仟顆晶粒中佔58%比例的晶 粒其發光強度分佈在160-170 (mcd)之間，而每六仟顆傳 統發光二極體晶粒中僅佔18 %比例的晶粒發光強度分佈在 160-170 (mcd)之間。因此可清楚看出，本發明提供的自行 對準晶圓切割技術可在不增加製造成本的情況下增加發光 二極體晶粒的面積’進而大為提高其發光效率。 以上所述僅為本發明之具體實施例而已，並非用以限 定本發明之申請專利範圍；凡其它未脫離本發明所揭示之 精神下所完成之等效改變或修飾，均應包含在下述之申請 專利範圍内。 13 1305683 【圖式簡單說明】 第一 A圖係傳統發光二極體晶粒成長於晶圓上之俯 視不意圖， 第一 B圖係第一 A圖沿A-A線之剖面示意圖； 第一 C圖係第一 A圖沿B-B線之剖面示意圖； 第二A圖係本發明第一具體實施例之發光二極體晶 粒成長於晶圓上之俯視不意圖， 第二B圖係第二A圖沿I-Ι線之剖面示意圖； 第二C圖係第二A圖沿II-II線之剖面示意圖； • 第三A圖係本發明第二具體實施例之發光二極體晶 粒成長於晶圓上之俯視不意圖， 第三B圖係第三A圖沿III-III線之剖面示意圖； 第三C圖係第三A圖沿IV-IV線之剖面示意圖； 第四圖係本發明第一具體實施例之發光二極體晶粒 之俯視示意圖； 第五圖係本發明發光二極體晶粒與傳統發光二極體 晶粒之發光強度分佈比較圖；The 哗拉格 reflector can be oriented to increase the light output rate of the light-emitting diode die 2 〇 the emitted light of the substrate 200. The anti-second light-transmissive dielectric layer 224 is alternately stacked, and the refractive index between the two layers is high and low, and the periodic variation is designed to resemble a Bragg reflector. The tenth A and the tenth b-pictures are the present invention. A further variation of the light-emitting diode crystal 2 其 is based on the base 2 of the light-emitting diode die 2 (), which is similar to the other surface of the semi-conductive layer, and is similar to a Bragg reflector. Outside the reflection sheet 22, at least one metal layer 24 is formed on the other surface of the reflection sheet 22 opposite to the substrate 2 to further reflect the emitted light penetrating the reflection sheet 22 back. 3A is a top plan view showing the growth of the LED of the second embodiment of the present invention on the wafer, and the third B is a cross-sectional view along the line I-Ι11 of FIG. The third c-picture is a cross-sectional view along the third A-line. As shown in FIG. 3A, in the second embodiment, the dicing streets are not pre-etched on the wafer 300, and the electrode layers of the luminescent diode chips are directly formed on the wafer 3. A scribe line 3 〇 6 is formed on the front or back surface of the wafer 300 for the alignment mark ' of the scribed mask, and then the scission and separation steps are performed to separate the luminescent diodes The wafer 300 is separated. Since the dicing streets are not pre-etched on the wafer 3', the peripheral areas of the luminescent diode dies 30 are not occupied by the etched scribe lines' such that the luminescent diode dies 30 have a score line 306. The defined complete wafer area lc. The conventional light-emitting diode die 1 130 11 1305683 shown in Fig. A is occupied by the dicing street 106. The germanium of the light-emitting diode grains ι is smaller than the area defined by the scribe line 107. Therefore, the light-emitting diode crystal grains 30 of the present invention have a larger light-emitting area than the conventional light-emitting diode crystal grains 10. See the third (four) and third c pictures. 』: The structure of 3丄 comprises at least one substrate 3〇〇, a semiconductor stack, ‘, a contact layer 304 and a second conductive contact layer 305. The abundance conductor layer is formed on the substrate 3 - a flute μ layer package m ίί : two surfaces 'the semiconductor stack - having a second conductive semiconductor layer 303 such as a p-type semiconductor: = is a first conductive electrode The layer is electrically connected to the 301' and the second conductive contact layer 305, for example, a conductive electrode layer, and electrically connected to the first n 3 〇3. As shown in the third C-picture, the semiconductor layer extends in a parallel direction to the periphery of both ends of the light-emitting diode die 30, but the semiconductor laminate is shown to extend only in the direction of the parallel tangent. To the periphery of the 30-end of the photodiode. "χ The seventh and seventh diagrams are a variation of the light-emitting diode crystal 3〇 of the present invention, which is based on the substrate 3 of the light-emitting diode L 3〇 Surface Forming - Reflecting Sheet The design of the reflecting sheet and the design of the reflecting sheet of the sixth embodiment have at least one transparent dielectric layer 3〇7 and at least a metal layer 308. A further variation of the illuminating diode die 30 of the ninth A and ninth embodiments is such that the substrate 3 of the luminescent diode die 3 is formed similar to the other surface of the semiconductor layer. Reflective sheet 32 of the Bragg reflector. The design of the reflective sheet 32 and the reflective moon 22 design of the eighth embodiment are composed of a plurality of layers, a transparent dielectric layer 322 and a fourth transparent dielectric layer 324. The tenth-A- and eleventh B-pictures of the present invention are 12 1305683 *. Yet another variation of the photodiode die 3〇 is based on the base 300 of the light-emitting diode die 30 opposite to the semiconductor The other surface of the layer is formed outside the reflection sheet 32 like a Bragg reflector, and at least one metal layer 34' is formed on the other surface of the reflection sheet 32 opposite the substrate 300 to further transmit the reflection through the reflection sheet 32. The light is reflected back. The light-emitting diode die fabricated by the self-aligned wafer division technology of the present invention can be subsequently packaged to form a light-emitting diode component having a package structure. The light-emitting diode element having the package structure of the present invention can be applied to various light-emitting systems as its light source, for example, can be applied to a backlight of a liquid crystal display. The fifth figure is a comparison chart of the luminous intensity distribution of the conventional light-emitting diode element produced by the self-aligned wafer dividing technique of the present invention with respect to the conventional light-emitting diode element having the area defined by the scribe line. As is apparent from the figure, in the case of the light-emitting diode crystal grains of the present invention, the crystal light having a ratio of 58% in every six crystal grains has a luminous intensity distribution of 160-170 (mcd), and each Only 18% of the hexagonal conventional light-emitting diode grains have a luminous intensity distribution between 160 and 170 (mcd). Therefore, it can be clearly seen that the self-aligned wafer dicing technique provided by the present invention can increase the area of the luminescent diode crystal grains without increasing the manufacturing cost, thereby greatly improving the luminous efficiency. The above description is only for the specific embodiments of the present invention, and is not intended to limit the scope of the claims of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the following Within the scope of the patent application. 13 1305683 [Simple description of the drawing] The first A picture is a plan view of the conventional light-emitting diode grain growing on the wafer. The first B picture is a schematic view of the first A picture along the AA line; FIG. 2A is a schematic cross-sectional view taken along line BB of the first A diagram; FIG. 2A is a plan view of the light-emitting diode of the first embodiment of the present invention growing on the wafer, and the second B is a second A diagram. A schematic cross-sectional view along the I-Ι line; a second C-picture is a schematic cross-sectional view of the second A-picture along the line II-II; • The third A picture shows the growth of the light-emitting diode of the second embodiment of the present invention. The top view of the circle is not a schematic view, the third B is a schematic view of the third A picture along the line III-III; the third C is a schematic view of the third A picture along the line IV-IV; the fourth picture is the invention A top view of a light emitting diode die of a specific embodiment; a fifth figure is a comparison chart of luminous intensity distribution of the light emitting diode die of the present invention and a conventional light emitting diode die;
第六A圖及第六B圖係本發明第一具體實施例之一 ® 變化例的剖面示意圖，係分別對應第二B圖及第二C圖； 第七A圖及第七B圖係本發明第二具體實施例之一 變化例的剖面示意圖，係分別對應第三B圖及第三C圖； 第八A圖及第八B圖係本發明第一具體實施例之另 一變化例的剖面示意圖，係分別對應第二B圖及第二C圖； 第九A圖及第九B圖係本發明第二具體實施例之另 一變化例的剖面示意圖，係分別對應第三B圖及第三C圖； 第十A圖及第十B圖係本發明第一具體實施例之又 另一變化例的剖面示意圖，係分別對應第二B圖及第二C 14 1305683 圖，及 第十一 A圖及第十一 B圖係本發明第二具體實施例 之另一變化例的剖面示意圖，係分別對應第三B圖及第三 C圖。 主要部份之代表符號： 10、20、30-…發光二極體晶粒 22、32-…反射片 24、34—金屬層 102-…半導體發光層 104-…N型接觸層 106、206----切割道 > 100、200、300-…基底 101…-N型導體層 103…-P型半導體層 105…-P型接觸層 107、207、306----刻劃線 201、 301-…具第一導電性半導體層 202、 302----半導體發光層 203、 303-…具第二導電性半導體層 2〇4、304-…具第一導電性接觸層 > 205、305---具第二導電性接觸層 208-…透光介電層 209- ---金屬層 222- ---第一透光介電層 224- --第二透光介電層 307- ---透光介電層 308- ---金屬層 322- 第三透光介電層 324- --第四透光介電層6A and 6B are cross-sectional views showing a variation of one of the first embodiment of the present invention, corresponding to the second B diagram and the second C diagram, respectively; the seventh A diagram and the seventh B diagram are A schematic cross-sectional view of a variation of the second embodiment of the present invention corresponds to a third B diagram and a third C diagram; and the eighth diagram A and the eighth diagram B are another variation of the first embodiment of the present invention. The cross-sectional views are respectively corresponding to the second B and the second C; the ninth and the ninth B are cross-sectional views of another variation of the second embodiment of the present invention, corresponding to the third B and FIG. 3A and FIG. 10B are cross-sectional views showing still another modification of the first embodiment of the present invention, corresponding to the second B diagram and the second C 14 1305683 diagram, and the tenth FIG. 1A and FIG. 11B are cross-sectional views showing another variation of the second embodiment of the present invention, which correspond to the third B diagram and the third C diagram, respectively. Representative symbols of the main parts: 10, 20, 30-... Light-emitting diode dies 22, 32-... Reflective sheets 24, 34 - Metal layer 102 -... Semiconductor light-emitting layer 104 -... N-type contact layer 106, 206- --- dicing track > 100, 200, 300-... substrate 101...-N type conductor layer 103...-P type semiconductor layer 105...-P type contact layer 107, 207, 306----scribe line 201, 301-...having a first conductive semiconductor layer 202, 302---the semiconductor light-emitting layer 203, 303-... having a second conductive semiconductor layer 2?4, 304-...with a first conductive contact layer> 305---having a second conductive contact layer 208-...transmissive dielectric layer 209---metal layer 222---first transparent dielectric layer 224---second transparent dielectric layer 307 - --- light transmissive dielectric layer 308 - --- metal layer 322 - third transparent dielectric layer 324 - -- fourth transparent dielectric layer
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