TWI303869B - Tape structure for packaging - Google Patents

Tape structure for packaging Download PDF

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Publication number
TWI303869B
TWI303869B TW95128836A TW95128836A TWI303869B TW I303869 B TWI303869 B TW I303869B TW 95128836 A TW95128836 A TW 95128836A TW 95128836 A TW95128836 A TW 95128836A TW I303869 B TWI303869 B TW I303869B
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Taiwan
Prior art keywords
tape
metal
region
regions
polymer material
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TW95128836A
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Chinese (zh)
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TW200810046A (en
Inventor
Ming Hsun Li
Tzung Li Hung
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Chipmos Technologies Inc
Chipmos Technologies Bermuda
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Description

1303869 九、發明說明: 【發明所屬之技術領域】 尤其是有關於一種應用在半導 本發明係有關於一種捲帶之結構 體封裝之捲帶結構。 【先如技術】 現今許多的驅動晶片都採用BareDie的構裝製程來製造,而⑽1303869 IX. Description of the invention: [Technical field to which the invention pertains] In particular, there is a use in a semiconductor package relating to a structural package of a tape. [Before technology] Many of today's driver chips are manufactured using BareDie's package process, and (10)

Die構裝幼制捲帶錢行封裝。在實際上的騎切制包括捲帶 式承购eca_⑽ge;Tcp)封裝與捲帶式薄膜覆晶(ChipDie framed in a roll with money. The actual riding and cutting system includes the tape-type acquisition of eca_(10)ge; Tcp) package and tape-type film flip chip (Chip)

on Fllm;C0F)封裝等類型。就現階段而言,液晶顯示面板(LCD 上的驅動晶片,大都以捲帶承細(Tcp)或是捲帶式薄膜覆 晶(COF)來作為主要的封裝方式。 在捲帶式封裝製程中所採用的捲帶係在聚亞醯胺(p〇iyimidep|) 上形成包括有内引腳(丨贿Lead)與外引腳(〇__)及連接 内外引腳電路的圖案’ _用—種防焊料將連接内外引腳電路的圖案 覆皿而曝路出内外引腳。例如在捲帶承載封裝(TCP)製程中所採 用的内。卩接。技姐要為捲帶式晶粒自動接合(TAB),製程技術大致 可區隔成兩段:内引腳接合(lnner Lead Bonding :丨LB);外引腳接合 (Outer Lead B_ing :㈣),其係_搭載有金屬引腳的捲帶以内 引腳接a技術疋成與晶片的連線。此相較於傳統打 線接合 1303869 (Wire Bonding)技術,捲帶承載封裝優點在於可縮小晶片的金屬焊 墊間距(Pad Pitch)。 第1圖係一種先前技術之捲帶式承載封裝之捲帶示意圖。一般之 捲帶其上可分割成複數個區域1〇,每一個區域1〇中包含有複數個金 屬引腳12(内引腳或外引腳)與複數個分佈於捲帶兩側邊緣之穿透孔 14(holes)。此外,區域1〇之兩側邊緣處還可以鍍上一金屬層16,其 中還有複數個穿透孔14配置於金屬層16間;同時,捲帶上具有一矩 形之晶片接合區域18,以便讓晶片主動面上的金屬凸點經由矩形區域 處與捲f上的内金屬引腳連接’如第1A圖所示。另外,捲帶式封裝之 捲帶亦可以是一種捲帶式薄膜覆晶(C〇F)之捲帶,如第1B圖所示。 在第1B圖中,因C0F捲帶之内引腳12是直接附著於捲帶上,因此可 達到Pad Pitch 40um以下的細間距要求,此外,c〇F捲帶亦具有一矩 幵y之曰曰片接合區域18,以便讓晶片主動面上的金屬凸點經由矩形區域 處與捲帶上的内金屬引腳連接,同時還可以與TCP共用機臺設備。 為了達到抗靜電防護並強化捲帶的強度,在先進技術中,係在捲 帶的兩側分別形成一金屬層。由於先前技術之金屬層之寬度較大,其 見度區域涵蓋整個穿透孔,雖然能夠有效增加穿透孔的強度,同時能 用於抗靜電防護,但也可能在捲帶傳動時產生粒子問題,對先進高密 度封凌之產品的良率產生影響。因此本發明提出一種具有金屬微帶之 捲帶結構,不僅可以大幅度縮小金屬層的面積,還可以具有原本抗靜 電防護以及增加穿透孔(hole)強度的作用。 1303869 【發明内容】 β餐於上述之發明背景中,為了符合產業上某些利益之需求,本發 β種’、有孟屬心之捲帶結構,可用以縮小上述傳統之金屬層 之面積。 、一本明之_主要目的在提供—種棬帶式薄膜覆晶封裝之捲帶,係 為一高分子材料所形成之軟基板,其上分割成複數個區域且每個區域 中包括有-繼峨嫩___域四周之複 數個金屬引腳,其中捲帶之特徵為:在捲帶上之切割線及捲帶兩側邊 緣之間配置一金屬微帶。 之另主要目的在提供’捲帶式封裝之捲帶,係為一高分 刊料所形成之軟基板,其上分赋複數個區域且每_域中包括有 矩化之曰曰片接合區域及分佈於矩形之晶片接合區域四周之複數個金 屬引腳’財該捲帶之特徵為:捲帶之_邊緣上均配置-金屬微帶。 本發明之再-主要目的在提供一種捲帶式封裝之捲帶,係為一高分 子材料所形成之軟基板,捲帶之_邊_近配置有複數個穿透孔, 並於捲帶上分賴複數個_且每麵域巾包括有_矩形之晶片接合 區域及分佈於_之晶片接合區域至少—端社之複數個金屬引腳, 其中捲V之特徵為:穿透孔四周均有—線寬之金屬層,並且以至少— 平行於該捲帶兩側邊緣之金屬微帶來連接每_該穿透孔。 【實施方式】 1303869 *本姆蝴剛蝴-瓣鄉她撕結構,同 時因為捲帶式封裝之捲帶結構包括了捲帶承朗裝(Tcp)與捲帶式薄 (Chip 〇n Film)^IM , 種捲帶結構。然而除了這些詳細描述之外,本發明還可以廣泛地施行 在其他的實施财’且本發_侧錢岐,如之_專利範圍 為準。 首先,請參考第2 _示’係她之捲帶嶋實施例之上視 圖。本發明之㈣係在聚亞醯胺(p〇所形成之軟基板上分割成複數個區 域30,且每—個區域3〇中配置—接合面&,其係位於捲帶之切割線 之間’接合面31上包括有内_2與外引腳(未顯示於 電路圖案(―)、複數個穿透孔34以及—個晶片接合區域%,宜 中牙透孔34位於切割線37與捲帶之兩側邊緣33之間,同時,曰片接 合區域35之形狀通常是使用矩形結構。然後再使用-防焊層料片接 合區絲以外的電路圖案覆蓋,只曝露出位於晶片接合區域内 腳32,並且於捲帶上形成金屬微帶36。 在本實施例的第2A圖中,上述金屬微帶36係分別配置於捲儀 兩側邊緣33上。在本實施例的第2B圖中,每一個穿透孔糾 -線寬之金屬層4〇,並且相鄰之穿透孔34四周之金屬層則 一金_ 36 _。耻,树接之金 與金_ 36勤 一連接鍊’連接鍊位於平行於鱗之兩㈣緣33與切魏π之間; 此外上述之連接鍊的連接方式也可使用金屬微帶%在金屬層奶的 8 1303869 圖所示 ‘側邊來形成連接,如第2c •上述弟2A圖、第2B圖與第%圖所示,係揭露本發明之用於捲 帶承載封裝(TCP)之捲㈣構。在上述之捲帶結構中 ,金屬内引腳32 I配置於晶片接合區域35之四周、晶片接合區域35之兩相對邊、或 曰片接。區域35之_臨邊,甚至於配置晶片的設計,而可配置在晶 片接。E域35的任_邊上。此外,上述之金屬微帶%或穿透孔四周 王屬層40之見度可以小於或是等於4毫米⑼叫。 一另外,在本發明之實施例中,也可將晶片接合區域%挖空而形成 /口(device hole)(未顯示於圖中),而對於此種結構所形成之捲 I亦為本發明之實施態樣。同時,本發明之捲帶在與晶片完成封裝 會將捲帶沿著切割線37來切除位於封褒體以外之部份捲帶,以 嫌完成«之程序’也就是說,在完成晶片封褒之製程後,本發明之捲 V上的金屬微帶會被切除。 此外,當制滾筒__方式來傳動捲帶時,此時,捲帶上則 ΓΓ礙孔。故在她之嘛載_構的捲帶上,可以 /又有牙透孔,如f 3 _示。在彻賴3目巾,上述微 帶36係配置於捲帶之兩側邊緣33上。 户也田本實施例中的捲帶 一片完成封裝後,就會將捲帶沿著切騎37來切除位於封裝體以 外之部份捲帶,以完成封裝之程序。 、 接著’請參考第4圖,係本發明之一種捲帶式薄膜覆晶(C0F) 1303869 的捲帶結構之上視κ。如第4 _示,本實補t的捲雜在聚亞醯 胺(pi)所形成之軟基板上分割成複數個區域3〇,且每一個區域3〇中配 置一接合面31,其係位於捲帶之切割線37之間,接合面3彳上包括有 内引腳32與外引腳38之電路圖帛(|ay〇ut),然後再使用防焊層將連 接内外引腳的電路圖案覆蓋,只曝露出内引腳32與外引腳%,並且 於捲帶上形成金屬微帶36。 在本實施例的第4A圖中,上述金屬微帶36係分別位於兩側穿透 孔34與切割線37之間。而在本實施例的第4B圖中,上述之金屬微帶 36係配置於捲帶之兩側邊緣33上。在本實施例的第4c圖中,每一個 穿透孔34四周均有-線寬之金屬層4〇,並且相鄰之穿透孔34四周之 至屬層40係以至少一金屬微帶來連接。因此,相連接之金屬層4〇 與金屬微帶36構成-連接鍊,連接雜於平行祕帶之_邊緣% ; 另外,上述之連接鍊的連接方式也可使用金屬微帶36在金屬層4〇的 -側邊來形成連接,如帛4D圖所示。此外,在本實施例之捲帶結構中, 金屬内引腳32還可配合晶片的設計將之配置成矩陣形式,或配置成四 邊形之構造、或配置成兩相對的兩排構造等。此外,上述之金屬微帶 36或穿透孔四周之金屬層4〇之寬度可以小於或是等於4毫米_)。 另外,在本發明之實施例中,也可將晶片接合區域35挖空而形成 一開口(device hole)(未顯示於圖中),而對於此種結構所形成之捲 帶’亦為本發明之實施態樣。同樣的,當本實施例巾祕帶在與晶片 完成封裝後,就會職帶沿著蝴線37來切除位於封裝體以外之部份 10 UU3869 覆晶封裝之捲帶結構上視 第4A〜4D圖係本發明之捲帶式薄膜 圖;以及On Fllm; C0F) package and other types. At this stage, the liquid crystal display panel (the driver chip on the LCD, mostly with tape-reel (Tcp) or tape-and-reel film (COF) as the main packaging method. In the tape and reel packaging process The tape used is formed on polyimidamide (p〇iyimidep|) to form a pattern including an inner pin (a bribe lead) and an outer pin (〇__) and a circuit for connecting the inner and outer pins. The anti-solder will connect the pattern of the inner and outer pin circuits to expose the inner and outer pins. For example, in the tape-receiving package (TCP) process, the splicing is adopted. Bonding (TAB), the process technology can be roughly divided into two sections: inner lead bonding (Inner Lead Bonding: 丨 LB); outer lead bonding (Outer Lead B_ing: (four)), which is a volume equipped with metal pins With the internal pin connection technology, it is connected to the wafer. Compared with the traditional wire bonding 1303869 (Wire Bonding) technology, the tape carrier package has the advantage of reducing the wafer pad pitch (Pad Pitch). The figure is a schematic view of a tape reel of a prior art tape and tape carrier package. The tape can be divided into a plurality of regions 1 , each of which contains a plurality of metal pins 12 (inner or outer pins) and a plurality of penetrating holes distributed on both sides of the tape. In addition, a metal layer 16 may be plated on both side edges of the region 1 , wherein a plurality of penetration holes 14 are disposed between the metal layers 16; meanwhile, the tape has a rectangular wafer. The bonding region 18 is such that the metal bumps on the active surface of the wafer are connected to the inner metal pins on the volume f via the rectangular regions as shown in FIG. 1A. In addition, the tape of the tape and reel package may also be a roll. Tape-type film-coated (C〇F) tape, as shown in Figure 1B. In Figure 1B, because the pin 12 inside the C0F tape is directly attached to the tape, Pad Pitch 40um can be achieved. The following fine pitch requirements, in addition, the c〇F tape also has a die bond area 18 of a matrix y in order to allow the metal bumps on the active side of the wafer to pass through the rectangular regions and the inner metal pins on the tape Connection, and can also share the machine equipment with TCP. In order to achieve anti-static protection and strengthen the tape In the advanced technology, a metal layer is formed on both sides of the tape. Since the width of the metal layer of the prior art is large, the visibility area covers the entire penetration hole, although the penetration hole can be effectively increased. Strength, at the same time can be used for antistatic protection, but it may also cause particle problems during tape and reel drive, which has an impact on the yield of advanced high density sealed products. Therefore, the present invention proposes a tape and reel structure having a metal microstrip. Not only can the area of the metal layer be greatly reduced, but also the original antistatic protection and the effect of increasing the strength of the hole. 1303869 [Summary of the Invention] The β meal is in the above-mentioned invention background, in order to meet certain industrial interests. The demand, the beta type ', has a tape structure of the genius, can be used to reduce the area of the above-mentioned traditional metal layer. The main purpose of the invention is to provide a tape-type film flip-chip package tape, which is a soft substrate formed by a polymer material, which is divided into a plurality of regions and each region includes A plurality of metal pins around the ___ domain, wherein the tape is characterized by: a metal microstrip disposed between the cutting line on the tape and the edges of the tape. The other main objective is to provide a tape reel-wrapped tape, which is a soft substrate formed by a high-scoring material, which is divided into a plurality of regions and includes a rectangularized nipper joint region in each _ domain. And a plurality of metal pins distributed around the junction area of the rectangular wafer. The tape is characterized by: a metal microstrip disposed on the edge of the tape. A further object of the present invention is to provide a tape reel-wrapped tape which is a soft substrate formed of a polymer material, and a plurality of through holes are arranged in the vicinity of the tape and are wound on the tape. The plurality of _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ a metal layer of line width, and each of the through holes is connected by at least a metal micro-belt parallel to both side edges of the tape. [Embodiment] 1303869 *Bommu Butterfly-Flap Township tears the structure, and because the tape-and-reel package has a tape-reel structure including Tcp and Chip 〇n Film^ IM, kind of tape structure. However, in addition to these detailed descriptions, the present invention can be widely implemented in other implementations, and the present invention is subject to the scope of the patent. First, please refer to the second view of the second embodiment of the tape. The fourth aspect of the present invention is divided into a plurality of regions 30 on a flexible substrate formed of p ,, and each of the regions 3 〇 is disposed in a bonding surface & The inter-joint surface 31 includes an inner and outer pins (not shown in the circuit pattern (-), a plurality of through holes 34, and a wafer bonding area %, and the medium-to-medium hole 34 is located at the cutting line 37. Between the two side edges 33 of the take-up reel, at the same time, the shape of the gusset joint region 35 is usually a rectangular structure. Then, it is covered with a circuit pattern other than the solder resist splicing area, and only exposed at the wafer bonding area. The inner leg 32 and the metal microstrip 36 are formed on the web. In the second embodiment of the present embodiment, the metal microstrips 36 are respectively disposed on the side edges 33 of the reel. In the second embodiment of the present embodiment, FIG. In each of the penetrating holes, the metal layer of the line width is 4〇, and the metal layer around the adjacent penetrating hole 34 is a gold _ 36 _. shame, the tree is connected with the gold and the gold _ 36 is a connecting chain. 'The connecting chain is located between the two (four) edges 33 and the cut Wei π parallel to the scale; in addition to the above-mentioned connecting chain The connection method may also use the metal microstrip % to form a connection on the side of the metal layer milk as shown in Fig. 8 1303869, as shown in the second embodiment, the above 2A diagram, the 2B diagram and the % diagram, revealing the present invention. In the tape winding structure described above, the metal inner lead 32 I is disposed around the wafer bonding region 35, the opposite sides of the wafer bonding region 35, or the chip connection. The edge of the region 35, even the configuration of the wafer, can be placed on the edge of the wafer. E domain 35. In addition, the metal microstrip % or the king layer 40 around the penetrating hole The degree can be less than or equal to 4 mm (9). In addition, in the embodiment of the present invention, the wafer bonding area % can also be hollowed out to form a device hole (not shown in the figure), and for this The roll I formed by the structure is also an embodiment of the present invention. Meanwhile, when the tape of the present invention is packaged with the wafer, the tape will be cut along the cutting line 37 to cut off a portion of the tape outside the sealing body. In order to complete the "program", that is, after completing the process of wafer sealing, The metal microstrip on the roll V of the present invention will be cut off. In addition, when the roll is made to drive the tape, at this time, the tape is obstructed by the tape. Therefore, in her case, the tape is loaded. On the top, there may be or have a through hole, such as f 3 _. In the 3 eye towel, the microstrip 36 is disposed on both side edges 33 of the tape. After the package is completed, the tape will be cut along the cutting edge 37 to cut off a portion of the tape outside the package to complete the packaging process. Next, please refer to FIG. 4, which is a tape film of the present invention. The roll-up structure of the flip chip (C0F) 1303869 is viewed as κ. As shown in the fourth figure, the roll of the solid t is divided into a plurality of regions on a soft substrate formed of polyamine (pi), And each of the regions 3A is provided with a joint surface 31 which is located between the cutting lines 37 of the winding tape, and the joint surface 3 includes a circuit diagram of the inner lead 32 and the outer lead 38 (|ay〇ut) Then, using a solder mask to cover the circuit pattern connecting the inner and outer pins, only expose the inner pin 32 and the outer pin %, and form a metal microstrip on the tape 36. In the fourth embodiment of the present embodiment, the metal microstrips 36 are respectively located between the side penetration holes 34 and the cutting line 37. In the fourth embodiment of the present embodiment, the metal microstrips 36 are disposed on both side edges 33 of the tape. In the 4th figure of the embodiment, each of the penetration holes 34 has a metal layer 4〇 of a line width, and the contiguous layer 40 is surrounded by at least one metal microlayer. connection. Therefore, the connected metal layer 4〇 and the metal microstrip 36 constitute a connecting chain, and the connection is mixed with the edge % of the parallel secret tape; in addition, the above connecting chain can also be connected by using the metal microstrip 36 in the metal layer 4 The - - side to form the connection, as shown in 帛 4D. Further, in the tape and reel structure of the present embodiment, the metal inner leads 32 may be arranged in a matrix form in accordance with the design of the wafer, or may be configured in a quadrangular configuration or in two opposite two-row configurations. In addition, the width of the metal microstrip 36 or the metal layer 4 around the through hole may be less than or equal to 4 mm. In addition, in the embodiment of the present invention, the wafer bonding region 35 may be hollowed out to form a device hole (not shown in the drawing), and the tape formed for such a structure is also the present invention. The implementation of the situation. Similarly, when the tape of this embodiment is packaged with the wafer, the tape is removed along the butterfly line 37 to remove the portion of the 10 UU3869 flip chip package on the outside of the package. 4A~4D Figure is a tape and film diagram of the present invention;

第5A〜5B 圖 結構上梘 係本發明之無穿透孔之捲帶式薄膜覆晶封襄 之捲帶 圖 【主要元件符號說明】 10區域 12内引腳 14穿透孔 16金屬層 18晶片接合區域 3〇捲帶之區域 31捲帶之接合面 32金屬内引腳 33捲帶之兩側邊緣 34穿透孔 35晶片接合區域 36金屬微帶 3*7切割線 38外引腳 40穿透孔之金屬層 125A~5B Figure 枧 枧 枧 本 本 本 本 本 本 本 本 本 本 卷 卷 卷 【 【 【 【 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 Joint area 3 〇 tape area 31 lap joint surface 32 metal inner lead 33 tape side edge 34 through hole 35 wafer bonding area 36 metal microstrip 3*7 cutting line 38 outer pin 40 penetration Hole metal layer 12

Claims (1)

1303869 十、申請專利範圍: 1_ 一種薄膜覆晶封裝之捲帶’係為—高分子材料所形成之軟基板,其上分 割成複數個區域且每個該㈣域中均配置複數個金^丨聊,其中該捲帶之 特徵為: / 該捲帶之兩側邊緣與切割線之間配置一金屬微帶。 晶 2_如申請專利範圍第彳項所述之捲帶,其中該等區域中進—步配置有一 片接合區域且該晶片接合區域上具有—開口(細從卜咖)。1303869 X. Patent application scope: 1_ A film-wrapped package tape is a soft substrate formed by a polymer material, which is divided into a plurality of regions and each of which is provided with a plurality of gold holes. Talk, wherein the tape is characterized by: / A metal microstrip is disposed between the side edges of the tape and the cutting line. A tape according to the above-mentioned claim, wherein the region is further provided with a bonding region and the wafer bonding region has an opening (fine). 3.如申請專利範圍第2項所述之捲帶,其中該晶片接合區域為一矩形結 構。 4_如申請專利範圍第]項所述之捲帶,其中該捲帶之兩邊緣附近,均進一 步配置有複數個穿透孔。 5. 如申請專利範圍第]項所述之捲帶,其中該高分子材料為聚亞酿胺 (polyimide) 〇 6. 如申請專利範圍第t項所述之捲帶,其中該金屬微帶之寬度小於^毫米 (mm)。 7_ -種捲帶式封裝之捲帶,係為—高分子材料所形成之軟基板,其上分割 成複數個區域且每該等區域巾均配置複數個金屬彳⑽,其巾該捲帶之特 徵為: 該捲帶之兩側邊緣上均配置一金屬微帶。 女申明專利範圍弟7項所述之捲帶’其中該等區域中進一步配置有一晶 片接3區域且该晶片接合區域上具有一開口(device hole)。 13 1303869 其中4晶片接合區域為一矩形結 其中该捲帶之兩邊緣附近 ’均進 其中该高分子材料為聚亞醯胺 9.如申請專利範圍第8項所述之捲帶, 構0 10.如申請專利範圍第7項所述之捲帶 一步配置有複數個穿透孔。 11·如申請專利範圍第7項所述之捲帶 (polyimide) 〇 12. 如申請專利範圍第7項所述之捲帶,其中該金屬微帶之寬度小㈣毫 φ 米(mm) 〇 13. -種捲帶式封裝之捲帶,係為一高分子材料所形成之軟基板,該捲帶之 •兩側邊_近配置有複數縛透孔,並_捲帶上分割成複數個區域且每 . 個該等區域中均配置複數個金屬引腳,其中該捲帶之特徵為: • 該穿透孔四周均配置一具有線寬之金屬層,並且以至少—平行於該 捲帶兩側邊緣之金屬微帶來連接每一該穿透孔。 14·如申請專利範圍帛13項所述之捲帶,其中該等區域中進一步配置有一 曰曰片接合£域且該晶片接合區域上具有一開口(device hole)。 15.如申請專利範圍第14項所述之捲帶,其中該晶片接合區域為一矩形結 構0 16·如申請專利範圍第13項所述之捲帶,其中高分子材料為聚亞趨胺 (Polyimide)。 17_如申請專利範圍第13項所述之捲帶,其中該金屬微帶之寬度小於4毫 米(mm) 〇 14 1303869 18. 如申請專利範圍第13項所述之捲帶,其中該金屬微帶之穿透孔四周之 金屬線寬小於4毫米(mm)。 19. 如申請專利範圍第13項所述之捲帶,其中連接每一該穿透孔之金屬微 帶係以連接該穿透孔一侧邊之金屬層來形成連接鍊。3. The tape of claim 2, wherein the wafer bonding region is a rectangular structure. 4_ The tape as described in claim 4, wherein a plurality of penetration holes are further disposed in the vicinity of both edges of the tape. 5. The tape according to the above-mentioned patent application, wherein the polymer material is polyimide 〇 6. The tape according to claim t, wherein the metal microstrip The width is less than ^ mm (mm). 7_ - a tape reel-wrapped tape, which is a soft substrate formed of a polymer material, which is divided into a plurality of regions and each of which is provided with a plurality of metal crucibles (10), and the tape is wrapped with a tape The feature is: a metal microstrip is arranged on both sides of the tape. The invention is directed to a tape as described in claim 7 wherein a further region is provided with a wafer-to-three region and a device hole is formed on the wafer bonding region. 13 1303869 wherein the 4 wafer bonding region is a rectangular junction, wherein the vicinity of both edges of the tape is 'into the middle, wherein the polymer material is polyamidamine. 9. The tape as described in claim 8 is constructed. The tape as described in claim 7 has a plurality of through holes arranged in one step. 11. The tape as described in claim 7 of the patent application 〇12. The tape according to claim 7, wherein the width of the metal microstrip is small (four) millimeters (mm) 〇13 - a tape reel-wrapped tape, which is a soft substrate formed of a polymer material, the two sides of the tape are arranged with a plurality of through-holes, and the tape is divided into a plurality of regions And each of the regions is provided with a plurality of metal pins, wherein the tape is characterized by: • a metal layer having a line width disposed around the through hole, and at least—parallel to the tape A metal micro-belt on the side edge connects each of the penetration holes. 14. A tape as claimed in claim 13 wherein the regions are further provided with a gusset bond and a device hole in the wafer bond region. 15. The tape according to claim 14, wherein the wafer bonding region is a rectangular structure. The tape according to claim 13 is wherein the polymer material is poly-retinoamine ( Polyimide). The tape according to claim 13, wherein the metal microstrip has a width of less than 4 mm (mm) 〇 14 1303869. The tape according to claim 13 wherein the metal micro The metal line width around the penetration hole of the belt is less than 4 mm (mm). 19. The tape of claim 13, wherein the metal microstrip connecting each of the through holes forms a connecting chain by connecting a metal layer on one side of the through hole. 1515
TW95128836A 2006-08-07 2006-08-07 Tape structure for packaging TWI303869B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI510150B (en) * 2014-05-30 2015-11-21 Chipmos Technologies Inc Flexible circuit board

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI641106B (en) * 2016-12-15 2018-11-11 南茂科技股份有限公司 Chip package substrate and chip package structure
TWI715492B (en) * 2020-05-08 2021-01-01 頎邦科技股份有限公司 Circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI510150B (en) * 2014-05-30 2015-11-21 Chipmos Technologies Inc Flexible circuit board
CN105323947A (en) * 2014-05-30 2016-02-10 南茂科技股份有限公司 Flexible circuit carrier plate
CN105323947B (en) * 2014-05-30 2018-05-22 南茂科技股份有限公司 Flexible circuit carrier plate

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