TWI289700B - Method of fabricating a liquid crystal-on-silicon backplane - Google Patents

Method of fabricating a liquid crystal-on-silicon backplane Download PDF

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Publication number
TWI289700B
TWI289700B TW90130257A TW90130257A TWI289700B TW I289700 B TWI289700 B TW I289700B TW 90130257 A TW90130257 A TW 90130257A TW 90130257 A TW90130257 A TW 90130257A TW I289700 B TWI289700 B TW I289700B
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Taiwan
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layer
region
pad
pixel array
dielectric layer
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TW90130257A
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Chinese (zh)
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Tian-Shiung Chen
Wei-Shiau Chen
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United Microelectronics Corp
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Abstract

A reflective mirror layer is formed over a silicon substrate and is then selectively etched to define a crossover pad region, a pixel array region, and a bonding pad region on the silicon substrate. A dielectric layer is deposited over the crossover pad region, the pixel array region and the bonding pad region, and a plurality of crossover pad vias are formed within the crossover pad region thereafter. By filling the crossover pad vias with conductive material, a plurality of plugs is formed in the plurality of the vias. Then, a top pad, electrically coupled to the bottom pad via the plugs, is formed over the crossover pad region. A spacer pattern on the dielectric layer within the pixel array region is defined thereafter. Finally, the dielectric layer is etched to form a plurality of spacers within the pixel array region.

Description

1289700 五、發明說明(1) |發明之領域 本發明提供一種製作石夕晶液晶(1 i q u i d c r y s t a 1 〇 η silicon,LCoS)顯示背板(backplane)的方法,尤指一種 同日^製作石夕晶液晶顯示背板之間隔體(s p a c e r )與跨接塾 (crossover pad)的方法。 背景說明 石夕晶液晶微顯示器(m i c r ο - d i s p 1 a y )是反射式液晶投 I影機(reflective LCoS projector)與背投影電視 rear-projection television)的關鍵技術。LCo嫩顯示 器最大之優點係在於可大幅降低面板生產成本、體積小, |並且具有高解析度以及低功率。其與一般薄膜電晶體一液 晶顯示器(thin film transistor-liquid crystal isplay ’ TFT-LCD)不同的是,TFT-LCD上下兩面皆是以坡 I璃作為基底(substrate),但LCoSj堇有上面採用玻璃,底 下的基底則是以半導體材料矽為主,因此,LCoS製程其實 |是結合LCD與半導體互補式金氧半導體(complementary metal-oxide semiconductor,CMOS)製程的技術。以現今 |之LCoS技術而言,其大致可分為兩種型態:穿透式 (transmissive)以及反射式(reflective)兩類。 層 在LCD裝置中,為了要得到穩定的顯示品質,液1289700 V. INSTRUCTION DESCRIPTION OF THE INVENTION (1) Field of the Invention The present invention provides a method for producing a backplane by using a solar crystal liquid crystal (LCD), in particular, a same day. A method of displaying a spacer and a crossover pad of the backplane. BACKGROUND OF THE INVENTION The Si Xijing liquid crystal microdisplay (m i c r ο - d i s p 1 a y ) is a key technology of a reflective LCoS projector and a rear-projection television. The biggest advantage of the LCo tender display is that it can significantly reduce panel production costs, small size, and has high resolution and low power. Different from the thin film transistor-liquid crystal isplay 'TFT-LCD', the upper and lower sides of the TFT-LCD are based on the slope of the glass, but the LCoSj has the glass on the top. The underlying substrate is based on semiconductor materials, so the LCoS process is a technology that combines LCD and semiconductor complementary metal-oxide semiconductor (CMOS) processes. In today's LCoS technology, it can be roughly divided into two types: transmissive and reflective. Layer In the LCD device, in order to obtain stable display quality, liquid

第5頁 1289700Page 5 1289700

的厚度’或稱間隙(cel丨gap)(即透明導電基板與半導體 基底間之間隔)必得要精準地控制在一定值。而在習知的 液晶顯示面板裝置的製程裡,為了要維持間隙,通常會在 兩基底間置入塑性珠(plastic bead)、玻璃珠,或是玻璃 纖維以做為間隔體。因此,間隙大小就由間隔體的高产來 定義。而在習知的LCD裝置的製程中,間隔體係以喷1麗X “ (spray)之方式置入,因此,間隔體於液晶顯示基底間之 位置並無法正確地控制。如此,則有可能因間隔體出現在 光穿透區(light transmitting region),而使得光遭門 隔體散射,因而降低顯示品質。並且,由於間隔體有呈現 不均勻分佈的可能,亦會造成在間隔體群聚之部份,其顯 示品質下降。同時,間隙大小的維持也會出現困難。更甚 者,在同一批次(ba t ch )或是不同批次間所生產之顯示器 規格也會不一致,如此則會嚴重影響產品的良率,並提高 生產之成本。 此外,受到微顯示器尺寸及成本的限制,通常會將積 體電路中之驅動電路(drive circuit)整合至具有像素電' 晶體(pixel transistor)的顯示背板上,亦即,該驅動電 路係直接製造於基底上,而不是如傳統LCD的做法,設計 成大型之外部驅動電路。於習知技術中,此項製程係於置 入間隔體後才實施,而後再於後段裝配製程(backend assembly process)中將上層之透明導電基板的電極銲接 至該内電路板上。The thickness ′ or the gap (the gap between the transparent conductive substrate and the semiconductor substrate) must be accurately controlled to a certain value. In the process of the conventional liquid crystal display panel device, in order to maintain the gap, plastic bead, glass beads, or glass fibers are usually placed between the two substrates as a spacer. Therefore, the gap size is defined by the high yield of the spacer. In the process of the conventional LCD device, the spacer system is placed in a spray pattern, so that the position of the spacer between the liquid crystal display substrates cannot be properly controlled. Thus, there may be The spacer appears in the light transmitting region, so that the light is scattered by the gate spacer, thereby degrading the display quality. Moreover, since the spacer has a possibility of uneven distribution, it also causes the spacer to be clustered. In part, the display quality is degraded. At the same time, the maintenance of the gap size will be difficult. Moreover, the display specifications produced in the same batch (ba t ch ) or between different batches will be inconsistent, so Seriously affect the yield of the product and increase the cost of production. In addition, due to the size and cost of the microdisplay, the drive circuit in the integrated circuit is usually integrated into the pixel transistor. The display backplane, that is, the drive circuit is directly fabricated on the substrate, rather than being designed as a large external drive circuit as in the conventional LCD. In the technique, the process is performed after the spacer is placed, and then the electrode of the upper transparent conductive substrate is soldered to the inner circuit board in a backend assembly process.

五、發明說明(3) 由於習知方法係利用噴灑方式來置入珠狀間隔體,此 法所形成之間隔體位置將不固定,並且其分佈亦有不均勻 的可能,同時,所製造出的產品規袼將無法統一,因此, 對於間隔體的置入方式或形態必須要謀求改善之方式始可 大幅提高產品品質。此外,若能於製程方面利用發展漸趨 成熟之CMOS技術,將LCoS顯示器之製程進一步整合,則可 有效扼南產率’降低生產成本。 發明概述 因此本發明之主要目的在於提供一種製作矽晶液晶顯 示背板的方法,以解決上述習知製作方法的問題。 在本發明之最佳實施例中,首先於一半導體基底上形 成一反射鏡層(reflective mirror layer),而後選擇性 蝕刻該反射鏡層,以於該半導體基底上定義出一跨接墊區 域、一像素陣列(Pixel array)區域以及一銲墊(b〇nding pad)區域’其中該跨接墊區域包含有一由該反射鏡層所構 成之下導電板(bottom pad)’該像素陣列區域包含有複數 個由該反射鏡層所構成之反射單元以及複數條溝渠形成於 該反射單元之間’而該銲墊區域則包含有至少一由該反射 鏡層所構成之銲墊。接著並於該複數條溝渠中填入一填充 材料(gap f i 1 1 ing material ),且於該跨接墊區域、該像 1289700 五、發明說明(4) 素陣列區域以及該銲墊區域上沈積一介電層。隨後於該介 電層上形成一第一光阻層,該第一光阻層於該跨接墊區域 上方具有複數個開口以定義出一跨接墊介層洞(cr〇ss〇ver pad v 1 a )區域,再進行一蝕刻製程,經由該複數個開口蝕 刻該介電層,以於該跨接墊區域之該介電層中形成複數個 跨接塾介層洞,而後去除該第一光阻層,並於該複數個跨 接塾介層洞内填入導電材質,以形成複數個插塞。接著於 該跨接塾區域上形成一上導電板,並經由該複數個插塞與 該下導電板電連接。最後於該半導體基底上方形成一第二 光阻層’該第二光阻層遮蔽該跨接墊區域,並於該像素陣 列區域之該介電層上方定義出複數個間隔體的位置,再餘 刻該介電層’以於該像素陣列區域之該介電層中形成複數 個間隔體’而完成石夕晶液晶顯示背板的製作。 由於本發明之製作方法是利用微影 (photo 1 ith〇graphy)以及蝕刻等方法於矽晶液晶顯示背 上製作出位置固定、高度固定之柱狀間隔體,因此可以 免習知方法中珠狀間隔體分佈不均等問題,而製造出 得以精確控制並維持之LCo%顯示器。此外,由於本發= 之製作方法係於LC〇S顯示背板上同時製作柱狀間隔鱼 供”路之跨,因此本發明不需再於後段裝配製程ΐ 將上”透明ί電基板的電極焊接至該内電路板上,如: 則可減y名知方法中之製程步驟,進而提升產帛,降 本0 八V. INSTRUCTIONS (3) Since the conventional method uses a spraying method to place the bead spacers, the position of the spacer formed by the method will not be fixed, and the distribution thereof may be uneven, and at the same time, The product specifications will not be uniform. Therefore, the way in which the spacers are placed or the form must be improved to improve the product quality. In addition, if the process of LCoS display is further integrated in the process of using the increasingly mature CMOS technology, it can effectively reduce the production cost. SUMMARY OF THE INVENTION It is therefore a primary object of the present invention to provide a method of making a twin crystalline liquid crystal display backsheet to solve the above-described problems of conventional fabrication methods. In a preferred embodiment of the present invention, a reflective mirror layer is first formed on a semiconductor substrate, and then the mirror layer is selectively etched to define a jumper pad region on the semiconductor substrate. a Pixel array region and a padding region, wherein the jumper pad region includes a bottom pad formed by the mirror layer. The pixel array region includes A plurality of reflective cells formed by the mirror layer and a plurality of trenches are formed between the reflective cells, and the pad region includes at least one solder pad formed by the mirror layer. And filling a plurality of trenches with a filling material (gap fi 1 1 ing material ), and depositing on the jumper pad region, the image 1289700, the invention description (4) array region, and the pad region A dielectric layer. Forming a first photoresist layer on the dielectric layer, the first photoresist layer having a plurality of openings above the jumper pad region to define a jumper via hole (cr〇ss〇ver pad v 1 a) region, performing an etching process, etching the dielectric layer through the plurality of openings to form a plurality of via via vias in the dielectric layer of the jumper pad region, and then removing the first The photoresist layer is filled with a conductive material in the plurality of via holes to form a plurality of plugs. An upper conductive plate is then formed on the jumper region and electrically connected to the lower conductive plate via the plurality of plugs. Finally, a second photoresist layer is formed over the semiconductor substrate. The second photoresist layer shields the jumper pad region, and defines a plurality of spacers above the dielectric layer of the pixel array region. The dielectric layer is formed to form a plurality of spacers in the dielectric layer of the pixel array region to complete the fabrication of the Sihua crystal liquid crystal display backplane. Since the manufacturing method of the present invention is to produce a columnar spacer having a fixed position and a high degree of fixation on the back of the twinned liquid crystal display by means of photolithography and etching, it is possible to avoid the beading in the conventional method. The problem of unequal distribution of spacers creates an LCo% display that is precisely controlled and maintained. In addition, since the manufacturing method of the present invention is based on the LC〇S display backplane and the columnar spacer fish is simultaneously provided for the “road span”, the present invention does not need to be assembled in the later stage, and the electrode of the transparent transparent electric substrate is Soldering to the inner circuit board, such as: can reduce the process steps in the y name method, thereby improving the calving, reducing the cost

1289700 五、發明說明1289700 V. Description of invention

發明之詳細說明 清參閱圖圖一為本發明之矽晶液晶微顯示器後段 ^品結構1 〇之示意圖。由圖一中可看出,矽晶液晶微顯示 器主要是由一透明導電基板12,如銦錫氧化物(indium oxide, ΙΤ0)玻璃做為上蓋(c〇ver),以及一半導體基 底14做為顯示背板。其中,在顯示背板上佈有複數個像素 陣列1 6 ’而在非像素陣列位置則有複數個柱狀間隔體丨8形 f °此外’於顯不背板的周圍則有複數個銲墊2 2用以和上 蓋鲜接’並且’於角落處尚有複數個跨接墊24用以提供内 電路和上蓋之共同電極(c〇mm〇n electrode)(未示出)電連 接0 請參閱圖二A至圖二F,圖二A至圖二F為本發明於一半 導體基底1 4表面製作一矽晶液晶顯示背板的方法示意圖。 如圖二A所示,本方法係先在一半導體基底丨4上形成一反 射鏡層2 6。於本發明之最佳實施例中,反射鏡層2 6係一反 射铭金屬層(reflective aluminum layer),至於其他如 金或是銀等能夠反射光以形成虛像(virtual image)俾使 忠實地反映一真實影像之材料亦可使用。此外,在形成反 射鏡層2 6之後,本發明可以於反射鏡層2 6上再形成一反射 加強層(Reflectance Enhancement Passivation 1 ayer)(未示出),用以抵銷(counteract)由半導體基底14DETAILED DESCRIPTION OF THE INVENTION Referring to Figure 1, there is shown a schematic diagram of a rear-end structure of a crystalline liquid crystal microdisplay of the present invention. As can be seen from FIG. 1, the twinned liquid crystal microdisplay is mainly composed of a transparent conductive substrate 12, such as indium oxide (ΙΤ0) glass as the upper cover (c〇ver), and a semiconductor substrate 14 as Display the back panel. Wherein, a plurality of pixel arrays 16' are disposed on the display backplane, and a plurality of column spacers are formed at the non-pixel array position, and the plurality of column spacers are formed in the vicinity of the display panel. 2 2 is used to be freshly connected to the upper cover and has a plurality of jumper pads 24 at the corners for providing internal electrodes and a common electrode (not shown) of the upper cover (not shown). 2A to 2F, FIG. 2A to FIG. 2F are schematic diagrams showing a method for fabricating a crystalline liquid crystal display backplane on a surface of a semiconductor substrate 14. As shown in Fig. 2A, the method first forms a mirror layer 26 on a semiconductor substrate 4. In a preferred embodiment of the invention, the mirror layer 26 is a reflective aluminum layer, and other elements such as gold or silver can reflect light to form a virtual image, so that it faithfully reflects A real image material can also be used. In addition, after forming the mirror layer 26, the present invention may further form a reflection enhancement layer (not shown) on the mirror layer 26 for counteracting the semiconductor substrate. 14

第9頁 1289700Page 9 1289700

所產生之反射抑制效應(inhibiting effeets 接著,亦如圖二A中所示,選擇性蝕刻反射鏡層2 6, 以於半導體基底14上定義出一跨接墊區域3〇、一像素陣列 區域40以及一銲墊區域50。其中,跨接墊區域3〇包含有一 由反射鏡層26所構成之下導電板3卜像素陣列區域4〇包含 有複數個由反射鏡層26所構成之反射單元42以及複數條溝 渠44形成於反射單元42之間,而銲墊區域5〇則包含有至少 一由反射鏡層26所構成之銲墊5卜隨後並於複數條溝渠44 中填入一填充材料。 、如圖二B所示,接著在跨接墊區域3 〇、像素陣列區域 以及銲墊區域5 〇上沈積一介電層28。於本發明之最佳實 施例中’介電層2 8係由二氧化矽所構成。隨後於介電層2 8 上仏成一第一光阻層46,第一光阻層46於跨接墊區域30上 方/、有複數個開口 3 2以定義出一跨接墊介層洞區域。 I八如圖二C所示,接著進行一蝕刻製程,經由開口 3 2餘 丨電層2 8 ’以於跨接墊區域3 〇之介電層2 8中形成複數個 ^接塾介層洞,而後去除第一光阻層46,並於跨接墊介層 /同^,入導電材質,以形成複數個插塞3 4。於本發明之最 f只知例中’製作插塞3 4之導電材質可使用鎢或其他金屬 '七成鎢插塞或其他之金屬插塞。The resulting reflection suppression effect (inhibiting effeets, as shown in FIG. 2A, selectively etching the mirror layer 2 6 to define a jumper pad region 3 〇, a pixel array region 40 on the semiconductor substrate 14 And a pad region 50. The jumper pad region 3 includes a conductive plate 3 formed by the mirror layer 26, and the pixel array region 4 includes a plurality of reflective units 42 composed of the mirror layer 26. A plurality of trenches 44 are formed between the reflective units 42 and the pad region 5 includes at least one solder pad 5 formed by the mirror layer 26 and then filled with a filling material in the plurality of trenches 44. As shown in FIG. 2B, a dielectric layer 28 is then deposited over the jumper pad region 3, the pixel array region, and the pad region 5A. In the preferred embodiment of the invention, the dielectric layer 28 is It is composed of cerium oxide. Then, a first photoresist layer 46 is formed on the dielectric layer 28, and the first photoresist layer 46 is over the jumper pad region 30, and has a plurality of openings 3 2 to define a cross. Connect the via hole area. I8 is shown in Figure 2C, followed by one An etching process is performed to form a plurality of via holes through the openings 3 2 to form a plurality of via holes in the dielectric layer 28 of the jumper pad region 3, and then remove the first photoresist layer 46, and then remove the first photoresist layer 46. The jumper pad/same is inserted into the conductive material to form a plurality of plugs 34. In the most known example of the present invention, the conductive material for the plugs 34 can be made of tungsten or other metals. Tungsten plug or other metal plug.

1289700 五、發明說明(7) 如圖二D所示,接著於跨接墊區域3 〇上形成一上導電 ,3 6,跨接墊區域3 0上之上導電板3 6具有一頂面略高於間 隔體之頂面並經由複數個插塞34與下導電板31電連接。由 於跨接墊可視為一溝通半導體基底丨4與透明導電基板1 2間 之電通路(electric path)(請參閱圖一),因此其頂面須 略向於間隔體之頂面以確保可與透明導電基板丨2相接觸。 ,外’於本發明之最佳實施例中,上導電板3 6可利用鋁或 疋其他V電材貝,如金屬等,濺鍍(SpUuering)而成。 一 最後,如圖二E所示,於半導體基底丨4上方形成一第 一光阻層48,第二光阻層48遮蔽跨接墊區域30,並於像素 陣列區域40之介電層28上方定義出複數個間隔體的位置, 再敍刻介電層2 8,如圖二F所示,以於像素陣列區域4 〇之 介電層2 8中形成複數個柱狀間隔體1 8。並且,於像素陣列 區域4 0之介電層2 8中形成複數個柱狀間隔體丨8時,亦可以 視實際,要,例如,是否要加保護層(passivati〇n layer)等等,而同時於銲墊區域5〇之介電層28中蝕刻出複 數個開口 5 2,通達下方之銲墊而用以銲接。此外,在形成 複數個柱狀間隔體1 8之後,於半導體基底丨4上覆蓋一透明 導電基板1 2,且透明導電基板丨2與跨接墊區域3 〇上之上導 電板3 6電連接,如此則完成矽晶液晶顯示背板的製作。 在一般LCD裝置中,間隔體是以喷灑方式隨意散置於 半V體基底上’若其置入的位置是在顯示器之顯影區域1289700 V. Description of the Invention (7) As shown in FIG. 2D, an upper conductive layer is formed on the jumper pad region 3, and the upper conductive pad 36 has a top surface. It is higher than the top surface of the spacer and is electrically connected to the lower conductive plate 31 via a plurality of plugs 34. Since the jumper pad can be regarded as an electric path between the semiconductor substrate 4 and the transparent conductive substrate 12 (see FIG. 1), the top surface of the jumper should be slightly oriented to the top surface of the spacer to ensure compatibility. The transparent conductive substrate 丨 2 is in contact. In the preferred embodiment of the present invention, the upper conductive plate 36 can be formed by sputtering or sputtering of other V-electric materials such as metal or the like. Finally, as shown in FIG. 2E, a first photoresist layer 48 is formed over the semiconductor substrate 4, and the second photoresist layer 48 shields the jumper pad region 30 and above the dielectric layer 28 of the pixel array region 40. The positions of the plurality of spacers are defined, and the dielectric layer 2 is further illustrated. As shown in FIG. 2F, a plurality of column spacers 18 are formed in the dielectric layer 28 of the pixel array region 4. Moreover, when a plurality of column spacers 8 are formed in the dielectric layer 28 of the pixel array region 40, it is also possible to add, for example, a protective layer or the like, depending on the actual situation. At the same time, a plurality of openings 52 are etched into the dielectric layer 28 of the pad region 5, and the underlying pads are used for soldering. In addition, after forming a plurality of column spacers 18, a transparent conductive substrate 12 is covered on the semiconductor substrate 4, and the transparent conductive substrate 2 is electrically connected to the upper conductive pad 36 of the jumper pad region 3 Thus, the fabrication of the twin crystal liquid crystal display backplane is completed. In a general LCD device, the spacer is randomly scattered on the semi-V body substrate by spraying. If the position is placed in the developing area of the display

第11頁 1289700 五、發明說明(8) --- (viewing area),則會因間隔體的出現而降低該顯示器之 對比(contrast ),進而使得顯示品質下降。而本發明所製 作之石夕曰曰液晶顯示背板中,利用一般半 柱狀間隔體形成於理想之位置上,而4; = :“器之 口α貝,並且又能控制間隙之大小而使得隨後置入之液晶得 以有效的發揮。 相較於習知矽晶液晶顯示 製作方法是利用微影以及蝕刻 示背板上製作出位置固定、高 可以避免習知方法中珠狀間隔 出間隙得以精確控制並維持之 本發明之製作方法係於LCoS顯 體與提供内電路之跨接墊,因 製程中將上層之透明導電基板 上,如此則可減少習知方法中 率’降低成本。 背板的製作方法,本發明之 等半導體製程於矽晶液晶顯 度固定之柱狀間隔體,因此 體分佈不均等問題,而製造 tCoS^顯示器。此外,由於 不背板上同時製作柱狀間隔 此本發明不需再於後段裝配 的電極焊接至該内電路板 之製程步驟,進而提升產 實施例,凡依本發明申請 ’皆應屬本發明專利之涵 以上所述僅為本發明之較佳 專利範圍所做之均等變化與修飾 盍範圍。Page 11 1289700 V. Inventive Note (8) --- (viewing area), the contrast of the display will be reduced due to the appearance of the spacer, and the display quality will be degraded. In the Shixi 曰曰 liquid crystal display back plate produced by the invention, a general semi-columnar spacer is formed at a desired position, and 4; = : "the mouth of the device is α, and the size of the gap can be controlled. The liquid crystal that is subsequently placed can be effectively played. Compared with the conventional crystal liquid crystal display manufacturing method, the lithography and the etching of the back plate are used to make the position fixed and high, so that the bead-like gap can be avoided in the conventional method. The manufacturing method of the present invention precisely controlled and maintained is based on the LCoS display and the jumper pad providing the internal circuit, because the upper layer of the transparent conductive substrate is processed in the process, so that the conventional method can be reduced in the rate of 'reducing the cost. The manufacturing method of the present invention is such that the semiconductor process is in the columnar spacer in which the twin crystal liquid crystal is fixed, and thus the body distribution is uneven, and the tCoS^ display is manufactured. Further, since the columnar spacer is not simultaneously formed on the back plate The invention does not need to further solder the electrode assembled to the inner circuit board to the process step of the inner circuit board, thereby improving the production example, and all the applications according to the invention should belong to the invention patent Han above are merely exemplary of the present invention, the scope of the patent made uniformly range of modifications and He.

第12頁 1289700 圖式簡單說明 圖示之簡單說明 圖一為本發明之矽晶液晶微顯示器後段產品結構之示 意圖。 圖二A至圖二F為本發明製作一矽晶液晶顯示背板的方 法之示意圖。 圖示之符號說明 10 矽 晶 液 晶 微 顯示 器後段產 品 結 構 12 透 明 導 電 基 板 14 半 導 體 基 底 16 像 素 陣 列 18 柱 狀 間 隔 體 22 銲 墊 24 跨 接 墊 26 反 射 鏡 層 28 介 電 層 30 跨 接 墊 區 域 31 下 導 電 板 32 開 α 34 插 塞 36 上 導 電 板 40 像 素 陣 列 區域 42 反 射 單 元 44 溝 渠 46 第 一 光 阻 層 48 第 二 光 阻 層 50 銲 墊 區 域 51 銲 墊 52 開 ΠPage 12 1289700 Brief Description of the Drawings Brief Description of the Drawings Fig. 1 is a schematic view showing the structure of the rear stage of the twin crystal liquid crystal display of the present invention. 2A to 2F are schematic views showing a method of fabricating a twin crystal liquid crystal display back sheet of the present invention. DESCRIPTION OF SYMBOLS 10 Crystalline Microdisplay Rear Stage Product Structure 12 Transparent Conductive Substrate 14 Semiconductor Substrate 16 Pixel Array 18 Column Spacer 22 Pad 24 Jumper Pad 26 Mirror Layer 28 Dielectric Layer 30 Jumper Pad Area 31 Lower conductive plate 32 open α 34 plug 36 upper conductive plate 40 pixel array region 42 reflective unit 44 trench 46 first photoresist layer 48 second photoresist layer 50 pad region 51 pad 52 opening

第13頁Page 13

Claims (1)

1289700 六、申請專利範圍 1. 一種製作石夕晶液晶(liquid crystal on silicon, LCoS)顯示背板(backplane)的方法,該方法包含有下列步 提供一半導體基底(substrate); 於該半導體基底上形成一反射鏡層(reflective mirror layer); 選擇性蝕刻該反射鏡層,以於該半導體基底上定義出 一跨接塾(crossover pad)區域、一像素陣列(pixel ar r ay )區域以及一銲墊(bond i ng pad )區域,其中該跨接 墊區域包含有一由該反射鏡層所構成之下導電板(b〇tt〇m pad),該像素陣列區域包含有複數個由該反射鏡層所構成 之反射單元以及複數條溝渠形成於該反射單元之間,該鲜 墊區域包含有至少一由該反射鏡層所構成之銲墊; 於該複數條溝渠中填入一填充材料(gap filling material); 於該跨接墊區域、該像素陣列區域以及該銲墊區域上 沈積一介電層; 於该介電層上形成一第一光阻層,該第一光阻層於該 跨接墊區域上方具有複數個開口; 進行一鍅刻製程,經由該複數個開口钱刻該介電層, 以於該跨接墊區域之該介電層中形成複數個跨接墊介^ 洞; θ 去除該第一光阻層; 於該複數個跨接墊介層洞内填入導電材質,以形成複1289700 6. Patent application scope 1. A method for producing a liquid crystal on silicon (LCoS) display backplane, the method comprising the steps of: providing a semiconductor substrate; on the semiconductor substrate Forming a reflective mirror layer; selectively etching the mirror layer to define a crossover pad region, a pixel array (pixel ar r ay ) region, and a solder on the semiconductor substrate a bond pad region, wherein the jumper pad region includes a lower conductive plate (b〇tt〇m pad) formed by the mirror layer, the pixel array region including a plurality of mirror layers The reflective unit and the plurality of trenches are formed between the reflective unit, the fresh pad region includes at least one solder pad formed by the mirror layer; and a filling material is filled in the plurality of trenches (gap filling) Depositing a dielectric layer on the jumper pad region, the pixel array region, and the pad region; forming a first photoresist layer on the dielectric layer, a photoresist layer has a plurality of openings above the jumper pad region; performing an engraving process, engraving the dielectric layer through the plurality of openings to form a plurality of dielectric layers in the jumper pad region The jumper pad is filled with holes; θ removes the first photoresist layer; and the conductive material is filled in the plurality of jumper via holes to form a complex 第14頁 1289700 六、申請專利範圍 數個插塞; 於該跨接墊區域上形成一上導電板,並經由該複數個 插塞與該下導電板電連接; 於該半導體基底上方形成一第二光阻層,該第二光阻 層於該像素陣列區域之該介電層上方定義出複數個間隔體 (spacer)的位置;以及 餘刻該介電層,以於該像素陣列區域之該介電層中形 成複數個間隔體。 2 · 如申請專利範圍第1項之方法,其中該反射鏡層係為 一反射銘金屬層(reflective aluminum layer)。 3 · 如申請專利範圍第1項之方法,其中在形成該反射鏡 層之後,該方法尚包含有:於該反射鏡層上形成一反射加 強層(Reflectance Enhancement Passivation layer), 用以抵銷由該半導體基底所產生之反射抑制效應 (inhibiting effects)。 4 · 如申請專利範圍第1項之方法,其中在形成該複數個 間隔體之後,該方法尚包含有:於該半導體基底上覆蓋一 透明導電基板,且該透明導電基板與該跨接墊區域上之該 上導電板電連接。 k 5. 如申請專利範圍第1項之方法,其中該跨接墊區域上Page 14 1289700 6. Applying a plurality of plugs in the patent range; forming an upper conductive plate on the jumper pad region, and electrically connecting the lower conductive plate via the plurality of plugs; forming a first layer on the semiconductor substrate a second photoresist layer, wherein the second photoresist layer defines a plurality of spacers above the dielectric layer of the pixel array region; and the dielectric layer is left in the pixel array region A plurality of spacers are formed in the dielectric layer. 2. The method of claim 1, wherein the mirror layer is a reflective aluminum layer. 3. The method of claim 1, wherein after forming the mirror layer, the method further comprises: forming a reflection enhancement layer (Reflectance Enhancement Passivation layer) on the mirror layer to offset The reflection inhibiting effects produced by the semiconductor substrate. The method of claim 1, wherein after forming the plurality of spacers, the method further comprises: covering the semiconductor substrate with a transparent conductive substrate, and the transparent conductive substrate and the jumper pad region The upper conductive plate is electrically connected. k 5. The method of claim 1, wherein the jumper pad area 第15頁 1289700Page 15 1289700 之^亥上導電板具有一頂面略局於該間隔體之頂面。 6 ·如申請專利範圍第1項之方法,其中該方法於該像素 陣列區域之該介電層中形成複數個間隔體時,亦同時於該 銲墊區域之該介電層中蝕刻出複數個開口,通達下方之該 銲墊。 〜 7 ·如申請專利範圍第1項之方法,其中該方法於該像素 陣列區域之該介電層中形成複數個間隔體時,可不同時於 該銲墊區域之該介電層中蝕刻出複數個開口,通達下方之 該銲墊。 8· 一種製作石夕晶液晶(LCoS )顯示背板(backp 1 ane )的方 法,該方法包含有下列步驟·· 提供一半導體基底; 於該半導體基底上形成一反射鏡層; 選擇性钱刻該反射鏡層,以於該半導體基底上定義出 一像素陣列(pixel array)區域包含有複數個由該反射鏡 層所構成之反射單元以及複數條溝渠形成於該反射單元之 間; 填充材料(gap f i 11 ing 於該複數條溝渠中填入一 material); 於該像素陣列區域上沈積一介電I 於該半導體基底上方形成一光卩且> ,該光阻層於該像The conductive plate on the upper surface has a top surface slightly offset from the top surface of the spacer. 6. The method of claim 1, wherein the method simultaneously forms a plurality of spacers in the dielectric layer of the pixel array region, and simultaneously etches a plurality of the dielectric layers in the pad region Open the access pad to the underside. The method of claim 1, wherein when the method forms a plurality of spacers in the dielectric layer of the pixel array region, the plurality of spacers may not be etched in the dielectric layer of the pad region at the same time An opening leads to the underlying pad. 8. A method of fabricating a backplane (LCoS) display backsheet, the method comprising the steps of: providing a semiconductor substrate; forming a mirror layer on the semiconductor substrate; The mirror layer defines a pixel array region on the semiconductor substrate including a plurality of reflective units formed by the mirror layer and a plurality of trenches formed between the reflective units; a gap fi 11 ing is filled with a material in the plurality of trenches; a dielectric I is deposited on the pixel array region to form an aperture above the semiconductor substrate and > the photoresist layer is on the image 1289700 六、申請專利範圍 素陣列區域之該介電層上方定義出複數個間隔體(spacer) 的位置;以及 姓刻該介電層’以於該像素陣列區域之該介電層中形 成複數個間隔體。 9 ·如申請專利範圍第8項之方法,其中該反射鏡層係為 一反射铭金屬層(reflective aluminum layer*)。 1 0 ·如申請專利範圍第8項之方法,其中在形成該反射鏡 層之後,該方法尚包含有:於該反射鏡層上形成一反射加 強層(Reflectance Enhancement Passivation layer), 用以抵銷由該半導體基底所產生之反射抑制效應、 (inhibiting effects)。 如申請專利範圍第8項之方法’其中讀介電層係由二 氧化矽所構成。 1 2.如申請專利範圍第8項之方法’其中誘方法於該像素 陣列區域之該介電層中形成複數個間隔體時,亦同時於$ 鲜塾區域之該介電層中蝕刻出複數個開D ,'二 銲塾。 之呑亥 如申請專利範圍第8項之方法’其中該方法於該像素 陣列區域之該介電層中形成複數個間隔體時,可不同時於1289700. The position of a plurality of spacers is defined above the dielectric layer in the region of the patent application region; and the dielectric layer is named to form a plurality of dielectric layers in the pixel array region. Spacer. 9. The method of claim 8, wherein the mirror layer is a reflective aluminum layer*. The method of claim 8, wherein after forming the mirror layer, the method further comprises: forming a reflection enhancement layer (Reflectance Enhancement Passivation layer) on the mirror layer to offset The reflection suppressing effects produced by the semiconductor substrate. The method of claim 8 wherein the read dielectric layer is composed of hafnium oxide. 1 2. The method of claim 8 wherein the method of inducing a plurality of spacers in the dielectric layer of the pixel array region simultaneously etches a plurality of the dielectric layers in the fresh germanium region Open D, 'two welding 塾.呑海, as in the method of claim 8 wherein the method forms a plurality of spacers in the dielectric layer of the pixel array region, 第17頁 — 1289700Page 17 — 1289700 第18頁Page 18
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI385435B (en) * 2008-05-08 2013-02-11 Universal Scient Ind Shanghai Lcos device and assembly of lcos device and circuit board
TWI451178B (en) * 2011-11-07 2014-09-01 Hannstar Display Corp Array substrate, liquid crystal display for the same and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI385435B (en) * 2008-05-08 2013-02-11 Universal Scient Ind Shanghai Lcos device and assembly of lcos device and circuit board
TWI451178B (en) * 2011-11-07 2014-09-01 Hannstar Display Corp Array substrate, liquid crystal display for the same and manufacturing method thereof

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