1286650 B7 五、發明說明（/ ) [技術領域] 本發明係關於一種使用TFT基板之液晶顯示裝置之製 造方法及液晶顯示裝置。 [背景技術] 一般之液晶顯示裝置的構造係如圖6所示，於2片之 電極基板1、2之間分散配置直徑約5//m之球狀的分隔件 8來保持間距，兩基板係由密封劑4所接著，於間距空間 中充塡著液晶7。由於此一對之電極基板的間隔、也就是 液晶層的層厚會對於光透過率造成影響，是以，若未在液 晶顯示裝置之顯示區域的全面上保持成一定，將無法進行 良好的顯示。 於TFT液晶顯示裝置中，上述電極基板的一側係一形 成有薄膜電晶體(TFT)的TFT基板2，另一側則是濾色器 (CF)基板1。TFT液晶顯示裝置係於TFT基板2與CF基板 1施以定向處理之後，於2片之基板之間分散配置分隔件8 ，接著以密封劑4來貼合，最後於間隙中塡充液晶7所製 造者。 TFT基板的構造係如圖2所示般，源極匯流線14a(S) 係與閘極匯流線13a(G)以及Cs共極匯流線15a(Cs)呈垂直 配置，對應於像素電極3於G-S線的交點處形成電晶體18 。又’所謂之Cs共極匯流線係用以連接輔助容量電容(Cs) 的配線。 就以往之TFT液晶顯示裝置之製造方法而言，係於形 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） --------------------訂---------- (請先閱讀背面之注意事項再填寫本頁) 1286650 A7 __B7 _ 五、發明說明（2 ) (請先閱讀背面之注意事項再填寫本頁) 成了像素電極的TFT基板上任意且均一地散佈分隔件，分 隔件係不規則地配置於TFT基板上，且多數的分隔件係配 置於像素電極上、亦即配置於液晶顯示裝置的顯示部上。 分隔件一般係由合成樹脂或玻璃等所形成，若配置於像素 電極上由於會自分隔件發生消光的情形，造成實質上之開 口率的降低，而會發生亮度或對比降低的問題。 作爲解決此問題之方法，於特開平4-42126號公報中 係揭示利用電氣引力選擇性地配置分隔件來減少像素電極 上之分隔件、抑制圖像水準的降低之方法。就此方法而言 ，係將TFT基板上之像素電極接地，進行行選擇線與列選 擇線之電壓切換，於像素電極以外之配線部施加正電壓， 接著於該處散佈帶負電之分隔件，藉由電氣引力來將分隔 件選擇性地配置於配線部。 惟，若使用上述方法於TFT基板之配線施加電壓，則 吸附於TFT基板表面之水分會導致TFT基板之基板表面電 位發生漏洩，像素電極之表面電位亦會上升。亦即，由於 TFT基板全體大致處於等電位，像素電極與配線部之間未 出現電位差，所以要將分隔件選擇性地配置於配線上是困 難的。 又，一般TFT基板的構成，行選擇線與列選擇線之其 中一者係進行電晶體之切換的閘匯流線，另一者係對像素 電極實際施加電壓的源匯流線。於此TFT基板中，施加於 源匯流線之電壓，例如即使將閘匯流線接地，而電晶體之 開關處於斷開的狀態下，自源匯流線通過電晶體之斷開電 5 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） A7 1286650 五、發明說明（3 ) 阻（1〜10ΜΩ)，或是自Cs共匯流線經由Cs電容器，像素 電極之表面電位亦會上升。是以，如上述之方法般，以每 秒5〜30次之比例進行行選擇線與列選擇線的電位切換時’ 受到源匯流線之電壓的影響，像素電極之表面電位也會上 升，像素電極與源匯流線上之電位差會消失，於是選擇性 配置分隔件的效果將不足，此爲缺點所在。 [發明之簡單說明] 本發明係鑒於上述問題所得之物，其目的在於提供一 種液晶顯示裝置之製造方法及藉由該製造方法所製造之液 晶顯示裝置，在使用著TFT基板的液晶顯示裝置上，選擇 性地散佈分隔件，不會因爲分隔件造成亮度下降或對比降 低，具有高水準之顯示特性。 第1本發明，係一種TFT液晶顯示裝置之製造方法， 係於TFT基板與濾色器基板之間分散配置分隔件後以密封 劑貼合，接著於其間隙注入液晶所製造者；其中，包含： 用以將待散佈分隔件的TFT基板乾燥之製程，以及，利用 電氣引力以及/或是電氣排斥力將分隔件選擇性配置於閘匯 流線上之製程，前述利用電氣引力以及/或是電氣排斥力將 分隔件選擇性配置於閘匯流線上之製程，係對形成於TFT 基板上之閘匯流線與源匯流線之各配線個別地施加電壓， 然後將帶電之分隔件散佈於該處。 若第1本發明係Cs共匯流線與閘匯流線並未共通之 TFT基板之時，則對閘匯流線、源匯流線、以及Cs共匯流 6 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公楚1 ' 一 "" ------------------—訂--------- (請先閱讀背面之注意事項再填寫本頁) A7 1286650 五、發明說明（$ ) 線之各配線個別地施加電壓爲佳。 上述用以將待散佈分隔件的TFT基板乾燥之製程，係 藉由在散佈分隔件之前加熱基板所進行的，基板溫度上升 到100°C以上、基板表面電阻換算成薄片電阻在1χ1012Ω/ □以上來進行爲佳。 於第1本發明中，分隔件的散佈以乾燥後之TFT基板 的基板表面電阻換算成薄片電阻在1χ1〇ηΩ/□以上來進行 爲佳。 上述利用電氣引力將分隔件選擇性配置於閘匯流線上 之製程，若所散佈之分隔件帶正電時，對閘匯流線施加負 電壓，且將源匯流線以及Cs共匯流線接地乃爲所希望的； 若所散佈之分隔件帶負電時，對閘匯流線施加正電壓，且 將源匯流線以及Cs共匯流線接地乃爲所希望的。 上述利用電氣排斥力將分隔件選擇性配置於閘匯流線 上之製程，若所散佈之分隔件帶正電時，對源匯流線以及 Cs共匯流線施加正電壓，且將閘匯流線接地乃爲所希望的 ;若所散佈之分隔件帶負電時，對源匯流線以及Cs共匯流 線施加負電壓，且將閘匯流線接地乃爲所希望的。 上述利用電氣引力以及電氣排斥力將分隔件選擇性配 置於閘匯流線上之製程，若所散佈之分隔件帶正電時，對 源匯流線以及Cs共匯流線施加正電壓，且對閘匯流線施加 負電壓乃爲所希望的；若所散佈之分隔件帶負電時，對源 匯流線以及Cs共匯流線施加負電壓，且對閘匯流線施加正 電壓乃爲所希望的。 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂 i----.----線 (請先閱讀背面之注意事項再填寫本頁) 1286650 a7 _________B7___ 五、發明說明（r) 於第1本發明中，對於Cs共匯流線與閘匯流線爲共 通之構造的tft基板，僅於閘匯流線與源匯流線施加電壓 乃爲所希望的。1286650 B7 V. Technical Description [Technical Field] The present invention relates to a method of manufacturing a liquid crystal display device using a TFT substrate and a liquid crystal display device. [Background Art] A general liquid crystal display device has a structure in which a spherical separator 8 having a diameter of about 5/m is dispersed and disposed between two electrode substrates 1 and 2 to maintain a pitch therebetween. It is followed by the sealant 4, and the liquid crystal 7 is filled in the space. Since the interval between the pair of electrode substrates, that is, the layer thickness of the liquid crystal layer, affects the light transmittance, good display cannot be performed unless the display area of the liquid crystal display device is kept constant. . In the TFT liquid crystal display device, one side of the electrode substrate is a TFT substrate 2 on which a thin film transistor (TFT) is formed, and the other side is a color filter (CF) substrate 1. In the TFT liquid crystal display device, after the TFT substrate 2 and the CF substrate 1 are subjected to orientation treatment, the spacers 8 are dispersedly disposed between the two substrates, and then bonded together with the sealant 4, and finally the liquid crystal 7 is filled in the gaps. maker. The structure of the TFT substrate is as shown in FIG. 2. The source bus line 14a(S) is vertically arranged with the gate bus line 13a (G) and the Cs common electrode bus line 15a (Cs), corresponding to the pixel electrode 3 A transistor 18 is formed at the intersection of the GS lines. Further, the so-called Cs common pole bus is used to connect the wiring of the auxiliary capacity capacitor (Cs). In the past, the manufacturing method of the TFT liquid crystal display device is applied to the Chinese National Standard (CNS) A4 specification (210 X 297 public) in the shape of the paper. ------Book---------- (Please read the note on the back and fill out this page) 1286650 A7 __B7 _ V. Invention description (2) (Please read the note on the back first) Filling in this page) The separator is arbitrarily and uniformly spread on the TFT substrate which is the pixel electrode, and the spacer is irregularly disposed on the TFT substrate, and most of the spacers are disposed on the pixel electrode, that is, disposed on the liquid crystal display. On the display of the device. The separator is generally formed of synthetic resin, glass, or the like. If it is disposed on the pixel electrode, the mating of the spacer may occur, resulting in a substantial decrease in the opening ratio, which may cause a problem of reduced brightness or contrast. As a method for solving this problem, Japanese Laid-Open Patent Publication No. Hei-4-42126 discloses a method of selectively arranging a spacer by electric attraction to reduce a spacer on a pixel electrode and suppress a reduction in image level. In this method, the pixel electrode on the TFT substrate is grounded, the voltage of the row selection line and the column selection line is switched, a positive voltage is applied to the wiring portion other than the pixel electrode, and then the negatively charged spacer is dispersed there. The separator is selectively disposed on the wiring portion by electrical attraction. However, when a voltage is applied to the wiring of the TFT substrate by the above method, moisture adsorbed on the surface of the TFT substrate causes leakage of the surface potential of the substrate of the TFT substrate, and the surface potential of the pixel electrode also rises. That is, since the entire TFT substrate is substantially at the same potential, no potential difference occurs between the pixel electrode and the wiring portion, and therefore it is difficult to selectively arrange the spacer on the wiring. Further, in the configuration of a general TFT substrate, one of the row selection line and the column selection line is a gate bus line for switching between transistors, and the other is a source bus line for actually applying a voltage to the pixel electrode. In the TFT substrate, the voltage applied to the source bus line, for example, even if the gate bus line is grounded, and the transistor switch is in the off state, the self-source bus line is disconnected through the transistor. China National Standard (CNS) A4 specification (210 X 297 mm) A7 1286650 V. Invention description (3) Resistance (1~10ΜΩ), or the Cs capacitor from the Cs common sink line, the surface potential of the pixel electrode will also rise. . Therefore, when the potential of the row selection line and the column selection line is switched at a ratio of 5 to 30 times per second as in the above method, the surface potential of the pixel electrode also rises due to the influence of the voltage of the source bus line. The potential difference between the electrode and the source bus line will disappear, so the effect of selectively arranging the spacer will be insufficient, which is a disadvantage. [Brief Description of the Invention] The present invention has been made in view of the above problems, and an object of the invention is to provide a liquid crystal display device manufacturing method and a liquid crystal display device manufactured by the same, which are used in a liquid crystal display device using a TFT substrate. The spacer is selectively dispersed without a decrease in brightness or contrast due to the spacer, and has a high level of display characteristics. According to a first aspect of the invention, in a method of manufacturing a TFT liquid crystal display device, a spacer is disposed between a TFT substrate and a color filter substrate, and then a sealing agent is bonded, and then a liquid crystal is injected into the gap; : a process for drying a TFT substrate on which a separator is to be dispensed, and a process for selectively arranging a spacer on a gate bus using electrical attraction and/or electrical repulsive force, using electrical attraction and/or electrical repulsion The process of selectively arranging the spacers on the gate bus line is to apply a voltage to each of the wires of the gate bus line and the source bus line formed on the TFT substrate, and then the charged spacers are scattered there. If the first invention is a TFT substrate in which the Cs common sink line and the gate sink stream line are not common, the Chinese National Standard (CNS) A4 specification is applied to the gate sink stream line, the source bus line, and the Cs common stream 6 paper scale. (210 X 297 public Chu 1 'One "" ---------------------------- (Please read the notes on the back first Refill this page. A7 1286650 V. INSTRUCTION DESCRIPTION ($) It is preferable to apply voltage individually to each of the wires of the wire. The above process for drying the TFT substrate on which the separator is to be dispersed is performed by heating the substrate before spreading the separator. It is preferable that the substrate temperature is increased to 100 ° C or higher, and the surface resistance of the substrate is converted to a sheet resistance of 1 χ 10 12 Ω / □ or more. In the first invention, the spacer is dispersed to the surface of the substrate of the dried TFT substrate. It is preferable that the resistance is converted to a sheet resistance of 1 χ 1 〇 η Ω / □ or more. The above-described process of selectively arranging the separator on the gate bus line by electric attraction is applied to the gate bus line if the distributed spacer is positively charged. Negative voltage, and the source bus line and the Cs common bus line are grounded. If the distributed partition is negatively charged, it is desirable to apply a positive voltage to the brake bus and to ground the source bus and the Cs common bus. The above-mentioned selective use of the electrical repulsive force to selectively distribute the spacer to The process of the gate bus line, if the distributed partition is positively charged, it is desirable to apply a positive voltage to the source bus line and the Cs common stream line, and it is desirable to ground the gate bus line; if the distributed partition is negatively charged It is desirable to apply a negative voltage to the source bus line and the Cs common bus line, and to ground the thyristor stream line. The above-mentioned process of selectively arranging the spacer on the gate bus line by using electrical attraction and electrical repulsive force, if When the distributed separator is positively charged, it is desirable to apply a positive voltage to the source bus line and the Cs common bus line, and to apply a negative voltage to the gate bus line; if the distributed spacer is negatively charged, the source bus line It is desirable to apply a negative voltage to the Cs co-current line and apply a positive voltage to the gate bus. 7 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ------- --- ----------Book i----.----Line (please read the note on the back and fill out this page) 1286650 a7 _________B7___ V. Invention Description (r) in the first invention In the case of a tft substrate in which the Cs common bus line and the gate bus line are in common, it is desirable to apply a voltage only to the gate bus line and the source bus line.
於第1本發明中，施加於閘匯流線與源匯流線、以及 閘匯流線與CS共匯流線的電壓，以讓閘匯流線與源匯流線 、以及閘匯流線與Cs共匯流線之間的電位差成爲30〜60V 爲佳。 • 於第1本發明中，所散佈之分隔件的帶電量在 + 15〜+250/Z C/g 或是-15〜-250// C/g 爲佳。 上述分隔件係熱可塑性之接著性分隔件或光硬化性之 接著性分隔件，選擇配置於閘匯流線上之後，藉加熱或光 照射來接著固定乃爲所希望的。 上述閘匯流線的線寬以分隔件之平均粒子徑的至少3 倍爲佳。 於第1本發明中，在散佈分隔件之後，以15〇°C以上 的溫度來退火TFT基板，進行TFT特性之補償乃爲所希望 的。 藉第1本發明所製造之液晶顯示裝置亦爲本發明之一 〇 第2本發明係將TFT基板與濾色器基板隔著分隔件以 及密封劑來貼合，於其間隙注入液晶所得之液晶顯示裝置 ;其中’前述分隔件係利用電氣引力以及/或是排斥力選擇 性地配置到於TFT基板上所形成之閘匯流線上，前述閘匯 流線的線寬係前述分隔件之平均粒徑的至少3倍。 8 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 x 297公釐〉 --------------------訂--------- (請先閱讀背面之注意事項再填寫本頁) A7 1286650 五、發明說明（& ) 於第2本發明中，未被覆像素電極的閘匯流線的寬度 以分隔件之平均粒徑的4〜5倍爲佳。 [圖式之簡單說明] 第1圖係本發明所使用之分隔件散佈裝置的槪念圖。 第2圖所示係本發明所使用之TFT基板之配線的俯視 槪念圖。 第3圖係用以說明本發明之有效的閘線之線寬的槪念 圖。 第4圖所示係藉第1本發明於TFT基板上散佈分隔件 後之狀態的俯視放大圖。 第5圖所示係藉以往之液晶顯示裝置之製造方法於 TFT基板上散佈分隔件後之狀態的俯視放大圖。 第6圖所示係一般之液晶顯示裝置之構造的槪念圖° [主要元件符號說明] --------------------訂--------- (請先閱讀背面之注意事項再填寫本頁) 1 電極基板(CF基板） 2 電極基板(TFT基板) 3 像素電極 4 密封劑 7 液晶 8 分隔件 10 容器 1 la 散佈噴嘴 lib 分隔件供給裝置 9 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 1286650 B7 五、發明說明（]) 12 電壓施加裝置 13a 閘匯流線 13b 閘觸焊墊 14a 源匯流線 14b 源觸焊墊 15a Cs共匯流線 15b Cs觸焊墊 16a，16b，16c 探測針 17 散佈配管 18 電晶體 19 像素電極 20 絕緣膜 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂--------- (請先閱讀背面之注意事項再填寫本頁) B7 1286650 五、發明說明（S ) [發明之詳細揭示] 以下詳述本發明。 第1本發明之液晶顯示裝置之製造方法，係於施行過 定向處理的TFT基板與濾色器基板之間分散配置分隔件後 以密封劑貼合，接著於其間隙注入液晶所製造；其中，包 含：將待散佈分隔件的TFT基板乾燥之製程，以及，利用 電氣引力以及/或是電氣排斥力將分隔件選擇性配置於閘匯 流線上之製程。 上述將待散佈分隔件的TFT基板乾燥之製程，較佳係 在散佈分隔件之前加熱基板來進行，又基板溫度上升到 l〇〇t以上、基板表面電阻換算成薄片電阻在1χ1〇12Ω/口 以上爲佳。由於藉上升TFT基板的溫度會造成附著水分的 減少，基板表面之電阻乃變高，不會有電流漏洩之情形， 乃得以安定、高精度地進行分隔件之配置。更佳爲，基板 溫度定爲120〜150°C、基板表面電阻換算成薄片電阻在lx ΙΟ〗2〜1χ1014Ω/[Ι]。· 上述TFT基板的加熱可藉由熱壓機、熱風循環爐、紅 外線爐等來進行。 若於上述乾燥TFT基板之製程中使用到熱壓機之時， 只要於加熱爲120°C之熱壓機中密接TFT基板5分鐘以上 即可。 於第1本發明中，如上述般乾燥TFT基板之後’乃在 此TFT基板上散佈分隔件。 於第1本發明中，分隔件的散佈以乾燥後之TFT基板 11 --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 1286650 五、發明說明O ) 之基板表面電阻換算成薄片電阻在ΐχΐ〇ηΩ/□以上來進行 爲佳。若TFT基板之基板表面電阻換算成薄片電阻未滿lx 10"Ω/□，於TFT基板上會漏洩電流，有時無法高精度地 來選擇性配置分隔件。較佳係換算成薄片電阻在ΙχΙΟ11〜lx 1014Ω/□來進行。 又，爲避免乾燥後基板表面再附著水分，較佳爲於乾 ~ 燥後5分鐘以內散佈分隔件、或是於散佈裝置內充滿乾燥 . 氮氣。 於第1本發明中，上述利用電氣引力以及/或是電氣排 斥力將分隔件選擇性配置於閘匯流線上之製程，係對形成 於TFT基板上之閘匯流線與源匯流線之各配線個別地施加 電壓，然後將帶電之分隔件散佈於該處。 若爲Cs共匯流線與閘匯流線並未共通之TFT基板之 時，則對閘匯流線、源匯流線、以及Cs共匯流線之各配線 個別地施加電壓爲佳。 上述利用電氣引力將分隔件選擇性配置於閘匯流線上 之方法，若所散佈之分隔件帶正電時，係對閘匯流線施加 負電壓，且將源匯流線以及Cs共匯流線接地。若所散佈之 分隔件帶負電時，則對閘匯流線施加正電壓，且將源匯流 線以及Cs共匯流線接地。 上述利用電氣排斥力將分隔件選擇性配置於閘匯流線 上之方法，若所散佈之分隔件帶正電時，係對源匯流線以 及Cs共匯流線施加正電壓，且將閘匯流線接地。若所散佈 之分隔件帶負電時，則對源匯流線以及Cs共匯流線施加負 12 --------------------訂---------線 (請先閱讀背面之注咅？事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 1286650_&__ 五、發明說明（r ) 電壓，且將閘匯流線接地。 上述利用電氣引力以及電氣排斥力將分隔件選擇性配 置於閘匯流線上之方法’若所散佈之分隔件帶正電時’係 對源匯流線以及Cs共匯流線施加正電壓，且對閘匯流線施 加負電壓。若所散佈之分隔件帶負電時，則對源匯流線以 及Cs共匯流線施加負電壓，且對閘匯流線施加正電壓。 利用上述3個方法所得之分隔件的選擇性配置效果大 - 致相同，惟考慮到以1個電源設備即可達成的觀點來看’ 上述使用電氣引力之引力方式或上述使用電氣排斥力之排 斥力方式會較爲經濟。 於第1本發明中，亦可使用Cs共匯流線與閘匯流線 爲共通之構造的TFT基板。當使用Cs共匯流線與閘匯流 線爲共通之構造的TFT基板時，藉由僅對閘匯流線與源匯 流線如上述般施加電壓’可有效果地將分隔件選擇性配置 於閘匯流線上。 於第1本發明中，施加於閘匯流線與源匯流線、以及 閘匯流線與CS共匯流線的電壓，以讓閘匯流線與源匯流線 、以及閘匯流線與CS共匯流線之間的電位差成爲30〜60V 爲佳。其中，電位差達40V左右爲更佳。 閘匯流線與源匯流線、以及閘匯流線與Cs共匯流線 之間的上述電壓差愈大，分隔件之選擇配置性雖愈佳，惟 上述電位差過大，會產生電晶體之破壞或斷開、斷開特性 之偏移之問題。依據實驗，若上述電位差到達50〜60V之 附近會見到電晶體之特性偏移，若超過200V會產生電晶 13 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ------------------—訂--------- (請先閱讀背面之注意事項再填寫本頁) 1286650 a7 ____B7__ 五、發明說明（（ί ) 體之絕緣破壞。 於第1本發明中所散佈之分隔件的帶電量在+ 15〜+250 //C/g或是-15〜-250 "C/g爲佳。更佳係以抽真空式法拉第 儀器所測定之帶電量在+ 15〜+200// C/g或是-15〜-200# C/g 〇 更詳細地來說，可依據上述分隔件之比重•粒子徑細 ‘分最適之帶電量。例如，就比重1.0〜1.3之分隔件而言， 當粒子徑爲5·0//ιη之時，最適帶電量係+ 15〜+60"C/g或 是-15〜-60/zC/g，當粒子徑爲4.5/zm之時，最適帶電量係 +20〜+80//C/g或是-20〜-80//C/g，當粒子徑爲3.0//m之 時·，最適帶電量係+50〜+200// C/g或是-50〜-200/z C/g。 上述分隔件之帶電量過多過少皆不適當。若分隔件之 帶電量過少，由於靜電力弱，有時分隔件並不能適切地配 置於閘匯流線上。又，分隔件之對於閘匯流線的電氣引力 弱，當散佈氣流碰到基板朝基板外側流動之際，分隔件會 被氣流帶動飛散到基板外，有時對基板之散佈個數會過少 。若分隔件之帶電量過多，分隔件彼此的互斥力會變強， 由於受到先前搭載於閘匯流線之分隔件的電位影響新散佈 的分隔件會彈開，有時分隔件並無法密集地配置於閘匯流 線上。 於第1本發明所使用之分隔件係熱可塑性之接著性分 隔件或是光硬化性之接著性分隔件，將其選擇性配置於閘 匯流線上之後，以加熱或光照射的方式加以接著固定爲佳 〇 14 --- ._ . _______ _____ —- . 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂--------- (請先閱讀背面之注意事項再填寫本頁) 1286650 B7 五、發明說明（p) 藉由使用上述熱可塑性之接著性分隔件或是光硬化性 之接著性分隔件，將分隔件接著固定於閘匯流線上，可防 止之後之液晶顯示裝置製程以及所製造之液晶顯示裝置的 使用時，分隔件自閘匯流線上移動。 於第1本發明中，形成於TFT基板上之閘匯流線的線 寬以分隔件之平均粒子徑的至少3倍爲佳。藉由讓上述閘 匯流線的線寬達分隔件之平均粒子徑的至少3倍，可將分 隔件有效地配置於閘匯流線上。更佳係4〜5倍。例如若散 佈直徑5/zm的分隔件，則上述閘匯流線的線寬至少係15 // m，較佳則是20〜25 // m左右。 若上述閘匯流線之線寬未達分隔件之平均粒子徑的3 倍，則選擇配置率會降低，有時會自閘匯流線上掉落，配 置於像素電極上之分隔件的比例變得過多。此是由於分隔 件彼此帶同極性之電位，先前搭載於閘匯流線上之分隔件 與之後所散佈之分隔件之間的互斥力的作用，會造成難以 在狹窄的空間內搭載分隔件。 若閘匯流線之線寬未達分隔件之平均粒子徑的3倍時 ，作爲改善分隔件之選擇配置率的方法，有將閘匯流線與 源匯流線、以及閘匯流線與Cs共匯流線之間的電位差設定 爲50〜60V此種較高電壓的方法。就此電壓而言，雖會開 始發生上述之電晶體之特性偏移之情事，惟此等級之特性 偏移，可藉由在分隔件散佈後對TFT基板進行150°C以上 、1小時左右的退火來回到原來之TFT特性。 於第1本發明中，可在散佈分隔件之後，以150°C的 15 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) A7 1286650 五、發明說明（丨）） 溫度將TFT基板退火來進行TFT特性之補償。較佳則是在 200°C左右來退火。 於第1本發明中，關於上述之退火製程，並不需要加 入特別的程序。就第1本發明而言，可與一般之液晶顯示 裝置之製造方法同樣地，在散佈分隔件後貼合2片基板， 爲讓密封劑硬化，乃以150〜200°C燒成1〜2小時，自行退 火。 於第1本發明中，如上述般將選擇性配置有分隔件的 TFT基板與CF基板以密封劑貼合接著，然後於基板間隙 塡充液晶，製造出液晶顯示裝置。 由於第1本發明具上述之構成，乃不會因爲分隔件造 成亮度降低或對比降低，可提供具有高水準之顯示特性的 液晶顯示裝置。 由第1本發明所製造之上述液晶顯示裝置亦爲本發明 之一。 第2本發明係一種液晶顯示裝置，其將TFT基板與濾 色器基板隔著分隔件以及密封劑來貼合，於其間隙注入液 晶所得之液晶顯示裝置；分隔件係利用電氣引力以及/或是 排斥力選擇性地配置到形成於TFT基板上之閘匯流線上， 閘匯流線的線寬係分隔件之平均粒徑的至少3倍。 爲提高液晶顯示裝置之明亮度，有時所採取的手段係 在閘匯流線上所形成之絕緣膜上，將像素電極配置成被覆 於閘匯流線上，來增大顯示面積。此時，未被像素電極所 被覆之閘匯流線的寬度係相當於有效的閘匯流線之線寬。 16 本紙張尺度適用中ΐ國家標準（CNS)A4規格（210 X 297公釐） ' ^ --------訂---------線 (請先閱讀背面之ii意事項再填寫本頁) 1286650 五、發明說明（w) 在第2本發明中，爲了將分隔件有效地選擇配置於閘 匯流線上，未被像素電極所被覆之閘匯流線的寬度爲分隔 件之平均粒子徑的4〜5倍爲佳。 第2本發明可例如藉由第1本發明來製造。 以下就本發明之實施形態，使用圖1〜3來具體說明。 圖1所示係使用本發明之分隔件之散佈裝置的示意圖 。於容器10的上端部係設有用以散佈帶電之分隔件8的噴 嘴11a。於散佈噴嘴11a中係經由散佈配管17連接著用以 供給分隔件8的裝置lib。 於容器10之下方係設置一形成有閘匯流線、源匯流線 、以及Cs共匯流線的TFT基板2。對於TFT基板2的閘 匯流線、源匯流線、以及Cs共匯流線之各配線，分別接觸 於探測針16a，16b，16c，以電壓施加裝置12來施加電壓， 將帶電之分隔件8散佈於上述TFT基板2上，使用電氣引 力以及/或是電氣排斥力，將分隔件8選擇性地配置於閘匯 流線上。 於本發明中，讓分隔件8帶電的方法，可藉由在圖1 所示之散佈配管17與散佈噴嘴11a方面使用不鏽鋼製、鐵 氟龍製、耐龍製、或是氨酯樹脂製等之物，令分隔件8通 過散佈配管17與散佈噴嘴11a之際之摩擦來產生帶電。 作爲本發明之分隔件的散佈方法，使用電弧放電之帶 電槍方式並不佳。此乃由於分隔件之電位會變得過高，分 隔件彼此的互斥力變強，對於閘匯流線上之配置性會變差 〇 17 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) A7 1286650 ___B7 ___In the first invention, the voltage applied to the brake bus line and the source bus line, and the gate bus line and the CS bus line are connected between the gate bus line and the source bus line, and between the gate bus line and the Cs common line line. The potential difference is preferably 30 to 60V. • In the first invention, the discharge amount of the partition member is preferably + 15 to +250 / Z C / g or -15 to -250 / / C / g. It is desirable that the separator is a thermoplastic adhesive separator or a photocurable adhesive separator which is selectively disposed on the brake bus and then fixed by heating or light irradiation. The line width of the above-described sluice line is preferably at least 3 times the average particle diameter of the separator. In the first aspect of the invention, it is desirable to anneal the TFT substrate at a temperature of 15 ° C or higher after dispersing the spacer to compensate for TFT characteristics. The liquid crystal display device manufactured by the first aspect of the invention is also one of the inventions. The second invention is a liquid crystal obtained by laminating a TFT substrate and a color filter substrate via a separator and a sealant, and injecting liquid crystal into the gap. a display device; wherein the foregoing spacers are selectively disposed on the gate bus line formed on the TFT substrate by electrical attraction and/or repulsive force, and the line width of the gate bus line is the average particle diameter of the spacer At least 3 times. 8 This paper scale applies to China National Standard (CNS) A4 specification (21〇x 297 mm) -------------------- Order -------- - (Please read the precautions on the back and fill out this page.) A7 1286650 V. Inventive Note (&) In the second invention, the width of the gate bus line that is not covered with the pixel electrode is 4 of the average particle diameter of the spacer. 〜5倍优选。 [Brief Description of the Drawings] Fig. 1 is a view of a separator dispersing device used in the present invention. Fig. 2 is a plan view of the wiring of the TFT substrate used in the present invention. Fig. 3 is a view for explaining the line width of the effective gate line of the present invention. Fig. 4 is an enlarged plan view showing the state in which the spacer is spread on the TFT substrate by the first invention. Fig. 5 is an enlarged plan view showing a state in which a spacer is spread on a TFT substrate by a conventional method for manufacturing a liquid crystal display device. Fig. 6 is a view showing a structure of a general liquid crystal display device. Component Symbol Description] -------------------- Order --------- (Please read the back note before filling this page) 1 Electrode substrate (CF substrate) 2 electricity Substrate (TFT substrate) 3 Pixel electrode 4 Sealant 7 Liquid crystal 8 Separator 10 Container 1 la Dispersion nozzle lib Separator supply device 9 This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 1286650 B7 , invention description (]) 12 voltage application device 13a thyristor flow line 13b brake contact pad 14a source bus line 14b source contact pad 15a Cs common bus line 15b Cs contact pad 16a, 16b, 16c probe pin 17 distribution pipe 18 Crystal 19 pixel electrode 20 Insulation film This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) -------------------- Order --- ------ (Please read the precautions on the back and fill out this page) B7 1286650 V. INSTRUCTIONS (S) [Details of the Invention] The present invention will be described in detail below. The manufacture of the liquid crystal display device of the first invention The method is characterized in that a spacer is disposed between a TFT substrate and a color filter substrate subjected to the directional treatment, and then a sealing agent is attached, and then a liquid crystal is injected into the gap; wherein: a TFT substrate to which the separator is to be dispersed is included Drying process, and using electrical gravity And/or the process of selectively arranging the spacers on the gate bus line by the electrical repulsive force. The process of drying the TFT substrate on which the spacers are to be dispersed is preferably performed by heating the substrate before the spacers are dispersed, and the substrate temperature is raised. It is preferable that the surface resistance of the substrate is converted to a sheet resistance of 1χ1〇12 Ω/□ or more to l〇〇t or more. Since the temperature of the TFT substrate is lowered by the temperature of the rising TFT substrate, the resistance of the surface of the substrate is increased, and current leakage does not occur, so that the spacer can be disposed stably and with high precision. More preferably, the substrate temperature is set to 120 to 150 ° C, and the surface resistance of the substrate is converted into sheet resistance at lx ΙΟ 2 to 1 χ 1014 Ω / [Ι]. The heating of the TFT substrate can be carried out by a hot press, a hot air circulating furnace, an infrared furnace or the like. When a hot press is used in the process of drying the TFT substrate, the TFT substrate may be adhered to the hot press at 120 ° C for 5 minutes or more. In the first invention, after the TFT substrate is dried as described above, the spacer is spread on the TFT substrate. In the first invention, the spacer is dispersed to dry the TFT substrate 11 -------------------- Please read the notes on the back and fill in this page.) The paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm). 1286650 V. Invention description O) The substrate surface resistance is converted into sheet resistance at ΐχΐ〇ηΩ /□ Above is better. When the surface resistance of the substrate of the TFT substrate is converted to a sheet resistance of less than 1 x 10 " Ω / □, current may leak on the TFT substrate, and the spacer may not be selectively disposed with high precision. Preferably, it is converted into a sheet resistance of ΙχΙΟ11 to lx 1014 Ω/□. Further, in order to avoid adhesion of water to the surface of the substrate after drying, it is preferred to disperse the separator within 5 minutes after drying or dry, or to dry it in the dispersion device. In the first aspect of the invention, the process of selectively arranging the spacers on the gate bus line by electrical attraction and/or electrical repulsive force is performed on each of the wirings of the gate bus line and the source bus line formed on the TFT substrate. A voltage is applied to the ground and the charged separator is then scattered there. In the case of a TFT substrate in which the Cs common bus line and the gate bus line are not common, it is preferable to apply a voltage to each of the wires of the gate bus line, the source bus line, and the Cs common stream line. The above method for selectively arranging the partition member on the brake bus line by electric attraction force applies a negative voltage to the brake bus line when the distributed spacer is positively charged, and grounds the source bus line and the Cs common bus line. If the distributed partition is negatively charged, a positive voltage is applied to the brake bus and the source bus and the Cs common sink are grounded. The above method for selectively arranging the partition member on the sluice line by the electrical repulsion force applies a positive voltage to the source bus line and the Cs common bus line when the distributed spacer is positively charged, and grounds the thyristor stream line. If the distributed partition is negatively charged, then a negative 12 is applied to the source bus and the Cs common stream line. --- Line (please read the note on the back? Please fill out this page again) This paper scale applies to China National Standard (CNS) A4 specification (210 X 297 mm) 1286650_&__ V. Invention Description (r) Voltage, And ground the brake bus. The above method for selectively arranging the partition member on the damper flow line by using electrical attraction and electrical repulsive force 'if the distributed partition is positively charged', a positive voltage is applied to the source bus line and the Cs common sink line, and the gate sink A negative voltage is applied to the line. If the distributed spacer is negatively charged, a negative voltage is applied to the source bus line and the Cs common bus line, and a positive voltage is applied to the gate bus line. The selective arrangement effect of the separators obtained by the above three methods is the same, but considering the viewpoint that one power source device can be achieved, the above-mentioned gravity gravitation method using electric gravity or the above-mentioned electrical repulsive force is excluded. The force method will be more economical. In the first aspect of the invention, a TFT substrate having a structure in which a Cs common bus line and a gate bus line are common can be used. When a TFT substrate having a Cs common bus line and a gate bus line is used, the spacer can be selectively disposed on the gate bus line by applying a voltage only to the gate bus line and the source bus line as described above. . In the first invention, the voltage applied to the brake bus line and the source bus line, and the gate bus line and the CS common line line are between the gate bus line and the source bus line, and between the gate bus line and the CS bus line. The potential difference is preferably 30 to 60V. Among them, the potential difference of about 40V is more preferable. The greater the above voltage difference between the gate sink line and the source bus line, and the gate bus line and the Cs common stream line, the better the choice of the spacers, but if the potential difference is too large, the transistor may be broken or broken. , the problem of the offset of the disconnection feature. According to the experiment, if the above potential difference reaches 50~60V, the characteristic shift of the transistor will be seen. If it exceeds 200V, the crystal will be produced. 13 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -- -----------------Book--------- (Please read the notes on the back and fill out this page) 1286650 a7 ____B7__ V. Invention Description (( The dielectric breakdown of the body is preferably + 15 to +250 // C/g or -15 to -250 " C/g. The charge amount measured by the vacuum Faraday instrument is + 15~+200//C/g or -15~-200# C/g. In more detail, it can be based on the specific gravity of the above separator. 'The optimum amount of charge. For example, for a separator with a specific gravity of 1.0 to 1.3, when the particle diameter is 5·0//ιη, the optimum charge is + 15~+60"C/g or -15 ~-60/zC/g, when the particle diameter is 4.5/zm, the optimum charge is +20~+80//C/g or -20~-80//C/g, when the particle diameter is 3.0 //m time ·, the optimum power is +50~+200//C/g or -50~-200/z C/g. It is not appropriate for the separator to have too much charge. If the charge of the separator is too small, the separator may not be properly disposed on the brake bus line due to weak electrostatic force. Moreover, the electrical attraction of the partition to the gate bus line Weak, when the airflow hits the substrate and flows toward the outside of the substrate, the partition will be scattered by the airflow to the outside of the substrate, and sometimes the number of scattering of the substrate will be too small. If the amount of the separator is too large, the partitions are mutually The repulsive force is increased, and the partition member that is newly dispersed is affected by the potential of the separator previously mounted on the damper flow line, and the partition member may not be densely arranged on the sluice line. The first invention is used. The separator is a thermoplastic adhesive or a photo-curable adhesive, which is selectively disposed on the brake bus and then fixed by heating or light irradiation. _ . _______ _____ —- . This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) -------------------- Order --- ------ (Please read the notes on the back first) (Refill this page) 1286650 B7 V. INSTRUCTIONS (p) By using the above-mentioned thermoplastic adhesive spacer or photocurable adhesive spacer, the spacer is then fixed to the brake bus line to prevent subsequent When the liquid crystal display device process and the liquid crystal display device manufactured are used, the spacer moves from the brake bus line. In the first aspect of the invention, the line width of the thyristor formed on the TFT substrate is preferably at least 3 times the average particle diameter of the spacer. By allowing the line width of the above-mentioned thyristor to be at least three times the average particle diameter of the separator, the spacer can be efficiently disposed on the sluice line. Better system 4 to 5 times. For example, if a spacer having a diameter of 5/zm is dispersed, the line width of the above-mentioned brake bus line is at least 15 // m, preferably about 20 to 25 // m. If the line width of the above-mentioned brake bus line is less than three times the average particle diameter of the separator, the selected arrangement rate is lowered, and sometimes the wire is dropped from the gate bus, and the proportion of the spacer disposed on the pixel electrode becomes excessive. . This is because the separators are brought to the same polarity with each other, and the mutual repulsion between the separator previously mounted on the brake bus line and the separator dispersed later may make it difficult to mount the separator in a narrow space. If the line width of the brake bus line is less than three times the average particle diameter of the partition, as a method for improving the selective arrangement rate of the partition, there are a bus line and a source bus line, and a bus line and a Cs line. The method of setting the potential difference between 50 and 60 V is such a higher voltage. In the case of this voltage, although the characteristic shift of the above-mentioned transistor is started, the characteristic shift of the level can be performed by annealing the TFT substrate at 150 ° C or more for about 1 hour after the spacer is dispersed. Come back to the original TFT features. In the first invention, the Chinese National Standard (CNS) A4 specification (210 X 297 mm) can be applied to 15 paper sheets at 150 ° C after the separator is dispersed. ---------Book---------Line (please read the note on the back and fill in this page) A7 1286650 V. Invention Description (丨)) Temperature Annealing TFT substrate Compensation for TFT characteristics. Preferably, it is annealed at about 200 °C. In the first invention, it is not necessary to add a special procedure to the above annealing process. According to the first aspect of the invention, in the same manner as in the method of manufacturing a general liquid crystal display device, after the separator is spread, two substrates are bonded together, and in order to cure the sealant, the laminate is fired at 150 to 200 ° C for 1 to 2 Hours, self-annealing. In the first aspect of the invention, the TFT substrate in which the separator is selectively disposed is bonded to the CF substrate by a sealant, and then the liquid crystal is filled in the substrate gap to produce a liquid crystal display device. Since the first invention has the above-described configuration, it is possible to provide a liquid crystal display device having a high level of display characteristics because the spacers are reduced in brightness or reduced in contrast. The above liquid crystal display device manufactured by the first invention is also one of the inventions. According to a second aspect of the invention, there is provided a liquid crystal display device in which a TFT substrate and a color filter substrate are bonded together with a separator and a sealant, and a liquid crystal display device obtained by injecting a liquid crystal into a gap therebetween; and the spacer utilizes electrical attraction and/or The repulsive force is selectively disposed to the gate bus line formed on the TFT substrate, and the line width of the gate bus line is at least 3 times the average particle diameter of the spacer. In order to improve the brightness of the liquid crystal display device, the means is sometimes applied to the insulating film formed on the gate bus line, and the pixel electrode is arranged to be covered on the gate bus line to increase the display area. At this time, the width of the gate bus line which is not covered by the pixel electrode corresponds to the line width of the effective gate bus line. 16 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) ' ^ -------- order --------- line (please read the back of the ii meaning (10) Further, in the second invention, in order to effectively arrange the spacers on the gate bus line, the width of the gate bus line not covered by the pixel electrodes is a spacer. The average particle diameter is preferably 4 to 5 times. The second invention can be manufactured, for example, by the first invention. Hereinafter, embodiments of the present invention will be specifically described using Figs. Figure 1 is a schematic illustration of a dispensing device using a separator of the present invention. A nozzle 11a for dispersing the charged separator 8 is provided at the upper end portion of the container 10. A device lib for supplying the separator 8 is connected to the dispensing nozzle 11a via a dispensing pipe 17. A TFT substrate 2 on which a gate bus line, a source bus line, and a Cs common bus line are formed is disposed under the container 10. The wirings of the gate bus line, the source bus line, and the Cs common bus line of the TFT substrate 2 are respectively contacted with the probe pins 16a, 16b, 16c, and a voltage is applied by the voltage applying device 12 to distribute the charged spacers 8 to On the TFT substrate 2, the separator 8 is selectively disposed on the gate bus line using electrical attraction and/or electrical repulsive force. In the present invention, the method of charging the separator 8 can be made of stainless steel, Teflon, Nylon, or urethane resin, etc., by using the dispersion pipe 17 and the dispersion nozzle 11a shown in Fig. 1 . The thing is such that the partition member 8 is charged by the friction between the distributing pipe 17 and the dispensing nozzle 11a. As a method of dispersing the separator of the present invention, a charged gun using an arc discharge is not preferable. This is because the potential of the separator becomes too high, the mutual repulsion of the spacers becomes strong, and the configurability of the gate bus is deteriorated. 本17 This paper scale applies the Chinese National Standard (CNS) A4 specification (210 X 297). )) -------------------- Order --------- line (please read the notes on the back and fill out this page) A7 1286650 ___B7 ___
五、發明說明（iO 圖2所示係本發明所使用之TFT基板之配線構造之示 意圖。如圖2所示’係設有用以對閘匯流線13a施加電壓 之閘觸焊墊13b、用以對源匯流線14a施加電壓之源觸焊 墊14b、以及用以對Cs共匯流線施加電壓之Cs共焊墊 15b，在此分別接觸著圖1所記載之探測針16a，16b，16c。 爲易於進行配線工作、或降低配線電阻値，可對於1片之 TFT基板個別設置複數點’或是各總結於1點。 圖3係用以說明本發明中有效之閘匯流線的線寬之示 意圖。如圖3所示，依據TFT基板之構成，爲提高所完成 之液晶顯示裝置之明亮度’所採取的手段係在閘匯流線 13a上所形成之絕緣膜20上，將像素電極3配置成被覆於 閘匯流線13a上，來增大顯示面積；此時，像素電極之間 隙19係相當於上述有效的閘匯流線之線寬。於本發明中’ 爲有效地將分隔件選擇性配置於閘匯流線上，上述有效的 閘匯流線之線寬以分隔件之平均粒子徑的至少3倍爲佳。 [用以實施發明之最佳形態] 以下舉出實施例更詳細地說明本發明，惟本發明並不 侷限於該等實施例之中。 實施例1 於透明玻璃基板上形成閘匯流線、圖案化之後’形成 閘絕緣膜。進一步，針對像素電極、源匯流線、以及Cs共 匯流線，分別進行成膜與圖案化之操作，製作出TFT基板 18 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) A7 1286650 ____B7_ 五、發明說明（4) 。TFT基板之電極圖案係形成如圖2般，閘匯流線之線寬 約20//m。作爲CF基板，係準備TFT型液晶顯示裝置用 之共電極基板。於此2片基板中施以定向處理。作爲分隔 件，係準備平均粒子徑約5//m之熱可塑性之分隔件。 作爲分隔件散佈前之基板乾燥製程，係讓所製作之 TFT基板在加熱到120°C之熱壓機中密接10分鐘。於乾燥 製程後，TFT基板之基板表面電阻換算爲薄片電阻係lx 1〇14Ω/□。於乾燥製程後立即在圖1所示之散佈裝置中設 置TFT基板，藉由電壓施加裝置對TFT基板上之閘匯流線 施加正電壓，並將源匯流線以及Cs共匯流線接地，讓分隔 件帶負電散佈。此時，基板上之閘匯流線與，源匯流線以 及Cs共匯流線之間的電位差係43V。 以光學顯微鏡觀察已散佈分隔件的TFT基板，其結果 係放大顯示於圖4。絕大多數的分隔件8係選擇性地配置 於閘匯流線13a上。將此TFT基板加熱處理，接著固定分 隔件。其次，使用此TFT基板與CF基板，經由密封形成 、貼合、基板切斷、液晶注入之製程，製作出液晶顯示裝 置。所得到之液晶顯示裝置不會因爲分隔件出現消光，其 對比高、具有良好之顯示特性。 實施例2 除了對源匯流線以及Cs共匯流線施加負電壓，將閘 匯流線接地以外，其於與實施例1同樣地進行操作。此時 ，基板上之閘匯流線與，源匯流線以及Cs共匯流線之間的 19 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 一 ------------------—訂--------- (請先閱讀背面之注意事項再填寫本頁) A7 1286650 __ B7____ 五、發明說明（〇 ) 電位差係39V。 <請先閱讀背面之注意事項再填寫本頁) 以光學顯微鏡觀察散佈了分隔件的TFT基板，其結果 與實施例1同樣地，絕大多數的分隔件係選擇性地配置於 閘匯流線上。又，使用此TFT基板與實施例1同樣地製作 液晶顯示裝置可發現，所得之液晶顯示裝置不會因爲分隔 件出現消光，其對比高、具有良好之顯示特性。 比較例1 除了省略掉分隔件散佈前之TFT基板的乾燥製程以外 ，其餘與實施例1同樣地進行操作。又，TFT基板之基板 表面電阻係1χ1〇9Ω/[Ι1，TFT基板上之閘匯流線與，源匯 流線以及Cs共匯流線之間的電位差係8V。 以光學顯微鏡觀察散佈了分隔件的TFT基板，其結果 係放大顯示於圖5。許多的分隔件8係散佈於像素電極3 之上。又，使用此TFT基板，與實施例1同樣地製作液晶 顯示裝置可發現，所製作之液晶顯示裝置由於分隔件所造 成之消光的影響，其對比較實施例1以及實施例2皆差。 試驗例1 除了省略掉分隔件散佈前之TFT基板的乾燥製程，或 是將乾燥製程之加熱時間定爲5分鐘、加熱溫度設定爲80 °C、100°C或是120°C以外，其餘與實施例1同樣，進行分 隔件之散佈，製作液晶顯示裝置。 此時基板加熱溫度與分隔件之散佈率的關係係示於表 20 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 1286650 A7 ____B7 五、發明說明（（δ ) 1。由表1可知，將TFT基板加熱到100°C以上之情形’約 9成以上的分隔件係選擇性地配置於閘匯流線上，所得之 液晶顯示裝置的顯示特性極爲優異。 表 1 基板加熱溫度 未加熱 80°C 100°C 120°C 閘匯流線(％) 7 67 92 95 像素電極上(％) 75 28 6 3 其他(％) 18 5 2 2 [產業上之可利用性] 本發明由於具有上述之構成，所以在使用有TFT基板 之液晶顯示裝置方面，可不需使用或減少在像素電極上的 分隔件，不會因爲分隔件造成亮度下降，而可提供一種具 有高水準之顯示特性的液晶顯示裝置。 21 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------------訂--------- (請先閱讀背面之注意事項再填寫本頁)5. Description of the Invention (iO FIG. 2 is a schematic view showing a wiring structure of a TFT substrate used in the present invention. As shown in FIG. 2, a gate contact pad 13b for applying a voltage to the gate bus line 13a is provided for A source contact pad 14b for applying a voltage to the source bus line 14a and a Cs common pad 15b for applying a voltage to the Cs common bus line are respectively in contact with the probe pins 16a, 16b, 16c shown in Fig. 1. It is easy to perform wiring work or reduce wiring resistance. It is possible to individually set a plurality of dots for one TFT substrate or to summarize them at one point. Fig. 3 is a schematic view for explaining the line width of the effective gate bus line in the present invention. As shown in FIG. 3, according to the configuration of the TFT substrate, the means for improving the brightness of the completed liquid crystal display device is applied to the insulating film 20 formed on the gate bus line 13a, and the pixel electrode 3 is configured to be Covered on the thyristor flow line 13a to increase the display area; at this time, the gap 19 of the pixel electrode corresponds to the line width of the above-mentioned effective thyristor flow line. In the present invention, the spacer is selectively disposed in an effective manner. On the sluice line, the above The line width of the thyristor flow line is preferably at least 3 times the average particle diameter of the separator. [Best Mode for Carrying Out the Invention] Hereinafter, the present invention will be described in more detail, but the present invention is not limited thereto. In the first embodiment, Example 1 is to form a gate bus line on a transparent glass substrate, and to form a gate insulating film after patterning. Further, film formation is performed separately for the pixel electrode, the source bus line, and the Cs common bus line. Patterning operation, making TFT substrate 18 This paper scale is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) -------------------- --------- Line (please read the note on the back and then fill in this page) A7 1286650 ____B7_ V. Invention description (4). The electrode pattern of the TFT substrate is formed as shown in Figure 2, the gate bus line The line width is about 20/m. As the CF substrate, a common electrode substrate for a TFT-type liquid crystal display device is prepared, and orientation treatment is applied to the two substrates. As a separator, an average particle diameter of about 5/m is prepared. The separator of the thermoplasticity. The substrate drying process before the dispersion is dispersed is made by the substrate. The TFT substrate was adhered to a hot press heated to 120 ° C for 10 minutes. After the drying process, the surface resistance of the substrate of the TFT substrate was converted into a sheet resistance of lx 1 〇 14 Ω / □. Immediately after the drying process, as shown in FIG. A TFT substrate is disposed in the scattering device, a positive voltage is applied to the gate bus line on the TFT substrate by the voltage applying device, and the source bus line and the Cs common bus line are grounded, so that the spacer is negatively dispersed. The potential difference between the gate bus line and the source bus line and the Cs common bus line was 43 V. The TFT substrate on which the separator was spread was observed with an optical microscope, and the result is shown in Fig. 4 in an enlarged manner. Most of the partition members 8 are selectively disposed on the brake bus line 13a. This TFT substrate was heat-treated, and then the spacer was fixed. Next, using this TFT substrate and the CF substrate, a liquid crystal display device was produced through a process of sealing formation, bonding, substrate cutting, and liquid crystal injection. The obtained liquid crystal display device does not have matting due to the spacer, and has high contrast and good display characteristics. (Example 2) The operation was carried out in the same manner as in Example 1 except that a negative voltage was applied to the source bus line and the Cs common bus line, and the gate bus line was grounded. At this time, the paper size between the gate bus line on the substrate and the source bus line and the Cs co-bus line is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). -----------—Book--------- (Please read the notes on the back and fill in this page) A7 1286650 __ B7____ V. Description of invention (〇) The potential difference is 39V. <Please read the precautions on the back side and fill out this page.) The TFT substrate on which the separator is spread is observed with an optical microscope. As a result, in the same manner as in the first embodiment, most of the separators are selectively disposed on the gate bus line. . Further, by using this TFT substrate, a liquid crystal display device was produced in the same manner as in Example 1. As a result, it was found that the obtained liquid crystal display device did not have a matte due to the separator, and had high contrast and good display characteristics. Comparative Example 1 The operation was carried out in the same manner as in Example 1 except that the drying process of the TFT substrate before the separator was dispersed was omitted. Further, the surface resistance of the substrate of the TFT substrate is 1 χ 1 〇 9 Ω / [Ι1, and the potential difference between the gate bus line on the TFT substrate and the source bus line and the Cs common bus line is 8V. The TFT substrate on which the separator was spread was observed with an optical microscope, and the results are shown in Fig. 5 in an enlarged manner. A plurality of spacers 8 are spread over the pixel electrode 3. Further, by using this TFT substrate, it was found that the liquid crystal display device was produced in the same manner as in Example 1, and the liquid crystal display device produced was inferior to Comparative Example 1 and Example 2 due to the influence of the matte caused by the spacer. Test Example 1 Except that the drying process of the TFT substrate before the dispersion of the separator was omitted, or the heating time of the drying process was set to 5 minutes, and the heating temperature was set to 80 ° C, 100 ° C or 120 ° C, In the same manner as in the first embodiment, the dispersion of the separator was carried out to produce a liquid crystal display device. At this time, the relationship between the substrate heating temperature and the dispersion rate of the separator is shown in Table 20. This paper scale applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm). 1286650 A7 ____B7 V. Description of the invention ((δ) 1. As can be seen from Table 1, when the TFT substrate is heated to 100 ° C or higher, about 90% or more of the separators are selectively disposed on the gate bus line, and the display characteristics of the obtained liquid crystal display device are extremely excellent. Table 1 Substrate heating temperature Unheated 80°C 100°C 120°C Brake line (%) 7 67 92 95 Pixel electrode (%) 75 28 6 3 Other (%) 18 5 2 2 [Industrial Applicability] The present invention With the above-described configuration, in the case of using a liquid crystal display device having a TFT substrate, it is not necessary to use or reduce the spacer on the pixel electrode, and the brightness of the spacer is not lowered, and a display characteristic with high level can be provided. Liquid crystal display device. 21 This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) -------------------- Order----- ---- (Please read the notes on the back and fill out this page)