TWI283920B - Method of improving the alignment accuracy of semiconductor process and method of forming opening - Google Patents

Abstract

A method of improving the alignment accuracy of the semiconductor is described. The method is used for photolithography process, and the photolithography process is aimed at the dielectric layer covered by a hard mask, wherein alignment marks are formed under the dielectric layer. The feature is the hard mask has an absorption index and a thickness, and the absorption index multiplied by the thickness is between 100 and 750. Thereby, the better range of the thickness can be determined to improve the accuracy of alignment.

Description

1283 伽: wf.d〇c/e IX. Description of the Invention: [Technical Field of the Invention] In particular, the present invention relates to a method of aligning a semiconductor, calling for the alignment accuracy of a high semiconductor process Alignment method, Photolithography is a key step in the manufacture of semiconductor components. Therefore, in the semiconductor process, it is the focus of the process; 7:: the process of the parts is an example, usually - a product is different according to its complexity The required lithography and exposure steps are about 1 to 18 times. In order for the pattern of the reticle to be correctly transferred to the wafer, in the semiconductor man 2, the alignment of the wafer and the hood must be performed before each execution of the light _ exposure to avoid improper pattern transfer, resulting in The entire wafer is scrapped. In the conventional exposure process, alignment marks corresponding to the reticle are formed on the wafer on which the semiconductor element is to be formed, including a so-called zero-layer mark %&1^) and a floating non-zero layer mark (171〇) This 11 § 11 〇 11 _2 〇 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ When the provided alignment beam is incident on the entire wafer, the winding pattern generated by the light projected on the alignment mark can be reflected to the alignment sensor (Alig surface ent Sensor) or the first order diffraction The first order Diffraction Interferometer Alignment System is used for alignment purposes. In this lithography process, a hard mask is often formed for the purpose of 5 I283^doc/e When engraving the Austrian tea, at the same time, it is not pre-advanced, and the curtain of the scene will prevent damage to the semi-conducting technology of the semiconductor. However, in the light beam #°, 疋, New hard mask material When the degree is too thick, the curtain occurs while the occurrence occurs The quasi-beamline can't penetrate the hard cover too much, which will make the hard mask: the thickness of the mask is not expected to enter the rod- ί's role to make it underneath the reliability. The material layer of the crucible is damaged, lowering the component The invention content λ ΓΓ ΓΓ 、 、 、 、 、 、 、 、 、 、 目的 目的 目的 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄 胄_ _ _ degrees. 4 first bundle month b this ^ _ other - the purpose is to provide a semiconductor process alignment of the thickness of the hard mask to make the thickness of the mask, so that it is not expected to carry out the etching process It is not damaged, but the reliability of the lifting element is 廑. A further object of the present invention is to provide an opening 2 for opening, which can be an opening with high alignment accuracy. / The present invention proposes an improvement of the semiconductor process. A quasi-accuracy method suitable for use in a lithography process for a dielectric layer covered with a hard mask, wherein an alignment mark is formed under the dielectric layer, characterized in that the hard mask has An absorption index and a thickness, and the absorption index The product of degree is between 100 and 750. Furthermore, the dielectric layer has a selective ratio of hard mask white ^ etch greater than 5. ' 1283^ wf.d〇c/e's traits H (four) r _ The method of grouping the accuracy of dream process (4) the red hydrogenation surface of the clothing. The method of improving the alignment accuracy of the semiconductor f-process, as described in a preferred embodiment of the hydrogenation needle, is a body garment. The thickness of the mask is increased in a thin method of the dog-to-mask material, and the method for improving the thickness of the semiconductor process mask is as described in the hard mask of the hard mask material. The degree of dryness is between 175 angstroms and 275 angstroms. The method of improving the semiconductor process described by ίίifΓ, the material of the towel-marking material is copper metal. This is another proposed method for aligning semiconductor processes, starting with a number of alignment marks and a plurality of wires. Next, a W electrical layer is formed on the substrate, and the dielectric layer covers the alignment mark electrical layer to form a hard military curtain, wherein the hard mask has an absorption index \=degree ' and the product of the absorption index and the thickness is 100 to 750 Between, and the dielectric layer has a side selection ratio of more than 5 to the hard mask. Next, a photoresist layer is formed on the hard mask. Then, an alignment beam is used to detect the alignment mark so that the pattern on the mask can be correctly transferred to the photoresist layer. In accordance with a method of aligning a semiconductor process in accordance with a preferred embodiment of the present invention, wherein the alignment marks and the wires are formed on the substrate, a plurality of trenches are first formed in the substrate. Next, a metal layer is filled in the trench. A pair of semiconductor processes according to a preferred embodiment of the present invention I2839; 2iLd0C/e quasi-method wherein the material of the alignment marks and wires comprises copper metal. In accordance with a preferred embodiment of the present invention, the method of forming a plurality of alignment marks and conductors on a substrate, == forming a metal layer. Next, the 'definite metal layer' is formed to form a semiconductor process according to a preferred embodiment of the present invention. The method of the substrate alignment mark and the material of the wire encloses the metal. , the Huai female ^, the invention - the alignment method of the semiconductor process described in the preferred embodiment, and the (4) of the dielectric layer include oxygen. The method of forming the wiring is used for the semiconductor inside the clothing. A plurality of alignment marks and multiple diodes are formed on the substrate: a dielectric layer is formed on the substrate, and the dielectric layer is overlaid _ ;=::Electric = into a hard mask, between the hard leather 忿, 'hard cover ^ will be - map; St is based on the case: two ί, followed by 'with a hard mask as a mask' removed Department: The electric layer until the violent road out of the wires. (4) The way of the thickness of the hard mask, the stagnation is aimed at the light and the body f will not be cut into hard two/special and lose the anti-removal effect, and can be integrated To the existing semiconductor: wf.doc/e: wf.doc/e process, 'no need to add a half (four) machine, can improve the alignment accuracy. In addition, the method for forming the opening of the present invention The above-mentioned and other objects, features and advantages of the present invention are more apparent and can be understood by the present invention. The Lai type will be described in detail as follows.

Generally, in the lithography process, when the alignment mark is used for alignment, a -layer dielectric layer is covered on the alignment mark, and a hard mask is formed on the dielectric layer, wherein the material of the alignment target is, for example, It is a metal, and the material of the hard mask is, for example, titanium nitride or a nitride button, and the etching selectivity ratio of the dielectric layer to the hard mask in the present invention is greater than 5. Then, the winding pattern generated by the light that projects the alignment beam onto the alignment target can be reflected to the alignment sensor or the first-order diffraction interferometer alignment system to achieve the purpose of alignment. . worth it

Note that the thickness of the hard mask affects the accuracy of the alignment during alignment of the reticle. stomach/

The present invention controls the thickness of the hard mask formation according to the following formula: Εχρ(-2χthickness X absorption coefficient)> Attenuation strength Absorption coefficient=47rk/A Among them, ExP represents the natural logarithm and the thickness is the thickness of the hard mask. The absorption coefficient is the absorption coefficient of the hard mask, and the value varies depending on the material. k is the absorption index (absorpti〇n index) and is the wavelength of light. The attenuatecj infensky is aligned with the attenuation of the ΐ283^2Ω^άοο/6 beam. In a preferred embodiment of the present invention, the attenuation intensity used is, for example, 5 =. Thus, it can be known that the product of the absorption index of the hard mask and the thickness is preferably in the range of, for example, 100 to 750 ( As shown in the following equation). 100 <Thickness χ Absorption Index< 750 Figure 1 is a graph showing the attenuation intensity and the thickness of the hard mask in a preferred embodiment of the present invention. Please refer to the Tubiao shaft system for the thickness of the hard mask material, and the Υ shaft system for the attenuation strength. The formula in Figure i: attenuation strength = £ 邛 (4x (thickness / ι〇) χ absorption coefficient), is the equation of the curve L2, l3. ^ The dotted line L1 in Fig. 1 in the formula of Fig. 1 shows the attenuation intensity at 0 〇 5 ‘position’ (4) L2 scale shows the relationship between nitrogen tilt and attenuation.

The material can be applied to the _ curve of titanium nitride and attenuation intensity. According to the drawing of Fig. 1 in the present invention, in the present invention, the set value of the attenuation intensity is more than 5%, and the thickness range of the nitridium nitride is preferably between 175 angstroms and 2 angstroms. The preferred thickness range is, for example, the name U Quan ~ 4 Nai, the order and only sigh?曰 multiplication range, not ^ θ "ΤApplicable to the present invention

The material is suitable for use as a hard mask and loses the anti-side effect. 10 d〇c/e I28392〇w, hereinafter, another embodiment will be described to explain the application of the method of the present invention for improving the alignment accuracy of a semiconductor process. 2A to 2B are cross-sectional views showing a manufacturing process of an opening according to a preferred embodiment of the present invention. Referring to FIG. 2A, a plurality of surprised marks 202 and a plurality of wires 204 are first formed on the semiconductor substrate 200. The holding of the semiconductor substrate is, for example, a germanium substrate, and the metal of the alignment mark 202 and the wire 204 is, for example, aluminum. metal. The alignment marks 202 and the wires 204 are formed, for example, by depositing a layer of a metal layer (not shown) on the semiconductor substrate 200, and then performing a patterning process on the aluminum metal layer. 8" Next, please continue to refer to FIG. 2A to form a dielectric Ϊ 2 〇 6 on the semiconductor substrate 2 ,, and the dielectric layer 206 covers the alignment mark 202 and the wire 204, the material of which is, for example, an oxidative dream, for example, for example. Is a chemical vapor deposition method. Then, referring to FIG. 2A, a hard mask 208 is formed on the dielectric layer, the hard mask 208 has an absorption index and a thickness, and the product of the absorption index disk thickness is, for example, 100 to 750. Between the dielectric layer 2〇6 and the hard-screen %, the selection ratio is greater than 5. In JL, the 舜1 tomb μ is from the ^ ^, and the more masked material is, for example, nitrided. The thickness range is, for example, 175 angstroms to 275 angstroms, for example, chemical vapor deposition. The material of the other hard mask 208 is, for example, titanium nitride, heart soil/only known, V π... A preferred thickness range is, for example, between 325 angstroms and 475 angstroms. Next, please refer to FIG. 2A, and the method of forming the hard mask 2g^layer 2' is, for example, a spin coating method. - a reticle (not! will not), and use an alignment beam to prepare the alignment mark so that the pattern on the reticle can be correctly transferred to the light After the layer 21〇. :wf.doc/e, refer to the object 2B, a plurality of openings are formed in the dielectric I 2〇6 t, and each of the openings 214 corresponds to each of the wires 2〇4, wherein the method of forming the opening 214 For example, first, an exposure process and a development process are sequentially performed on the photoresist layer 21 2a) to transfer the pattern 212 to the photoresist layer 210. Then, the photoresist layer (10) having the pattern 212 is used as a mask. Part of the hard mask pass is removed, and the method of removing is, for example, performing the process, and then using the hard mask 208 as a mask to remove part of the dielectric layer until the wire 2〇4 is exposed. In the case of forming an opening, the method of removing a portion of the dielectric layer 206 is, for example, performing a (four) process [following; the subsequent semiconductor process after the formation of the opening 214 by the resist layer 210 ° is generally common in the technical field of the art. It is well known to those skilled in the art, and in another preferred embodiment of the present invention, the above-mentioned 'middle' forming the opening 214 can also be removed by using the photoresist layer (10) having the pattern 212 as a mask. After the curtain flag, the photoresist layer 210 is removed first, and the hard mask 208 is used as a mask to remove some of the layers. The electrical layer 2〇6 until the wire 2(10) is exposed. — In the above embodiment, after the alignment mark 202 and the alignment beam are used for alignment, the position of the opening 214 can be accurately formed in the correct position. The reliability of the π semiconductor component is on the other hand. On the other hand, the present invention proposes: In addition, a preferred embodiment of the opening of the preferred embodiment is shown in Figure 3. First, 12 12839^0 twf.doc/e is formed on the semiconductor substrate 3 to form a plurality of alignment marks 302 and a plurality of wires 3〇. 4. The material of the semiconductor bottom 300 is, for example, a germanium substrate, and the material of the alignment mark 3〇2 and the wire is a metal such as copper metal. The method of forming the alignment mark 3〇2 and the wire 3 (10) is, for example, to form a dielectric layer 301 on the semiconductor substrate 3, and a plurality of trenches 3〇3 have been formed on the dielectric layer 301. Next, a metal layer (not shown) is formed on the second dielectric layer 301 and fills the trench with a material such as copper metal, for example, by chemical vapor deposition. Then, the metal layer above the dielectric layer 301 is removed, for example, the dielectric layer 301 is a polishing stop layer, and a chemical mechanical polishing process is performed to form alignment marks 302 and wires 304. < Next, referring to FIG. 3B, a dielectric layer 306 is formed on the semiconductor substrate 3, and the dielectric layer 306 covers the alignment mark 3〇2 and the wire 3〇4, which is formed, for example, by yttrium oxide. The method is, for example, a chemical vapor deposition method. Then, referring to FIG. 3B, a hard mask 308 is formed on the dielectric layer. The hard mask 308 has an absorption index and a thickness, and the product of the absorption index and the thickness is, for example, Between ~ 750, and the dielectric layer 3 〇 6 pairs of stones] Shield 308 has an etching selectivity ratio greater than 5. The material of the hard mask is, for example, a nitride button, and the preferred thickness range is, for example, between 175 Å and 2 Å. The method of forming is, for example, a chemical vapor deposition method. In another preferred embodiment, the material of the hard mask 308 is, for example, titanium nitride, and the preferred range is, for example, between 325 angstroms and 475 angstroms. Next, referring to FIG. 3B, a photoresist layer 310 is formed on the hard mask 3A, which is formed by, for example, a spin coating method. Thereafter, a mask (not shown) is provided, and an alignment beam is used to detect the alignment marks 3〇2, 13 oc/e I2839i20twfd (so that the pattern on the mask can be correctly transferred to the photoresist layer 3i. 3M reference picture is formed in the dielectric layer 3% to form a plurality of openings 3M, and each opening 314 corresponds to each wire method, for example, first to the photoresist layer (_ sequentially i ΐ * first clothing f and - The developing process is to transfer the pattern 312 to the photoresist layer 310. Then, the photoresist layer 310 with the solid wood 312 is used as a mask, and the knife is further covered | 308 The method of removing is, for example, performing a =' patterning of the photoresist layer 312 and the hard mask layer, and the "2 electrical layer 306' is formed until the wire 3〇4 is exposed to form the opening 314. The electric layer bird method is, for example, performing a squeaking process to remove the photoresist layer 31G. In yet another preferred embodiment of the shape 31:guide:=r is a general knowledge, the above-mentioned formation opening The so-called device can remove the patterned photoresist layer 312 after removing the photoresist layer 31G with the pattern 312 as a mask. Then, 'guide, == is the mask' Move the paste 3G6 until the exposed line is in high precision with the alignment mark 302 and the alignment beam into the inner semi-conducting I:f 4 pattern. It can be improved: +¥ body 7〇 reliable On the other hand, the semiconductor method of the present invention can eliminate the need to purchase the port 5 and increase the manufacturing cost in the existing semiconductor process. The above embodiments are the alignment of the semiconductor process proposed by the present invention. 24 1283 ^20twf.doc/e method is applied to the application range of metal interconnects. "The above description has at least the following advantages. · The improvement of the alignment accuracy of the semiconductor process proposed by the present invention. The method t can provide a better thickness range for the hard mask of different materials, to improve the alignment precision, and the function of the hard mask is resistant. 2. The alignment method of the semiconductor process proposed by the invention can Integration

The semiconductor production to the current 5, without the need for a new semiconductor machine, can improve alignment accuracy. 3. The method for forming a semiconductor interconnect opening according to the present invention forms a high accuracy of the n®S and the value, which improves the reliability of the semiconductor element. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and it is intended that the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

Manufactured, but not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a graph showing the attenuation strength and the thickness of a hard mask in a preferred embodiment of the present invention. 2A to 2B are cross-sectional views showing the flow of a preferred embodiment of the present invention. Fig. 3A to Fig. 3C are cross-sectional views showing the manufacturing process of the opening of another preferred embodiment of the present invention. & [Main component symbol description] 15 I28392Q twf.doc/e 200, 300: semiconductor substrate 202, 302: alignment mark 204, 304: wire 206, 3 (U, 306: dielectric layer 208, 308: hard cover Curtain 210, 310: photoresist layer 212, 312: pattern 214, 314: opening L1 · dashed line L2, L3 · · curve I28392Q twf.doc / e

16

Claims (1)

I283_ twf.doc/e X. Patent application scope: The method of aligning the accuracy of the vocabulary is applicable to the second-shirt process, which is for covering the hard-mask The interface of the dielectric layer is formed with an alignment mark, and the hard mask has an absorption index and a thickness, and the product of the absorption index and the temperature is between 100 and 75 Å. And; the dielectric layer has an etching selectivity ratio of greater than 5 to the hard mask. The component 2 applies the method of improving the semiconductor process as described in item 1 of the patent scope, wherein the material of the fresh screen comprises - titanium nitride or a 3^ towel material _ 2 pin 敎 导体 conductor process = 1 Wherein (10) titanium nitride as the material of the hard mask has a full range of curtains ranging from 1 〇〇 to 475 angstroms. The method for sizing the accuracy of the ruling conductor process described in item 2 of the second item is set forth in which the nitriding group is used as the hard mask material in the range of 100 angstroms to 275 angstroms. ^ 5· As for the method of improving the semi-guide precision as described in the patent application, the material of the alignment mark includes metal '. The method for aligning a semiconductor process includes: forming a plurality of alignment marks and a plurality of wires on a substrate, forming a dielectric layer on the substrate, and covering the marks and the dielectric layers a pair of wires forming a hard mask on the dielectric layer, wherein the hard mask has a thickness of 17 128393⁄4) twf.doc/e = the product of the margin (four) thickness is 3, and the dielectric layer is 5 An etching selectivity ratio of the hard mask is greater than D > forming a photoresist layer on the hard mask; and detecting the alignment marks by using an alignment beam to enable the pattern on the mask to be correctly transferred To the photoresist layer. The method of aligning a semiconductor process according to Item 6, wherein the hard mask comprises a titanium nitride layer. The alignment of the semiconductor process described in the seventh aspect of the patent application is in the range of 325 angstroms to 475 angstroms. The aligning method of the semiconductor process described in claim 6 of the patent scope, wherein the hard mask comprises a nitride button layer. The method of applying the semiconductor process described in item 9 wherein the thickness of the nitride button layer ranges from 175 Å to 275 Å. 11. The method of the semiconductor process of claim 6, wherein the towel forms the de-marking on the bottom of the county and the + of the wires comprises: 7 forming a plurality of trenches in the substrate; A metal layer is filled in the trenches. 1Z is a method for applying the semi-conductive process described in the full-time _ u item, wherein the alignment marks and the wires of the wires include copper metal. 13. The method of the semiconductor process of claim 6, wherein the forming of the alignment marks and the wires on the substrate comprises: 〃 18 1283 twf.doc/e Forming a metal layer on the substrate; and defining the metal layer to form the alignment marks and the wires. 14. The method of aligning a semiconductor process according to claim 13, wherein the alignment marks and the wires are made of aluminum metal. The method of aligning a semiconductor process according to claim 6, wherein the material of the dielectric layer comprises oxidized stone. 16·—The method of forming an opening for use in a semiconductor interconnect process, including: Forming a plurality of alignment marks and a plurality of wires on a substrate; forming a dielectric layer on the substrate, and the dielectric layer covers the alignment marks and the wires; and forming on the dielectric layer - a hard mask, wherein the hard mask has a pf degree and the product of the absorption index and the thickness is between 1 and 0 750. The dielectric layer is larger than the hard cover. Forming a light block on the curtain Quasi-marking, transfer the case to the photoresist layer; the screen; = the film has a single-screen, remove some of the hard cover, the i: more: the curtain is the mask 'remove part The dielectric layer is exposed to 18. The method for forming the opening as described in claim 17 of the patent application '19 1283920 twf.doc/e wherein the thickness of the titanium nitride layer ranges from 325 Å to 475 Å . The opening (four) method for forming a stomach according to Item 16 of the Chinese Patent No. 16, wherein the hard mask comprises a nitride button layer. 20. If applying for full-time (4) 19 rhyme, the thickness of the nitrided layer is in the range of 175 angstroms to 275 ohms. Method 21. For the method of forming the opening described in item 16 of the full-time enclosure, including the shape of the bottom of the enamel The step of marking and the wires includes forming a plurality of trenches in the substrate; and filling a trench with a metal layer. 1 The method for forming the opening described in Item 21 of the middle section, the material of the wires of the eight-inch and five-wheeled wheels includes copper metal. 23. If the towel 鄕 _ 16 item (4) = the alignment marks are formed on the substrate and the wires are wrapped on the W Hai substrate to form a metal layer; and the layer '(4) is the material mark (four) of the wires. 24. The method for forming an opening according to the method of claim 29, wherein the alignment marks and the materials of the wires comprise a method for forming an opening according to item 16 of the metal bean middle circumference, The material of the electric layer includes yttrium oxide. 20