TWI282255B - Conductive connecting pin and package board - Google Patents
Conductive connecting pin and package board Download PDFInfo
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- TWI282255B TWI282255B TW094140779A TW94140779A TWI282255B TW I282255 B TWI282255 B TW I282255B TW 094140779 A TW094140779 A TW 094140779A TW 94140779 A TW94140779 A TW 94140779A TW I282255 B TWI282255 B TW I282255B
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•1282255 九、發明說明: 【發明所屬之技術領域】 本毛明係有關於-種導電性接續銷以及固定有導電性 接續銷之樹脂封裝基板。 【先前技術】• 1282255 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a conductive connecting pin and a resin package substrate to which a conductive connecting pin is fixed. [Prior Art]
用來將1C晶片等連接在母板或子板上之封裝基板,近 年來伴隨著信號之高頻化,亦被要求須低介電率、低介電 正接。因此基板的材質也正由陶㈣移成以樹脂為主流。 在這樣的月厅、下,以使用樹脂基板之印刷線路板的相 關技術而言,可舉例如:在特公平4_55555號公報中所提 出的所謂多層疊合印刷線路板,係先在已形成電路之玻璃 環氧基板上形成環氧丙烯酸U作為層_践緣層,接 著’再使用«成像法來設立介層孔用開孔,並在將表面 粗化後汉立電鍍光阻’再藉由電鍍來形成導體電路以及介 層孔。 在將如上述般之多層疊合印刷線路板作為封裝基板使 用寺就必須裝上用來連接母板或子板的導電性接續銷。 該銷被稱為τ型銷,其形狀係如第76圖所示般為由柱 狀之接續部722及板狀之固定部721形成側視呈大略了字 型,並藉由接續部722而與母板之插口(s〇cket)等相連 接°亥導電性接續銷71 0係以多層疊合線路板之最外層層 (pad)716,而在該腳位716上藉由銲錫等之導電性接著劑 717來接合固定。 2160-2888A-PF 5 ^1282255 但疋’在上述之構造φ 山 中,由於腳位η6 間樹脂絕緣層752之間的接合面積小,再加上金屬;: 位與樹脂絕緣層之材質完全不相同,、 強度不足的問題。㈣,在作為在有兩者的接合 板!= 環條件τ,即發現會因為封裝基板側與母 板或子板侧之間的熱膨脹率差而使基板產生彎曲咬凹凸, ^時就會在聊位716與層間樹脂絕緣層752的界面 而產=電性接續鎖710 一起與腳位716由基板剝 =問㉖。此外’藉由該導電性㈣们心將封裝基板 3母板之際,若導電性接續鎖的位置與應接續母板的 插口之間存在有位置誤差的話,則應力會集中於接續部而 使得導電性接續鎖與腳位一起剝離。此時即會因為在執循 %之兩溫領域下或實際安裝IC晶片時之熱而使得導電性 鎖發生脫落、歪斜之情況,因而無法達成電氣上之接續。 本發明即是為了解決以上的問題點而提出,其目的係 在於提供一種在熱循環條件下或實際安裝lc晶片等之電 子零件時應力不易集中之導電性接續銷,以及即使受到應 力作用導電性接續銷也不易剝離、脫落而能達成電氣上之 接續的樹脂封裝基板。 ’ 另一方面,在作為封裝基板使用之多層疊合線路板中 配設由可瞬間提供大電力給IC晶片的電源層所構成之平 坦層或配設由以降低雜訊為目的的接地層所構成之平括 層〇 — ----------------------------------- 但是,平坦層係經由介層孔而與接續外部基板(例如子 板)用之腳位相連接。因為來自子板側之電流係藉由微細的 2160-2888A-PF 6 1282255 介層孔來流動,故構成電源層之平坦層其能送到π 電力就受到了限制’因而無法發揮充足的機能。此:曰在 構成接地層之平坦層中亦因為係藉由阻抗高的微細介 來與子板侧的接地線相連接,故亦無法充分發揮防切訊 田%作马封裝基板使用之多層印刷線路板係 接於子板上’故必須在該多層印刷線路板上所設立的聊位 上安裝導電性接續銷。但是,就算是在由樹脂所構成的封 裝基板上設立金屬的腳位,也會因為兩者的接合強度很 低’而在有應力施加於導電性接續銷上時使得導電性 鎖與腳位一起剝離。 、 本發明即是為了解決以上的問題點而提出,其目的係 在於提供—種具有可發揮充份機能之平坦層的封裝基板。 、此外,树明之目的亦係在於提供一種具有可發揮充 份機能之平坦層且導電性接續銷很難剝離之樹脂封裝基 方面在夕層豐合線路板中為了取得與外部基板 的連接’會配置由銲錫等構成的BGA,再藉由肖脱而實 裝於外部基板表面。 —之—熱.善秦條—彝不」 處產生龜裂、損壞 但是,若以BGA進行與外部基板之連接的話,由於bga 與鮮錫光阻開口部的接合面積很小,因此拉伸強度變得很 4 i:在表面只裝中應力集中於脱之際或在信賴性試驗 又在形成多層豐合線路板時,由於會經歷層間樹脂A package substrate for connecting a 1C wafer or the like to a mother board or a daughter board has been required to have a low dielectric constant and a low dielectric positive connection in recent years due to high frequency of signals. Therefore, the material of the substrate is also being transferred from the ceramic (four) to the resin as the mainstream. In the case of a printed circuit board using a resin substrate, for example, a so-called multi-layer printed wiring board proposed in Japanese Patent Publication No. Hei 4-55555 is used. On the glass epoxy substrate, epoxy acrylate U is formed as a layer _ wear layer, and then 're-use imaging method to establish the opening for the via hole, and after the surface is roughened, Hanli plated photoresist' Electroplating is performed to form a conductor circuit and a via hole. In the case of using a multilayer laminated printed wiring board as described above as a package substrate, it is necessary to mount a conductive connecting pin for connecting a mother board or a daughter board. This pin is called a τ-type pin, and its shape is formed in a columnar shape by the columnar connecting portion 722 and the plate-shaped fixing portion 721 as shown in Fig. 76, and is formed by a splicing portion 722. Connecting with the socket of the motherboard, etc., the conductive connection pin 71 0 is formed by multi-layering the outermost layer (pad) 716 of the circuit board, and the conductive position of the pin 716 is conductive by solder or the like. The adhesive 717 is bonded and fixed. 2160-2888A-PF 5 ^1282255 However, in the above-mentioned structure φ mountain, since the joint area between the resin insulating layers 752 between the feet η6 is small, metal is added; the position is completely different from the material of the resin insulating layer. ,, the problem of insufficient strength. (d), as there is a joint plate in both! = ring condition τ, that is, it is found that the substrate is bent and uneven due to the difference in thermal expansion rate between the package substrate side and the mother board or the daughter board side, and the interface between the chatter 716 and the interlayer resin insulating layer 752 is Production = electrical connection lock 710 together with the foot position 716 stripped by the substrate = ask 26. In addition, when the conductive substrate (4) is used to encapsulate the mother board of the substrate 3, if there is a positional error between the position of the conductive connection lock and the socket to be connected to the mother board, the stress is concentrated on the connection portion. The conductive connection lock is peeled off together with the foot. At this time, the conductive lock may be detached or skewed due to the heat in the two temperature fields of the execution or the actual mounting of the IC chip, and thus the electrical connection cannot be achieved. The present invention has been made to solve the above problems, and an object thereof is to provide a conductive connecting pin which is less stress-constrained under thermal cycle conditions or when an electronic component such as an lc wafer is actually mounted, and conductivity even if subjected to stress The resin package substrate which is not easily peeled off or peeled off to achieve electrical continuity. On the other hand, a multi-layered wiring board used as a package substrate is provided with a flat layer composed of a power supply layer capable of instantaneously supplying a large amount of power to the IC chip, or a ground layer for the purpose of reducing noise. The flat layer of the structure———------------------------------------ However, the flat layer is via the interlayer The holes are connected to the pins used to connect the external substrate (for example, the daughter board). Since the current from the side of the sub-board flows through the fine hole of the 2160-2888A-PF 6 1282255, the flat layer constituting the power supply layer is limited in its ability to be supplied to the π electric power, and thus the sufficient function cannot be exerted. Therefore, in the flat layer constituting the ground layer, the grounding line on the side of the sub-board is connected by the fine interface with high impedance, so that the multi-layer printing used for the anti-cutting Yoshida package substrate cannot be fully utilized. The circuit board is attached to the daughter board. Therefore, it is necessary to install a conductive connection pin on the position set up on the multilayer printed circuit board. However, even if the metal foot is set on the package substrate made of resin, the joint strength of the two is very low, and the conductive lock is combined with the foot when stress is applied to the conductive connection pin. Stripped. The present invention has been made to solve the above problems, and an object thereof is to provide a package substrate having a flat layer capable of exhibiting a sufficient function. In addition, the purpose of Shuming is to provide a resin encapsulation base having a flat layer capable of exerting sufficient functions and having a conductive connection pin which is difficult to be peeled off, in order to obtain a connection with an external substrate in the phoenix-rich circuit board. A BGA composed of solder or the like is disposed, and is mounted on the surface of the external substrate by means of a shawl. - It is hot, good, and good, and cracks are damaged. However, if the BGA is connected to the external substrate, the joint area of the bga and the bright tin resist opening is small, so the tensile strength is It becomes very 4 i: when the stress is concentrated on the surface, or when the reliability test is formed in the multi-layered circuit board, it will experience the interlayer resin.
2160-2888A-PF 7 ,1282255 絕緣層、銲錫光阻(有機樹脂絕緣層)之乾燥、硬化,以及 電鐘膜形成後之乾燥、回火(annealing)處理等等之熱處 理,故在基板上會產生彎曲或凹凸。且因為該彎曲、凹凸, 使得該多層疊合線路板與外部基板之間變得無法藉由微小 ' 少數的BGA來達成接續。 . 多層疊合線路板之BGA也可考慮藉由使用PGA來與外 部基板取得連接之方式取代之。亦即,由於pga係利用插 入於外部基板接續部之銷來達到電氣上之接續,故不合如 上述BGA般發生接續不良的問題。 曰 但是,在配設PGA之際,雖然係先於基板上利用鑽頭、 雷射等開設貫通孔後再將PGA插入於該貫通孔中,但在多 層疊合線路板内並未於絕緣樹脂層中填入玻璃環氧樹脂等 之補強材。因此,PGA的支撐力很弱,無法承受报強的拉 伸強度。甚而,經由開孔後在貫通孔内形成導體層時之電 鑛液以及其後各種的熱處理,或是在貫通孔内溶融鲜錫以 固定m時所進行之加熱’皆會讓層間絕緣層之樹脂溶解 •流出,而使得PGA變得無法置。 卜在PGA中因為形成了貫通孔,故無法在多層線 路板中如BGA般於下層配置缓 度變得很小。 置線路。因此,基板設計的自由2160-2888A-PF 7 , 1282255 The drying and hardening of the insulating layer, the solder resist (organic resin insulating layer), and the drying, annealing treatment, etc. after the formation of the electric bell film, so on the substrate Produces bends or bumps. Further, due to the bending and unevenness, it becomes impossible to achieve the connection between the multilayer laminated wiring board and the external substrate by a small number of BGAs. The BGA of a multi-layered circuit board can also be considered by replacing the external substrate with a PGA. That is, since the pga is electrically connected by the pin inserted in the connection portion of the external substrate, the problem of poor connection is caused unlike the BGA described above.配 曰 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配 配Fill in a reinforcing material such as glass epoxy resin. Therefore, the support force of the PGA is very weak and cannot withstand the tensile strength of the newspaper. In addition, the electro-mineral liquid formed by forming the conductor layer in the through-hole after opening and the subsequent heat treatment, or the heating performed when the fresh tin is melted in the through-hole to fix m, will cause the interlayer insulating layer to The resin dissolves and flows out, making the PGA unusable. In the PGA, since the through holes are formed, it is impossible to make the configuration of the lower layer in the multilayer wiring board as small as BGA. Set the line. Therefore, the freedom of substrate design
本發明即是為了解決D U 、上的問題點而提出,其目的係 —,供一種可使PGA的拉伸強度更為強固,同時亦具有 一 【發明内容】The present invention has been made to solve the problem of D U and the like, and the object thereof is to provide a tensile strength stronger for PGA, and also have a content of the invention.
2160-2888A~PF 8 1282255 本發明者等經銳意檢討之結果,終至完成本發明 :鎖在申請專利範圍第1項之發明中,係將固定導電性接 腳位利用設有使該腳位部份地露出之開口部之 層來予以被覆。因& ’在藉由導電性接續銷而將 y基板安裝到母板等其他基板之際時,即使是在例如因 ¥電性接績銷與母板的插口之間存在有位置誤差而產生應 力施加於料電性㈣狀情形下,或是在_環條件二 各種熱處理下而於基板產生f曲等之情形下,冑會因腳位 被有機樹脂絕緣層蓋壓住而能防止其由基板剝離。特別就 算是在以金屬性之腳位與完全不同材質之層間樹脂絕緣層 彼此接合而很難得到足夠接合力的情形下,亦可藉著來自曰 腳位表面的有機樹脂絕緣層之覆蓋而賦予其高度4剥離強 度。 此外,在申請專利範圍第i項之發明中,使腳位的大 小比讓該腳位露出之有機樹脂絕緣層的開口部稍大是很重 要的。藉此,可使腳位由開口部部份地露出。亦即,腳位 的邊緣係被有機樹脂絕緣層予以覆蓋。腳位的大小係以其 直徑為露出該腳位之有機樹脂絕緣層之開口部直徑的 1_ 02〜100倍較佳。腳位的直徑若不滿開口部直徑的n 倍’則腳位的周圍就無法被有機樹脂絕緣層確實地壓蓋, 口而就無法防止導電性接續銷的剝離。反之,若大於1 〇 〇 倍’則會妨害導體層的高密度化。具體而言,在有機樹脂 -^ - 位的直徑為110〜2000 μ m。 在申請專利範圍第2項之發明中,配設在腳位周圍之 2160-28 88A-PF 9 1282255 延伸部係利用有機谢日匕 右m…^、曾緣層來被覆之。因此,即使是在 有應力鈿加於導電性技 抖月匕Ψ _ β η朴 、、男銷上時,也由於腳位已使用有機 树月日絕緣層壓盖之,姑 故可防止其由基板剝離。另一方面, 由於腳位的本體部係由 宁田有機樹脂絕緣層的開口露出,因此 有機樹脂絕緣層與腳 崢之本體部不會接觸,故不會發生 因該有機樹脂絕緣®盥欣 ㈢〃腳位部之本體部相接觸而產生裂隙 (crack)之現象。 在申睛專利範圍第5項之發明中,由於㈣㈣由介 參 層扎而與内層之導體展义 曰相接a,故腳位與基板之間的接觸 面積增加’使得兩者可強固地接合。此外,如上所述般, 相較於在申請專利範圍第1項之發明中固定有導電性接續 銷之腳位與跟其腳位相接合之層間樹脂絕緣層係以不同素 材來接合之情形而言,在申請專利範圍第5項所示之發明 中的腳位係與内層之導體層相接續。因此,變成兩者 金屬而彼此相接續之狀態,故可讓接續變得更確實且使腳 位的剝離強度也提高。 籲㈣’腳位也可藉由!個以上的介層孔來與内層的導 體層相接續。藉此可更進一步地使腳位的接合面積增加, 而月b形成更不易剝離之構造。另外,將腳位藉由介層孔而 接續於内層之導體層時,若把介層孔配置於該腳位之週邊 部份則在提高接續性上會很有效果。因此,也可將介層孔 形成為圓環狀,並利用將該圓環覆蓋之方式來設立腳位。 銷之腳位以藉由2層以上之介層孔來與内層的導體層相接 續而構成,或也可根據封裝基板的形狀或種類以藉由該2 2160-2888A-PF 10 1282255 層以上之介層孔其個狀i個以上之介層孔而構成。盈論 以上何者因為皆可增加腳位之表面積’故都對提高接ς = 度很有效。更進一步,若將設有腳位的介層孔利用具^使 腳位部份地露出之開口部之有機樹脂絕緣層來加以被覆的 話’就可以確實地防止腳位的剝離。 在申請專利範圍第6項之發明中,模芯基板上之導體 層係藉由粗化面(褪光面)而強固的密合在形成模芯基板之2160-2888A~PF 8 1282255 The inventors of the present invention have forgotten the results of the review, and finally completed the present invention: in the invention of claim 1 of the patent application, the fixed conductive pin is used to make the pin The layer of the exposed portion is partially covered to be covered. When the y substrate is mounted on another substrate such as a mother board by the conductive connection pin, even if there is a positional error between the power-receiving pin and the socket of the mother board, for example, When the stress is applied to the material (4), or under the various heat treatments of the _ ring condition, the substrate may be f-curved or the like, and the crucible may be prevented from being pressed by the cover of the organic resin insulating layer. The substrate is peeled off. In particular, even when it is difficult to obtain a sufficient bonding force by bonding the interlayer resin insulating layers of the metallic material to the completely different materials, it is also possible to provide the coating by the organic resin insulating layer from the surface of the crucible. Its height is 4 peel strength. Further, in the invention of claim i, it is important to make the size of the foot slightly larger than the opening of the organic resin insulating layer which exposes the position. Thereby, the foot can be partially exposed by the opening. That is, the edges of the feet are covered by an organic resin insulating layer. The size of the foot is preferably 1 to 02 to 100 times the diameter of the opening of the organic resin insulating layer exposing the position of the foot. If the diameter of the foot is less than n times the diameter of the opening, the periphery of the foot cannot be reliably covered by the organic resin insulating layer, and the peeling of the conductive connecting pin cannot be prevented. On the other hand, if it is larger than 1 〇 〇 , the density of the conductor layer is impaired. Specifically, the diameter of the organic resin - ^ - is 110 to 2000 μm. In the invention of claim 2, the extension of the 2160-28 88A-PF 9 1282255 disposed around the foot is covered by the organic Xie Rizhen right m...^, the edge layer. Therefore, even when there is stress applied to the conductive technology, the pedigree, the male pin, and the male pin, the foot is already covered with the organic tree, and it can be prevented. The substrate is peeled off. On the other hand, since the body portion of the foot is exposed by the opening of the Ningtian organic resin insulating layer, the organic resin insulating layer does not contact the body portion of the ankle, so that the organic resin insulation does not occur (3) A phenomenon occurs in which a body portion of the leg portion is in contact with each other to cause a crack. In the invention of claim 5, since (4) and (4) are layered by the interface and connected to the conductor extension of the inner layer a, the contact area between the foot and the substrate is increased so that the two can be strongly joined. Further, as described above, in comparison with the case where the position in which the conductive connecting pin is fixed and the interlayer resin insulating layer joined to the foot are joined by different materials, in the invention of the first application of the patent application, The foot in the invention shown in claim 5 of the patent application is connected to the conductor layer of the inner layer. Therefore, the metal is brought into contact with each other, so that the connection can be made more reliable and the peeling strength of the foot can be improved. Yu (4)'s foot can also be used! More than one via hole is connected to the inner layer of the conductor layer. Thereby, the joint area of the foot can be further increased, and the month b forms a structure which is less likely to be peeled off. Further, when the pin is connected to the conductor layer of the inner layer by the via hole, it is effective to improve the continuity if the via hole is disposed in the peripheral portion of the pin. Therefore, the via hole can also be formed into an annular shape, and the foot can be set by covering the ring. The pins of the pin are formed by connecting the conductor layers of the inner layer by two or more via holes, or may be based on the shape or type of the package substrate by the layer 2 2160-2888A-PF 10 1282255 or more. The mesopores are composed of one or more mesopores. The above theory can increase the surface area of the foot because it can increase the contact degree. Further, when the via hole provided with the pin is covered with the organic resin insulating layer having the opening portion in which the pin portion is partially exposed, the peeling of the foot can be surely prevented. In the invention of claim 6, the conductor layer on the core substrate is strongly adhered to the core substrate by the roughened surface (matte surface).
樹脂基板的表面上,並藉著在如上述般之導體層上與腳位 相接續,使腳位變得不易由層間樹脂絕緣層剝離。另外, 在將腳位藉由1個以上之介層孔以及2層以上之介層孔而 與内層之導體層相接合時,其内層之導體層亦可為設立在 模芯基板上者。 若依照申請專利範圍第7項之發明的話,則可縮短外 部端子之導電性接續銷與位於該導電性接續銷設立側之相 反侧的其他基板間之線路長度。具體而言,在模芯基板中, 係在貫穿孔週邊之槽脊(land)以及填充在貫穿孔内之樹脂 填充材上藉由介層孔而與腳位相接續。又,將貫穿孔以導 體層被覆之以進行所謂的覆蓋電鐘,則亦可在該導體層上 藉由介層孔而與腳位相接續。更進一步,亦可僅在貫穿孔 之槽脊上藉由介層孔而與腳位相接續。 在申請專利範圍第14項之發明中,係藉由使導電性接 著劑之熔點為180〜280°C來確保與導電性接續銷之接合強 虞—在—2』!吻 賴性試驗後或是經過在IC晶片實裝之際所需的熱施加後 其強度亦只降低少許。在未滿1 8 〇 I之情形下,接合強度 2160-2888A-PF 11 ,1282255 雖仍有2. 〇Kg/pin左右,但是在該情形下僅表現出 L5Kg/pin之程度。此外,由於κ晶片實裝時之加埶备 致導電性接著劑的熔解,故最後會引起導電性接續銷之脫 洛、傾斜。若在超過280°C之情形下,則相對於導電性接 口劑之熔解溫度,樹脂層之樹脂絕緣層、銲錫光阻層皆會 熔解掉特佳的溫度係2 0 0〜2 6 0 °C。此乃因為具有該溫戶 的導電性接合劑可使導電性接續銷之接合強度的偏差變 ),同時實際所施加的熱亦不會對構成封裝基板之樹脂芦 造成損傷。 9 在申明專利範圍第15項之發明中,係藉由將導電性接 口,1以錫、鉛、銻、銀、金、銅中至少1種以上之成份來 形成,即可形成具有上述熔點之導電性接合劑。特別是至 ::有錫,或錫-録之導電性接合劑因可在上述之熔:範 形成,因此即使受熱熔解也很容易再度凝固粘著,故 不會引起導電性接續銷之脫落、傾斜。 由於上述導電性接著劑係錫/錯、錫/録、錫/銀、錫/ 郐/錯之合金,特別是接合強度皆達2. GKg/pin =故即使是在熱循環條件下或不會 導::接續鎖之接合強度降低,因而不會引起銷之脫 傾斜,同時亦能讀保電氣上之接續。 申請專利範㈣Π項之發明係藉由料電 以可撓性優異之擇自由鋼或銅合金、錫、辞、; 力,以使得導電性接續鐵不易由^ 就在該導電性接續鎖所使用之銅合金而言,係以碟青On the surface of the resin substrate, by the contact with the pin on the conductor layer as described above, the pin position is less likely to be peeled off by the interlayer resin insulating layer. Further, when the pin is bonded to the conductor layer of the inner layer by one or more via holes and two or more via holes, the conductor layer of the inner layer may be formed on the core substrate. According to the invention of claim 7 of the patent application, the length of the line between the conductive connecting pin of the external terminal and the other substrate on the opposite side of the side where the conductive connecting pin is set can be shortened. Specifically, in the core substrate, the land is formed in the land around the through hole and the resin filler filled in the through hole is connected to the pin by the via hole. Further, by coating the through hole with the conductor layer to perform a so-called cover clock, the conductor layer may be connected to the pin by the via hole. Furthermore, it is also possible to continue the connection with the foot by the via hole only on the land of the through hole. In the invention of claim 14, the bonding strength of the conductive bonding pin is ensured to be strong after the melting point of the conductive adhesive is 180 to 280 ° C or after the -2" kiss-resistance test or It is only a small decrease in the strength after the application of heat required for mounting the IC chip. In the case of less than 18 〇 I, the joint strength 2160-2888A-PF 11 , 1282255 is still about 2. 〇Kg/pin, but in this case only shows the extent of L5Kg/pin. Further, since the conductive adhesive is melted during the mounting of the κ wafer, the detachment and tilting of the conductive connecting pin are caused finally. If it exceeds 280 ° C, the resin insulating layer and the solder resist layer of the resin layer will melt out the excellent temperature system 2 0 0~2 60 °C with respect to the melting temperature of the conductive interface agent. . This is because the conductive bonding agent having the temperature allows the variation in the bonding strength of the conductive connecting pins to be changed, and the actual applied heat does not damage the resin reed constituting the package substrate. 9 In the invention of claim 15 of the invention, the conductive interface 1 is formed by at least one of tin, lead, antimony, silver, gold, and copper, thereby forming the melting point. Conductive bonding agent. In particular, the conductive bonding agent having tin or tin-recording can be formed in the above-mentioned melting state, so that it is easily re-solidified and adhered even if it is melted by heat, so that the conductive connecting pin does not fall off, tilt. Since the above conductive adhesive is tin/wrong, tin/recorded, tin/silver, tin/bismuth/wrong alloy, especially the joint strength is up to 2. GKg/pin = so even under thermal cycling conditions or not Guide:: The joint strength of the connecting lock is reduced, so that the pin is not tilted, and the electrical connection can be read. The invention of the patent application (4) is based on the choice of free electric steel or copper alloy, tin, rhyme, and force, so that the conductive connection of iron is not easily used by the conductive connection lock. For copper alloys,
2160-2888A-PF 12 1282255 銅較合適。此乃因為其不僅可捷性優異,電氣特性亦报良 好,而且在作為導電性接續銷之加工性方面亦非常優異。 在該導電性接續銷中,係以使用由板狀固定部以及凸 出設置於該板狀固定部的約中央位置之柱狀接續部所構成 之所謂τ型銷較為適合。板狀固定部係藉由導電性接著巧 而固定於形成腳位之導體層上之部份,其可依據腳位的又 小而以圓^或多角形來適當形成。此外,關於接續部的形 狀,只要是能插入其他基板的形狀就沒問題,圓柱型、角 柱型、圓錐型、角錐型等皆可。該接續部對於通常位置之 銷基本上為1纟,但設立2支以上也沒特別的問題,可對 應實裝的其他基板而適當形成。 在導電性接續銷中,柱狀之接續部係以直徑為 〇.卜u随、長度為較佳;而板狀之固定部係以 幻翌在〇.5~2.0mm的範圍内較佳;腳位的大小可依照所要 裝合之其他基板的種類等來適當選定。 ^此外,在申請專利範圍第19項之發明中,在將封裝基 板女裝到外部之電子零件等之時’於例如因導電性接續銷 與其他基板之間存在有位置誤差而產生應力施加於該導電 性接續鎖之情形下,可藉著接續部之曲撓而將該應力吸 ,又’在因熱循5哀條件之各項熱處理而使得基板上產生 ’曾曲等之情形下,由於固定部可曲撓來對應其變形,故可 防止導電性接續銷由基板剝離,而成為信賴性高之封裝基 申吻專利範圍第1 9項之封裝基板亦可將固定有導電 !·生接績銷之腳位藉由設有使該腳位部份地露出之開口部之 2160-2888A-PF 13 ,1282255 有機樹脂絕緣層予以被覆。藉此,即使是如前述般在對導 電丨生接績銷產生應力集中或發生基板之變形等情形下,也 會因腳位被有機樹脂絕緣層所蓋壓而能防止其由基板剝 離。特別是就算在金屬製腳位與層間樹脂絕緣層之間存有 所明的彼此間材質完全不同而很難得到足夠的接合力之情 況下,亦可藉由將腳位表面以有機樹脂絕緣層加以覆蓋而 能賦予其高度的剝離強度。 在將腳位以有機樹脂絕緣層被覆時,使該腳位的大小 比讓該腳位路出之有機樹脂絕緣層的開口部稍大是很重要 的。藉此,可使腳位由開口部部份地露出。亦即,腳位的 邊緣係被有機樹脂絕緣層予以覆蓋。腳位的大小係以其直 徑為露出該腳位之有機樹脂絕緣層之開口部直徑的 L 02〜1〇〇倍較佳。腳位的直徑若不滿開口部直徑的n 倍,則腳位的周圍就無法被有機樹脂絕緣層確實地壓蓋, 因而就無法防止導電性接續銷的剝離。反之,若大於1〇〇 倍,則會妨害導體層的高密度化。具體而言,在有機樹脂 絕緣層上所設立之開口部直徑在$ 1〇〇〜15〇〇“時,則腳 位的直徑為110〜2000 /zm。 申請專利範圍第23項之發明係將導電性接續銷以可 撓性優異之擇自由銅或銅合金、錫、辞、鋁、貴金屬中至 少:種以上之金屬來形成,由於固定該導電性接續銷之腳 位係藉由介層孔而與内層之導體層相接續,故藉由導電性 基板之間的接觸面積增加故兩者可強固地接合。此外,如 上所述般,相較於在申請專利範圍第19項之發明中固定有 2160-2 8 8 8A〜Pf1 14 Ϊ282255 導電性接續銷之腳位愈跟盆 p /、跟異腳位相接合之層間樹脂絕緣層 係以不同素材來接合之情古 月开y而& ’在本申請專利範圍所示 之發明中的腳位係與内層盡 、 ^ n嘈之泠體層相接續。因此,變成兩 者白為金屬而彼此相接靖夕壯Afc 不接’之狀悲,故可更確實接合且使腳 位的剝離強度也提高。 匕外腳位也可藉由〗個以上的介層孔來與内層的導 體層相接~。藉此可更進—步地使腳位的接合面積增加, 而能形成更不易剝離之構造。另夕卜將聊位藉由介層孔而 接績於内層之導體層時,若把介層孔配置於該腳位之週邊 部份則在提高接續性上會很有效果。因此,也可將介層孔 形成為圓環狀’並利用將該圓環覆蓋之方式來設立腳位。 ,更進步’在®合基板中’亦可將固定有導電性接續 鎖之腳位以猎由2層以上之介層孔來與内層的導體層相接 續而構成,或也可根據封裝基板的形狀或種類以藉由該2 層以上之介層孔其個狀i個以上之介層孔而構成。無論 以上何者ϋ為皆可增加腳位之表面積,故都對提高接合強 ^很有效。若將設有聊位的介層孔利用具有使腳位部份地 路出之開口部之有機樹脂絕緣層來加以被覆的話,就可以 確實地防止腳位的剝離。 在申請專利範圍第24項之發明中,模芯基板上之導體 層係藉由粗化面(褪光面)而強固的密合在形成模芯基板之 樹脂基板的表面上,並藉著在如上述般之導體層上與腳位 ^ | 麗。另外二 在將腳位藉由1個以上之介層孔以及2層以上之介層孔而 與内層之導體層相接合時,其内層之導體層亦可為設立在 2160-2888A-PF 15 Ϊ282255 模芯基板上者。 若依照巾請專利範圍第25項之發日月的話,則可縮短導 t接續銷與位於該導電性接續銷設立側之相反侧的其他 “反間之線路長度。具體而言,在模芯基板中,係在貫穿 匕邊之槽脊以及填充在貫穿孔内之樹脂填充材上藉由介 層孔而與腳位相接續…將貫穿孔以導體層被覆之以進 仃所u覆蓋電鍍’則亦可在該導體層藉由介層孔而與腳 位相接績。更進一#,亦可僅在貫穿孔之槽脊上藉由介層 孔而與腳位相接續。 ^在申明專利範圍第32項之發明中,係藉由使導電性接 著劑之熔點為18〇~2sn〇r C來禮保與導電性接續銷之接合強 又在2· OKg/pin以上。該強度即使是在經過熱循環等之信 賴性試驗後或是經過在Ic晶片實裝之際所需的熱施加後 -強度亦降低很J。在未滿18(rc之情形下,接合強度雖 仍有2.0Kg/pin左右,但是在該情形下僅表現出 之程度。此外,由於T「曰μ 、 曰曰片貝裝時之加熱會導致導電性接 _溶解,故最後會_電性接續銷之脫落、傾斜。 :在超過28G C之情形下,則相對於導f性接合劑之溶解 里度树月曰層之树月曰絕緣層、銲錫光阻層皆會熔解掉。特 么的/皿度得、200〜260 C。此乃因為具有該溫度的導電性接 合劑可使導電性接續鎖之接合強度的偏差變少,同時實際 所施加的熱亦不會對構成封裝基板之樹脂層造成損傷。 合劑以錫、錯、録、銀、金、銅中至少、1種以上之成份來 形成即可形成具有上n點之導電性接合劑。特別是至 2160-2888A-PF 16 1282255 少含有錫-鉛或錫-銻之導電性接合劑因可在上述之熔點範 圍内形成’因此即使受熱熔解也很容易再度凝固枯著,故 不會引起導電性接續銷之脫落、傾斜。 由於上述導電性接著劑係锡/錯、錫/録、錫/銀、錫/ 銻/鉛之合金’特別是接合強度皆達2 〇Kg/pin,其偏差亦 小:故即使是在熱循環條件下或ic晶片實裝時之熱皆不會 使導電性接續銷之接合強度降低,因而不會㈣銷之脫 落、傾斜,同時亦能確保電氣上之接續。 在申明專利圍第35項之發明中,由於係、在導電性接 續鎖之柱狀接續部上設置比其他部分之直徑還小之蜂腰 部,故可賦予鎖容易彎曲性。因此,在有應力施加於導電 性接續銷上時’即可藉由接續部之蜂腰部的彎曲而將該岸 力吸收,以使得導電性接㈣不易由基板剝離。 u 在該導電性接續鎖中’係以使用由板狀固定部以及凸 出叹置於該板狀固定部的約中央位置之柱狀接 之所謂T型銷較為適合。 π稱成 /狀之固定部係藉由導電性接著劑而固定於形成腳位 之‘體層上之部份,其可依據 形來適當形成。此外,接續部係::大小而以圓形或多角 立心 係用來安裝到其他基板上之 口 ΙΜ刀’只要疋能插入該電子愛株 „ & 零件内之形狀就沒問題,圓垤 型、角柱型、圓錐型、角錐型#tt 131柱 個鎖基本上為u,但設立^該接續部通常是1 «實—裝--的-其^基i而 在該導電性接續銷中,板狀之:定部-係:直 〇_ 5〜2. Omm的範圍内來形成較# · ’、 ^二在 而柱狀之接續部係以直2160-2888A-PF 12 1282255 Copper is suitable. This is because it is excellent in electrical properties, good in electrical properties, and excellent in processability as a conductive connection. In the conductive connecting pin, a so-called τ-type pin composed of a plate-like fixing portion and a columnar connecting portion which is provided at a center position of the plate-shaped fixing portion is preferably used. The plate-like fixing portion is fixed to the portion of the conductor layer forming the foot by conductivity, which can be appropriately formed in a round shape or a polygonal shape depending on the small position of the foot. Further, the shape of the connecting portion is not limited as long as it can be inserted into another substrate, and may be a cylindrical type, a prism type, a conical type, a pyramid type or the like. The splicing portion is substantially one turn for the pin at the normal position. However, there are no particular problems in establishing two or more pins, and it can be appropriately formed in accordance with other substrates to be mounted. In the conductive connecting pin, the column-shaped connecting portion has a diameter of 〇.u, and the length is preferred; and the plate-shaped fixing portion is preferably in the range of 5.5 to 2.0 mm; The size of the foot can be appropriately selected in accordance with the type of other substrates to be assembled, and the like. Further, in the invention of claim 19, when the package substrate is worn to an external electronic component or the like, stress is applied to, for example, a positional error between the conductive connection pin and the other substrate. In the case of the conductive continuous lock, the stress can be absorbed by the bending of the joint portion, and in the case where the heat treatment of the heat is used to cause the occurrence of 'Zengqu, etc. on the substrate, The fixing portion can be flexed to correspond to the deformation thereof, so that the conductive connecting pin can be prevented from being peeled off from the substrate, and the package substrate having the high reliability of the package base can be fixed and electrically conductive! The pin of the performance pin is covered by a 2160-2888A-PF 13 , 1282255 organic resin insulating layer provided with an opening portion for partially exposing the pin. Thereby, even if stress concentration occurs in the conductive pin (or the deformation of the substrate) as described above, the foot can be prevented from being peeled off from the substrate because the foot is covered by the organic resin insulating layer. In particular, even if it is difficult to obtain sufficient bonding force between the metal foot and the interlayer resin insulating layer, it is difficult to obtain sufficient bonding force, and the surface of the foot can be made of an organic resin insulating layer. It can be covered to give it a high peel strength. When the foot is covered with the organic resin insulating layer, it is important that the size of the pin is slightly larger than the opening of the organic resin insulating layer from which the foot is made. Thereby, the foot can be partially exposed by the opening. That is, the edges of the feet are covered by an organic resin insulating layer. The size of the foot is preferably L 02 to 1 times the diameter of the opening of the organic resin insulating layer exposing the position of the foot. If the diameter of the foot is less than n times the diameter of the opening, the periphery of the foot cannot be reliably covered by the organic resin insulating layer, so that peeling of the conductive connecting pin cannot be prevented. On the other hand, if it is more than 1〇〇, the density of the conductor layer is impaired. Specifically, when the diameter of the opening portion set in the organic resin insulating layer is "1 〇〇 15 15", the diameter of the foot position is 110 to 2000 / zm. The conductive connecting pin is formed of at least one or more kinds of copper or copper alloy, tin, rhodium, aluminum, or noble metal, which is excellent in flexibility, and the pin of the conductive connecting pin is fixed by the via hole. Since the contact layer of the inner layer is continuous, the contact area between the conductive substrates is increased, so that the two can be strongly bonded. Further, as described above, the invention is fixed in the invention of claim 19 2160-2 8 8 8A~Pf1 14 Ϊ282255 The position of the conductive connecting pin is the same as that of the basin p /, and the interlayer resin insulation layer joined with the different feet is joined by different materials. The foot position in the invention shown in the scope of the patent application is continuous with the inner layer and the body layer of the inner layer. Therefore, the two are white and the two are connected to each other, and the Afc does not pick up. Can be more surely joined and the peel strength of the foot is also The outer leg can also be connected to the inner conductor layer by more than one via hole. This can further increase the joint area of the foot and form a peeling less. In addition, when the conductor layer of the inner layer is connected by the via hole, it is effective to improve the continuity when the via hole is disposed in the peripheral portion of the pin. The via hole can be formed into a ring shape and the foot can be set by covering the ring. Further progress can be made in the 'with the base plate' to fix the position of the conductive joint lock. Two or more via holes may be formed in contact with the inner layer of the conductor layer, or one or more via holes may be formed by the two or more via holes depending on the shape or type of the package substrate. No matter which of the above, the surface area of the foot can be increased, so it is effective for improving the joint strength. If the interlayer hole is provided, the organic layer having the opening portion of the foot is partially used. When the resin insulating layer is coated, the peeling of the foot can be surely prevented. In the invention of claim 24, the conductor layer on the core substrate is strongly adhered to the surface of the resin substrate on which the core substrate is formed by the roughened surface (matte surface), and As described above, the conductor layer and the pin are on the other side. When the pin is joined to the conductor layer of the inner layer by using one or more via holes and two or more via holes, the inner layer is The conductor layer can also be set on the core substrate of 2160-2888A-PF 15 Ϊ 282255. If the date and time of the 25th patent range is applied according to the towel, the connection pin can be shortened and the conductive connection pin is established. The other "reverse line length" on the opposite side of the side. Specifically, in the core substrate, the land is penetrated by the land and the resin filler filled in the through hole is connected to the pin by the via hole... the through hole is covered with the conductor layer. The cover plating can also be used to connect the pin to the pin via the via hole. Further, it can also be connected to the foot through the via hole only on the land of the through hole. In the invention of claim 32, the bonding strength of the conductive bonding agent is made stronger by 2·OKg/pin or more by making the melting point of the conductive adhesive 18 〇 to 2 sn 〇r C. This strength is reduced even after the heat resistance test such as thermal cycling or the heat application required at the time of mounting the Ic wafer. In the case of less than 18 (rc, the joint strength is still about 2.0 Kg/pin, but in this case only shows the degree. In addition, since T "曰μ, the heating of the cymbal shells leads to conduction. Sexually _dissolved, so the last _ electrical connection of the pin off, tilt.: In the case of more than 28G C, compared to the f-type bonding agent, the dissolution of the tree 曰 layer of the tree 曰 曰 insulation layer, Solder photoresist layer will be melted. The special / dish degree, 200 ~ 260 C. This is because the conductive bonding agent with this temperature can make the variation of the joint strength of the conductive joint lock less, and at the same time The applied heat does not damage the resin layer constituting the package substrate. The mixture is formed by at least one or more of tin, erroneous, recording, silver, gold, and copper to form a conductive joint having an upper n point. In particular, to 2160-2888A-PF 16 1282255, a conductive bonding agent containing less tin-lead or tin-bismuth can be formed within the above-mentioned melting point range. Therefore, even if it is melted by heat, it is easy to be solidified again, so it is not It will cause the conductive connecting pin to fall off and tilt. The above-mentioned conductive adhesives are tin/wrong, tin/recorded, tin/silver, tin/bismuth/lead alloys, especially the joint strength is 2 〇Kg/pin, and the deviation is small: even in the thermal cycle Under the condition or the heat of the ic chip is not installed, the bonding strength of the conductive connecting pin is not lowered, so that the pin is not peeled off and tilted, and the electrical connection is also ensured. According to the invention, since the bee waist portion having a diameter smaller than that of the other portions is provided in the columnar joint portion of the conductive joint lock, the lock can be easily bent. Therefore, when stress is applied to the conductive joint pin, 'The shore force can be absorbed by the bending of the bee waist of the joint so that the conductive joint (4) is not easily peeled off from the substrate. u In the conductive joint lock, the plate-like fixing portion and the projection are used. A so-called T-shaped pin which is attached to the columnar center of the plate-like fixing portion is suitable. The π-shaped/shaped fixing portion is fixed to the body layer forming the foot by a conductive adhesive. Part, it can be formed according to the shape. This , the connection department:: the size of the round or multi-angled core is used to mount the boring tool on the other substrate 'as long as the 疋 can insert the shape of the electronic love „ & the part is no problem, round shape , corner column type, cone type, pyramid type #tt 131 column lock is basically u, but the connection ^ is usually 1 «solid-loaded--the base i is in the conductive connection pin, Plate-shaped: fixed part-series: straight 〇 5~2. Omm's range is formed to be more than # · ', ^ two and the columnar connection is straight
2160-2888A-PF 1282255 杈為0·1〜〇.8_、長度為^ 口疋之封裝基板或所要裝合 定。 σ2160-2888A-PF 1282255 杈 is 0·1~〇.8_, the length of the package substrate is required to be mounted. σ
Mmm來形成較佳;可依照所欲 之其他基板的種類等來適當選 、 蜂腰部為設置在該接綠 '部份細之形式來开锋、、’“的中間部份’並係以較其他 ,接續銷之材質或導電性^:部的粗細雖會因構成導電性 要的是其直經必須為接續^之大小4而有所差異,但重 若蜂腰部之直徑比1他;;:的5〇%以上、98%以下。 • 部的強声合辦π八他刀之直徑的5〇%小的話,則接續 斷;又,:不足夠’在封裝基板裝合之際就會變形折 就達不Γ可腰部之直捏超過其他部份之直徑的98%的話, 之吸收效果賦予給接續部之預期可挽性,而無法得到應力 q))。 蜂腰邛亦可以複數個來形成(第33圖 =本發明之導電性接續銷的材質,若屬金屬的話則 鉍等 X限疋’可使用擇自金、銀、銅、鎳、鈷、錫、 Γ" 1種以上的金屬來形成。鐵合金係以商品名 」(鎳鈷鐵之合金)及不銹鋼為較佳材質,而銅合 r糸以攝青鋼為較佳材質。此乃因為上述物質之電氣特性 ,且在作為導電性接續銷之加工性方面非常優異。特 別疋;因為具有高度的可撓性,故非常適合用來作 應力吸收之用。 此外,在申請專利範圍第37項之發明中,在將封裝基 與其,基板之間存在有位置誤差而產生應力施加於該導電 !生接π鎖之情形下’由於可藉由接續部蜂腰部之曲繞而將Mmm is preferably formed; it can be appropriately selected according to the type of other substrates to be used, and the bee waist portion is provided in the form of the green portion of the green portion, and the middle portion of the '' Others, the material or conductivity of the connecting pin ^: Although the thickness of the part is due to the conductivity, the straight line must be different for the size of the connecting piece 4, but the diameter of the bee waist is greater than 1; : 5〇% or more and 98% or less. • If the 强 八 他 刀 刀 〇 〇 〇 小的 小的 小的 小的 小的 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; If the deformation is not enough, the straightness of the waist can be more than 98% of the diameter of the other parts. The absorption effect is given to the jointability of the joint, and the stress q) cannot be obtained. The bee waist can also be plural. To form (Fig. 33 = the material of the conductive connecting pin of the present invention, if it is a metal, the X limit of the 铋 can be selected from gold, silver, copper, nickel, cobalt, tin, bismuth " Made of metal. The iron alloy is made of the trade name "nickel-cobalt-iron alloy" and stainless steel, and copper. R糸 is preferably made of blue steel. This is because of the electrical properties of the above substances, and it is excellent in the workability as a conductive joint pin. Especially, because it has high flexibility, it is very suitable for use. Further, in the invention of claim 37, in the case where there is a positional error between the package base and the substrate, stress is applied to the conductive! By the winding of the bee waist of the connecting part
2160-2888A-PF 18 ,1282255 該應力,收,故可防止導電性接續鎖由基板剝_,而成為 <吕賴性面之封裝基板。 申請專利㈣第37項之封裝基板亦可將固定有導電 性接續銷之腳位藉由設有使該腳位部份地露出之開口部之 有機樹脂絕緣層予以被覆。藉此,即使是如前述般在對導 電性接續鎖產生應力集中或發生基板之變形等情形下,也 會因腳位被有機樹脂絕緣層所蓋壓而能防止其由基板剝 離。特別是就算在金屬性之腳位與層間樹脂絕緣層之間存 有所謂的彼此間材質完全不同而报難得到足夠的接合力之 情況下,亦可藉由將腳位表面以有機樹脂絕緣層加以覆蓋 而能賦予其高度的剝離強度。 在將腳位以有機樹脂絕緣層被覆時,使該聊位的大小 讓該腳位路出之有機樹脂絕緣層的開口部稍大是很重要 藉此’可使腳位由開口部部份地露出。亦即,腳位的 邊緣係被有機樹脂絕緣層予以覆蓋。腳位的大小係以盆直 徑為露出該腳位之有機樹脂絕緣層之開口部直徑的 L100倍較佳。腳位的直徑若不滿開口部直徑的u2 倍’則腳位的周圍就無法被有機樹脂絕緣層確實地昼罢, 因而就無法防止導電性接續銷的剝離。反之,若大於: 倍,則會妨害導體層的高密度 絕緣層上所設立之開:為=二,在有機樹脂 位的直徑為U0侧〇“。為〇〇〜1500㈣時,則腳2160-2888A-PF 18 , 1282255 This stress is applied to prevent the conductive connection lock from being peeled off by the substrate, and becomes a package substrate of the <Lü Lai surface. The package substrate of claim 37 (4) may also be provided with an organic resin insulating layer provided with an opening portion for partially exposing the pin. As a result, even if stress concentration occurs in the conductive connection lock or deformation of the substrate occurs as described above, the foot can be prevented from being peeled off from the substrate because the foot is covered by the organic resin insulating layer. In particular, even if there is a so-called mutual difference between the metallic foot and the interlayer resin insulating layer, it is difficult to obtain sufficient bonding force, and the surface of the foot can be made of an organic resin insulating layer. It can be covered to give it a high peel strength. When the foot is covered with an organic resin insulating layer, it is important to make the size of the chatter position such that the opening of the organic resin insulating layer which is located at the foot is slightly larger, thereby making it possible to partially position the foot from the opening. Exposed. That is, the edges of the feet are covered by an organic resin insulating layer. The size of the foot is preferably L100 times the diameter of the opening of the organic resin insulating layer exposing the position of the bowl. If the diameter of the foot is less than u2 times the diameter of the opening, the periphery of the foot cannot be reliably removed by the organic resin insulating layer, so that peeling of the conductive connecting pin cannot be prevented. On the other hand, if it is greater than: times, it will impair the opening of the high-density insulating layer of the conductor layer: ==2, when the diameter of the organic resin is U0 side 〇". When 〇〇~1500 (four), then the foot
鏃夕拉錶如, —1運 均之接、戈部上所設立的蜂 哞腰口R艮各易彎曲,且固定該導雷 性接績銷之腳位係藉由介 你猎由;丨層孔而與内層之導體層相接合, 2160-2888A-PF =賴卿复财1 土丄鱼歧㈣接績 1282255 故错由導電性接續銷之容易 易$曲性即可增加吸收應力之效 果,且腳位與基板之間的接 強固地接合。此外,如上所=積亦增加,故使得兩者可 第 斤述般,相較於在申請專利範圍 相 導電性接績銷之腳位與跟其腳位 一曰之層間樹脂絕緣層係以不同素材來接合之情形而 二在本申請專利範圍所示之發明中的腳位係與内層之導 !層相接續。因此’變成兩者皆為金屬而彼此相接續之狀 恕’故可更確實地密合且使腳位的剝離強度也提高。 此外,腳位也可藉由工個以上的介層孔來與内層的導 體層相接續。藉此可更進一步地使腳位的接合面積增加, 2能形成更不易剝離之構造。另外,將腳位藉由介層孔而 a、’於内層之導體層時,若把介層孔配置於該腳位之週邊 部份則在提高接續性上會很有效果。因此,也可將介層孔 形成為圓環狀,並利用將該圓環覆蓋之方式來設立腳位。 "更進一步’在疊合基板中,亦可將固定有導電性接續 ^之腳位以藉由2層以上之介層孔來與内層的導體層相接 續而構成,或也可根據封裝基板的形狀或種類以藉由該2 層以上之介層孔其個別之丨個以上之介層孔而構成。無論 以上何者因為皆可增加腳位之表面積,故都對提高接合強 度很有效。若將設有腳位的介層孔利用具有使腳位部份地 路出之開口部之有機樹脂絕緣層來加以被覆的話,就可以 確實地防止腳位的剝離。 —a—範圍第42項之發明中,模芯某jg占义導體 層係藉由粗化面(褪光面)而強固的密合在形成模芯基板之 樹脂基板的表面上,並藉著在如上述般之導體層上與腳位 2160-2888A-'PF 20 1282255 相接續,使腳位變得不易由層間樹脂絕緣層剝離。另外, 在將腳位藉由1個以上之介層孔以及2層以上之介層孔而 與内層之導體層相接合時,其内層之導體層亦可為設立在 模芯基板上者。 ° - 若依照申請專利範圍第43項之發明的話,則可縮短導 -電性接續鎖與位於該導電性接續銷設立侧之相反侧的其他 基板間之線路長度。具體而言,在模芯基板中,係在貫穿 孔週邊之槽脊以及填充在貫穿孔内之樹脂填充材上藉由介 籲層孔而與腳位相接續。又,將貫穿孔以導體層被覆之以進 行所謂的覆蓋電鍍,並在該導體層上藉由介層孔而與腳位 相接續。更進-步’亦可僅在貫穿孔之槽脊 而與腳位相接續。 厚孔 ^在申請專利範圍第50項之發明中’係藉由使導電性接 著劑之熔點為180〜28(TC來確保與導電性接續銷之接合強 度在2. OKg/pin以上。該強度即使是在經過熱循環等之信 賴性試驗後或是經過在IC晶片實裝之際所需的熱施加‘ 其強度亦只降低少許。在未滿18〇t之情形下,接合強度 雖仍有2· OKg/pin纟纟,但是在該情形下僅表現出 1.5Kg/pin之程度。此外,由於1(:晶片實裝時之加熱會導 ,導電性接著劑的溶解,故最後會引起導電性接續鎖之脫 洛、傾斜。若在超過28(rc之情形下,則相對於導電性接 合劑之溶解溫度,樹脂層之樹脂絕緣層、鲜錫光阻層皆合 的導電性接合劑可使導電性接續鎖之接合強度的偏差變 少,同時實際所施加的熱亦不會對構成封裝基板之樹脂層 2160-2888A'-PF οη 1282255 造成損傷。 在申明專利範圍第51項之發明中,係藉由將導電性接 合劍以錫、錯、銻、銀、全 、 不氏鱼銅中至少1種以上之成份來 形成’即可形成具有上述熔點之導電性接合劑。特別是至 少含有錫鉛或錫-銻之導電性接合劑因可在上述之熔點範 圍内形成’因此即使受熱溶解也很容易再度凝固枯著,故 不會引起導電性接續銷之脫落、傾斜。镞夕拉表如, -1 Yunyun, the bee 哞 上 上 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈 戈The hole is joined to the conductor layer of the inner layer, 2160-2888A-PF = Lai Qing Fu Cai 1 Soil squid (4) The performance is 1282255. Therefore, the effect of the absorption stress can be increased by the easy connection of the conductive connection pin. And the connection between the foot and the substrate is strongly bonded. In addition, as the above, the product is also increased, so that the two can be said to be the same as the resin insulation layer of the interlayer of the conductive pin in the patent application range and the layer of the resin. The case where the material is joined and the foot in the invention shown in the scope of the present application is connected to the guide layer of the inner layer. Therefore, it is said that both of them are metal and continue to adhere to each other, so that the adhesion can be more surely adhered and the peeling strength of the foot can be improved. In addition, the foot can also be connected to the inner conductor layer by more than one via hole. Thereby, the joint area of the foot can be further increased, and 2 can form a structure which is less likely to be peeled off. Further, when the pin is placed in the conductor layer of the inner layer by the via hole, if the via hole is disposed in the peripheral portion of the pin, it is effective in improving the continuity. Therefore, the via hole can also be formed into an annular shape, and the foot can be set by covering the ring. " Further, in the laminated substrate, the pin to which the conductive connection is fixed may be formed by connecting the interlayer layers of the inner layer with the via holes of two or more layers, or may be based on the package substrate The shape or type is constituted by a plurality of via holes of the two or more via holes. No matter which of the above, the surface area of the foot can be increased, so it is effective for improving the joint strength. When the via hole provided with the pin is covered with the organic resin insulating layer having the opening portion through which the pin portion is partially provided, the peeling of the foot can be surely prevented. - a - the invention of the 42nd aspect, wherein a jg-presence conductor layer of the core is strongly adhered to the surface of the resin substrate on which the core substrate is formed by the roughened surface (matte surface), The conductor layer as described above is connected to the pin 2160-2888A-'PF 20 1282255, so that the pin position is not easily peeled off by the interlayer resin insulating layer. Further, when the pin is bonded to the conductor layer of the inner layer by one or more via holes and two or more via holes, the conductor layer of the inner layer may be formed on the core substrate. ° - In accordance with the invention of claim 43 of the patent application, the length of the line between the electrically conductive connection lock and the other substrate on the opposite side of the side where the conductive connection pin is set can be shortened. Specifically, in the core substrate, the land is formed on the periphery of the through hole and the resin filler filled in the through hole is connected to the pin by interposing the layer hole. Further, the through hole is covered with a conductor layer to perform so-called overcoat plating, and the conductor layer is connected to the pin by a via hole. The further step can also be connected to the foot only in the land of the through hole. Thick hole ^ In the invention of claim 50, the melting point of the conductive adhesive is 180 to 28 (TC to ensure the bonding strength with the conductive connecting pin is 2. OKg/pin or more. Even after the reliability test such as thermal cycling or the heat application required at the time of mounting on the IC chip, the intensity is reduced only a little. Under the condition of less than 18 〇t, the bonding strength is still 2· OKg/pin纟纟, but in this case, only 1.5Kg/pin is exhibited. In addition, since 1 (the heating during wafer mounting leads to the dissolution of the conductive adhesive, it eventually causes conduction). The detachment lock is tilted and tilted. If it exceeds 28 (in the case of rc, the conductive adhesive of the resin layer and the tin tin resist layer can be combined with respect to the dissolution temperature of the conductive bonding agent. The variation in the joint strength of the conductive joint lock is reduced, and the actual applied heat does not cause damage to the resin layer 2160-2888A'-PF οη 1282255 constituting the package substrate. In the invention of claim 51 By using a conductive joint sword with tin Conductive bonding agent having the above melting point can be formed by forming at least one of at least one of erbium, strontium, silver, total, and non-fish copper. In particular, a conductive bonding agent containing at least tin-lead or tin-bismuth It can be formed within the above-mentioned melting point range. Therefore, even if it is dissolved by heat, it is easily solidified again, so that the conductive connecting pin does not fall off or tilt.
由於上述導電性接著劑係錫/錯、錫/銻、錫/銀、錫/ 銻/鉛之合金,特別是接合強度皆達2 0Kg/pin,其偏差亦 小’故即使是在熱循環條件τ或IC晶片實裝時之熱皆不會 使導電性接續銷之接合強度降低,因而不會引起銷之脫 落、傾斜,同時亦能確保電氣上之接續。 、在申請專利範圍第53、54項中,係於基板的表面上配 置導體層之平坦層,並藉由在該平坦層上直接連接導電性 接續銷,以降低由外部基板(例如子板)到平坦層之電阻。 藉此,可使得由子板側供給電力變得容易,以讓構成電源 層之平坦層能發揮充份的機能。此外,在構成接地層之平 坦層中亦可使其藉由低阻抗之導電性接續銷而與子板側之 接地線相連接,以充分地達到防止雜訊之目的。另外,平 坦層亦可形成為網眼(mesh)W•。網眼係藉由配設方形、圓 形之導體未形成部份來形成(參照第5 〇圖)。 更進一步,在申請專利範圍第56項之發明中,係將固 口部之有機樹脂絕緣層來予以被覆。因此,在藉由導電性 接續銷而將封裝基板安裝到母板等其他基板之際時,即使 2160-2888A-PF 22 1282255 是在例如因導電性接續銷與母板的插σ之間存在有位置誤 差而產生應力施加於該導電性接續銷之情形下,或是在熱 循環條件之各種熱處理下而於基板產生f曲等之情:下’、,、、 皆會因腳位被有機樹脂絕緣層蓋壓住而能防止其由基板剝 離。特別就算是在以金屬性之腳位與完全不同材質之層間 樹脂絕緣層彼此接合而很難得収夠接合力的情形下^ 可藉著來自腳位表面的有機樹脂絕緣層之覆 度的剝離強度。 八间 申請專利範圍第57項之發明係藉由將導電性接續銷 以可撓性優異之擇自由銅或銅合金、m責金屬 中至少1種以上之金屬來製成,而於有應力施加於銷時藉 著撓曲來吸收該應力,以使得導電性接續銷不易由基板亲: 就在該導電性接續銷中所使用之銅合金而t,係以鱗 月銅較合適。此乃因為其不僅可撓性優異,電氣特性亦很 良好’而且在作為導電性接續鎖之加工性方面亦非常優異。 在該導電性接續銷中,係以使用由板狀固定部以及凸 出設置於該板狀固定部的約中央位置之柱狀接續部所構成 之所明T型銷較為適合。板狀之固定部係藉由導電性接著 劑而固定於形成腳位之導體層上之部份,其可依據腳位的 大小而以圓形或多角形來適當形成。此外,關於接續部的 形狀,/、要疋能插入其他基板的形狀就沒問題,圓柱型、 角柱里11錐型、角錐型等皆可。該接續部對於通常位置 之一銷—基本上―為」—支丄但—設上2—支農上▲隨別1間|復 對應灵裝的其他基板而適當形成。 在導電性接續銷中,柱狀之接續部係以直徑為 2160-2888A-PF 23 1282255 〇·ι〜〇.8題、長度為較佳; 直徑在0. 5~2. Omm的範in $ m 之固疋部係以 裝合之其他基板的種類等來=選:位的大小可依照所要 在申請專利範圍第58項之 續銷之柱狀接續部上設置比中’由於係在導電性接 X :!: 具他部分 部,故可賦予銷容易f曲性。因此 直=小之蜂腰 1接、,韻上時,即可藉由接續部之蜂腰部的f曲而將:: 力吸收’以使得導電性接續銷不易由基板剝離。而將該應 在該導電性接續銷中,係以使用由板狀固 出設置於該板狀固定部的約 及凸 之所謂T型銷較為適合。央位置之柱狀接續部所構成 板狀之固定部係藉由導雷 之導卜w、 劑而固定於形成腳位 λ 據腳位的大小而以圓形或多禽 形來適當形成。此外,接續 接,邛係用來安裝到其他基板上之 邛份,只要是能插入該電子零件内 % 型、角柱型、圓錐型、角錐型等比 $心。題,圓柱 用錐型#皆可。該接續部通常是j 個㈣本上為1支,但設立2支以上也沒特別的問題,可 對應貫裝的其他基板而適當形成。 在該導電性接續銷中,板狀之固定部係以直徑在 5〜2. 〇mm的範圍内來形成較佳;而柱狀之接續部係以直 徑為O.H. 8mm、長度為卜^來形成較佳;可依照所欲 固定之封裝基板或所要裝合之其他基板的種類等來適當選 —定」_________________ 蜂腰部為設置在該接續部的中間部份,並係以較其他 部份細之形式來形成。該蜂腰部的粗細雖會因構成導電性 2160-2888A-PF 24 1282255 或導電性接續銷之大小等而有所差異,但重 若蜂部直徑的5… 部的強度會變;= 广分之直徑的5°“、的話,則接續 ^.v又侍不足夠,封裝基板在裝合之際就會變形折 :達又:蜂腰部之直徑超過其他部份之直徑的98%的話折 =::T:續部之預期可撓性,而無法得到應力 又,蜂腰部亦可以複數個來形成。 本發明之導電性接續銷的材質,若 了使用擇自金、銀、銅、錄、銘、錫、 4至)1種以上的金屬來形成。鐵合金係以商品名 ovar」(鎳务鐵之合金)及不㈣為較佳材質 =以碟青鋼為較佳材f。此乃因為上述物f之電氣特性 '且在作為導電性接續銷之加工性方面非常優異 別是鱗青銅,阳炎I女、 應力吸收之用。“度的可繞性,故非常適合用來作 “在中請專利範圍第59項之發明中,係藉由使導電性接 者劑之炼點為勝28代來確保與導電性接續銷之接合強 度在2. 0Kg/pin以上。該強度即使是在經過熱循環等之传 賴性試驗後或是經過在IC晶片實裝之際所需的熱施加^ 其強度亦只降低少許。在未滿18吖之情形下,接合強度 雖仍有2. 〇Kg/pin左右’但是在該情形下僅表現: h5Kg/pin之程度。此外,由於1C晶片實裝時之加熱會導 f性接免鎖之脫 落、傾斜。若在超過28(rc之情形下,則相對於導ϋ—. 合劑之炼解溫度’樹脂層之樹脂絕緣層、銲錫光阻層皆會 2160-2888A-PF 25 1282255 熔解掉。特佳的溫度係200〜260t:。此乃因為具有該溫度 :導電性接合劑可使導電性接續鎖之接合強度的偏= 少,同時實際所施加的熱亦不會對構成封裝基板之樹脂声 造成損傷。 在申請專利範圍第60項之發明中,係藉由將導電性接 '合劑以錫、鉛、銻、銀、金、銅中至少j種以上之成份來 形成,即可形成具有上述熔點之導電性接合劑。特別是至 少含有錫-鉛或錫-銻之導電性接合劑因可在上述之熔點範 籲®内形成,因此即使受熱溶解也很容易再度凝固勒著,故 不會引起導電性接續銷之脫落、傾斜。 ,由於上述導電性接著劑係錫/鉛、錫/銻、錫/銀、錫/ 銻/鉛之合金,特別是接合強度皆達2. 〇Kg/pin,其偏差亦 小,故即使是在熱循環條件下或丨c晶片實裝時之熱皆不會 :吏導電性接續銷之接合強度降低,因而不會引起銷之‘ 落、傾斜,同時亦能確保電氣上之接續。 另一方面,為了對應上述之課題,故檢驗BGA之龜裂 •位置,發現其係由金屬電鍍層以及金屬電鑛層與β以接合 部處產生龜裂、破壞。由此可知,係在實裝時之堡合之際 的熱應力或在接續信賴試驗之高溫與低溫反覆操作之執循 環條件下超過⑽小時之際產生了龜裂。以該原因而言^ 係被認為是由於BGA與銲錫光阻之開口部的接合面積很 小,因此應力很容易集中。此外,因為接合面積很小,故 -------------合—1度—也— 會—變i 〇 -— _—_________ 關於為了對應該課題而經檢討之結果,提出了在焊錫、 光阻層之開口部藉由導電性之接著劑層來配置凸起狀銷之 2160-2888A-PF 26 1282255 PGA,以取代BGA。由於該PGA比BGA增加了更多接合面積, 故應力不會集令’在接合界面也不會產生龜裂、損壞,此 外,接合強度又高,又不會與外部基板接續不良。甚而, 因為未形成PGA用之貫通孔’故可在該pGA之下層配置線 路,因而能保有與BGA相同的設計自由度。 另外凸起狀銷之配置方法,可先在銲錫光阻層之開 口部周圍設立凹部,再將銷插入該凹部來配置;也可將該 凸起狀銷藉由金屬層、導電性之接合劑層來配置。Since the above-mentioned conductive adhesive is an alloy of tin/wrong, tin/bismuth, tin/silver, tin/bismuth/lead, especially the joint strength is up to 20 Kg/pin, and the deviation is small, so even in the thermal cycle condition The heat during the mounting of the τ or IC chip does not reduce the bonding strength of the conductive connecting pins, so that the pins are not peeled off and tilted, and the electrical connection can be ensured. In the scope of claims 53 and 54, the flat layer of the conductor layer is disposed on the surface of the substrate, and the conductive connection pin is directly connected on the flat layer to reduce the external substrate (for example, the daughter board). The resistance to the flat layer. Thereby, it is possible to supply electric power from the sub-board side so that the flat layer constituting the power supply layer can perform a sufficient function. Further, in the flat layer constituting the ground layer, it can be connected to the ground line on the side of the sub-board by a low-resistance conductive connecting pin to sufficiently prevent noise. In addition, the flat layer can also be formed as a mesh W•. The mesh is formed by arranging a square or circular conductor without forming a portion (see Fig. 5). Further, in the invention of claim 56, the organic resin insulating layer of the solid portion is covered. Therefore, when the package substrate is mounted on another substrate such as a mother board by the conductive connection pin, even if 2160-2888A-PF 22 1282255 exists between, for example, the insertion of the conductive connection pin and the mother board, Position error causes stress to be applied to the conductive connecting pin, or under various heat treatment conditions of thermal cycling, and f-curve is generated on the substrate: the lower ',,, and The insulating cover is pressed to prevent it from being peeled off from the substrate. In particular, even in the case where the metal-like pin and the interlayer resin insulating layer of completely different materials are bonded to each other and it is difficult to obtain a sufficient bonding force, the peeling strength by the coverage of the organic resin insulating layer from the surface of the foot can be obtained. . The invention of the eightth application patent item 57 is made by applying a stress to a conductive connecting pin which is free from copper or a copper alloy or at least one metal selected from the group consisting of metal. The stress is absorbed by the deflection at the time of pinning, so that the conductive connecting pin is not easily used by the substrate: it is suitable for the copper alloy used in the conductive connecting pin. This is because it is excellent not only in flexibility but also in electrical characteristics, and is also excellent in workability as a conductive joint lock. In the conductive connecting pin, a T-shaped pin which is formed by a plate-like fixing portion and a columnar connecting portion which is provided at a center position of the plate-shaped fixing portion is preferably used. The plate-shaped fixing portion is fixed to a portion of the conductor layer forming the foot by a conductive adhesive, and can be appropriately formed in a circular shape or a polygonal shape depending on the size of the foot. In addition, there is no problem with the shape of the joint, and the shape of the other substrate can be inserted into the cylindrical shape, the 11-cone type, the pyramid type, and the like in the cylindrical shape. The splicing portion is appropriately formed for one of the normal positions, which is substantially "for" - but for the other substrate of the other genre. Omm的范围in $ In the case of the conductive splicing pin, the diameter of the splicing portion is 2160-2888A-PF 23 1282255 〇·ι~〇.8, the length is preferably; the diameter is 0. 5~2. The solid part of m is selected by the type of other substrates to be assembled, etc. = the size of the bit can be set according to the column-shaped joint to be renewed in the 58th article of the patent application scope. X:!: With some parts of it, it can give the pin easy to bend. Therefore, the straight = small bee waist 1 is connected, and when the rhyme is on, the force can be absorbed by the f-bend of the bee waist of the connecting portion so that the conductive connecting pin is not easily peeled off from the substrate. On the other hand, in the conductive connecting pin, a so-called T-shaped pin which is fixed to the plate-like fixing portion by a plate shape is used. The plate-shaped fixing portion formed by the columnar joint portion at the center position is appropriately formed in a circular shape or a multi-bird shape by being fixed to the size of the foot position based on the position of the foot. In addition, the connection is used to mount the package on other substrates as long as it can be inserted into the electronic component, such as the % type, the prism type, the conical type, and the pyramid type. Question, the cylinder can be used with the cone type #. The number of the joints is usually one in j (four), but there are no particular problems in setting two or more, and it can be appropriately formed in accordance with other substrates that are attached. In the conductive connecting pin, the plate-shaped fixing portion is preferably formed in a range of 5 to 2. 〇 mm in diameter; and the column-shaped connecting portion is formed by a diameter of OH 8 mm and a length of Preferably, it can be appropriately selected according to the type of the package substrate to be fixed or the other substrate to be assembled, etc. _________________ The waist portion of the bee is disposed in the middle portion of the splicing portion, and is thinner than the other portions. Form to form. The thickness of the bee waist may vary depending on the size of the conductive 2160-2888A-PF 24 1282255 or the conductive connecting pin, but the strength of the 5th part of the bee diameter may change; If the diameter is 5°, then the ^.v will not be enough. The package substrate will be deformed when it is assembled. If the diameter of the bee waist exceeds 98% of the diameter of other parts, the discount =: :T: The continuation is expected to be flexible, and the stress cannot be obtained. The waist of the bee can also be formed in plural. The material of the conductive connecting pin of the present invention is selected from gold, silver, copper, recorded, and Ming. , tin, 4 to) one or more kinds of metals are formed. The iron alloy is sold under the trade name of ovar" (nickel iron alloy) and not (four) = preferred material is disc green steel. This is because the electrical properties of the above-mentioned material f are excellent in the workability as a conductive connecting pin. It is used for the purpose of stress absorbing. "The degree of recyclability, it is very suitable for use in the invention of the 59th patent range, by making the refining point of the conductive connector to be 28 generations to ensure the continuity with the conductivity. The bonding strength is above 2.0 Kg/pin. This strength is reduced only a little after the heat transfer test such as thermal cycling or the heat application required for mounting on the IC wafer. In the case of less than 18 ,, the joint strength is still 2. 〇Kg/pin or so but in this case only shows: h5Kg/pin. In addition, the heating of the 1C wafer during installation will prevent the lock from falling off and tilting. If it exceeds 28 (in the case of rc, the resin insulation layer and the solder resist layer of the resin layer are melted away from the resin layer and the solder resist layer of the resin layer). The temperature is particularly good. 2160-2888A-PF 25 1282255 It is 200 to 260t: This is because the temperature: the conductive bonding agent can reduce the bonding strength of the conductive bonding lock to a small amount, and the actual applied heat does not damage the resin sound constituting the package substrate. In the invention of claim 60, the conductive bonding agent is formed by at least j or more of tin, lead, antimony, silver, gold, and copper, thereby forming a conductive layer having the above melting point. A bonding agent, in particular, a conductive bonding agent containing at least tin-lead or tin-bismuth, which can be formed in the above-mentioned melting point, so that it is easily re-solidified even if it is dissolved by heat, so that it does not cause conductivity. The detachable pin is detached and tilted. Since the above-mentioned conductive adhesive is an alloy of tin/lead, tin/bismuth, tin/silver, tin/bismuth/lead, especially the joint strength is 2. 〇Kg/pin, the deviation It is also small, so even under thermal cycling conditions or 丨c. The heat of the wafer is not installed: the bonding strength of the conductive connecting pin is reduced, so that the pin does not fall and tilt, and the electrical connection can be ensured. On the other hand, in order to cope with the above problem Therefore, it was found that the crack and the position of the BGA were found to be cracked and broken by the metal plating layer and the metal electric ore layer and the joint portion of the β. It is known that the heat at the time of the compaction at the time of mounting is known. The stress is generated at a time when the stress exceeds (10) hours under the circulatory conditions of the high-temperature and low-temperature repeated operation of the continuation test. For this reason, it is considered that the joint area of the opening of the BGA and the solder resist is very large. Small, so the stress is easy to concentrate. In addition, because the joint area is small, -------------------------i-〇--___________ As a result of the review, it is proposed to dispose the 2160-2888A-PF 26 1282255 PGA in the opening of the solder and the photoresist layer by a conductive adhesive layer instead of the BGA. More joint area than BGA, so stress is not The assembly order does not cause cracks or damage at the joint interface. In addition, the joint strength is high and the connection to the external substrate is not bad. Even, since the through hole for the PGA is not formed, it can be disposed under the pGA. The circuit can maintain the same design freedom as the BGA. In addition, the method of arranging the bump pins can be performed by forming a recess around the opening of the solder resist layer and then inserting the pin into the recess; The lifting pin is disposed by a metal layer or a conductive bonding agent layer.
^又,不僅開口部,亦可藉由凹部而與導體電路取得電 虱上的接續。藉由上述所取得的電氣上之接續,即使是對 於大谷1之電氣、電氣信號亦不會發生故障,而可將其傳 達至外部基板。 〃 士開口部雖然必須與内層基板之導體電路取得電氣上之 接但疋在開口部的周圍設立凹部時卻不須藉由該凹部 來取付電氣上之接續’但在必要時亦可與導體電路取得電 氣上之接續。 以下所示係本發明之較佳實施例。 、將銲錫光阻層之開σ部形成為直徑i⑽〜_^。若不 滿1 00 // m ,則凸起狀銷之接合強度會降低;若超過 〇 V、m時則在晶片實裝中接續於外部基板的優點就會互 抵消另外,在開口部之周圍設立凸起狀銷之接續用凹 邛時’開口部係以形成在120〜800 // m較佳。 過〜一土』-圍―敗形慮亞—起」1趨—接續―吊凹部係 、直住為20〜1〇〇 # m且2個以上來形成。特別是為了提高 凸起狀銷對銲錫光阻的接合強度,上述凹部之直徑係以在Further, not only the opening but also the connection between the conductor and the conductor circuit can be obtained by the recess. According to the electrical connection obtained as described above, even if the electrical and electrical signals for the Otani 1 do not malfunction, they can be transmitted to the external substrate. Although the opening of the gentleman must be electrically connected to the conductor circuit of the inner substrate, when the recess is formed around the opening, the recess is not required to take electrical connection, but the conductor circuit may be used if necessary. Get electrical continuity. The following is a preferred embodiment of the invention. The opening σ portion of the solder resist layer is formed to have a diameter i(10)~_^. If it is less than 1 00 // m, the bonding strength of the protruding pins will decrease; if it exceeds 〇V, m, the advantages of connecting the external substrates in the wafer mounting will cancel each other out, and the periphery of the opening will be established. The opening portion of the projecting pin is preferably formed at 120 to 800 // m when the recess is used. After ~~1"------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ In particular, in order to increase the bonding strength of the bump pin to the solder resist, the diameter of the recess is
2160-2888A-PF 27 1282255 25~7—,並“〜8個呈對角線狀來配置較佳。 ^ 卜肖σ '^以及凹部係以形成為圓形較佳。其理 為較不易發生開口部之角裂隙(comer crack)等現象 形成方法之範圍較廣。以其他形狀而言,也可為 = 多角形或橢圓狀。 寺之 _上述之開口部以及凹部的形成可利用光線、雷射 頭(dnll)以及牙孔器(punching)等方法來形成。其別 Μ同時形成.部與凹部之光線來進行較佳。在開口部 内设立金制時,亦可藉由_來設立凹部。 亦可在由開口部所露出之導體電路上形成金屬層 厲層可使用擇自金、銀、鎳、錫、銅、銘、錯、鱗、終: 鶴、翻、鈦、白金、銲錫等之金屬中至少i種以上的物質 來瓜成〃中特別以利用金、銀、錫、錄來形成金屬層較 佳。其理由係因為上述金屬耐録優異,止露出之導 體電路被腐蝕。 此外,金屬層可單獨使用上述之單一金屬,也可使用 與其他金屬之合金。金屬層亦可層壓至2層以上。 以金屬層的形成方法而言,可使用無電解電鍍、電解 電鐘、取代電鍍、㈣、蒸鑛等。特別是若由金屬膜的均 -性及較便宜的觀點來看係以利用無電解電鍍來形成較 佳0 導電性之接著材層可使用銲錫、硬鲜材、粒子狀物質 奥i可—11 樹1 級子一隨[絲兔祕姻來形成。车 此處若由上述之材貝中觀之,接著材層係以利用銲錫來 形成者最佳。其理由為可較易提昇接合強度,且形成方法 2160-2888A-PF 28 1282255 的選擇較廣。 在導電性之接著材層係以銲錫形成時,鏵錫係以使用 :-般印刷基板中所使用的锡:錯=1:9〜4:6等比 佳0 銲錫亦可使用錫/銻、錨 錫/銀、錫/銀/銅等不含鉛成份 .者。其理由為可使環境更優良且可確保接合強度。 :形成方法可使用藉由印刷、裝瓶法(__)、光阻 钮刻法、電鍍法等而在開口 丨甲埋入知錫接者材層之方 ’去广步’可使用藉由在凸起狀鎖之接合面上施以電 法等來形成銲錫之接著材層,再制熱使其溶解 ^硬銲材形成接著材層時,可使用由擇自金、銀、 鋼、矯、鎳、鈀、鋅、銦铉 構成之金屬硬·…、 上之物質所 Βθ ^ ,、中特別以使用被稱為銀銲材與金銲 材之/、日日銲材較佳。以硬録 ^ , 硬卸之方法而言,可使用藉由將已 i之二狀:硬銲材置入開口部内施行熔融來形成接著材 二法」或使用將開口部以外施行塗佈之後再浸潰使填 上开^ : °p内之方法’或使用在凸起狀金屬電極之接合面 ^成硬科再加熱、㈣而插人於開口部内 :::以上所述之方法之外,亦可使用-般所通用的全:; 在以粒子狀物質與執 接見妓時’就粒子狀物f而,=熱硬化性樹腊來形 ., mi-ϋ〜HU擇自金屬粒子、 無絲子、樹月旨粒子之中至少之^^r:s 以粒子狀物質全 鱼屬粒子而言,可使用銅、金、銀、2160-2888A-PF 27 1282255 25~7—, and “~8 are diagonally arranged to be better. ^ Bu Xiao σ '^ and the concave portion are preferably formed into a circular shape. The method of forming a phenomenon such as a corner crack of the opening portion is wide. In other shapes, it may be a polygon or an ellipse. The opening of the temple and the formation of the recess may utilize light, thunder. It is preferably formed by a method such as a dnll and a punching. It is preferable to form the light of the portion and the concave portion at the same time. When the gold is formed in the opening, the concave portion can be formed by _. It is also possible to form a metal layer on the conductor circuit exposed by the opening. The layer can be selected from gold, silver, nickel, tin, copper, Ming, wrong, scale, final: crane, turn, titanium, platinum, solder, etc. It is preferable that at least one or more kinds of substances in the metal are formed into a crucible, and it is preferable to form a metal layer by using gold, silver, tin, or recording. The reason is that the conductor circuit is exposed to corrosion because the metal is excellent in recording resistance. The metal layer can be used alone or in a single metal as described above. Alloys with other metals. The metal layer can also be laminated to two or more layers. In the method of forming the metal layer, electroless plating, electrolytic clock, substitution plating, (4), steaming, etc. can be used. The uniformity of the film and the cheaper viewpoint are to use solder, hard fresh material, and particulate matter to form a preferred 0-conductive adhesive layer by electroless plating. With the [snow rabbit secret marriage to form. If the car here is viewed from the above materials, then the layer is best formed by using solder. The reason is that the joint strength can be easily improved, and the formation method 2160- 2888A-PF 28 1282255 is widely used. When the conductive adhesive layer is formed of solder, the tin-based tin is used: the tin used in the general printed substrate: wrong = 1:9~4:6 Good 0 solder can also use lead-free components such as tin/bismuth, anchor tin/silver, tin/silver/copper. The reason is to make the environment better and to ensure the bonding strength. The formation method can be used by printing. , bottling method (__), photoresist button engraving, electroplating, etc., and buried in the open armor The layer of the layer of the material layer can be used to form a soldering layer by soldering the bonding surface of the bump-shaped lock, and then heat-dissolving to form a solder layer. When it is used, it is made of metal, such as gold, silver, steel, ortho, nickel, palladium, zinc, indium bismuth, etc., and θ ^ , which is specially used for the use of silver welding materials and gold welding materials. The welding material of the day/day is better. In the method of hard recording and hard unloading, it is possible to use the second method: the brazing material is placed in the opening to be melted to form the bonding method. Use a method of applying a coating other than the opening and then dipping it to fill the opening: °° or using a bonding surface of the convex metal electrode to re-heat, (4) and insert it into the opening: :: In addition to the above-mentioned methods, it is also possible to use all of the general-purpose:; in the case of a particulate matter and a sputum, the 'particles f', = thermosetting tree wax shape., mi -ϋ~HU is selected from at least ^^r:s among metal particles, non-silk, and tree-shaped particles. It can be used in the case of particulate matter. Copper, gold, silver,
2160-2888A-PF 29 *1282255 鎳、鋁、鈦、鉻、錫、鉛、鈀、粗鉑(platina)等金屬,其 構成可為單一金屬,或以2種以上之合金形成。 上述金屬粒子之形狀有球狀、多面體、球狀與多面體 之混成體等。以粒子狀物質之無機粒子而言,可使用二氧 化石夕、氧化銘、多紹紅柱石(mu 1 1 i t e )、石炭化秒等。 上述無機粒子之形狀有球狀、多面體、多孔體、球狀 與夕面體之混成體等。藉由在其表層塗裝金屬層、導電性 樹脂等之導電性物質即可使無機粒子具有導電性。 以粒子狀物質之樹脂粒子而言,係以使用擇自環氧樹 月曰、苯鳥糞胺(benzoguanamine)樹脂、胺樹脂之中至少工 種成份者較佳。此外,亦可利用各向異性導電樹脂等之導 電性樹脂來形成。藉由在其表層塗裝金屬I、導電性樹脂 等之導電性物質即可使樹脂粒子具有導電性。纟中特別以 利用環氧樹脂來形成較佳。其理由為與所構成之樹脂密合 性佳,線膨脹係數也很接近,故在所構成的樹脂上不會產 生裂隙。 广/在此處,上述之金屬粒子、無機粒子或樹脂粒子之直 徑係以在0.1〜5Mm較佳。若粒徑不滿〇1 "的話就益法 導電;若粒徑超過5Mm的話’則在填充於開口部時作業 另外,相對於全體量而言,上述之金屬粒子 子或T旨粒子的填充率係以在3〇,重量"交佳。:习 1_重—量』遠鸯農缝^寻―為上丄接二續;若超過9“ %的話^與凸起狀銷之接合強度就會降低: 八人就填充於開口部内之樹脂而言,可使用熱屬2160-2888A-PF 29 *1282255 A metal such as nickel, aluminum, titanium, chromium, tin, lead, palladium or platinum (platina), which may be a single metal or a combination of two or more alloys. The shape of the metal particles is a spherical shape, a polyhedron, a mixture of a spherical shape and a polyhedron, and the like. As the inorganic particles of the particulate matter, it is possible to use silica dioxide, oxidized infusion, mu 1 1 i t e , carbonized second or the like. The shape of the inorganic particles is a spherical shape, a polyhedron, a porous body, a mixture of a spherical shape and an evening body, and the like. The inorganic particles can be made conductive by coating a conductive material such as a metal layer or a conductive resin on the surface layer. It is preferable that the resin particles of the particulate material are at least a component selected from the group consisting of epoxy resin, benzoguanamine resin, and amine resin. Further, it may be formed using a conductive resin such as an anisotropic conductive resin. The resin particles can be made electrically conductive by coating a conductive material such as metal I or a conductive resin on the surface layer. In particular, it is preferred to use an epoxy resin. The reason for this is that the adhesion to the resin to be formed is good, and the coefficient of linear expansion is also very close, so that no crack is generated in the resin to be formed. Here, the diameter of the above-mentioned metal particles, inorganic particles or resin particles is preferably from 0.1 to 5 Mm. If the particle size is less than 〇1 ", it is easy to conduct electricity; if the particle size exceeds 5Mm, it is used when filling the opening, and the filling rate of the above-mentioned metal particles or T particles is relative to the total amount. It is tied at 3 〇, weight " : Xi 1_heavy-quantity" is far from the agricultural seams ^ search - for the upper splicing and second sequel; if more than 9"% ^ and the protruding pin joint strength will be reduced: eight people fill the resin in the opening In terms of heat, you can use heat
2160-2888A-PF 30 1282255 性樹脂、熱可塑性樹脂。 以熱硬化性樹脂而言,可使用擇自環氡樹脂、聚亞胺 樹脂、聚酯樹脂、苯紛樹脂之中至少i種以上之樹脂。 以熱可塑性樹脂而言,可使用擇自環氧樹脂、聚四貌 乙烯(PTFE)、四氟化乙烯六氟化丙烯共聚合物(FEp)、四氟 化乙烯全氟烷氧共聚合物(PFA)等之含氟樹脂,以及聚對苯 一甲酸乙二醇酯(PET)、聚珮(PSF)、聚苯撐珮(pps)、聚苯 醚(PPE)、聚醚珮(PES)、聚醚亞胺(;pEI)、聚苯撐硫化物 (PPES)、聚對苯二甲酸乙二醇酯(ρΕΝ)、聚醚醚酮(ρΕΕκ)、 聚烯烴系樹脂之中至少丨種樹脂。 特別是在&1 口部之填充所使用@帛適樹脂為環氧樹 脂。其理由為就算不使用稀釋溶劑也可調整粘度,且具高 強度及财熱性、耐藥品性優異。 也可在填充樹脂令混入粘度調整用之有機溶劑、水 份、添加劑、粒子等。 粒子狀物貝與填充樹脂係利用混合機施行攪拌而使樹 脂内粒子物質呈均一態後再填充入開口部内。 使用熱硬化性樹脂時,係藉由印刷、裝瓶法將其填充 入開口。卩後,插入凸起狀銷,再進行熱硬化使其接合。為 了排除树月曰内之空氣、”曰,隙、多餘的溶劑成份等,也可先 進行真空、減壓脫泡後再進行熱硬化。2160-2888A-PF 30 1282255 Resin, thermoplastic resin. The thermosetting resin may be at least one selected from the group consisting of a cyclic resin, a polyimide resin, a polyester resin, and a benzene resin. In the case of a thermoplastic resin, an epoxy resin, a polytetramethylene (PTFE), a tetrafluoroethylene hexafluoropropylene copolymer (FEp), a tetrafluoroethylene perfluoroalkoxy co-polymer ( Fluorine resin such as PFA), and polyethylene terephthalate (PET), polyfluorene (PSF), polyphenylene (pps), polyphenylene ether (PPE), polyether oxime (PES), At least a resin of polyetherimide (pEI), polyphenylene sulfide (PPES), polyethylene terephthalate (ρΕΝ), polyetheretherketone (ρΕΕκ), or polyolefin resin. In particular, the @帛适 resin used in the filling of the &1 mouth is an epoxy resin. The reason for this is that the viscosity can be adjusted without using a diluent solvent, and it is excellent in high strength, richness, and chemical resistance. The resin may be filled with an organic solvent, a water component, an additive, a particle, or the like for viscosity adjustment. The particulate matter and the filled resin were stirred by a mixer to make the particles in the resin uniform, and then filled into the opening. When a thermosetting resin is used, it is filled into the opening by printing or bottling. After the crucible, the projecting pins are inserted and then thermally hardened to join. In order to exclude the air in the tree sap, "squeezing, gaps, excess solvent components, etc., vacuum decompression and vacuum defoaming may be performed before thermal hardening.
使用熱可塑性樹脂時,係先成型為薄片狀後再插入開 卫―ηΡ———或是在凸起狀銷^接 合面上接合上述的薄片之後,施行加熱、熔解,之後〜再^一一 開口部插入凸起狀銷。 2160-2888A-PF 31 1282255 * 凸起狀鎖基本上係凸起!支’2支以上亦 支以上的情形下,可並排而配置之,亦可圍繞在I支的局 圍般而配置之。以凸起之形狀而 周 n 々 有®錐、圓柱、四角 形錐、夕面體等,但無論是什麼形狀,只处 基板之接續部的形狀皆可採用。 d f入外部 上述凸起狀銷之凸起高度以形 較佳。 成在5〜50//Π1的範圍内 直徑的比為0.5〜U較佳。特別是若形成在 則與開口部之接合工程就會_彳| T矹S艾仔較谷易,上述凸 ㈢較容易對開口部呈直角站立而較佳。 /、 方面’接合面可為平滑狀,亦可為凸部。亦即, 在;開口部的周圍設立凹部時,也可藉由在接合面上設立 銷狀之凸部來提高銷的接合強度。 叹 凸以利用擇自金、銀、鐵、銅、録、銘、錫、 鐵 上之金屬來形成者較佳。特別是以鐵、 全銅系合金等較佳。其理由係例如鐵合金之 ΓΓ㈣ 合金之磷青鋼等,皆OGA用之鎖之 既有材質’且也很適用在凸起狀之各式加工中。 上述之凸起狀銷,可利用一 诸,種類之金屬、合金來形 也了為了防腐蝕而以金、娘、 可為了楹古拉人+ 鎳專金屬層被覆之,亦 了為了 k阿接合劑之強度而利 声钟奋阶缸” 坪轉寺在250 C以下之溫 —Ik—曰上I叙^加 部以金屬形成者之外,六了此見二㈣』级全―— “電性金屬等之絕緣體物質來塑型,再於其上塗裝When a thermoplastic resin is used, it is first formed into a sheet shape and then inserted into a wei-n Ρ-- or after the above-mentioned sheet is joined on a convex pin-joining surface, heating, melting, and then again The opening is inserted into the boss pin. 2160-2888A-PF 31 1282255 * The raised lock is basically raised! In the case where the branch is more than 2 or more, it can be arranged side by side, or it can be arranged around the circumference of the I branch. In the shape of a bulge, the circumference of the 々 has a ® cone, a cylinder, a quadrangular pyramid, an eccentric body, etc., but regardless of the shape, only the shape of the joint portion of the substrate can be used. d f is externally formed by the convex height of the above-mentioned convex pin. The ratio of the diameters in the range of 5 to 50 / / Π 1 is preferably 0.5 to U. In particular, if it is formed, the joint work with the opening portion is _彳| T矹S Ai Zi is better than the valley, and the above convex (3) is easier to stand at a right angle to the opening. /, Aspect 'The joint surface may be smooth or may be a convex portion. In other words, when the concave portion is formed around the opening portion, the pin-shaped convex portion can be formed on the joint surface to increase the joint strength of the pin. It is better to use sighs to form metals that are selected from gold, silver, iron, copper, bronze, quartz, iron, and iron. In particular, iron, an all-copper alloy or the like is preferred. The reason for this is, for example, a ferroalloy of a ferroalloy (four) alloy, etc., which are both made of an OGA lock and are also suitable for use in various types of processing. The above-mentioned convex pin can be shaped by a variety of metals and alloys, and can be covered with gold, mother, and can be coated with a metal layer of 楹Gula + nickel for corrosion protection. The strength of the agent and the sound of the bells and the cylinders" Ping Zhu Temple in the temperature below 250 C - Ik - 曰 I I ^ ^ plus the Ministry of metal formation, six see this two (four) 』 all-- "electric An insulator material such as a metal is molded and then coated thereon
2160-2888A-PF 32 1282255 上金屬層以導電。 在本發Μ,係形成上述之導電性接著村層、可嵌合 、凸起狀銷,亦係在銲錫光阻之開口 電性之接著劑層、可嵌合的凸起狀銷。然:成 ::::插入外部基板之接續部而使得形成於封裝基板 ν體電路與外部基板能作電氣上之接續。 由於凸起狀鎖係以插入外部基板之接續部的構造來形 、所以在貫裝於外部基板而施行壓合時,因為可緩和對 =起狀鎖之應力集中,故可防止载置凸起狀銷之導體電路 等產生龜裂、損壞。 更進步,與配置BGA之基板相比較下,因為pGA與 接口 W層之接合面積大’故即使是在熱循環條件下超過 麵小時,凸起狀銷本身以及載置部也不會產生龜裂、破 壞0 【實施方式】 〈第1實施例〉 根據第1圖至第8圖,就第1實施例的封裝基板與疊 合基板的製造方法進行說明。以下之方法,可利用半加層 (· addi t i ve)法’亦可採用全力口 層(f u 11-addi t i ve)法。 (1 )首先’作成在基板表面已形成導體層之模芯基板 1。以模芯基板而言,可使用在玻璃環氧基板、聚亞胺基板、 掛_塵基板等之榭脂絕緣基板的 兩面上貼附銅箔8之鍍銅層壓板(參照第】圖(a))。銅箔8 之一面係形成粗化面(粗糙面)以與樹脂基板強固密合。在 2160-2888A-PF 33 1282255 該基板上以鑽頭設立貫通孔後,再施以無電解電鍍以形成 貫穿孔(through hole)9。就無電解電鍍而言係以銅電鍍較 佳。接著’形成電鍍光阻,再施以蝕刻處理以形成導體層 4。此外’為了使銅箔產生厚被覆亦可進一步進行通電電 艘。該通電電鍍亦以銅電鍍較佳。此外,通電電鍍後,也 / 可將導體層4的表面以及貫穿孔9的内壁面當作粗面4a、 9a(參照第1圖(b))。 以該粗化處理而言,可舉例如:黑化(氧化還原處 參理、利用有機酸與第2銅錯合物之混合水溶液進行喷洗處 理以及利用銅-鎳—磷之針狀合金電鍍來處理等。 其次’將所得到的基板水洗之後乾燥之。之後,在基 板表面的導體層4之間以及在貫穿孔9之内填充樹脂填充 材10,並使乾燥之(第1圖(c))。接著’利用帶狀打磨器 (belt sander)等來磨去基板兩面多餘的樹脂填充材以 使導體層4露出,並使樹脂填充材丨〇硬化。藉由將導體層 4之間與貫穿孔9之内的凹部加以填埋而使基板得以平滑 • 化(參照第1圖(d))。 其次,於露出之導體層4的表面再設立粗化層u(參 照第2圖(a))。另夕卜,在第2圖(a)中之圓所示的部份係已 設立粗化層11之導體層4的擴大顯示圖。該粗化層U, 雖然係以利用先前所述之銅-鎳-磷之針狀或多孔質狀合金 層來形成較佳,但是也可利用其他的黑化(氧化)_還原處理 > + ^冬針狀或多 孔質狀合金層時,係以使用苗原:―…卜;商-品名了 7 >夕一^-卜」較佳;此外,若在利用钱刻處理時,則 2160-2888A-PF 34 1282255 以MAKE公司製商品名「MEC etch B〇nd」較佳。 ⑵在由上述⑴所作成之具有導體層4的線路基板的 兩面上形成由樹脂層2a、2b所構成之樹脂絕緣層2(參照 第2圖⑴)。該樹脂絕緣層2之功能係如後述般為用來當 作封裝基板之層間樹脂絕緣層52。 田 以上述樹脂絕緣體層(以下之層間樹脂絕緣層52)之構 成材料而言,可舉例如:熱硬化性樹脂、熱可塑性樹脂或 上述等之複合樹脂。層間樹脂絕緣層2係以使用無電解電 鍍用接著劑較佳。該無電解電鍍用接著劑,係以使在經硬 化處理之酸或氧化劑中呈可溶性之耐熱性樹脂粒子分散於 在酸或氧化劑中呈難溶性的未硬化耐熱性樹脂中者最適 合。利用如後述般之酸、氧化劑溶液的處理來將耐熱性樹 脂粒子溶解除去,即可在表面形成由條紋狀之增粘^ (anchor)構成之粗化面。 在上述無電解電鍍用接著劑之中,特別就經硬化處理 的上述耐熱性樹脂粒子而言,係以①平均粒徑在1〇#m以 下之耐熱性樹脂粉末;②由平均粒徑相對大的粒子以及平 均粒徑相對小的粒子所混合成之粒子較佳。因為藉由上述 條件即可形成複雜的增粘層。 就可使用的耐熱性樹脂而言,可舉例如··環氧樹脂(雙 驗A型環氧樹脂、甲酚酚醛固形物(cres〇;l n〇valak)型環 氧樹脂等)、聚乙胺樹脂以及環氧樹脂與熱可塑性樹脂之複 —全复.等—丄复可龙 可使見聚醚— (PES)、聚珮(PSF)、聚苯撐珮(pps)、聚苯撐硫化物(ppEs)^ 聚苯峻(PPE)及聚醚亞胺(pi)等。此外,以溶解於酸或氧化 2160-2888A-PF 35 1282255 劑溶液中之耐熱性樹脂粒子而言,可 μ一 別以利用胺系石承仆卞I十 ·環氧樹脂(特 扪用胺系硬化劑來硬化之環氧樹脂較佳)、 氨樹脂;聚乙蝉系橡膠'聚丁烷系橡膠二 及聚丁、ί*嬙的發 j 一烯橡膠以 專之橡膠等等。層間絕緣 佈、樹脂薄膜之加熱壓合等所形成。 胃由靶订塗 以樹月旨薄膜而言,可使用能讓 柹夕私7 / 又'^乳化劑中呈可沒 性之叔子(以下稱為可溶性粒子)可 了岭 呈難溶性的樹脂(以下稱為難溶性樹脂或氧化劑中 ,"丄=:::二「難溶性」「可溶性」等 時間的情況下,為了方便起見“丄 会液中π泡相同 為「可、1 巧了方便起見’相對溶解速度較快者即稱 ‘ ♦性J,而相對溶解速度較慢 以上述可溶性粒子而言, =為n 具可溶性之樹t + f、 + .在酸或氧化劑中 旺之树知粒子(以下稱為可溶 氧化劑中具可溶性益 ' 、在酸或 以及在酸或氧化劑中具可、、容“人歷〜冷11無機拉子) 性樹脂粒子)等。上述:,屬粒子(以下稱為可溶 種以上合併制。 讀粒子可單獨❹,也可將2 上述可溶性粒子之开彡壯 狀、破碎狀等。又,上/了 /特別限定,可舉例如球 較佳。因為、士描士 谷性粒子之形狀係以彼此相同 才可形成具料度凹凸之粗化面。 —較佳:若::::粒:之平均粒徑來說, 相显亦可為含有2種以上之 :粒徑者。亦即,可含有平均粒 性粒子與平均粒徑 勹^ 之可浴 之可溶性粒子等。藉此,可形成2160-2888A-PF 32 1282255 The upper metal layer is electrically conductive. In the present invention, the above-mentioned conductive adhesive layer, the mountable, and the convex pin are formed, and the opening resist layer of the solder resist is formed, and the convex pin which can be fitted is formed. However, the :::: is inserted into the connection portion of the external substrate so that the circuit formed on the package substrate and the external substrate can be electrically connected. Since the boss-shaped lock is formed in a structure in which the joint portion of the external substrate is inserted, when the press-fit is performed on the outer substrate, since the stress concentration of the lock-up lock can be alleviated, the projection can be prevented from being placed. The conductor circuit of the pin is cracked or damaged. Further improvement, compared with the substrate on which the BGA is disposed, since the bonding area between the pGA and the interface W layer is large, the convex pin itself and the mounting portion are not cracked even if the surface is too small under thermal cycling conditions. [Destruction] [First Embodiment] A package substrate and a method of manufacturing a laminated substrate according to the first embodiment will be described with reference to Figs. 1 to 8 . In the following method, a half-layered (·addi t i ve) method can be used, or a full-force layer (f u 11-addi t ve) method can be used. (1) First, the core substrate 1 on which the conductor layer has been formed on the surface of the substrate is formed. In the core substrate, a copper-clad laminate in which copper foil 8 is attached to both surfaces of a resin-impregnated substrate such as a glass epoxy substrate, a polyimide substrate, or a dust-proof substrate can be used (see FIG. )). One surface of the copper foil 8 is formed into a roughened surface (rough surface) to be strongly adhered to the resin substrate. On the substrate, a through hole is formed by a drill on 2160-2888A-PF 33 1282255, and then electroless plating is applied to form a through hole 9. In the case of electroless plating, copper plating is preferred. Next, a plating resist is formed, and an etching treatment is applied to form the conductor layer 4. Further, in order to cause a thick coating of the copper foil, the electric current can be further supplied. The electroplating plating is also preferably performed by copper plating. Further, after the electroplating, the surface of the conductor layer 4 and the inner wall surface of the through hole 9 may be regarded as the rough faces 4a and 9a (see Fig. 1(b)). In the roughening treatment, for example, blackening (reaction at the redox site, spray washing treatment using a mixed aqueous solution of an organic acid and a second copper complex, and needle-shaped alloy plating using copper-nickel-phosphorus) Next, the obtained substrate is washed with water and then dried. Thereafter, the resin filler 10 is filled between the conductor layers 4 on the surface of the substrate and within the through hole 9, and dried (Fig. 1 (c) Then) 'Using a belt sander or the like to remove excess resin filler on both sides of the substrate to expose the conductor layer 4 and harden the resin filler. By connecting the conductor layers 4 with The recessed portion in the through hole 9 is filled to smooth the substrate (see Fig. 1(d)). Next, a rough layer u is formed on the surface of the exposed conductor layer 4 (see Fig. 2 (a) In addition, the portion shown by the circle in Fig. 2(a) is an enlarged display of the conductor layer 4 in which the roughened layer 11 has been established. The rough layer U is used to utilize the previous The copper-nickel-phosphorus needle-like or porous alloy layer is preferably formed, but other Blackening (oxidation)_reduction treatment> + ^Winter needle-shaped or porous alloy layer is used to use Miaoyuan: "...bu; quotient-product name 7 > Xiyi ^- Bu" is preferred; 2160-2888A-PF 34 1282255 is preferably sold under the trade name "MEC etch B〇nd" manufactured by MAKE Co., Ltd. (2) on both sides of the wiring substrate having the conductor layer 4 made of the above (1). The resin insulating layer 2 composed of the resin layers 2a and 2b is formed (see Fig. 2(1)). The function of the resin insulating layer 2 is an interlayer resin insulating layer 52 used as a package substrate as will be described later. The constituent material of the resin insulating layer (hereinafter referred to as the interlayer resin insulating layer 52) may, for example, be a thermosetting resin, a thermoplastic resin or a composite resin such as the above. The interlayer resin insulating layer 2 is made of electroless plating. The adhesive for electroless plating is obtained by dispersing heat-resistant resin particles which are soluble in the hardened acid or oxidizing agent in an uncured heat-resistant resin which is poorly soluble in an acid or an oxidizing agent. Most suitable. Use as after In the treatment of the acid and the oxidizing agent solution, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of a stripe-shaped anchor can be formed on the surface. Among the above-mentioned electroless plating adhesives, The heat-resistant resin particles which have been subjected to the hardening treatment are a heat-resistant resin powder having an average particle diameter of 1 〇 #m or less; 2 a particle having a relatively large average particle diameter and particles having a relatively small average particle diameter; The particles are preferably formed because a complex adhesion-promoting layer can be formed by the above conditions. Examples of the heat-resistant resin that can be used include epoxy resin (double type A epoxy resin, cresol novolac) Solids (cres〇; ln〇valak type epoxy resin, etc.), polyethylamine resin and epoxy resin and thermoplastic resin complex - Quanfu. etc. - 丄复可龙 can see polyether - (PES) Polypyrene (PSF), polyphenylene ruthenium (pps), polyphenylene sulfide (ppEs) ^ polyphenylene (PPE) and polyetherimide (pi). In addition, in the case of heat-resistant resin particles dissolved in an acid or oxidized 2160-2888A-PF 35 1282255 solution, it is possible to use an amine-based enamel epoxy resin (a special amine-based hardener). To harden the epoxy resin is better), ammonia resin; polyethylene-based rubber 'polybutane rubber 2 and polybutylene, ί* 嫱 j 一 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶 橡胶. The interlayer insulating cloth, the resin film are heated and pressed, and the like. For the stomach to be coated with the target, it is possible to use a resin which can make the scent of the scent of the scented scent (hereinafter referred to as soluble particles). Hereinafter, in the case of a poorly soluble resin or an oxidizing agent, in the case of "丄"::: two "poorly soluble" and "soluble", for the sake of convenience, "the same as the π bubble in the sputum liquid," is convenient. For example, 'relatively faster dissolution rate is called ' ♦ sex J, and the relative dissolution rate is slower. For the above soluble particles, = is a soluble tree t + f, +. In the acid or oxidant Wangzhishu It is known that particles (hereinafter referred to as "soluble in soluble oxidant", in acid or in acid or oxidizing agent, and in "human acid to cold 11 inorganic resin" resin particles). The above-mentioned: genus particles (hereinafter referred to as soluble species and above combined methods. The read particles may be singly singly or smashed, and the above-mentioned soluble particles may be smashed or broken, etc. Further, upper/outer/specially limited, for example For example, the ball is preferred because the shape of the stalker grain particles is the same as each other to form a roughened surface with a degree of unevenness. - Preferably: if:::: grain: the average particle size, phase It is also possible to contain two or more kinds of particles having a particle size, that is, a soluble particle having an average particle size and an average particle diameter of 可^, which can be formed.
2160-2888A-PF 36 1282255 更複雜的粗化面,且在與導體電路的密合性方面亦非常優 =。此外,在本發明中,可溶性粒子的粒徑係指可溶性: 子最長部份的長度。 以上述可溶性樹脂粒子而言,可舉例如由熱硬化性樹 脂、熱可塑性樹脂等所構成者,其若在浸泡於由酸或氧化 劑所構成之溶液中時溶解速度比上述難溶性樹脂為快的 話,就不特別對其限定。 劢以上述可溶性樹脂粒子的具體例而言,可舉例如··由 環氧樹脂、苯紛樹月旨、聚亞胺樹脂、聚苯撐㈤灿邮咖) 樹脂、聚烯烴樹脂以及含氟樹脂等所構成者,且可為由上 述樹脂中之!種所構成者,亦可為由2種以上樹月旨之混合 物所構成者。 、此外,以上述可溶性樹脂粒子而言,可使用由橡膠所 構成之樹脂粒子。以上述橡謬而言,可舉例如:聚丁二烯 ,膠;環氧改質、尿院(urethanekf、(甲基)丙稀晴改 質等之各種改質聚丁二烯橡膠;含羧基之(甲基)丙烯晴. 丁j橡膠等。藉由使用上述之橡谬,可使可溶性樹脂粒 子艾侍更谷易溶解在酸或氧化劑中。也就是說,在使用酸 $溶解可溶性樹脂粒子時,即使是使用強酸以外的酸也可 溶解’·而在使用氧化劑來溶解可溶性樹脂粒子時,即使是 使用氧化力比較弱的過錳酸也可溶解。此外,就算是在使 用鉻酸的情況下,也能以低濃度來溶解之。因此,酸或氧 表 1上一^1可如後述,在粗化面形 成後而賤予氯化鈀等觸媒之際,不會發生觸媒一面賦予、 一邊氧化的情形。 2160-2888A-PF 37 I282255 、述可z夺性無機粒子而言,可兴彳丨 合物、舞化合物、鉀化合物、鎮化:例如··擇自由紹化 成之族群中至少1種者所構成之粒子 1及石夕化合物所組 以上述鋁化合物而言, 等,·以上述㈣合物來說,可舉=··氧化飽、氨氧化紹 等;以上述鉀化合物而言,·碳_、氫氧㈣ 鎂化人胳;^ 一 幻如·碳酸鉀等;以上述 、化“勿而可舉例如:氧化鎂 驗性恤等,·以上述梦化合物而言,;:二)、 矽、沸石(zeolite)等。上述物 乳匕 以上合併使用。 貝了早獨使用,也可將2種 以上逑可溶性金屬粒子而言,可舉例如:擇自由銅、 群/mm 1以及石夕所組成之族 …至义1種者所構成之粒子等。此外,為了確保上述之 可洛性金屬粒子的絕緣性,亦可將表層利用樹脂等予以被 覆。 上述可溶性粒子在混合2種以上使料,若就混合之 2種可洛性粒子的組合而言,係以樹脂粒子與無機粒子之 、、且口較仏。此乃因為兩者的導電性皆低故能確保樹脂薄膜 勺、、、邑緣丨生,同日守也由於容易調整其在難溶性樹脂之間的熱 膨脹,故在由樹脂薄膜所構成的層間樹脂絕緣層中不會產 生裂隙(crack),而在層間樹脂絕緣層與導體電路之間也因 此不會產生剝離的現象。 —m immi而言,若為可在層m增絕簦層於 使用酸或氧化劑形成粗化面之際保持粗化面之形狀者即不 特別加以限定’例如:熱硬化性樹脂、熱可塑性樹脂以及 2160-2888A-PF 38 1282255 Λ 4 此外,亦可為可賦予上述等;^月匕 感光性之感光性樹脂。藉由 述4树月曰 猎由使用感光性樹脂,即可在声n 树月曰絶緣層上利用曝光曰間 ^ ^ + 处祖不形成介層孔用開口。 =上述者之中,係以含有熱硬 即可在經由電鍍液或各種加κ 土精此, 狀。 加熱處理後仍能保持粗化面的形 以上述難溶性樹脂的具體例十 脂、苯酚^ j而5,可舉例如··環氧樹 及含樹脂、聚苯撐樹脂、__以 ;:ΓΓ上述之樹脂可單獨使用,也可將2種以上 I的/一步’若為在1分子中具有2個以上環氧 土的衣氧射脂則更佳。因為 在耐教性等h Μ Α 返之粗化面,且 rK_一::.方面亦非常優異,故即使是在熱循環 ea cycle)條件下亦不會t i ±n Λ—集中—之—产 形,因而不易引起金屬層之剝離。 ”月2160-2888A-PF 36 1282255 More complex roughened surface, and also very good in adhesion to the conductor circuit. Further, in the present invention, the particle diameter of the soluble particles means the solubility: the length of the longest portion of the sub-portion. In the above-mentioned soluble resin particles, for example, a thermosetting resin or a thermoplastic resin is used, and when it is immersed in a solution composed of an acid or an oxidizing agent, the dissolution rate is faster than the above-mentioned poorly soluble resin. It is not specifically limited. Specific examples of the above-mentioned soluble resin particles include, for example, an epoxy resin, a benzene, a polyimide resin, a polyphenylene resin, a polyolefin resin, and a fluorine resin. Such as the composition, and can be from the above resin! The composition of the species may be a mixture of two or more types of trees. Further, as the above-mentioned soluble resin particles, resin particles composed of rubber can be used. Examples of the above rubber may include polybutadiene, rubber, epoxy modified, urethanekf, (meth) acrylonitrile modified, various modified polybutadiene rubber; carboxyl group-containing The (meth) acrylonitrile, butyl rubber, etc. By using the above-mentioned rubber, the soluble resin particles can be easily dissolved in an acid or an oxidizing agent, that is, the acid resin is used to dissolve the soluble resin particles. In the case of using an acid other than a strong acid, it can be dissolved. When an oxidizing agent is used to dissolve the soluble resin particles, even a permanganic acid having a weak oxidizing power can be dissolved. Further, even when chromic acid is used. Further, it can be dissolved at a low concentration. Therefore, the acid or oxygen table 1 can be described later, and when the roughened surface is formed and the catalyst such as palladium chloride is added, the catalyst side does not occur. 2160-2888A-PF 37 I282255, the z-capable inorganic particles, can be used as a compound, a dance compound, a potassium compound, and a town: for example, choose a free group Particle 1 and Shi Xi, composed of at least one species The compound is composed of the above-mentioned aluminum compound, etc., and the above-mentioned (tetra) compound may be exemplified by oxidative saturation, ammoxidation, etc.; in the case of the above potassium compound, carbon_, hydrogen and oxygen (tetra) magnesiumation Humans; ^ a phantom such as potassium carbonate; etc.; to the above, "for example, such as: magnesium oxide test shirt, etc., in the above dream compound;: two), strontium, zeolite (zeolite), etc. The above-mentioned chylomicron is used in combination. The shellfish may be used alone or in combination, and two or more kinds of bismuth soluble metal particles may be used, for example, a group consisting of free copper, group/mm 1 and Shi Xi... In addition, the surface layer may be coated with a resin or the like in order to ensure the insulating properties of the above-mentioned spheroidal metal particles. The soluble particles may be mixed in two or more kinds, and the mixture may be mixed. The combination of the clofiable particles is based on the resin particles and the inorganic particles, and the mouth is relatively thin. This is because the conductivity of both is low, so that the resin film spoon, and the edge of the resin can be ensured. Shou also because it is easy to adjust between the poorly soluble resin Since it expands, no crack occurs in the interlayer resin insulating layer composed of the resin film, and peeling does not occur between the interlayer resin insulating layer and the conductor circuit. The shape in which the roughened surface can be maintained in the layer m when the roughened surface is formed by using an acid or an oxidizing agent is not particularly limited, for example, thermosetting resin, thermoplastic resin, and 2160-2888A-PF 38 1282255 Λ 4 In addition, it is also possible to impart a photosensitive resin capable of imparting the above-mentioned, etc., by using a photosensitive resin, it is possible to use an exposure on the insulating layer of the sound n-tree.曰 ^ ^ ^ ^ 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖 祖. After the heat treatment, the shape of the roughened surface can be maintained as a specific example of the above-mentioned poorly-soluble resin, and phenol can be used, for example, epoxy resin and resin-containing resin, polyphenylene resin, and __; The above-mentioned resin may be used singly or in combination of two or more kinds of I/steps, and it is more preferable if it is an oleoresin having two or more epoxides in one molecule. Because it is excellent in the resistance to education, such as h Μ 返, and rK_一::. is also very good, even in the thermal cycle ea cycle) will not ti ± n Λ - concentration - The shape is formed, so it is not easy to cause the peeling of the metal layer. "month
产氣Ζ述環氧樹脂而言,可舉例如:甲紛盼路固形物型 械月曰、雙驗Α型環氧樹脂、雙齡F =:? 一—k)型環氧樹脂、燒基苯二 -二戊Γ樹脂、二苯紛F型環氧樹脂、奈型環氧樹脂、 氧樹脂、苯龄類與具有笨盼性經基之芳香 矢-4之'%合物的環氧化物、三 , _ ^ 貳®义二%虱丙酯以及 :二:咖等。上述物質可單獨使用,也可將2種以 口 用。藉此,可使耐熱性等變得優異。 工么匕沾 1 二-> 1 /谷τ王狐 :且:地分散在上述難溶性樹脂中者較佳。此乃「為: 有均一粗輪度之凹凸的粗化面,才可確保在樹脂薄 域可溶 均一沾八奴丄......_ ..... 39For the production of gas, the epoxy resin can be exemplified by a type of solid-state type mechanical moon, a double-type epoxy resin, and a double-aged F =: ?-k) epoxy resin and a base. Epoxides of benzene di-pivalanyl resin, diphenyl fluorene type F epoxy resin, nematic epoxy resin, oxygen resin, benzene age and '% compound of aromatic vector-4 with stupid base , three, _ ^ 贰 义 义 虱 虱 以及 以及 and: two: coffee and so on. These may be used singly or in combination of two. Thereby, heat resistance and the like can be made excellent.匕 匕 1 1 2 -> 1 / 谷 τ king fox: and: the ground is dispersed in the above-mentioned poorly soluble resin is preferred. This is "for: a roughened surface with a uniform rough rotation, to ensure that it is soluble in the resin thin area." _ ..... 39
2160-2888A-PF J282255 膜上所形成的介層孔或貫穿孔與1上所 屬層之間的密合性。 /成的v體電路金 使用含有可溶性L 僅在形成粗化面之表層部 主a 之樹脂膜。藉此,因為可使樹浐镇膜 :㈣以外:㈣不會暴露在酸或氧化劑下,故二二: μ於層間树脂絕緣層間之導體電路間的絕緣性。 子的料脂薄膜中,分散於難溶性樹脂中之可溶性粒 口里右相對於樹脂薄膜而言係以3〜4〇 二可=粒子的配合量若不滿3重量%的話,就無法形 …之凹凸的粗化面;若超過4〇重量%的話,則在 使用酸或氧化劑溶解可溶性粒子之際’最後會溶解至樹脂 薄膜的底部’使得隔著由樹脂薄膜所構成之層間樹脂絕緣 層的導體電路間無法維持絕緣性,因而造成短路。 ^上述樹脂薄膜在除了上述可溶性粒子與上述難溶性樹 月曰以外,係以含有硬化劑及其他成份等較佳。 以上述硬化劑而言,可舉例如:咪唑系硬化劑、胺系 硬化劑、脈(gUanidine)系硬化劑、上述硬化劑之環氧加成 化合物或上述硬化劑之微型膠囊化物、三苯基瞵、四苯基 鱗·四苯基硼酸酯等之有基瞵系化合物等。 上述硬化劑之含有量係以相對於樹脂薄膜而言為 〇· 05〜10重量%較佳。若不滿0·05重量%的話,由於樹脂 薄膜的硬化不充分’故酸或氧化劑侵入樹脂薄膜的程度變 大,因而會損及樹脂薄膜的絕緣性。另一方面,若超過i 〇 -重-奚~^-的j彳過剩的硬化劑—a會使樹脂的組成改變, 最後導致信賴性降低。 以上述之其他成份而言,可舉例如:不影響粗化面之 2160-2888A-PF 40 1282255 :的無機化合物或樹脂等之填充劑。以上述無機化合物 可舉例如·二氧化矽、氧化鋁、白雲石等;以上述 树脂而言,^與y 1 , 牛如··聚亞胺樹脂、聚丙烯樹脂、聚醯胺 :树月曰、伞苯撐樹脂、三聚氰胺樹脂、烯烴系樹脂等。 猎著使3有上述之填料,可謀求熱膨脹係數之整合及耐熱 -性、耐藥品性之提昇,因而能提高印刷線路板之性能。 。1=1外上述树脂薄膜亦可含有溶劑。以上述溶劑而言, 口牛例如·丙酮、甲基乙基甲酮、環己烯酮等之酮類;以 _ 乙酉夂乙酉曰、乙酸丁酯、乙二醇乙醚乙酸酯(cel losolve acetate)或甲苯、二甲苯等之芳香族烴等。上述物質可單 獨使用,也可將2種以上合併使用。 將上述物質利用滾筒塗佈器、簾塗佈器(curtain coater)等塗佈,以做成半硬化之薄膜狀來使用。 (3)其次,在層間樹脂絕緣層2上設立用來確保與導體 層4之電氣連接的介層孔形成用開口 6 (參照第2圖(◦))。 在使用上述無電解電鍍用接著劑的情況下,係先裝上 春描繪有用來形成介層孔之圓圖案的光罩,再經曝光、顯影 處理之後藉由熱硬化以設立開口 6。另一方面,在使用熱 硬化性樹脂的情況下·,係在熱硬化之後利用雷射加工而於 上述層間樹腊絕緣層上設立介層孔用之開口 6。此外,在 貼附樹脂薄膜以形成層間絕緣層的情況下,係藉著利用碳 酸、YAG、液態矽鎂、UV雷射等之雷射來進行加工,以設 ---------層—fkl—二查二憂上夸_可對應以使用疑酸等之含 浸法或使用電漿等之乾式蝕刻法以進行去殘渣(desmear) 處理。 2160-2888A-PF 41 1282255 )其次,將設立有介層孔形成用開口 6之層間樹腊絕 / #表面進行粗化(參照第2圖⑷)。在層間樹脂絕緣 : 使用無電解電鍍用接著劑時’可將存在侧無電解 、、U用接著劑層表面之对熱性樹脂粒子藉由酸或氧化劑來 ,合解除去’以達到粗化無電解電鐘用接著劑層2的表面、 設立條紋狀之增粘層的目的。 ^在此處,就上述酸來說,可使用例如麟酸、鹽酸、硫 =等之強酸’或是甲酸、乙酸等有機m特別以使用 機酉夂較佳。此乃因為在施行粗化處理時,由介層孔用開 口 6露出之金屬導體層4較不易被腐蝕。 面就上述氧化劑來說,係以使用絡酸、過鐘 酸鹽(過錳酸鉀等)之水溶液較佳。 ▲上述之粗化係以使表面最大粗糙度^心為〇1〜2〇#m 較佳。若過厚的話’則粗化面本身容易損傷、剥離;若過 薄的話’則密合性會降低。 (6)接著,在已粗化並賦予觸媒核之層間樹脂絕緣層、 的整面上施以無電解電鑛’以形成無電解電㈣12(參照 丄二复無—電i電姻』濃厚兔係以〇 ·卜 佳。 一 亡-—— ⑸其次’在層絕緣層2之表面已粗化的線路基 板上賦予觸媒核。在觸媒核之賦係以使用貴金屬離 子或貴金屬膠體(⑶lloid)等較佳,—般而言係使用氯化免 或麵膠體。另外,》了固定該觸媒核,並以進行加熱處理 為較佳。在如上述般之觸媒核中係以為㈣為合適。 其次,在無電解電鍍膜 U的表面上形成電鍍光阻3(參 2160-2888A-PF 42 1282255 T第3圖(b))。在所形成之無電解電鍍膜12上層壓感光性 樹脂膜(乾膜),再於該感光性樹脂膜上密合裝上描繪有電 鍍光阻圖案之光罩(玻璃基板亦可),藉著藉由施行曝光、 顯影處理而形成電錢光阻3。 (7)其次,施行通電電鍍以於無電解電鍍膜12上之電 鍍光阻未形成部形成通電電鍍膜,並形成導體層5以及介 層孔7。該膜厚係以5〜20//Π]較佳。在該通電電鍍中,係 以銅電錢較佳。 又〆濺鑛法中至少1種之方法來形成錄冑⑷參照第3 = (c))。因為在該錄膜14上可使銅令鱗構成之合金電鐘 谷易析出。此外’由於錄膜具有可當作金屬光阻之作甩, 故亦有防止其後之工程蝕刻過度之效果。 (8)接者,去除電鍍光阻3之後,再將存在於該電鍍光 阻下之無電解電鐘膜12利用硫酸與過氧化氫之混合液或 ^過硫㈣、過硫酸㈣之水溶液所構成之_液來去 二即可:到由無電解電錢膜12、電解 曰所構成之獨立導體層5與介層孔7(參照第3圖 二此外’在非導體部份所露出的粗化面上之鈀觸媒核, 可猎由鉻酸、過硫酸水等來溶解去除。 %其次’在導體j 5及介層孔7的表面上設立粗化層 决你Γ進步如前面所述般形成無電解電鍍用接著劑之層 • (a)) 〇 田 同時將層間樹脂I緣層2之表面進行粗化(參照第4圖2160-2888A-PF J282255 Adhesion between the via hole or through hole formed on the film and the layer on the 1 layer. / Forming the v-body circuit gold The resin film containing the soluble L only in the surface portion a of the roughened surface is used. Therefore, since the tree can be made into a film: (4): (4) It is not exposed to an acid or an oxidizing agent, so 22: μ is insulative between the conductor circuits between the interlayer resin insulating layers. In the fat film of the product, the soluble particle in the poorly soluble resin is 3 to 4 Å in the right side of the resin film. If the amount of the particles is less than 3% by weight, the shape cannot be formed. a roughened surface of the unevenness; if it exceeds 4% by weight, the conductor which is finally dissolved in the bottom of the resin film when the soluble particles are dissolved by the acid or the oxidizing agent, so that the interlayer resin insulating layer composed of the resin film is interposed The insulation cannot be maintained between the circuits, thus causing a short circuit. The resin film preferably contains a curing agent and other components in addition to the above-mentioned soluble particles and the above-mentioned poorly soluble dendrimer. The hardening agent may, for example, be an imidazole curing agent, an amine curing agent, a gUanidine curing agent, an epoxy addition compound of the above curing agent, or a microcapsule of the above curing agent, or a triphenyl group. A ruthenium-based compound such as ruthenium, tetraphenylphosphonium tetraphenyl borate or the like. The content of the above-mentioned curing agent is preferably from 5% to 10% by weight based on the resin film. If it is less than 0.05% by weight, the curing of the resin film is insufficient. Therefore, the degree of penetration of the acid or the oxidizing agent into the resin film is increased, and the insulating property of the resin film is impaired. On the other hand, if the excess hardener-a exceeding i 〇 -heavy-奚~^- changes the composition of the resin, and finally the reliability is lowered. The other components mentioned above may, for example, be an inorganic compound or a filler such as a resin which does not affect the roughened surface of 2160-2888A-PF 40 1282255. The inorganic compound may, for example, be cerium oxide, aluminum oxide or dolomite; and in the case of the above resin, y1, ox, polyimine resin, polypropylene resin, polyamine: eucalyptus , phenylene resin, melamine resin, olefin resin, and the like. Hunting 3 allows the above-mentioned filler to improve the thermal expansion coefficient and improve the heat resistance and chemical resistance, thereby improving the performance of the printed wiring board. . The above resin film may also contain a solvent as 1 = 1. In the case of the above solvents, ketones such as acetone, methyl ethyl ketone, cyclohexenone, etc.; _ acetoacetate, butyl acetate, glycerol ethyl acetate (cellosolve acetate) Or an aromatic hydrocarbon such as toluene or xylene. These may be used singly or in combination of two or more. The above-mentioned substance is applied by a roll coater, a curtain coater or the like to form a semi-hardened film. (3) Next, a via hole forming opening 6 for ensuring electrical connection with the conductor layer 4 is provided on the interlayer resin insulating layer 2 (see Fig. 2 (◦)). In the case of using the above-mentioned adhesive for electroless plating, a mask having a circular pattern for forming a via hole is formed by spring, and then an opening 6 is formed by thermal hardening after exposure and development treatment. On the other hand, when a thermosetting resin is used, an opening 6 for a via hole is formed on the interlayer insulating layer by laser processing after thermal curing. Further, in the case where a resin film is attached to form an interlayer insulating layer, it is processed by using a laser such as carbonic acid, YAG, liquid strontium magnesium, UV laser or the like to provide --------- The layer-fkl-two-check and the second-worry _ can be subjected to a desmear treatment by an impregnation method using a suspected acid or the like or a dry etching method using a plasma or the like. 2160-2888A-PF 41 1282255) Next, the interlayer tree wax/# surface of the opening for forming the via hole 6 is roughened (see Fig. 2 (4)). Inter-layer resin insulation: When an adhesive for electroless plating is used, 'there is no electrolysis on the side, and the thermal resin particles on the surface of the U-use adhesive layer are removed by acid or oxidant to remove the 'electrolytic The surface of the adhesive layer 2 for the electric clock has the purpose of forming a stripe-shaped adhesion-promoting layer. Here, as the above acid, for example, a strong acid such as linonic acid, hydrochloric acid, sulfur = or the like, or an organic m such as formic acid or acetic acid can be preferably used in particular. This is because the metal conductor layer 4 exposed by the opening 6 of the via hole is less likely to be corroded when the roughening treatment is performed. In the case of the above oxidizing agent, an aqueous solution using a complex acid or a perchlorate (potassium permanganate or the like) is preferred. ▲ The above roughening is such that the maximum surface roughness is preferably 〇1~2〇#m. If it is too thick, the roughened surface itself is easily damaged and peeled off; if it is too thin, the adhesion is lowered. (6) Next, an electroless ore is applied to the entire surface of the interlaminar resin insulating layer which has been roughened and imparted to the catalyst core to form an electroless electricity (four) 12 (refer to 丄二复无-电电电) The rabbit is made by 〇·Bu Jia. One dies - (5) Secondly, the catalyst core is given on the circuit substrate which has been roughened on the surface of the layer insulating layer 2. The catalyst core is used to use precious metal ions or precious metal colloids ( (3) lloid) and the like, generally, a chlorination-free or surface colloid is used. In addition, it is preferred to fix the catalyst core and perform heat treatment. In the catalyst core as described above, (4) Next, a plating resist 3 is formed on the surface of the electroless plating film U (refer to Fig. 2160-2888A-PF 42 1282255 T, Fig. 3(b)). Photosensitive is laminated on the formed electroless plating film 12. a resin film (dry film), and a photomask (a glass substrate) on which a plating resist pattern is drawn is attached to the photosensitive resin film, and an electric money photoresist is formed by performing exposure and development processing. 3. (7) Secondly, electroplating is applied to the electroplated photoresist on the electroless plating film 12 The formed portion is formed with an electroplated film, and the conductor layer 5 and the via hole 7 are formed. The film thickness is preferably 5 to 20 / / Π]. In the electroplating, it is preferable to use copper electricity. At least one method in the mining method is used to form the record (4) with reference to the third = (c)). Because the alloy electric clock composed of copper scales can be easily deposited on the recording film 14. In addition, since the recording film has the function of being able to be used as a metal photoresist, there is also an effect of preventing excessive etching of the subsequent engineering. (8) After the electroplating photoresist 3 is removed, the electroless clock film 12 existing under the electroplating photoresist is made of a mixture of sulfuric acid and hydrogen peroxide or an aqueous solution of sulfur (tetra) or persulfate (tetra). The composition of the liquid can be two: to the independent conductor layer 5 and the via hole 7 composed of the electroless magnetic film 12 and the electrolytic ruthenium (refer to Fig. 3, Fig. 2), the roughening exposed in the non-conductor portion The palladium catalyst core on the surface can be dissolved and removed by chromic acid, persulfate water, etc. % Secondly, a rough layer is formed on the surface of the conductor j 5 and the via hole 7 as determined by the above. a layer forming an adhesive for electroless plating. (a)) The surface of the interlayer resin I edge layer 2 is roughened at the same time (see Fig. 4).
2160-2888A-PF 43 12822552160-2888A-PF 43 1282255
Cb)) 〇 (11) 接著’在該粗化後的層間樹脂絕緣層2的表面上 賦予觸媒核後,形成無電解電鍍膜12(參照第4圖(c))。 (12) 在無電解電鍍膜12的表面上形成電鍍光阻3,並 如先刖所述般,於電鍍光阻3的未形成部形成通電電鍍膜 13、鎳電鍍膜14(參照第4圖((〇)。 、Cb)) 〇 (11) Next, the electroless plating film 12 is formed after the catalyst core is applied to the surface of the roughened interlayer resin insulating layer 2 (see Fig. 4(c)). (12) A plating resist 3 is formed on the surface of the electroless plated film 12, and the electroplated film 13 and the nickel plating film 14 are formed on the unformed portion of the plating resist 3 as described above (see FIG. 4). ((〇).
(13) 去除電鍍光阻3,再去除電鍍光阻下之無電解電 鍍膜12,接著設立導體層(包含作為固定導電性接續鎖之 腳位(pad)16的導體層)5以及介層孔7,即可得到一面3 層之6層疊合基板(參照第5圖)。 (14)在經由上述步驟所得到之疊合基板的導體層5以 及介層孔7上形成粗化層u,並以讓腳位16部份露出之 具有開口部18的有機樹脂絕緣層15加以被覆。有機樹脂 絕緣層之厚度可為5〜4G//ni。若過薄的話則絕緣性會降低· 若過厚的話則難以變成開口與銲錫接觸,而變成導致 之原因。 以該有機樹脂絕緣層之構成樹脂而言,可使用各種物 質’例如可使用雙酚A型環氧樹脂、雙酚A型環氧樹脂之 丙烯酸醋、酚醛固型物型環氧樹脂、酚醛固型物型環氧樹 脂之丙稀酸酷等等能以胺系硬化劑或咪唾硬化劑使之硬化 的樹脂。 如上述般構成之有機樹㈣緣層,具有所㈣轉彩 旦—td—QJllL超—整子在有機樹脂@& 一一之現象)少 之優點。並且,該有機樹脂絕緣 一 啄層在耐熱性、耐鹼性方面 很優異,所以即使是在銲錫等導 夺电〖生接考劑的熔融溫度(約(13) removing the plating resist 3, removing the electroless plating film 12 under the plating photoresist, and then establishing a conductor layer (including a conductor layer as a pad 16 for fixing the conductive connection lock) 5 and a via hole 7, a stack of three layers of three layers can be obtained (see Fig. 5). (14) A rough layer u is formed on the conductor layer 5 and the via hole 7 of the laminated substrate obtained through the above steps, and the organic resin insulating layer 15 having the opening portion 18 in which the pin 16 is partially exposed is used. Covered. The thickness of the organic resin insulating layer may be 5 to 4 G//ni. If it is too thin, the insulation property will be lowered. If it is too thick, it will be difficult to cause the opening to come into contact with the solder, which may cause it. In the constituent resin of the organic resin insulating layer, various materials can be used, for example, bisphenol A type epoxy resin, bisphenol A type epoxy resin acrylate vinegar, phenolic solid type epoxy resin, phenolic solid can be used. A type of epoxy resin such as acrylic acid or the like which can be hardened with an amine hardener or a sodium salivary hardener. The organic tree (four) edge layer constructed as described above has the advantage of having less (four) conversion color - td - QJllL super - whole phenomenon in the organic resin @ & one phenomenon. Further, the organic resin insulating layer is excellent in heat resistance and alkali resistance, so even in soldering, etc., the melting temperature of the raw material is about
2160-2888A-PF 1282255 200°C)下亦不會劣化,而在如鎳電鍍或金電鍍之強鹼性電 鍍液中也不會分解。 在此處,就上述酚醛固形物型環氧樹脂之丙烯酸酯而 言,可使用能讓苯酚酚醛固形物或甲酚酚醛固形物之環氧 丙醚與丙烯酸或甲基丙烯酸等進行反應之環氧樹脂等等。 上述㈣硬化劑以在肌為液狀者較佳。因^為液狀的 話就可以均一混合。2160-2888A-PF 1282255 does not deteriorate under 200 ° C), and does not decompose in a strong alkaline plating solution such as nickel plating or gold plating. Here, as the acrylate of the above phenolic solid type epoxy resin, an epoxy which can react a phenol phenolic solid or a cresol novolac solid with a propylene glycol ether and acrylic acid or methacrylic acid can be used. Resin and so on. The above (4) hardener is preferably one in which the muscle is liquid. Since ^ is liquid, it can be uniformly mixed.
以上述所謂液狀咪唑硬化劑而言,可使用卜卞基一 2 — 甲基咪唑(產品名:1B2MZ)、1-氰基乙基_2—乙基_4_/基咪 唑(產品名:2E4MZ-CN)以及4-甲基-2—乙基咪唑(產品名 2E4MZ) 。 ^ 該㈣硬化劑之添加量,若相對於上述有機樹脂絕緣 層之總固形分而言’係以Η〇重量%較佳。其理由為添加 量如果在上述範圍内的話較容㈣—混合。上述有機樹脂In the above-mentioned so-called liquid imidazole hardener, diterpene-2-methylimidazole (product name: 1B2MZ), 1-cyanoethyl-2-ethyl-4-yl/imidazole (product name: 2E4MZ-CN) can be used. And 4-methyl-2-ethylimidazole (product name 2E4MZ). The amount of the (4) hardener added is preferably Η〇% by weight based on the total solid content of the above-mentioned organic resin insulating layer. The reason is that if the amount of addition is within the above range, it is more (4)-mixed. The above organic resin
絕緣層之硬化前組成物,以使用乙二醇醚系之溶劑作為溶 劑較佳。使用上述組成物之有機樹脂絕緣層不會產生游離 氧,腳位表面也不會氧化,且對人體的危害性也很小。 以上述之乙二醇醚系溶劑而言,係以使用擇自二乙烯 乙二醇二甲醚⑽DG)及三乙稀乙二醇二㈣(職)中至少 Ϊ種成分者較#。上述之溶劑可藉由3()〜501程度的加溫, 而使反應引發劑之:苯甲酮(benzQph_e)及米贵皿嗣 (Michler, s ketone)完全地溶解。 邊―色楚機樹脂絕簦層細人 物之總重量而言為10〜40重量%較佳。 n 也可 在如上述般所說明之有機樹脂絕緣層組合物中 2160-2888A-PF 45 1282255 添加其他物質,例如各種消泡劑或平坦劑(1 eve 1 ing);用 以改善耐熱性或耐鹼性及賦予可撓性之熱硬化性樹脂;以 及用以改善像解析度之感光性單體等。例如就平坦劑而 ° 係以由丙稀酸酯的聚合物所構成者較佳。另外,起始 知則以于”方彳平一公司製之彳儿方牛二7 I㈣7較佳,而 - 感光劑則以日本化藥公司製之DETX-S較佳。更進一步,在 有機樹脂絕緣層組合物中也可以添加色素及顏料。藉此可 隱藏電路圖案。該色素係以使用汰菁綠(phthal〇cyanine φ Green)較佳。 以作為添加成分之上述熱硬化性樹脂而言,可使用雙 齡型環氧樹脂。在該雙盼型環氧樹脂中包括有雙酚A型環 氧才ί月日及又盼F型環氧樹脂,在注重耐驗性的情形下係以 使用前者較佳,而在要求低粘度化的情形下(重視塗佈性時) 則以使用後者較佳。 又,上述之有機樹脂絕緣層組合物在25°C下之粘度為 〇·5〜1〇Pa’S’並以1〜10Pa.s較佳。在該粘度下即可輕易地 • 以滾筒塗佈器施行塗佈。 (15)在上述開口部18内形成金電鍍膜、鎳電鍍膜一金 電鍍膜等之耐蝕金屬的金屬膜19之後,在用來當作封裝基 板之下面側(與子板、母板之連接面)的開口部16内,^ 作為導電性接著劑17之銲錫膏。銲錫膏的粘度係以在 5广400Pa· s的範圍内較佳。更進一步,將導電性接續銷_ ^ t 14 ^ # ^ ! 〇 〇 的固定部101正接在開口部16内之導電^777處: 接著在240〜27〇°C下進行再溶銲(ref low)以將導電性接續The pre-hardening composition of the insulating layer is preferably a solvent using a glycol ether-based solvent. The organic resin insulating layer using the above composition does not generate free oxygen, and the surface of the foot does not oxidize, and the harm to the human body is also small. In the case of the above-mentioned glycol ether solvent, at least one of the components selected from the group consisting of diethylene glycol dimethyl ether (10) DG) and triethylene glycol ethylene glycol (four) is employed. The above solvent can be completely dissolved by the reaction initiators: benzophenone (benzQph_e) and Michler (s ketone) by heating at a temperature of 3 () to 501. It is preferably from 10 to 40% by weight based on the total weight of the resin of the resin. n Other materials such as various antifoaming agents or flat agents (1 eve 1 ing) may be added to the organic resin insulating layer composition as described above, for improving heat resistance or resistance. A thermosetting resin which is alkaline and imparts flexibility; and a photosensitive monomer for improving image resolution. For example, it is preferred to use a polymer of acrylate as a flattening agent. In addition, the initial knowledge is that "the 彳 方 方 二 7 7 7 7 7 (4) 7 is better, and the sensitizer is preferably DETX-S manufactured by Nippon Kayaku Co., Ltd. Further, in the organic resin insulation layer A coloring matter and a pigment may be added to the composition, whereby the circuit pattern can be concealed. The pigment is preferably phthalocyanine φ Green. The thermosetting resin as an additive component can be used. Two-year-old epoxy resin. In the double-anti-epoxy resin, bisphenol A-type epoxy is included, and F-type epoxy resin is also expected. In the case of focusing on the testability, the former is used. In the case where low viscosity is required (when the applicability is important), it is preferable to use the latter. Further, the viscosity of the above-mentioned organic resin insulating layer composition at 25 ° C is 〇·5~1〇Pa'S. 'It is preferably 1 to 10 Pa.s. It is easy to apply at this viscosity. ・ Coating is performed by a roll coater. (15) A gold plating film, a nickel plating film, and a gold plating film are formed in the opening portion 18. After the metal film 19 of the corrosion resistant metal is used as the package substrate In the opening 16 of the surface side (the connection surface with the sub-board and the mother board), the solder paste of the conductive adhesive 17 is preferable. The viscosity of the solder paste is preferably in the range of 5 to 400 Pa·s. The fixing portion 101 of the conductive connecting pin _ ^ t 14 ^ # ^ ! 正 is directly connected to the conductive portion 777 in the opening portion 16: then re-soldering (ref low) is performed at 240 to 27 ° C Connect the conductivity
2160-2888A-PF 46 1282255 鎖100固定在導電性接著劑17上(參照第7圖)。此外,也 可在開口部内加入做成球狀等 接入γ j守罨眭接者劑,或是將已 =在V電性接續叙板狀固定部侧上的導電性接續鎖安2160-2888A-PF 46 1282255 The lock 100 is fixed to the conductive adhesive 17 (refer to Fig. 7). In addition, it is also possible to add a spherical or the like to the γ j splicer in the opening, or to connect the conductive shackle on the side of the V-electrically connected slab-like fixing portion.
^传矣再^了再熔銲^’在第^中以圓圈圈起來的部 伤係表示設立導電性接續銷10Q 係其擴大圖。 腳位礼,而4 8圖則 •另外’在封裝基才反130中,係在其上面側之開σ 18中 5又立可與1C晶片等零件連接的銲錫凸塊6〇。 在本發明中所使用的導電性接續銷⑽,係以使用由 板狀固定部1〇1以及凸出設置於該板狀固定部m的約中 央位置之柱狀接續冑102而構成之所謂τ型銷較為適合。 板狀固定部101,係藉由導電性接著 ,_ 有d Η而固定於形成腳 位1 6之封裝基板的最外層導體層5上之Α 上之邛伤,其可依據腳 位的大小而以圓形或多角形來適當形成。此外,關於接續 部m的形狀,只要是能插入其他基板端子等之接續部内 的柱狀就沒㈣’圓柱型、角柱型、圓錐型、角錐 可。 曰 導電性接續銷100的材質若為金屬的話則不特別加以 限定’可使用擇自金、銀、銅、鐵、鎳、鈷、錫、鉛等之 中至少1種以上的金屬來形成。特別是例如鐵合金、商。 名「K〇varj (鎳-鈷-鐵)、不銹鋼以及銅合金之磷青銅等°σ。 此乃因為上述物質在電氣特性上以及作為導電性接續銷 —力山这面1 非—常—優—異 種金屬或合金來形成’亦可基於防止腐蝕或接曰 〜〜 吸幵强度而在 表面上覆以其他金屬層。更進,亦可利用陶:是等絕緣 2160-2888A-PF 47 1282255 性物質來形成’再於其表面覆以金屬層。 在導電性接續銷100巾,柱狀接續部102係以直徑為 ^8mm、長度為UdOmm較佳;而板狀固定部1〇1係 徑在〇·5〜2. 〇随的範圍内較佳;腳位的大小可依照所 要女裝之母板的插口(s〇cket)等種類來適當選定。 以在本發明之封裝基板中所使用的導電性接著劑17 而言’可使用銲錫(錫-錯、錫—鎊、銀_錫_銅等)、導電性 樹脂以及導電性鋒錫膏等。亦可使用溶點在18〇〜28代範 圍内之導電性接著劑。藉此,可破保導電性接續鎖之接合 ,度在2.0Kg/pin以上,同時在熱循環條件下實地安裝& :曰片之際’導電性接續鎖亦不會因受熱而脫落或傾斜,而 ,電氣之連接。上述物質之中係以使用銲錫所形成者 取佳。此乃因為其與導電性接續銷之連接強度非常優里, 同時耐熱性亦強,故接著作t很容#進行。 、 利用銲錫來形成導電性接著劑17時,係以使用由錫/ 鉛=95/5、60/40等之組成構成的銲錫較適合。所使用的銲 錫其溶點亦以在180〜28(rc的範圍内較適合。且特別 _韻的範圍内者更佳。藉此,可讓導電性接續銷之接 合強度的偏差(dispersion)變小,且亦能使在實地安裝之 時所施加的熱不會損及封裝基板的構成樹脂層。 〃如第8圖所示般,使該腳位16部份露出之開口部18 係利用有機樹脂絕緣層(貫穿孔層)15被覆該腳位Μ而 魏由導重性接著 7 ^ ® ^ ^ t # ^^ ,00 ^ 0 ^ # 2〇ι 〇 ^ κ 因為該有機樹脂絕緣層15係以蓋麼在腳们6周圍的方式 2160-2888A-PF 48 1282255 被覆,故在熱循環或將封裝基板裝到母板上之際,就算有 應力施加在導電性接續鎖100上,亦可防止腳位16的破壞 以及從層間樹脂絕緣層15剝離等情形產生。又,也可使金 屬與樹脂等不同的材質彼此間之接合變得較難剝離。另 外在此處雖然係以由層間樹脂絕緣層形成的多層印刷線 路板所構成之封裝基板作為例子,但僅由i片基板所構成 之封裝基板也可適用於第1實施例之構成。 [第1改變例] 第9圖係表示第丨實施例之第丨改變例的封裝基板 139。在此處,第9圖係封裝基板139之重要部份剖面 圖,第9圖⑻則係第9圖(幻之6箭頭方向直視圖。在此 處’第9圖(B)中之a-A剖面即相當於第9圖。如第9 圖(B)所示般,槽脊16係由用來安裝導電性接續銷之 圓形本體部16b以及配設在該本體部16b周圍之延伸部16& 所構成,且在該本體部16b處又更進一部與信號線…相 連接。參照第8圖並如上述例中所述,槽脊16的邊緣係以 層間樹脂絕緣層(有機樹脂絕緣層)15予以壓蓋。對此,在 第1改變例中係將配設於腳位(本體部16b)邊緣之延伸部 16a利用銲錫光阻層15來加以覆蓋。而本體部⑽係由設 立在銲錫光阻層15上之開口部18處露出。 在該第1改變例中,由於配設在腳位(本體部16幻邊 緣之延伸部16a亦藉由銲錫光阻層i 5來加以覆蓋,故即使 ϋ—導—電—i羞^ 1〇〇上,亦^^^^基板剝 離。另一方面,由於腳位之本體部16b傳、由$相j絕t 層15之開口部18處露出且有機樹脂絕緣層15與腳位部之 2160-2888A-PF 49 1282255 本體部16a未接觸,故藉由使該有機樹月旨絕緣層i5與腳位 部之本體部16a接觸可讓該有機樹脂絕緣層15側不產生裂 隙。 [第2改變例] 本封裝基板m,基本上可參照第7圖以及第8圖而 與上述第1實施例相同,但係將固定導電性接續銷之 聊位16藉由介層孔7而與最外層側之層間樹脂絕緣層52 的内層導體層66⑸相連接。在本例中未利用有機樹脂絕 緣層15來被覆腳位16(參照第1〇圖)。由於製造工程 到(14)係與第1實施例完全相同,故以下從工程⑽開始 說明。 (15 )在層孔7内填充作為導電性接著劑之銲錫膏 (錫/録-95 · 5)17。在此處,係先在有機樹脂絕緣層15的 表面上配置幕罩(mask)# (未圖示)且使其密I,再印刷銲 錫膏,並以最高27(TC施行再熔銲。 (16)對於導電性接續銷之腳位的固定,係與第丨實施 例相同。 在本例中,因為藉由介層孔7使得腳位16與基板間之 接合面積變大’故會提高腳位16的剝離強度。此外,由於 内層之導體層66為金屬層,故可與同為金屬製的腳位16 有良好的接著性,因而形成不易剝離的構造。 此外,連接内層導體層之腳位亦可設立在模芯(core) 由粗化面而與模芯基板強固地密合,故腳位更難剝離。 a.別例1 2160-2888A-PF 50 、082255 基本上與第2改變例相同,但本封裝基板丨32係將設 有腳位1 6之介層孔7利用具有使該腳位部份地露出之開口 部18的有機樹脂絕緣層15所被覆而成(參照第u圖)。由 於本封裝基板132係將腳位1 6設在介層孔7上且其表面係 以有機樹脂絕緣層15覆蓋,故腳位16與基板間之剝離強 度报優異。 b·別例2 〜、、基本上與別例1相同,但本封裝基板133係將1個固 ^電I*生接績銷1〇〇之腳位16藉由複數的介層孔7而與層 間樹脂絕緣層52之内層導體層66相連接(參照第12圖 在本例中,係如第12圖(β)所示般,將介層孔7依 1圓6形::置6個,並以將各介層孔7皆覆蓋之方式形成腳位 並-第12圖(Β)係由第12圖(Α)之介層孔7側所見到的β :碩方向直視圖。在第12圖⑻中所示之介層孔7的位置 :、σ]面所不的情形下,雖然不會出現如第12圖(Α)般之 個介層孔7,但Β发 一 疋為了圖不上的方便起見,故將對側之介 層孔以點線來表示之。 c·別例3 基本上與別你I 9 1 他 相同,但本封裝基板134係將介層孔 ^的形狀做成如筮 闽\咏 * 13圖(B)所示般的圓環狀(參照第13 圖)。第13圖(B)係笛1〇 “第13圖(A)之B箭頭方向直視圖。 利用在別例2 φ + ^ 此a人 〒之硬數的介層孔7或別例3中之圓璦 狀m _ j , ^ τ、圃蜋 d.別例4 — 基本上係如第] i Z圖所示來說明而與別例2相同,但本^ 矣 矣 re-welding ^ 在 in the ^ circle circled part of the injury system indicates the establishment of the conductive connection pin 10Q is an enlarged view. Footnotes, and Fig. 4 • In addition, in the package base 130, the solder bumps 6 which are connected to the 1C wafer and the like are formed in the opening σ 18 of the upper side. The conductive connecting pin (10) used in the present invention is a so-called τ which is formed by a plate-shaped fixing portion 1〇1 and a columnar connecting groove 102 which is provided at a center position of the plate-shaped fixing portion m. Type pins are more suitable. The plate-like fixing portion 101 is fixed to the crucible on the outermost conductor layer 5 of the package substrate on which the pin 16 is formed by conductivity and then d Η, depending on the size of the foot. It is suitably formed in a circular shape or a polygonal shape. Further, the shape of the joint portion m may be a columnar shape, a prismatic shape, a conical shape, or a pyramidal shape which can be inserted into a joint portion of another substrate terminal or the like.材质 When the material of the conductive connecting pin 100 is metal, it is not particularly limited. It can be formed using at least one metal selected from the group consisting of gold, silver, copper, iron, nickel, cobalt, tin, and lead. Especially for example, ferroalloys, quotients. The name "K〇varj (nickel-cobalt-iron), stainless steel and copper alloy such as phosphor bronze. This is because the above substances are in electrical properties and as a conductive connection pin - Lishan this side is not - often - excellent - Dissimilar metal or alloy to form 'can also be based on anti-corrosion or joint ~ ~ suction strength and coated with other metal layers on the surface. More advanced, can also use pottery: is equal insulation 2160-2888A-PF 47 1282255 substances The surface is formed with a metal layer. The conductive connecting pin 100 has a diameter of 8 mm and a length of UdOmm. The plate-shaped fixing portion 1 is a diameter. 5~2. It is preferable to use the range of the foot; the size of the foot can be appropriately selected according to the type of the socket of the mother board of the desired women, etc. The conductive used in the package substrate of the present invention. For the adhesive agent 17, 'solder (tin-wrong, tin-pound, silver-tin-copper, etc.), conductive resin, conductive front solder paste, etc. can be used. The melting point can also be used in the range of 18〇~28 generation. A conductive adhesive inside. Thereby, the bonding of the conductive connection lock can be broken, and the degree is 2. Above 0Kg/pin, and in the case of thermal cycling, the installation of &: On the occasion of the smashing film, the conductive connection lock will not fall off or tilt due to heat, but the electrical connection. The above materials are made of solder. The result is better because the connection strength with the conductive connecting pin is very good, and the heat resistance is also strong, so the work is very difficult. When using the solder to form the conductive adhesive 17, it is used. Solder consisting of tin/lead = 95/5, 60/40, etc. is suitable. The solder used is also suitable for melting points in the range of 180 to 28 (rc). More preferably, the dispersion of the bonding strength of the conductive connecting pins can be made small, and the heat applied during the solid mounting can be prevented from damaging the constituent resin layers of the package substrate. As shown in Fig. 8, the opening portion 18 in which the pin portion 16 is partially exposed is covered with the organic resin insulating layer (through-hole layer) 15 and the guiding property is followed by the guiding property 7 ^ ® ^ ^ t # ^ ^ ,00 ^ 0 ^ # 2〇ι 〇^ κ Because the organic resin insulation layer 15 is covered with a cover? The method around the feet 6 is covered by 2160-2888A-PF 48 1282255, so that even when heat is applied or the package substrate is mounted on the mother board, even if stress is applied to the conductive connection lock 100, the foot 16 can be prevented. It is caused by breakage and peeling from the interlayer resin insulating layer 15. Further, it is also possible to make it difficult to separate the materials of different materials such as metal and resin, and to form a multilayer formed of an interlayer resin insulating layer. The package substrate formed of the printed wiring board is taken as an example, but the package substrate composed only of the i-sheet substrate can also be applied to the configuration of the first embodiment. [First Modification] Fig. 9 is a view showing a package substrate 139 of a third modification of the second embodiment. Here, Fig. 9 is a cross-sectional view of an important part of the package substrate 139, and Fig. 9 (8) is a view of Fig. 9 (a straight view of the direction of the arrow 6 in the direction of the arrow. Here, the aA section in Fig. 9(B)) That is, corresponding to Fig. 9. As shown in Fig. 9(B), the land 16 is composed of a circular body portion 16b for mounting a conductive connecting pin, and an extending portion 16& disposed around the body portion 16b. It is constructed and further connected to the signal line... at the main body portion 16b. Referring to Fig. 8 and as described in the above example, the edge of the land 16 is made of an interlayer resin insulating layer (organic resin insulating layer). In this case, in the first modification, the extending portion 16a disposed at the edge of the foot (main portion 16b) is covered with the solder resist layer 15. The body portion (10) is formed by soldering. The opening portion 18 of the photoresist layer 15 is exposed. In the first modification, since the extending portion 16a of the magic edge of the main body portion 16 is also covered by the solder resist layer i 5 , Even if the ϋ-------------------------------------------------------------------------------------------------------------------------- The opening portion 18 of the insulating layer 15 is exposed and the organic resin insulating layer 15 is not in contact with the body portion 16a of the pin portion 2160-2888A-PF 49 1282255, so that the organic tree is made of the insulating layer i5 and the foot. The contact of the main body portion 16a of the portion allows the organic resin insulating layer 15 side to be free from cracks. [Second Modification] The package substrate m can be basically the same as the first embodiment described above with reference to Figs. 7 and 8 . However, the chatter 16 of the fixed conductive contact pin is connected to the inner conductor layer 66 (5) of the interlayer resin insulating layer 52 on the outermost layer side via the via hole 7. In this example, the organic resin insulating layer 15 is not used to cover the foot. Bit 16 (refer to Fig. 1). Since the manufacturing process to (14) is completely the same as that of the first embodiment, the following description will be given from the following (10). (15) The layer hole 7 is filled with solder as a conductive adhesive. Paste (tin/record -95 · 5) 17. Here, a mask # (not shown) is placed on the surface of the organic resin insulating layer 15 to make it dense, and then the solder paste is printed. And re-welding at a maximum of 27 (TC). (16) Fixing the position of the conductive connecting pin, the system and the third The same applies to the embodiment. In this example, since the bonding area between the pin 16 and the substrate is made larger by the via hole 7, the peel strength of the pin 16 is improved. Further, since the inner conductor layer 66 is a metal layer, Therefore, it has good adhesion to the foot 16 which is also made of metal, and thus forms a structure which is not easily peeled off. Further, the position of the inner conductor layer can be set in the core from the roughened surface and the core The substrate is strongly adhered, so the foot position is more difficult to peel off. a. Example 1 2160-2888A-PF 50, 082255 is basically the same as the second modification, but the package substrate 32 will be provided with the pin 16 The via hole 7 is covered with an organic resin insulating layer 15 having an opening portion 18 for partially exposing the pin position (see Fig. u). Since the package substrate 132 is provided with the pin 16 on the via hole 7 and the surface thereof is covered with the organic resin insulating layer 15, the peel strength between the pin 16 and the substrate is excellent. b. The other example 2 is basically the same as the other example 1. However, the package substrate 133 is provided with a plurality of via holes 7 by a plurality of via holes 16 of a fixed pin 1*. Connected to the inner conductor layer 66 of the interlayer resin insulating layer 52 (refer to Fig. 12, in this example, as shown in Fig. 12 (β), the via hole 7 is formed in a circular shape: 6: 6 And forming the foot position so as to cover each of the via holes 7 - Fig. 12 (Β) is a straight view of β seen from the side of the via hole 7 of Fig. 12 (Α). In the case where the position of the via hole 7 shown in Fig. 8 (8) is not the same as the σ] plane, although a via hole 7 as in Fig. 12 (Α) does not appear, the Β 疋 疋 疋For the sake of convenience, the opposite layer of the via hole is indicated by a dotted line. c. Other example 3 is basically the same as the other you I 9 1 , but the package substrate 134 is the shape of the via hole ^ It is made into a ring shape as shown in Fig. 咏 咏 13 (B) (Fig. 13). Fig. 13 (B) is a flute 1 〇 "Fig. 13 (A) B arrow direction straight view Use the mesopores 7 in the hard number of φ + ^ in this case 2 or the circle in the other example 3 The form m _ j , ^ τ, 圃螂 d. the exception 4 - is basically as illustrated in the figure i i and is the same as the case 2, but this
2160-2888A-PF 51 1282255 封裝基板135係在内層之層間樹脂絕緣層52也設立依圓形 配置之複數的介層孔7,並使設有腳位」6之外層側介層孔 7與内層之介層孔7相接合而成。(參照第丨4圖)。由於在 該封裝基板135中係以複數的介層孔7彼此互相結合,故 腳位1 6會變得極難剝離。 另外,如前面所述般,在上述之各改變例中皆以設有 腳位之内層導體層係形成在模芯基板1Jl者較佳。由於模 怒基板上之導體層係藉由粗化面(褪光(matte)面)而與形 成拉芯基板之絕緣基板強固地密合,因此藉由與如上述般 之模怒基板上的導體層相連接,腳位16就會變得很難由層 間樹脂絕緣層52剝離。 9 [第3改變例] 〃基本上與第2改變狀㈣2相同,但本封裝基板136 係將連接腳位16之内層導體層設在模芯基板丨之貫穿孔9 上作為導體層(槽脊91) ’並利用有機樹脂絕緣層Η覆蓋 在腳位16的邊緣而構成(參照第15目)。如圖所示般·,^ 穿孔9之㈣心及貫穿孔9内之樹料純則藉由 介層孔7而與腳位1 6相連接。 也就是說,腳位16的特徵為藉由介層孔7而鱼模Y基 板^之導體層相連接。由於模芯基…之導體層係二 粗化面(褪光面)而與形成模芯基板之絕緣基板強固地密 合’因此猎由與如上述般之模芯基板上的導體層相連接, 1—剥_離。又,貫 穿,9及腳位16之間亦係藉由介層孔7而連接。因此,外2160-2888A-PF 51 1282255 The package substrate 135 is also provided with a plurality of via holes 7 arranged in a circular shape in the interlayer resin insulating layer 52 of the inner layer, and the interlayer layer 7 and the inner layer provided with the pin position 6 are provided. The via holes 7 are joined together. (Refer to Figure 4). Since a plurality of via holes 7 are bonded to each other in the package substrate 135, the pin 16 becomes extremely difficult to peel off. Further, as described above, in each of the above-described modifications, it is preferable that the inner conductor layer provided with the pin is formed on the core substrate 1J1. Since the conductor layer on the anger substrate is strongly adhered to the insulating substrate forming the core substrate by the roughened surface (matte surface), the conductor on the writhing substrate is as described above. When the layers are connected, the pin 16 becomes difficult to be peeled off by the interlayer resin insulating layer 52. 9 [Third Modification] The 〃 is basically the same as the second modification (4) 2, but the package substrate 136 is provided with the inner conductor layer of the connection pin 16 on the through hole 9 of the core substrate 作为 as a conductor layer (groove) 91) 'And it is formed by covering the edge of the foot 16 with an organic resin insulating layer (see item 15). As shown in the figure, the (four) core of the perforation 9 and the tree material in the through hole 9 are purely connected to the pin 16 by the via hole 7. That is to say, the foot 16 is characterized in that the conductor layers of the fish mold Y substrate are connected by the via holes 7. Since the conductor layer of the core base is a two roughened surface (a matte surface) and is strongly adhered to the insulating substrate forming the core substrate, the hunting layer is connected to the conductor layer on the core substrate as described above. 1 - peeling off. Further, through, the gap between the 9 and the foot 16 is also connected by the via hole 7. Therefore, outside
部知子之導電性接續鎖1〇〇與位於該導電性接續鎖⑽設 2160-2888A-PF 52 1282255 立側之相反側的ic晶片(半導體晶片)間之線路長度即可 縮短。 a·別例1 基本上與第3改變例相同,但本封裝基板;[37係在貫 牙孔9上形成覆蓋該貫穿孔9之導體層90,並在該導體層 90上藉由介層孔7而與腳位1 6相連接(參照第1 6圖)。 b·別例2 基本上與第3改變例相同,但本封裝基板138中之腳 位16係僅藉由介層孔即與貫穿孔9之槽脊91相連接(參照 第1 7圖)。在上述例中,腳位丨6不僅因與模芯基板丨表面 勺‘體層4相接合而形成不易剝離的構造,且特別因藉由 一貝牙孔之槽脊91相結合,故亦可縮短與基板裏侧之線路 長度。 [第4改變例] 基本上與f 2改變例相同’但係先將做成球狀的鲜錫The length of the line between the conductive connection locks of the koji and the ic wafer (semiconductor wafer) on the opposite side of the vertical side of the conductive connection lock (10) 2160-2888A-PF 52 1282255 can be shortened. a. the other example 1 is basically the same as the third modification, but the package substrate; [37] forms the conductor layer 90 covering the through hole 9 on the through hole 9, and the via hole is formed on the conductor layer 90. 7 and connected to the foot 16 (refer to Figure 16). b. Example 2 is basically the same as the third modification, but the pin 16 in the package substrate 138 is connected to the land 91 of the through hole 9 only by the via hole (see Fig. 17). In the above example, the foot position 丨6 is formed not only by the bonding with the body layer 4 of the core substrate, but also by the structure of the body layer 4, and is particularly shortened by the combination of the ridges 91 of a shell hole. The length of the line with the inside of the substrate. [Fourth Modification] Basically the same as the f 2 modification example ‘But the tin is first made into a spherical shape.
昇接續信賴性。 1貫施例的封裝基板,則由 度,故能有效地防止導電性 之間發生剝離的現象,並提Continuation of trust. According to the method of the package substrate of the embodiment, the degree of peeling between the conductive properties can be effectively prevented, and
2160-2888A-PF J282255 各個接續銷的狀態、最小接合強度、導電試驗等作為坪 項目。 ,、、、”、貝 〈第2實施例〉 以下就第2實施例之封裝基板之製造方法進行說明。 在此處,由於(1)〜(13)之工程可參照第j圖〜第5圖而與上 述第1實施例相同,故將其圖示及說明省略。 田(14)於上述(1)〜(13)之工程所得到的如第5圖所示之 豐合基板的導體層5以及介層孔7上形成粗化層u,並以 讓腳位16部份露出之具有開口部18的有機樹脂絕緣層^ 加以被覆(參照第19圖)。有機樹脂絕緣層之厚度可為 5〜4〇/z m。若過薄的話則絕緣性會降低;若過厚的話則難2 變成開口與銲錫接觸,而變成導致裂隙之原因。 (15)在上述開口部18内形成金電鍍膜、鎳電鍍膜〜金 電鍍膜等之耐餘金屬的金屬膜19之後,在用來當作封裳基 下面側(與子板、母板之連接面)的開口部1 6内,印刷 作為導電性接著劑17之銲錫膏。銲錫膏的粘度係以在 5〇〜、娜〜㈣2160-2888A-PF J282255 The status of each connecting pin, minimum joint strength, and conductivity test are used as the ping project. (2nd embodiment) The following is a description of the manufacturing method of the package substrate of the second embodiment. Here, the works of (1) to (13) can be referred to the jth to the 5th. The figure is the same as that of the above-described first embodiment, and therefore the illustration and description thereof are omitted. Field (14) The conductor layer of the rich substrate as shown in Fig. 5 obtained in the above (1) to (13) 5 and the via hole 7 is formed with a rough layer u, and is covered with an organic resin insulating layer having an opening portion 18 in which the pin portion 16 is partially exposed (refer to Fig. 19). The thickness of the organic resin insulating layer may be 5 to 4 〇/zm. If it is too thin, the insulation property is lowered. If it is too thick, it is difficult to make the opening contact with the solder, which causes the crack. (15) A gold plating film is formed in the opening portion 18. After the metal film 19 of the residual metal such as the nickel plating film to the gold plating film, the printing is performed as an electric conduction in the opening portion 16 for the lower side of the sealing base (the connection surface with the sub-board and the mother board). Solder paste for the adhesive 17. The viscosity of the solder paste is at 5 〇 ~, Na ~ (4)
構成之導電性接_鎖i0安裝於適當的鎖支撐裝置内以支 持之,並使導電性接續銷11〇的固定部ι〇ι正接在開口部 内之導電性接著劑17處,接著在220〜27Gt下進行再熔 =以將導電性接續鎖m固定在導電性接著劑”上(參照 —b 此外,也可在開口部内加入做成球狀等的導電 T—揍f落L或姐已接合在專電―泰接I銷—之—板—狀—固—定—部—側— 的:電性接續鎖安裝後,再施行再熔銲。又,在第20圖 、…圈#來的部份係表示設立導電性接續冑之腳 2160-2888A-PF 54 1282255 位部份,而第21圖則係其擴大圖β 另外,在封裝基板23〇中,係在其上面侧之開口 設立可與1C晶片等零件連接的銲錫凸塊230。 令 在本發明中所使用的導電性接續銷丨1〇, 板狀固定部m以及凸出設置於該板狀固定部1〇=== 央位置之柱狀接續部丨〇2而構成之所謂τ型銷較 板狀固定部m’係藉由導電性接著劑17而固定於= 位16之封裝基板的最外層導體層5上之部份,其 位的大小而以圓形或多角形來適當形成。料,關於接接 部102的形狀,只要是能插入其他基板端子等之接續部内' 的柱狀就沒問冑’圓柱型、角柱型、圓錐型、角錐型等皆 可。 導電性接續们10的材質係以使用擇自由銅或銅合 金、錫、辞、銘、貴金屬中至少i種以上的金屬所構成者 較佳’這是因為其具有高度的可撓性,特別是例如銅合金 之磷青銅。此乃因為上述物質在電氣特性上以及作為導電 性接續鎖之加工性方面皆非常優異。此外,該導電性接續 銷亦可基於防止腐蝕或提昇強度而在表面上覆以其他金屬 層。 在導電性接續銷11 〇中,柱狀接續部i02係以直徑為 〇· ;1〜0. 8mm、長度為1· 0〜i〇mm較佳;而板狀固定部1〇1係 以直徑在0· 5〜2· Omra的範圍内較佳;腳位的大小可依照所 要-女-裝之-母板—的-插—口—等—種 ---------- ---------------------------------—.....-----------------------------------— — 以在本發明之封裝基板中所使用的導電性接著劑1 7 而言,可使用與第1實施例相同之銲錫(錫—鉛、錫—鎊、銀 2160-2888A-PF 55 1282255 錫銅等)、導電性樹脂以及導電性鲜錫膏等。亦可使用溶 點在180〜28〇t範圍内之導電性接著劑。 —利用銲錫來形成導電性接著劑17時,係以使用與第1 貝施例相同之由錫/錯=95/5、6〇/4() $之組成構成的鲜錫 較適合。所㈣的銲錫其溶點亦以在⑽〜2啊的範圍内 較適合。且特別以在200〜26(TC的範圍内者更佳。 人由第21圖可知’由於該導電性接續銷110係由鋼或銅 合^等可撓性優異之㈣所構成,故在因將封裝基板安裝 到其他基板上而有應力施加於導電性接續銷110上時,亦 會如圖中之點線所示般可藉由接續部102之曲撓而將其吸 a.別例1 、別例1之封裝基板2 31之腳位1 6係如第2 2圖所示般, 為利用形成有使該腳位16部份地露出之開口部18的有機 村月日、、邑緣層(貝牙孔層)15所被覆而成,並在由開口部1 8 所露出之腳位16上藉由導電性接著劑17來固定導電性接 、’只銷110之固定部】〇 1。由圖可知,因為該有機樹脂絕緣 系乂现[在腳位16周圍的方式被覆,故在熱循環或 將封裝基板裝到母板上之際,就算有應力施加在導電性接 績銷110上,亦可防止腳位16的破壞以及從層間樹脂絕緣 層15剝離等情形產生。又,也可使金屬與樹脂等不同的材 質彼此間之接合變得較難剝離。另外,在此處雖然係以由 層―間―樹脂絕緣晷形成^ 板 作為例子,但僅由1片基板所構成之封裝基板也可適用於 第2實施例之構成。 2160-2888A-PF 56 ,1282255 % [第1改變例] 本封裝基板2 3 2,基本上可參照第2 〇圖以及第2工圖 而與上述第2貫施例相同,但係將固定導電性接續銷j工〇 • 之腳位16藉由介層孔7而與層間樹脂絕緣層200的内層導 體層16 0相連接。然後,利用有機樹脂絕緣層15將腳位 16的一部份予以被覆(參照第22圖)。製造工程(1)到(14) 之步驟係與第2實施例完全相同。 (15) 在介層孔7内填充作為導電性接著劑之銲錫膏 _ (錫/録=95 : 5)17。在有機樹脂絕緣層15的表面上配置幕 罩材(未圖示)且使其密合,再印刷銲錫膏,並以最高27〇 C施行再溶銲。 (16) 對於導電性接續銷之腳位的固定,係與第2實施 例相同。 在第1改:例中,因為導電性接續銷丄丨〇提高了應力 ϋ收丨生且藉由介層孔7使得腳位16與基板間之接合面 ^積^大,故可提高腳位16的剝離強度。此外,由於内層之 導體層160為金屬層,故可與同為金屬冑的腳位16有良好 、著f生因而形成不易剝離的構造。另外,因為其表面 、有機树梟絕緣層15予以覆蓋,故使得腳位1 6與基板 間的剝離強度非常優異。 此外連接内層導體層之腳位亦可設立在模芯基板1 __ 如上所述般’由於模芯基板上之導體層係藉由粗化 /、K U基板—強固地密合,故^ ^ ^ _____________________ _————— a_別例1 基本上盘楚 1 ,The conductive connection _ lock i0 is mounted in a suitable lock supporting device to support it, and the fixing portion ι ι of the conductive connecting pin 11 正 is directly connected to the conductive adhesive 17 in the opening, and then at 220~ Remelting at 27 Gt = fixing the conductive joint lock m to the conductive adhesive" (Refer to -b. Alternatively, a conductive T-turn may be added to the opening, or the sister may be joined. In the special electric--Thai-I------------------: After the electrical connection lock is installed, re-welding is performed. Also, in the 20th, ... The part indicates that the position of the conductive connection pin 2160-2888A-PF 54 1282255 is set, and the figure 21 is the enlarged view β. In addition, in the package substrate 23, the opening on the upper side thereof is established. A solder bump 230 to which a component such as a 1C wafer is connected. The conductive connecting pin 〇1〇 used in the present invention, the plate-shaped fixing portion m and the protrusion are provided in the plate-shaped fixing portion 1〇=== The so-called τ-type pin formed by the columnar connecting portion 较2 is made of a conductive adhesive 17 by a plate-like fixing portion m'. The portion of the outermost conductor layer 5 of the package substrate fixed to the bit 16 is appropriately formed in a circular or polygonal shape, and the shape of the connection portion 102 is as long as it can be inserted into another substrate. In the connection part of the terminal, etc., there is no column in the column shape. The cylindrical type, the prism type, the conical type, the pyramid type, etc. The materials of the conductive connection 10 are made of copper or copper alloy, tin, and It is preferred that at least one of the metals of the noble metal and the noble metal is formed because it has a high degree of flexibility, in particular, a phosphor bronze such as a copper alloy. This is because the above materials are electrically conductive and serve as a conductive connection. The workability of the lock is excellent. In addition, the conductive joint pin can also be coated with other metal layers on the surface based on corrosion prevention or lifting strength. In the conductive connecting pin 11 ,, the columnar joint i02 is The diameter is 〇·; 1~0. 8mm, and the length is 1·0~i〇mm is preferable; and the plate-shaped fixing portion 1〇1 is preferably in the range of 0·5~2· Omra; The size can be as desired - female - loaded - mother board - plug - mouth - etc. - kind---------- ------------------------------- ---.....----------------------------------------- In the present invention For the conductive adhesive 1 used in the package substrate, the same solder as the first embodiment (tin-lead, tin-pound, silver 2160-2888A-PF 55 1282255 tin-copper, etc.) or conductive resin can be used. And a conductive fresh solder paste, etc. A conductive adhesive having a melting point in the range of 180 to 28 〇t can also be used. - When the conductive adhesive 17 is formed by solder, the same method as in the first embodiment is used. Fresh tin consisting of tin/error=95/5, 6〇/4() $ is more suitable. The melting point of the solder of (4) is also suitable in the range of (10)~2. In particular, it is more preferably in the range of 200 to 26 (TC). As can be seen from Fig. 21, the conductive connecting pin 110 is composed of steel or copper, which is excellent in flexibility (4). When the package substrate is mounted on another substrate and stress is applied to the conductive connecting pin 110, it can be sucked by the bending of the connecting portion 102 as shown by the dotted line in the figure. In the case of the package substrate 2 of the example 1 of the first embodiment, the position of the leg 16 is as shown in Fig. 2, and the organic village is formed by the opening portion 18 in which the opening portion 18 is partially exposed. The layer (beefhole layer) 15 is covered, and the conductive contact is fixed on the pin 16 exposed by the opening 18, and the fixed portion of the pin 110 is fixed. As can be seen from the figure, since the organic resin insulating system is covered [in the manner of the periphery of the pin 16, the stress is applied to the conductive pin 110 even when the heat is cycled or the package substrate is mounted on the mother board. In addition, it is also possible to prevent the destruction of the foot 16 and the peeling of the interlayer resin insulating layer 15. Further, it is also possible to prevent metal and resin. The bonding between the same materials is difficult to peel off. In addition, although a layer-to-resin insulating resin is used as an example, a package substrate composed of only one substrate is also applicable. Configuration of the second embodiment. 2160-2888A-PF 56, 1282255% [First Modification] The package substrate 2 3 2 can basically refer to the second and second drawings and the second embodiment. Similarly, the pin 16 of the fixed conductive connection pin is connected to the inner conductor layer 16 0 of the interlayer resin insulating layer 200 through the via hole 7. Then, the pin is positioned by the organic resin insulating layer 15. A part of 16 is covered (refer to Fig. 22). The steps of manufacturing processes (1) to (14) are identical to those of the second embodiment. (15) The via hole 7 is filled with a conductive adhesive. Solder paste _ (tin/record = 95: 5) 17. A mask material (not shown) is placed on the surface of the organic resin insulating layer 15 and sealed, and the solder paste is printed and applied at a maximum of 27 〇C. Re-soldering. (16) Fixing the position of the conductive connecting pin is the same as in the second embodiment. In the example, since the conductive connecting pin increases the stress and the bonding surface of the pin 16 and the substrate is enlarged by the via hole 7, the peeling strength of the pin 16 can be improved. Further, since the conductor layer 160 of the inner layer is a metal layer, it can be formed well with the foot 16 which is also a metal crucible, so that it is formed into a structure which is not easily peeled off. Further, since the surface thereof is covered with the organic tree insulating layer 15 Therefore, the peel strength between the pin 16 and the substrate is excellent. In addition, the pin connecting the inner conductor layer can also be set on the core substrate 1__ as described above because the conductor layer on the core substrate is thick _ / KU substrate - strong close, so ^ ^ ^ _____________________ _--- a_ other example 1 basically Pan Chu 1,
/、丄改變例相同,但本封裝基板233係將1 2160-2888A-PF 57 1282255 個固定導電性接續銷110之腳位16藉由複數的介層孔7而 與層間樹脂絕緣層之内層導體層⑽相連接(參照第 圖(A))在本例中,係如第24圖(B)所示般,將介層孔 、依圓1 S己置6個’並以將各介層孔7皆覆蓋之方式形成 腳位16。第24圖⑻係由第24圖⑴之介層孔7側所見到 的B箭頭方向直視圖。在第24圖⑻中所示之介層孔7的 :置為如剖面所示的情形下,雖然不會出現如第“圖⑴ : 個71層孔7,但是為了圖示上的方便起見,故將對 側之介層孔以點線來表示之。 b·別例2 基本上與別们相同,但本封裝基板234係將介層孔 7的形狀做成如第25圖(]5)所示般的圓環狀(參照第25 圖)第25圖(B)係第25圖(A)之β箭頭方向直視圖。 利用在別例1中之複數的介層孔7或別例2中之圓環 狀的介層孔7,可使與基板的接合面積變得更大。 c·別例3 基本上係如第24圖所示來說明而與別例1相同,但本 封裝基板235係在内層之層間樹脂絕緣層2〇〇也設立依圓 形配置之複數的介層孔7,並使設有腳位16之外層侧介層 孔7與内層之介層孔7相接合而成。(參照第26圖)。由^ 在該封裝基板235中係以複數的介層孔7彼此互相結合, 故腳位16會變得極難剝離。 —' ~ ^ ^ 如-前面毒述般」—-在i述―之各致變—例申皆善設冬— :位之内,導體層係形成在模芯基板]上者較*。二模— i基板上之導體層係藉由粗化面(褪光面)而與形成模芯某The change is the same, but the package substrate 233 is such that the pin 16 of the fixed conductive contact pin 110 of the 1 2160-2888A-PF 57 1282255 is connected to the inner conductor of the interlayer resin insulating layer by the plurality of via holes 7 The layers (10) are connected (refer to the figure (A)). In this example, as shown in Fig. 24(B), the via holes and the holes 1 are set to 6 ' and the respective via holes are used. 7 is formed in such a way as to form the foot 16. Fig. 24 (8) is a straight view in the direction of the arrow B seen from the side of the via hole 7 of Fig. 24 (1). In the case where the via hole 7 shown in Fig. 24 (8) is placed as shown in the cross section, although the "Fig. (1): 71-layer hole 7 does not appear, for the sake of convenience of illustration. Therefore, the via holes on the opposite side are indicated by dotted lines. b. The other example 2 is basically the same as the others, but the package substrate 234 has the shape of the via hole 7 as shown in Fig. 25 (5). Fig. 25 (B) is a straight view in the direction of the β arrow in Fig. 25(A). The plural hole 7 or another example in the other example 1 is used. The ring-shaped via hole 7 in 2 can make the bonding area with the substrate larger. c. The other example 3 is basically the same as that of the other example 1 as shown in Fig. 24, but the package is The substrate 235 is an interlayer resin insulating layer 2 of the inner layer, and a plurality of via holes 7 arranged in a circular shape are also provided, and the interlayer via holes 7 provided with the pins 16 are bonded to the via holes 7 of the inner layer. (refer to Fig. 26). The plurality of via holes 7 are bonded to each other in the package substrate 235, so that the foot 16 becomes extremely difficult to peel off. - ' ~ ^ ^ such as - front poison Said"--in i - each of the mutagens - Good Examples are provided Dong Shin -: position of the conductor layer is formed in the core substrate] * than those on. Two-mode - the conductor layer on the i-substrate is formed by a roughened surface (a matte surface)
2160-2888A-PF 58 1282255 板之絕緣基板強固地密合,因此藉由與如上述般之模芯基 板上的導體層相連接,腳位16就會變得很難由層間樹脂絕 緣層2 0 0剝離。 [第2改變例] 基本上與第1改變例之別例2相同,但本封裝基板236 係將連接腳位16之内層導體層設在模芯基板丨之貫穿孔g 上作為導體層(槽脊91),並利用有機樹脂絕緣層15覆蓋 在腳位16的邊緣而構成(參照第27圖)。如圖所示般,貫 穿孔9之槽脊91以及貫穿孔9内之樹脂填充材」。係藉由 介層孔7而與腳位1 6相連接。 也就是說,腳位16的特徵為藉由介層孔7而與模芯基 板1之導體層相連接。由於模芯基板1上之導體層係藉由 粗化面㈤光面)而與形成模怎基板之絕緣基板強固地密 合’因此藉由與如上述般之模芯基板上的導體層相連接, 腳位16就會變得很難由層間樹脂絕緣層2〇〇剝離。又,貫 穿孔9及腳位16之間亦係藉由介層孔7而連接。因此,外 部端子之導電性接續鎖110與位於該導電㈣ 立側之相反側的1C晶片(半導體晶片)間之線路長度即可 縮短。 a·別例1 *基本上與第2改變例相同,但本封裝基板237係在貫 牙孔9户形成覆蓋該貫穿孔9之導體層9〇,並在該導體層 上嫩 —圖)—〇———— b.別例22160-2888A-PF 58 1282255 The insulating substrate of the board is strongly adhered, so by connecting the conductor layer on the core substrate as described above, the foot 16 becomes difficult to be made of the interlayer resin insulating layer 20 0 peeling. [Second Modification] Basically, it is basically the same as the second example of the first modification. However, the package substrate 236 has the inner conductor layer of the connection pin 16 provided on the through hole g of the core substrate 作为 as a conductor layer (slot). The ridge 91) is formed by covering the edge of the foot 16 with the organic resin insulating layer 15 (refer to Fig. 27). As shown in the figure, the land 91 of the perforation 9 and the resin filler in the through hole 9 are formed. It is connected to the pin 16 by the via hole 7. That is, the pin 16 is characterized by being connected to the conductor layer of the core substrate 1 via the via hole 7. Since the conductor layer on the core substrate 1 is strongly adhered to the insulating substrate forming the substrate by the roughened surface (five), it is connected to the conductor layer on the core substrate as described above. The pin 16 becomes difficult to be peeled off by the interlayer resin insulating layer 2〇〇. Further, the through holes 9 and the pins 16 are also connected by the via holes 7. Therefore, the length of the line between the conductive connection lock 110 of the external terminal and the 1C wafer (semiconductor wafer) on the opposite side of the conductive (four) side can be shortened. a. The other example 1 is basically the same as the second modification, but the package substrate 237 is formed in the through-hole 9 to form the conductor layer 9 覆盖 covering the through-hole 9 and is on the conductor layer-- 〇———— b. Other example 2
基本上與第2改變例相同,但本封裝基板238中之腳 2160-2888A-PF 59 1282255 位1 6係僅藉由介層孔即與貫穿孔9之槽脊91相連接(參照 第29圖)。在上述例中,腳位16不僅因與模芯基板1表面 的:體層“目接合而形成不易剝離的構造,且特別因藉由 ,、貝牙孔之槽脊91相結合,故亦可縮短與基板裏側之線路 長度。 [第3改變例] 基本上與第1改變例相同,但係先將做成球狀的銲錫 裝附於導電性接續銷上後再配設導電性接續銷。 、所述般若根據弟2實施例的話,由於導電性 接續銷係利㈣或銅合金等高可撓性之材質所構成,故會 在熱循環或封裝基板之安裝時充分地吸收施加在接續銷上 之應力而能防止接續銷由基板上剝離。 般導電性接續銷之封梦美搞^ 只月ι釘衣基板,由於應力不易集中於導電性 接續銷^故導電性接續銷與腳位以及腳位與基板間之接合 強度很咼、接續信賴度很優異。 、第30圖所示係各實施例之封裝基板的評價結果。其係 以接合後之導電性接續銷的最小接合強度、加熱試驗(再現 假想的1C實測狀態,利用將配設有接續鎖的基板送入25〇 C的氮氣再料爐内來評價之)以及熱循環條件下(以 °C/3分+-65t/3分作為i循環,實施i刪循環)後之各個 接續銷的狀態、最小接合強度、導電試驗等。 〈第3實施例〉 、、 ———。 在此處二由於(1)~(13)之工程可參照第丨圖〜第5圖而與上 述第1實施例相同,故將其圖示及說明省略。 2160-2888A-PF 60 -1282255 (14)於上述⑴〜(13)之工程所得到的如第干 璺合基板的導體声5以及人Μ|Γ7 口所不之 用m 孔7上形成粗化層1卜並利 用具有使該腳位16部份地露 工利 出之開口邛18的有機樹脂絕 ^ 15加以被覆(參照第31圖)。有機樹脂絕緣層之厚度 ' 5〜40/ΖΠ1。若過薄的話則絕緣性會降低;若過厚 則難以變成開口與銲錫接觸,而變成導致裂隙之原因。" 電梦膜等之广開口°"8内形成金電鍍膜、鎳電鍍膜-金 ,又膜專之耐银金屬的金屬膜19之後,在用來 板之下面側(與子板、母板之連接面)的開口部16内:= 5〇 4ηπρ 者d 17之知錫貧。銲錫膏的粘度係以在 :’〇Pa.s的範圍内較佳。更進一步,將在接續部⑽上 腰部1G3之導電性接續銷12G安裝於適當的鎖支撐 (内以支持之’並使導電性接續銷120的固定部如正 接在開口部1 6内之導電性接荽卞丨 ¥以生接者劑17處,接著在240〜270 仃再熔銲以將導電性接續鎖120固定在導電性接著 劑Π上(參照第32圖)。此外,也可在開口部内加入^ 球狀專的導電性接著劑,或是將已接合在導電 板狀固々定部側上的導電性接續銷安裝後,再施行再=之 ^,在第32圖中以圓圈圈起來的部份係表示設立導電性接 、”貝銷120之腳位部份,而第33圖則係其擴大圖。 μ另夕卜,在封裝基板330中,係在其上面側之開口 “中 δ又立可與IC晶片等零件連接的銲錫凸塊。 ^ ,係以使用由 板狀固定部Γ〇1以及凸出設置於該板狀固定部1〇1的約中由——— 央位置之柱狀接續部102而構成之所謂T型銷較為適合。Basically, it is the same as the second modification. However, the legs 2160-2888A-PF 59 1282255 of the package substrate 238 are connected to the land 91 of the through hole 9 only by the via hole (refer to FIG. 29). . In the above example, the foot position 16 is not only formed by the "layer bonding" with the body layer on the surface of the core substrate 1, but is also formed by the combination of the ridges 91 of the bead holes. The length of the line on the back side of the substrate. [Third Modification] Basically, it is basically the same as the first modification. However, the spherical solder is attached to the conductive connecting pin, and then the conductive connecting pin is disposed. According to the embodiment of the second embodiment, since the conductive connecting pin is made of a highly flexible material such as a copper alloy or the like, it is sufficiently absorbed on the connecting pin during the mounting of the thermal cycle or the package substrate. The stress can prevent the splicing pin from being peeled off from the substrate. The general conductive splicing pin is sealed by the beauty of the door. Only the yew PIN substrate is difficult to concentrate on the conductive splicing pin, so the conductive splicing pin and the foot and the foot The bonding strength between the bit and the substrate is very good, and the connection reliability is excellent. Fig. 30 shows the evaluation results of the package substrate of each embodiment, which is the minimum bonding strength and heating test of the conductive connecting pin after bonding. (reproduced false The 1C measured state is evaluated by feeding the substrate equipped with the interlock lock into a 25 〇C nitrogen reheating furnace and under the thermal cycle conditions (°C/3 min +-65 t/3 min as the i cycle) , the state of each of the subsequent pins after the implementation of the i-cut cycle, the minimum joint strength, the conductivity test, etc. <Third embodiment>, , ———. Here, the engineering of (1) to (13) can be referred to. The drawings and the fifth embodiment are the same as those of the above-described first embodiment, and thus the illustration and description thereof are omitted. 2160-2888A-PF 60 -1282255 (14) The first item obtained in the above (1) to (13) The conductor sound 5 of the dry-bonded substrate and the Μ Γ Γ Γ 口 用 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机 有机It is covered by 15 (refer to Fig. 31). The thickness of the organic resin insulating layer is '5 to 40/ΖΠ1. If it is too thin, the insulation will be lowered; if it is too thick, it will be difficult to make the opening contact with the solder, and it will become a crack. The reason. "The wide opening of the electric dream film, etc." 8 formed gold plating film, nickel plating film - gold, and film resistance After the metal film 19 of the metal is used in the opening portion 16 for the lower side of the board (the connection surface with the daughter board and the mother board): = 5 〇 4 η π ρ The knowledge of the d 17 is poor. The viscosity of the solder paste is : 'The range of 〇Pa.s is better. Further, the conductive connecting pin 12G of the waist 1G3 on the splicing portion (10) is attached to an appropriate lock support (to support the 'and to fix the conductive connecting pin 120' For example, the conductive material that is directly connected to the opening portion 16 is used to bond the raw material agent 17, and then re-weld at 240 to 270 以 to fix the conductive joint lock 120 to the conductive adhesive agent ( Refer to Figure 32. In addition, a spherical conductive adhesive may be added to the opening, or a conductive connecting pin that has been bonded to the side of the conductive plate-shaped fixing portion may be attached and then applied. =^, the portion circled in the circle in Fig. 32 indicates that the conductive connection, "the pin portion of the pin 120" is established, and the figure 33 is an enlarged view. In addition, in the package substrate 330, the opening "the middle δ is a solder bump which can be connected to a part such as an IC chip. ^, the use of the plate-shaped fixing portion Γ〇1 and the convex portion is used. A so-called T-shaped pin which is provided in the columnar connecting portion 102 of the center position in the plate-like fixing portion 1〇1 is suitable.
2160-2888A-PP 61 -1282255 板狀固定部1 〇 1,係藉由導電性接著劑〗7而固定於形成腳 位16之封裝基板的最外層導體層5上之部份,其可依據腳 位的大小而以圓形或多角形來適當形成。此外,關於接續 部1〇2的形狀,只要是能插入其他基板端子等之接續部内 ^柱狀就沒問題,圓柱型、角柱型、圓錐型、角錐型等皆 丁 〇 1蜂腰部103為設置在接續部1〇2的中間部份,並係以 車又其他部份細之形式來形成。該蜂腰部1〇3的粗細, -直徑,必須為接續部直徑的5〇%以上' _以下。 腰部之直徑比其他部份之直徑的 ^ 的5(U小的話,則接續部的 強度會變得不足夠,封f美姑 的 ^斗 裝基板在裝合之際就會變形折斷; =蜂腰部之直徑超過其他料之錢的_的話1 =:賦予給接續部之預期可繞性,而無法得到應力之 構成本發明之導電性接續鎖的材質,若 不特別加以限定,可使用摆 屬金屬的話則 』便用擇自金、銀、銅、 鉛荨之中至少1種以上的 ^ 、、 , 屬來形成。鐵合金係以商品夕 var·」錄♦鐵之合金)及不錄鋼 金係以磷青銅為較佳材質。此 I而銅合 良好,且在作為導雷㈣碎 因為上述物質之電氣特性 作為導電性接績銷之加工性 別是磷青鋼,因為且右 吊k異。特 應力吸收之用。有4的可繞性’故非常適合用來作 0 1 η η SI t ^ ^ 〇·卜 〇· 8mm、長度為 j. 〇 ~ 1 〇_ 以直徑在定部101係2160-2888A-PP 61 -1282255 The plate-shaped fixing portion 1 〇1 is fixed to the outermost conductor layer 5 of the package substrate forming the pin 16 by the conductive adhesive 7, which can be based on the foot The size of the bit is appropriately formed in a circular shape or a polygonal shape. Further, the shape of the joint portion 1〇2 is not particularly problematic as long as it can be inserted into the joint portion of the other substrate terminal or the like, and the cylindrical shape, the prismatic column type, the conical shape, the pyramid type, and the like are all set. In the middle part of the splicing part 1〇2, it is formed in the form of a thin part of the car. The thickness of the bee waist 1〇3, the diameter, must be 5〇% or more of the diameter of the joint. The diameter of the waist is 5 compared to the diameter of the other parts. (If the U is small, the strength of the joint will become insufficient, and the base of the seal will be deformed and broken at the time of fitting; If the diameter of the waist exceeds the amount of money of other materials, 1 =: the material that is imparted to the joint portion and the stress that cannot be obtained is the material of the conductive joint lock of the present invention, and if it is not particularly limited, the pendulum can be used. In the case of metal, it is formed by at least one of gold, silver, copper, and lead bismuth, and is a genus of iron, alloy, var, quotation, iron, and iron. Phosphor bronze is preferred. This I is good in copper and is used as a mine guide. The electrical properties of the above materials are the properties of the conductive pin. Phosphorus steel is used because it is different from the right. Special stress absorption. There are 4 wrapability's, so it is very suitable for 0 1 η η SI t ^ ^ 〇· Bu 〇 · 8mm, length j. 〇 ~ 1 〇 _ with diameter in the fixed part 101
2160-2888A-PF L ’腳位的大小可依照所 62 1282255 要文裝之母板的插口等種類來適當選定。 以在本發明之封裝基板中所使用的導電性接著劑^ 而言,可使用與第!實施例相同之銲錫(錫_鉛、錫一錄、銀 -錫-銅等)、導電性樹脂以及導電性銲錫膏等。亦可使用熔 點在180〜280°C範圍内之導電性接著劑。 利用銲錫來形成導電性接著劑17時,係以使用盘第工 實施例相同之由錫/錯=95/5、60/40等之組成構成的鮮錫 較適合。所使用的銲錫其熔點亦以在18()~2δ代的範圍内 較適合。且特別以在200〜260t的範圍内者更佳。 由第33圖⑴、帛33圖⑻可知,由於該導電性接$ 鎖120係在接㈣m上設置有蜂腰部1〇3,故變得富^ 撓性且容易彎曲,因此在將封裝基板安裝到母板等之:而 有應力施加於導電性接續鎖12〇上時,即可藉由接續部 上的蜂腰部103之曲撓而將其吸收。 a.別例1 別例^之封裝基板331之腳幻6係如第34w所示般, 為利用形成有使該腳位16部份地露出之開口部18 樹脂絕緣層(貫穿孔層)15所被覆而成,並在由開口部; 所露出之腳位1 6上藉由莫雷拉盆十丨,。丄 精由¥電性接者劑17來固定導電性 續銷120之固定部1〇1。ώ岡可土 门上 我 汕1由圖可知,因為該有機樹脂 層15係以蓋壓在腳位16周圍的方式被覆,故在熱循環戍 將封裝基板裝到母板上之際,就算有 層15剝離等情形產生。另外,在此處 絕緣層形成的多層印刷線路板所構成之封裝基板作為; 2160-2888A-PF 63 !282255 子’但僅由1片基板所構成之封裝基板也可適用於第3實 施例之構成。 [第1改變例] 本封裝基板332,基本上可參照第32圖以及第33圖 而與上述第/實施例相同,但係將固定導電性接續鎖12〇 之腳位16藉由介層孔7而與層間樹脂絕緣層52的内層導 _曰6 6相連接。然後,利用有機樹脂絕緣層1 &將腳位μ 的一部份予以被覆(參照第35圖)。製造工程(1)到(14)之 步驟係與第3實施例完全相同。 (15) 在介層孔7内填充作為導電性接著劑之銲錫膏 (錫/銻=95 : 5)17。在有機樹脂絕緣層15的表面上配置幕 罩材(未圖示)且使其密合,再印刷銲錫膏,並以最高27〇 °C施行再溶銲。 (16) 對於導電性接續銷之腳位的固定,係與第3實施 例相同。 在苐1改變例中,因為導電性接續鎖11 〇的蜂腰部1 〇 3 提高了應办之吸散性,且藉由介層孔7使得腳位16與基板 間之接合面積變大,故可提高腳位16的剝離強度。此外, 由於内層之導體層66為金屬層,故可與同為金屬製的腳位 16有良好的接著性,因而形成不易剝離的構造。另外,因 為其表面又以有機樹脂絕緣層15予以覆蓋,故使得腳位 16與基板間的剝離強度非常優異。 -肉-I導—體〜晷之腳位-亦I設—立本模—芯〜基_板―i— 之上。如上所述般,由於模芯基板上之導體層係藉由粗化 面而與模芯基板強固地密合,故腳位更難剝離。 2160-2888A-PF 64 .1282255 a_別例1 2本上與第1改變例相同,但本封裝基板333係將i 口疋導電性接續鎖110之腳位16藉由複數的介層孔7而 與層間樹脂絕緣層52之内層導體層66相連接(參照第% 圖(A))。在本例中,係如第36圖(B)所示般,將介層孔7 -依圓形配置6個,並以將各介層孔7皆覆蓋之方式形成腳 位16。第36圖。)係由第36圖(人)之介層孔7侧所見到的 B箭頭方向直視圖。又,在第36圖(B)中所示之介層孔7 # 1位置為如剖面所示的情形下,雖然不會出現如第%圖⑴ 般之3個介層& 7’但是為了圖示上的方便起見,故將對 侧之介層孔以點線來表示之。 b·別例2 基本上與別例1相同,但本封裝基板334係將介層孔 7的形狀做成如第37圖(趵所示般的圓環狀(參照第π 囷)第37圖(Β)係第37圖(Α)之Β箭頭方向直視圖。 利用在別例1中之複數的介層孔7或別例2中之圓環 • 狀的介層孔7,可使與基板的接合面積變得更大。 c.別例3 基本上係如第3 6圖所示來說明而與別例1相同,但本 封裝基板335係在内層之層間樹脂絕緣層52上也設立依圓 形配置之複數的介層孔7,並使設有腳位丨6之外層侧介層 孔7與内層之介層孔7相接合而成(參照第圖(Α)、第 --38 ®係以—複數—孔—.I—— 彼此互相結合,故腳位〗6會變得極難剝離。 另外’如如面所述般,在上述之各改變例中皆以設有 2160-2888A-PF 65 1282255 腳位之内層導體層係形成在模芯基板丨上者較佳。由於模 心基板上之導體層係藉由粗化面(褪光面)而與形成模芯基 板之、、、巴緣基板強固地密合,因此藉由與如上述般之模芯基 板上的導體層相連接,腳位16 f尤會變得很難由_樹脂絕 緣層5 2剝離。 [第2改變例] ^基本上與第1改變例之別例2相同,但本封裝基板336 係將連接腳位16之内層導體層設在模芯基板1之貫穿孔9 上作為導體層(槽脊91),並利用有機樹脂絕緣層15覆蓋 j腳位16的邊緣而構成(參照第39目)。如圖所示般,貫 之槽脊91以及貫穿孔9内之樹脂填充材1 0係藉由 介層孔7而與腳位1 6相連接。 就疋次,腳位1 6的特徵為藉由介層孔7而與模芯基 板1之導體層相連接。由# 侵田於楔心基板1上之導體層係藉由 粗化面(褪光面)而盥 + /、形成杈心基板之絕緣基板強固地密 5,因此藉由與如上述般之模芯基板上的導體層相連接, J7 < 16就曰.欠甘很難由層間樹脂絕緣層^剝離。又,貫 穿孔9及腳位16之間亦係藉由介層孔7而連接。因此,外 :端子之導電性接續鎖12〇與位於該導電性接續鎖12〇設 立側之相反側的IC晶片(半導Μ曰H、 、千¥體日日片)間之線路長度即可 a•別例1 ’―但—本專裝基板專秦在— 错“層孔7而與腳位16相連接(參照第4〇圖)。The size of the 2160-2888A-PF L ’ foot can be appropriately selected according to the type of socket of the motherboard to be installed in the main body of 62 1282255. For the conductive adhesive used in the package substrate of the present invention, it can be used and the first! The solder of the same example (tin-lead, tin-record, silver-tin-copper, etc.), conductive resin, conductive solder paste, and the like. A conductive adhesive having a melting point in the range of 180 to 280 ° C can also be used. When the conductive adhesive 17 is formed by soldering, it is preferable to use a tin composed of a composition of tin/error = 95/5, 60/40 or the like which is the same as the embodiment of the disk. The solder used has a melting point which is also suitable in the range of 18 () to 2 δ generation. And especially in the range of 200 to 260t is better. As can be seen from Fig. 33 (1) and Fig. 33 (8), since the conductive contact 120 is provided with the bee waist portion 1〇3 on the (m)m, it becomes flexible and easily bent, so the package substrate is mounted. When it is applied to the mother board or the like: when stress is applied to the conductive joint lock 12, it can be absorbed by the bending of the bee waist portion 103 on the joint portion. a. Example 1 is a resin insulating layer (through-hole layer) 15 in which an opening portion 18 in which the foot portion 16 is partially exposed is formed as shown in FIG. 34w. It is covered and is made up of the top of the opening; the exposed foot is 16 by the Moreira basin. The fixing portion 1〇1 of the conductive renewal pin 120 is fixed by the electric connector 17. As can be seen from the figure, since the organic resin layer 15 is covered by the cover around the pin 16, even when the package substrate is mounted on the mother board during the thermal cycle, The layer 15 is peeled off or the like. In addition, the package substrate formed of the multilayer printed wiring board formed of the insulating layer is used as the package substrate of 2160-2888A-PF 63 !282255 sub-, but only one substrate is applicable to the third embodiment. Composition. [First Modification] The package substrate 332 can be basically the same as the above-described first embodiment by referring to Figs. 32 and 33, but the pin 16 of the fixed conductive contact 12 is fixed by the via hole 7 Further, it is connected to the inner layer of the interlayer resin insulating layer 52. Then, a part of the foot position μ is covered with the organic resin insulating layer 1 & (refer to Fig. 35). The steps of manufacturing engineering (1) to (14) are identical to those of the third embodiment. (15) A solder paste (tin/锑 = 95: 5) 17 as a conductive adhesive is filled in the via hole 7. A mask material (not shown) is placed on the surface of the organic resin insulating layer 15 and adhered thereto, and the solder paste is printed, and re-soldering is performed at a maximum of 27 ° C. (16) The fixing of the position of the conductive connecting pin is the same as that of the third embodiment. In the 苐1 modification, since the bee waist portion 1 〇3 of the conductive splicing lock 11 提高 improves the absorbability to be handled, and the interlayer hole 7 makes the joint area between the foot position 16 and the substrate become large, Increase the peel strength of the foot 16. Further, since the conductor layer 66 of the inner layer is a metal layer, it has good adhesion to the foot 16 which is also made of metal, and thus a structure which is not easily peeled off is formed. Further, since the surface is covered with the organic resin insulating layer 15, the peeling strength between the foot 16 and the substrate is extremely excellent. - Meat - I guide - body ~ 晷 foot position - also I set - Liben mold - core ~ base _ board - i - above. As described above, since the conductor layer on the core substrate is strongly adhered to the core substrate by the roughened surface, the foot is more difficult to peel off. 2160-2888A-PF 64 .1282255 a_Other example 1 2 is the same as the first modification, but the package substrate 333 is the pin 16 of the i-port conductive connection lock 110 by a plurality of via holes 7 Further, it is connected to the inner conductor layer 66 of the interlayer resin insulating layer 52 (refer to Fig. 1(A)). In this example, as shown in Fig. 36(B), the via holes 7 are arranged in a circular shape, and the pins 16 are formed so as to cover the respective via holes 7. Figure 36. A straight view in the direction of the arrow B seen from the side of the mesopores 7 of Fig. 36 (person). Further, in the case where the position of the via hole 7 # 1 shown in Fig. 36 (B) is as shown in the cross section, although the three layers & 7' as in the % (Fig. 1) are not present, For the sake of convenience in the illustration, the via holes on the opposite side are indicated by dotted lines. b. The second example is basically the same as the other example 1, but the package substrate 334 has the shape of the via hole 7 as shown in Fig. 37 (see the π 囷) as shown in Fig. 37. (Β) is a straight view of the arrow direction in Fig. 37 (Α). The substrate can be made by using the plurality of via holes 7 in the other example 1 or the via hole 7 in the other example 2. The bonding area becomes larger. c. The other example 3 is basically the same as that of the other example 1 as shown in FIG. 3, but the package substrate 335 is also provided on the interlayer resin insulating layer 52 of the inner layer. The plurality of via holes 7 are arranged in a circular shape, and the via layer 7 provided with the pin layer 6 is bonded to the via hole 7 of the inner layer (refer to the figure (Α), the -38® The system is combined with each other, so that the feet will become extremely difficult to peel off. In addition, as described above, in the above various examples, 2160-2888A is provided. -PF 65 1282255 The inner conductor layer of the pin is preferably formed on the core substrate. Since the conductor layer on the core substrate is formed by the roughened surface (matte surface) and the core substrate is formed, Since the rim substrate is strongly adhered to each other, the foot 16f particularly becomes difficult to be peeled off by the _resin insulating layer 52 by being connected to the conductor layer on the core substrate as described above. Example] ^ is basically the same as the second example of the first modification, but the package substrate 336 is provided with the inner conductor layer of the connection pin 16 on the through hole 9 of the core substrate 1 as a conductor layer (groove 91). And the edge of the j-pin 16 is covered with the organic resin insulating layer 15 (refer to the 39th mesh). As shown in the figure, the resin lining 10 in the ridge 91 and the through-hole 9 is formed by the via hole. 7 is connected to the pin 16. In this case, the pin 16 is characterized by being connected to the conductor layer of the core substrate 1 through the via hole 7. The conductor on the wedge substrate 1 is invaded by # The layer is made of a roughened surface (a matte surface) and the insulating substrate forming the core substrate is strongly densely 5, so that it is connected to the conductor layer on the core substrate as described above, J7 < 16 is awkward. It is difficult to peel off the interlayer resin insulating layer. Moreover, the through hole 9 and the pin 16 are also connected by the via hole 7. , outside: the length of the line between the conductive connection lock 12 of the terminal and the IC chip (semiconducting Μ曰H, 千日日日片) on the opposite side of the conductive connection lock 12〇 side • Example 1 '----This special-purpose substrate is in the wrong--"layer hole 7 and connected to the foot 16 (refer to Figure 4).
2160~2888A~PF 66 .1282255 b.別例2 基本上與第2改變例相同,但本封裝基板338中之腳 位16係僅藉由介層孔即與貫穿孔9之槽脊91相連接(參照 第41圖)。在上述例中,腳位1 6不僅因與模芯基板〗表面 的導體層4相接合而形成不易剝離的構造,且特別因藉由 與貫穿孔之槽f 91才目結合,故亦可縮短與基板裏侧之 長度。 [第3改變例] 基本上與第1改變例相同,但係先將做成球狀的銲錫 裝附於導電性接續銷上後再配設導電性接續銷。 如以上所述般,若根據第3實施例之導電性接續銷的 話,則由於其係由柱狀之接續部與板狀之固定部所構成, 且在柱狀之接續部上設置有比其他接續部之直徑還細的蜂 腰邛,故在熱循環或封裝基板之安裝時即可藉由蜂腰部之 曲撓充分地吸收施加在接續鎖上之應力而能防止接續銷^ 基板上剝離。此外,使用如上述般導電性接續銷之封裝基 ^ ^ ^ ^ ^ ^ f # ^ ^ # ^ ^ ^ t ^ ^ # ^ 與腳位以及腳位與基板間之接合強度很高、接續信賴度很 優異。 第42圖所示係第3實施例之封裝基板的評價姓果。其 係以接合後之導電性接續鎖的最小接合強度、加熱賴(再 現叙想的1C實測狀態,利用將配設有接續鎖的基板送入 鱗♦氮—㈣銲.体來*以…— 30C/3刀+-65c/3分作為J循環,實施循環)後之 各個接續錦的狀態、最小接合強度、導電試驗等作為評價 2160-288 8A-PF 67 ^ 1282255 項目。 〈第4實施例〉 以下就第4實施例之封裳基板之製造方法進行說明。 在此處,由於(1)〜(12)之工程可參照第i圖〜第4圖而與上 述第1實施例相同,故將其圖示及說明省略。 (13) 將第4圖(d)所示之基板的電鍍光阻3去除,再將 電鍍光阻下之無電解電鍍膜12去除,接著設立介層孔7以 及平坦(plain# 21,即得到一面3層之6層疊合基板 照第43圖)。 > (14) 在如上步驟所得到之疊合基板的導體層5、介層 孔7以及平層21上形成粗化層j j,並以讓腳位16以及 平坦層21部伤露出之具有開口部18的有機樹脂絕緣層η 加以被覆(參照第44圖)。有機樹脂絕緣層之厚度; 。若過薄的話則絕緣性會降低;若過厚的話^二 變成開口與薛錫接觸,而變成導致裂隙之原因。' 、 (⑸在上述開口部18内形成金電鑛膜 電鍍膜等之料金屬的金屬膜19之後,㈣來 = 板之下面側(與子柘、瓜^ :我秦 母板之連接面)的開口部 作為導電性接著劑17夕#姐落 内印刷 5〇〜4〇〇Pa.s的範圍内 十度係以在 平乂1土。更進一步,將導電性接續 安裝於適當的鎖支撐梦 、 〇 100的固定部101正接 接,銷 —處—备著—‘24。―撕e τ : 口内之導電性接著劑” 固定在導電性接著劑.‘叫.- 開口部内加入做成球 ⑴此夕卜也可在 狀4的導電性接著劑,或是將已接合2160~2888A~PF 66 .1282255 b. The other example 2 is basically the same as the second modification, but the pin 16 in the package substrate 338 is connected only to the land 91 of the through hole 9 through the via hole ( Refer to Figure 41). In the above example, the pin 16 is formed not only by the bonding with the conductor layer 4 on the surface of the core substrate, but also by the groove f 91 of the through hole, and can be shortened. The length from the inside of the substrate. [Third Modification] Basically, it is basically the same as the first modification. However, a spherical solder is attached to the conductive connecting pin, and then a conductive connecting pin is disposed. As described above, according to the conductive connecting pin of the third embodiment, the columnar connecting portion and the plate-shaped fixing portion are formed, and the column-shaped connecting portion is provided with more than the other. Since the diameter of the splicing portion is also fine, the embossing of the squeezing plate can be prevented by sufficiently absorbing the stress applied to the splicing lock by the bending of the bee waist during the mounting of the thermal cycle or the package substrate. In addition, the package base of the conductive connection pin as described above is ^ ^ ^ ^ ^ f f ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ and the joint strength between the foot and the foot and the substrate is high, and the reliability is continued. Very good. Fig. 42 is a view showing the evaluation result of the package substrate of the third embodiment. It is based on the minimum joint strength and the heating of the conductive joint lock after the jointing (representing the 1C measured state of the rendition, and feeding the substrate equipped with the joint lock into the scale NOx-(four) welding body* to... 30C/3 knives +-65c/3 points as the J cycle, the state of each splicing after the cycle), the minimum joint strength, the conduction test, etc. are evaluated as 2160-288 8A-PF 67 ^ 1282255 item. <Fourth embodiment> A method of manufacturing a sealing substrate of the fourth embodiment will be described below. Here, since the items (1) to (12) can be referred to the first embodiment to the fourth embodiment, the drawings and descriptions are omitted. (13) The electroplating photoresist 3 of the substrate shown in Fig. 4(d) is removed, and the electroless plating film 12 under the plating photoresist is removed, and then the via hole 7 is formed and flat (plain # 21 is obtained). One of the three layers of 6 laminated substrates is shown in Fig. 43). > (14) A roughened layer jj is formed on the conductor layer 5, the via hole 7 and the flat layer 21 of the laminated substrate obtained as described above, and has an opening which exposes the foot 16 and the flat layer 21 The organic resin insulating layer η of the portion 18 is covered (see Fig. 44). The thickness of the organic resin insulating layer; If it is too thin, the insulation will be lowered; if it is too thick, the second will become the contact between the opening and the Xuexi, which will become the cause of the crack. (5) After the metal film 19 of the metal such as the gold-plated ore plating film is formed in the opening portion 18, (4) comes to the lower side of the plate (the connection surface with the 柘, 瓜^: my mother mother board) The opening is used as a conductive adhesive. In the range of 5 〇 to 4 〇〇 Pa.s, the opening is printed in the range of 10 degrees in the flat. 1 Further, the conductive connection is attached to the appropriate lock support. Dream, 固定100 fixed part 101 is connected, pin------24. ―Tear e τ: Conductive adhesive in the mouth" Fixed in conductive adhesive. 'Call.- Add the ball into the opening (1) This may also be in the form of a conductive adhesive, or will be joined
2160-2888A-PF 68 .1282255 ^導電性接續鎖之板狀固定部側上的㈣性接續 後’再施行再溶銲。 女裝 μ另外,在封裝基板431令,係在其上面側之開 设立可盘ΙΓ曰政、由μ 1 8中 1C日日片專零件連接的銲錫凸塊6〇。 在本發明令所使用的導電性接㈣10 板狀固定物以及凸出設置於該板狀固定部10 = 央位置之柱狀接續部m而構成之所謂τ型銷較°=中 板狀固定部ΗΗ,係藉由導電性接著劑17而固定於:腳 位16之封裝基板的最外層導體層5上之部份,其可^腳 位的大小而以圓形或多角形來適#形成。此外:= 部102的形妝,口 i sJ Λ ^ ^ 疋月b插入其他基板端子等之接續部内 =狀就沒問題’圓柱型、角柱型、圓錐型、角錐型等皆 一以在本發明之封裝基板中所使用的導電性接著劑17 而δ,可使用與第1實施例相同之鲜錫(錫一錯、锡—錄、銀 -錫-銅等)、導電性樹脂以及導電性銲锡膏等。,亦可使用: 籲點在18 0〜2 8 〇 °C範圍内之導電性接著劑。 利用銲錫來形成導電性接著劑17時,係以使用與第工 實施例相同之由錫/鉛=95/5、6。/4〇等之組成構成的銲錫 車乂適合。所使用的銲錫其熔點亦以在18〇〜28〇。〇的範圍内 較適合。且特別以在200〜260°C的範圍内者更佳。 第50圖係表示平坦層21之平面圖。在平坦層21中,2160-2888A-PF 68 .1282255 ^The (four) continuity on the side of the plate-shaped fixing portion of the conductive connection lock is then re-soldered. In addition, in the package substrate 431, the solder bumps 6 连接 which are connected to the 1C solar chip of the μ 1 8 are provided on the upper side of the package substrate 431. The conductive connection (four) 10 plate-shaped fixture used in the present invention and the so-called τ-type pin which is formed by the columnar connection portion m which is provided at the central portion of the plate-like fixing portion 10 = the central portion is smaller than the medium-plate-shaped fixing portion. The crucible is fixed to the outermost conductor layer 5 of the package substrate of the pin 16 by the conductive adhesive 17, and is formed in a circular or polygonal shape by the size of the pin. In addition: = the shape of the portion 102, the mouth i sJ Λ ^ ^ 疋 month b inserted into the connection portion of the other substrate terminal or the like = no problem, 'cylindrical, prismatic, conical, pyramidal, etc. are all in the present invention The conductive adhesive 17 used in the package substrate and δ can be used in the same manner as in the first embodiment, such as tin (tin-dislocation, tin-record, silver-tin-copper, etc.), conductive resin, and conductive solder. Solder paste and so on. It can also be used: A conductive adhesive in the range of 18 0~2 8 〇 °C. When the conductive adhesive 17 is formed by soldering, tin/lead = 95/5, 6 is used in the same manner as in the first embodiment. Soldering ruts composed of /4〇, etc. are suitable. The solder used has a melting point of 18 〇 28 〇. It is more suitable within the scope of 〇. And particularly preferably in the range of 200 to 260 ° C. Figure 50 is a plan view showing the flat layer 21. In the flat layer 21,
^ —成網—眼X㈣hX 狀。與導電性接續銷相接續之接續部份21b係以避開導體 未形成部份21a的方式來形成。另外,網眼若非圓形則亦 2160-2888A-PF 69 -1282255 攀 可為方形,更進一步,在平坦層上亦可不設置網眼。 如第45圖所示般,在本發明之第4實施例之封裝基板 431中’係於基板表面上配置用來形成電源層之平坦層 21 ’並藉由在該平坦層21上直接連接導電性接續銷1〇〇, 以降低由外部基板(例如子板)到平坦層21之電阻。藉此, • 可使得由子板側供給電力變得容易,也能對1C晶片供給大 電流’以讓構成電源層之平坦層21能發揮充份的機能。 [第1改變例] • 第46圖係表示本發明之第1改變例之封裝基板432的 剖面圖’ 第47圖係在第46圖中以圓圈圈起來之設有 導電性接續銷11 〇的腳位部份之放大圖。 第1改變例之封裝基板432的腳位16係如第47圖所 示般’為利用具有使該腳位16部份地露出之開口部18的 有機樹知絕緣層(貫穿孔層)丨5所被覆而成,並在由開口部 18所路出之腳位16上藉由導電性接著劑(錫/銻: 5)17 來固定導電性接續銷110的固定部1〇1。由圖可知,因為 籲該有機樹脂絕緣層15係以蓋壓在腳位16周圍的方式被 覆故在熱循壞或將封裝基板裝到母板上之際,就算有應 力施加在導電性接續銷11〇上,亦可防止腳位16的破壞以 及從層f曰1樹脂絕緣層15 _等情形產生。又,也可使金屬 與樹脂等不同的材質彼此間之接合變得較難剝離。 如第46圖所示般,在本發明之第1改變例之封裝基板 藉由在該平坦層21上直接連接導電性接續銷100,以降低 由外部基板(例如子板)到平坦層21之電阻。藉此,就算是 2160-2888A-PF 70 .1282255 在構成接地層之平坦層中亦可使其藉由低 續鎖而與子板侧之接地線相連接,以充分地達到防Γ = (noise)之目的。 雜戒 u變例之封裝基板432中,導電性接_⑴ 、I、貝μ用擇自由銅或銅合金、錫、辞、銘、貴金屬中 :二:::之f有高可撓性金屬所構成。特別是例如鋼 金之〜月銅。此乃因為上述物質在電氣特性 導電性接續鎖之加工性方面皆非常優異。此外,該導電: 接縯鎖亦可基於防止腐蝕或提昇強度而在表面上覆 金屬層。 /、m [第2改變例] 第“圖係表示本發明之第2改變例之封裝基板433的 d面圖’第49目係在帛48目中以圓圈圈起來之設有導電 性接續銷120的腳位部份之放大圖。 從第49圖可知,第2改變例之封裝基板433之導電性 接績銷120由於係在接續部1〇2上設置有蜂腰部103,故 變得富可撓性且容易管曲,因此在將封裝基板安裝到母板 等之上而有應力施加於導電性接續銷12〇上時,即可藉由 接續部102上的蜂腰部1〇3之曲撓而將其吸收。 [弟3改變例] 基本上與第1改變例相同,但係先將做成球狀的銲錫 I附於導電性接續銷上後再配設導電性接續銷。 在弟4貝知例中一,-肩利—用—在 性接續銷,以降低由外部基板到平坦層之電阻。藉此,可 使平坦層之機能充分地發揮。^ — into the net—eye X (four) hX shape. The splicing portion 21b which is continuous with the conductive connecting pin is formed to avoid the conductor unformed portion 21a. In addition, if the mesh is not round, the 2160-2888A-PF 69 -1282255 can be square, and further, the mesh can be omitted on the flat layer. As shown in FIG. 45, in the package substrate 431 of the fourth embodiment of the present invention, a flat layer 21' for forming a power supply layer is disposed on the surface of the substrate and is electrically connected directly to the flat layer 21. The contact pin is 1 〇〇 to reduce the resistance from the external substrate (e.g., the daughter board) to the flat layer 21. Thereby, it is possible to supply electric power from the sub-board side, and it is also possible to supply a large current to the 1C wafer so that the flat layer 21 constituting the power supply layer can perform a sufficient function. [First Modification] Fig. 46 is a cross-sectional view showing a package substrate 432 according to a first modification of the present invention. Fig. 47 is a circular connection provided with a conductive connecting pin 11 in FIG. A magnified view of the foot part. The pin 16 of the package substrate 432 of the first modification is an organic insulating layer (through-hole layer) 利用5 which is formed by the opening portion 18 having the foot portion 16 partially exposed as shown in Fig. 47. The fixing portion 1〇1 of the conductive connecting pin 110 is fixed by a conductive adhesive (tin/锑: 5) 17 on the foot 16 which is opened by the opening 18. As can be seen from the figure, since the organic resin insulating layer 15 is covered so as to be pressed around the pin 16, the heat is applied or the package substrate is mounted on the mother board, even if stress is applied to the conductive connection pin. In the case of 11 ,, it is also possible to prevent the destruction of the foot 16 and the situation from the layer f 曰 1 resin insulating layer 15 _. Further, it is also possible to make it difficult to separate the materials such as metal and resin. As shown in FIG. 46, in the package substrate of the first modification of the present invention, the conductive connection pin 100 is directly connected to the flat layer 21 to reduce the external substrate (for example, the sub-board) to the flat layer 21. resistance. Therefore, even if 2160-2888A-PF 70 .1282255 is in the flat layer constituting the ground layer, it can be connected to the ground line on the daughter board side by low-continuous locking to fully achieve tamper resistance = (noise ) The purpose. In the package substrate 432 of the hybrid nucleus, the conductive connection _(1), I, μμ is selected from copper or copper alloy, tin, sui, Ming, precious metal: two::: f has a high flexible metal Composition. In particular, for example, steel to moon copper. This is because the above substances are excellent in the electrical properties of the conductive joint lock. In addition, the conductive: the lock can also be coated with a metal layer on the surface based on corrosion prevention or strength enhancement. /, m [Second Modification Example] The "Fig. d" is a view showing a d-side view of the package substrate 433 according to the second modification of the present invention. The 49th mesh is provided with a conductive connection pin in a circle in the 帛48 mesh. An enlarged view of the pin portion of 120. As can be seen from Fig. 49, the conductive pin 120 of the package substrate 433 of the second modification is provided with a bee waist portion 103 on the connecting portion 1〇2, so that it becomes rich. Since it is flexible and easy to bend, when the package substrate is mounted on the mother board or the like and stress is applied to the conductive connecting pin 12, the curl of the bee waist portion 1〇3 on the connecting portion 102 can be used. Scratching and absorbing it. [Different Example 3] It is basically the same as the first modified example, but the spherical solder I is attached to the conductive connecting pin and then the conductive connecting pin is disposed. 4, one of the known examples, - shoulder-use - in the continuity of the pin to reduce the resistance from the outer substrate to the flat layer. Thereby, the function of the flat layer can be fully utilized.
2160-2888A-PF 71 .1282255 * 、 第5 1圖所示係久音# y , 谷M 例之封裝基板的評償結果。其係 以接合後之導電性接續銷的 八 文貝鋼的最小接合強度、加熱試驗(再現 假想的IC實測狀離,奋丨丨田 。 、 ^ 用將配設有接續銷的基板送入2 5 0 C的氮氣再溶鲜爐内炎蜂> 。 ^木砰彳貝之)以及熱循環條件下(以13〇 C/3分+-65〇C/3分作為1张四 ^ 刀作馬1循裱,貫施1 000循環)後之各個 - 接續銷的狀態、最小接人%疮、曾+ ut 较口強度、導電試驗等作為評價項目。 〈弟5實施例〉 以下就第4實施例之封裝基板之製造方法進行說明。 魯 首先1作在基板表面上形成有導體電路之線路基 板。以基板而言,可使用玻璃環氧基板、聚亞胺基板、雙2160-2888A-PF 71 .1282255 * , Figure 5 shows the results of the compensation of the package substrate of the M. It is based on the minimum joint strength and heating test of the octagonal steel of the conductive splicing pin after the joining (reproduction of the imaginary IC, and the use of the substrate with the splicing pin. 5 0 C nitrogen re-melting furnace in the inflammatory bee > ^ Mu Mubei) and thermal cycling conditions (13 〇 C / 3 points +-65 〇 C / 3 points as a four ^ knife After the horse 1 cycle, the application of 1 000 cycles) - the status of the continuous pin, the minimum access to the % sore, the previous + ut port strength, conductivity test, etc. as evaluation items. <Embodiment 5> Hereinafter, a method of manufacturing the package substrate of the fourth embodiment will be described. Lu first 1 is a wiring substrate on which a conductor circuit is formed on the surface of the substrate. For the substrate, a glass epoxy substrate, a polyimide substrate, or a double can be used.
馬來酸酐縮亞胺-二Y 1H匕甘1 # L 妝一丫秦樹知基板等之樹脂絕緣基板;以及 鐘銅層壓板、陶究基板、金屬基板等。在該基板上形成層 間絕緣層’並將該層間絕緣層表面粗化成粗化面,再於該 粗化面全體上施以薄被覆之無電解電鍍,接著形成電鍍光 P再於電鍍光阻之未开^成部份施以厚被覆之電解電鑛 後’去除電鍍光阻’施以蝕刻處理,即形成由電解電鍍膜 籲與無電解電姻所構成之導體執。導電電路亦可皆為銅 圖案(pattern)。 在形成有導體電路的基板上藉由導體電路或貫穿孔來 形成凹彳為了填埋該凹部,故將樹脂填充劑利用印刷等 方式來塗佈,乾燥後,把多餘的樹脂填充劑利用研磨的方 式磨去,並在使導體電路露出之後,再使樹脂填充劑硬化。 —--—-其二欠一在冬體-電-路-上-設土 係利用钱刻處理、研磨處理、氧化處理、氧㈣原處理而 形成之粗化面’此外,又以利用電鍵皮膜所形成之粗晝面 2160-2888A-PF 72 1282255 锃:化層凹凸的最大高度Ry亦可形成在Η。"間。 ^者,在導體電路之粗化面上設立層間絕緣樹脂層。 ^間絕緣樹脂層可利用無電解電制接著劑來形成。 ^電解電鍍用接著劑係以熱硬化性樹脂作為基劑,特 疋經硬化處理的耐熱性樹脂粒子、可溶解於酸或氧化劑 之耐熱性樹脂粒子、無機粒子或纖維質填充劑等,在必 時皆可使含有之。上述樹脂絕緣層,係由在下層導體電 路與上層導體電路之間設立層間樹脂絕緣層所構成。 上述樹脂絕緣層亦可形成為複數層。例如,下層可為 由無機粒子或纖維質填充劑以及樹脂基劑所構成:補強 層’上層可為無電解電錢用接著劑層。此外,也可將可溶 ^於酸或氧化劑中之平均粒徑為^的耐熱性樹 月曰粒子分散在難溶於酸或氧化劑中之耐熱性樹脂中以作為 下層,並以無電解電鍍用接著劑作為上層。 在粗化並賦予觸媒核後之層間絕緣樹脂層的整面上形 成薄被覆之無電解電鍍膜。該無電解電鍍膜係以無電解銅 电鑛較佳’其厚度為〇 · 5 〜5/z m,並以為卜^較佳。 其次,在如上述般所形成之無電解電鍍膜上層壓感光 性樹脂膜(乾膜),再於該感光性樹脂膜上密合安裝描繪有 電鍍光阻圖案之光罩(玻璃基板亦可),接著藉由曝光、顯 影處理而形成配設有電鍍光阻圖案之非導體部份。 再來’在無電解銅電鍍膜上之非導體部份以外處形成 以電解電鍍而言,係以使用電解銅電鍍較佳,其厚度則以 5〜2 0 // m較佳。 2160-2888A-PF 73 1282255 納、步,利用硫酸與過氧化氫之混合液或過硫酸 鈉、過硫酸銨、氯化第二鐵、 盔雷解雪輕睹 /、b弟一鋼專蝕刻液來去除 無電解電鍍膜,即可得到由無 n ^ ^ ^解電鍍膜與電解電鍍膜之 2層所構成之獨立的導體電路與介層孔。 此外,在非導體部份所露出 制m左欠缺 粗化面上的鈀觸媒核可 利用鉻馱、過硫酸水等來溶解除去。 其次、’在表層的導體電路上形成粗化層。所形成之粗 化層,係以利用蝕刻處理、 广 恩理虱化處理、氧化摞 原處理所形成的銅粗化層或利 為較佳。 线㈣所㊉成的粗化層 接著,在上述導體電路上形 絕緣層之銲錫-光阻層。本心明中例之有機樹脂 月中之銲錫光阻層的厚;f# 在5〜150// m的範圍内。並特 又係 甚'…# 謂別以5〜4〇㈣的厚度為較佳。 右過薄的話,則無法發揮作為銲錫擋板之功能 厚的話,則會變得難以開 ^ 之鋥魅P “歹」 Μ4導致在與銲錫物接觸 之鋅錫物上產生裂隙之原因。 …其後,開設銲錫光阻層之開口部。在該開口部内也可 形成由擇自金、銀、銅、鐵 铜、鈦、白金、輝錫之中至少::"°、鱗、路、鶴、 m既 )1種以上的合金所構成之金 【層。金屬層的形成可使用電锻、蒸鑛、濺鍍等之形成全 屬層的方法。 化成金 在以下的說明中,雖然係將金屬層以之層來形成,作 T I- 丄t開口部形成金屬層時’若舉例而言,可形成辞、金 之金屬層。如此形成之理由係用以防止所露出之導體電路 2160-2888A-PF 74 ,1282255 被腐名虫。 在開口部利用無電解電錄來形成鎮電 Γ/㈣例’可舉例如下,鎳“〜::: 、絡酸納40g/1、蝴酸i2g/i、硫/納 0.1g/l(pH=ll)。利用脫脂液來洗淨銲錫光阻層開κ素 面,再於由開口部所露出之導體部份賦予名巴等:,、表 活性化後,浸泡於電鍍液中,以形成鎳電鍍層。’、使 鎳電鍵層之厚度係〇.5〜2Mm,並特m〜 厚度較,。若在上述範圍以下的話,則銲錫凸塊與錄2 接=會變差二若在上述範圍以上的話,則在開口、邹; v 、之銲錫凸塊就會因不易收納而發生剝離。 ,鎳電鍍層形成後,利用金電鍍來形成金電鍍層 度為0.01〜0.1",並以在0 03 //m左右較佳。 、予 銲錫光阻形成後’在用以使導體電路露出之開口部或 開口部之周圍形成用來提高凸起狀鎖之接合性的凹部。該 開口部以及凹部係利用曝光、顯影處理來形成。或是可使 用碳酸、液態石夕鎮、YAG等之雷射來形成。另外,還有益 由穿孔器來開口等之方法。上述之方法亦可複合使用。-上述開口部之直徑係在⑽範圍内,凹部之 直捏係在5~7—的範圍内。此外,開口部的形狀以及凹 4的形狀係以形成為圓形最適當,但亦可形成為四角形等 之多角形及星形等等。 —在-開-口-勒及-凹 者材而言,可使用銲錫、硬録材、導電性之粒子狀物質與 熱硬化性樹脂以及導電性之粒子狀物質與熱可塑性樹脂。Maleic anhydride imide-II Y 1H 匕 Gan 1 # L 丫 丫 丫 树 树 树 树 树 树 树 树 树 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂 树脂Forming an interlayer insulating layer on the substrate and roughening the surface of the interlayer insulating layer into a roughened surface, and then applying a thin coating of electroless plating on the entire roughened surface, and then forming a plating light P and then plating the photoresist After the thick coating of the electrolytic electric ore is applied, the 'electroplating photoresist is removed' and the etching treatment is performed, that is, the conductor formed by the electrolytic plating film and the electroless electrocardiogram is formed. The conductive circuits can also all be copper patterns. The concave portion is formed by a conductor circuit or a through hole on the substrate on which the conductor circuit is formed. In order to fill the concave portion, the resin filler is applied by printing or the like, and after drying, the excess resin filler is ground. The method is ground and the resin filler is hardened after the conductor circuit is exposed. ------The second one is in the winter body-electric-road-up-set soil system using the money engraving treatment, grinding treatment, oxidation treatment, oxygen (four) original treatment to form the roughened surface 'in addition, using the key Rough surface formed by the film 2160-2888A-PF 72 1282255 锃: The maximum height Ry of the unevenness of the layer can also be formed in the crucible. "Between. ^, an interlayer insulating resin layer is formed on the roughened surface of the conductor circuit. The interlayer insulating resin layer can be formed using an electroless electrolytic adhesive. ^The adhesive for electrolytic plating is a thermosetting resin as a base, and is particularly resistant to heat-treated resin particles, heat-resistant resin particles soluble in an acid or an oxidizing agent, inorganic particles or fibrous fillers. It can be included in the time. The resin insulating layer is formed by forming an interlayer resin insulating layer between the lower conductor circuit and the upper conductor circuit. The above resin insulating layer may also be formed in a plurality of layers. For example, the lower layer may be composed of inorganic particles or a fibrous filler and a resin base: the upper layer of the reinforcing layer may be an adhesive layer for electroless money. Further, the heat-resistant tree eucalyptus particles having an average particle diameter of ? dissolved in an acid or an oxidizing agent may be dispersed in a heat-resistant resin which is hardly soluble in an acid or an oxidizing agent as a lower layer, and used for electroless plating. The agent is then used as the upper layer. A thin coated electroless plated film is formed on the entire surface of the interlayer insulating resin layer after roughening and imparting a catalyst core. The electroless plating film is preferably made of electroless copper ore having a thickness of 〇 5 5 5 /z m, and is preferably a film. Next, a photosensitive resin film (dry film) is laminated on the electroless plated film formed as described above, and a photomask on which the plating resist pattern is drawn is attached to the photosensitive resin film (a glass substrate may be used) Then, a non-conductor portion provided with a plating resist pattern is formed by exposure and development processing. Further, it is formed on the electroless plating except for the non-conductor portion on the electroless copper plating film. Electrolytic plating is preferably carried out using electrolytic copper plating, and the thickness thereof is preferably 5 to 20 // m. 2160-2888A-PF 73 1282255 Nano, step, using a mixture of sulfuric acid and hydrogen peroxide or sodium persulfate, ammonium persulfate, second iron chloride, helmet lei snow 睹 /, b brother one steel special etching solution By removing the electroless plating film, a separate conductor circuit and via hole composed of two layers of the n ^ ^ ^ -free plating film and the electrolytic plating film can be obtained. Further, the palladium catalyst core exposed on the non-conducting portion may be dissolved and removed by using chrome, persulfate or the like. Next, a roughened layer is formed on the conductor circuit of the surface layer. The formed rough layer is preferably a copper roughened layer formed by an etching treatment, a broadening treatment, or a oxidative reduction treatment. 10% of the roughened layer of the line (4) Next, a solder-resist layer of the insulating layer is formed on the conductor circuit. The organic resin of the present example is thick in the solder resist layer of the month; f# is in the range of 5 to 150 // m. It is also better to use the thickness of 5~4〇(4). If the right side is too thin, it will not be able to function as a solder baffle. If it is thick, it will become difficult to open. The P P P “歹” Μ 4 causes cracks in the zinc-tin which is in contact with the solder. ... Thereafter, the opening of the solder resist layer is opened. In the opening, an alloy composed of at least one of gold, silver, copper, iron-copper, titanium, platinum, and bismuth: at least: :"°, scale, road, crane, and m) may be formed. Gold [layer. The metal layer can be formed by a method of forming a full layer by electric forging, steaming, sputtering or the like. In the following description, a metal layer is formed as a layer, and when a metal layer is formed as a T I - 丄t opening portion, a metal layer of a word or a gold may be formed by way of example. The reason for this is to prevent the exposed conductor circuits 2160-2888A-PF 74, 1282255 from being rotted. In the opening portion, the electroless magnetic recording is used to form the electrification Γ / (4) Example can be exemplified as follows, nickel "~:::, sodium silicate 40g / 1, butterfly acid i2g / i, sulfur / nano 0.1g / l (pH =ll). The degreasing solution is used to clean the surface of the solder resist layer, and then the conductor portion exposed by the opening portion is given a name bar: etc., after the table is activated, it is immersed in the plating solution to form nickel. Electroplating layer. ', the thickness of the nickel bond layer is 〇5~2Mm, and the thickness is more than m~. If it is below the above range, then the solder bump and the recording 2 will be worse if it is in the above range. In the above case, the solder bumps in the opening and the v; the solder bumps are peeled off due to difficulty in storage. After the nickel plating layer is formed, gold plating is used to form a gold plating layer of 0.01 to 0.1" 0 03 //m is preferably used. After the solder resist is formed, a recess for improving the bonding property of the bump-like lock is formed around the opening or the opening for exposing the conductor circuit. The concave portion is formed by exposure and development processing, or may be formed by using a laser such as carbonic acid, liquid Shixia, YAG, or the like. In addition, it is also advantageous to use a perforator to open the opening, etc. The above method can also be used in combination. - The diameter of the opening is in the range of (10), and the straight portion of the recess is in the range of 5-7. The shape of the opening portion and the shape of the recess 4 are preferably formed into a circular shape, but may be formed into a polygonal shape such as a square shape, a star shape, or the like. - In the case of - open-mouth-le-and-concave materials, Solder, a hard recording material, a conductive particulate material, a thermosetting resin, a conductive particulate material, and a thermoplastic resin can be used.
2160-2888A-PF .1282255 ^寺別以利用銲锡來形成接著材層較佳。其理由係因為接 &強度較強、形成方法之選擇較廣之故。 在利用銲·錫形点、拉t 2 形成接者材層時,可使用鉛之配合比為 3 5〜g 7彳者。此外,姐/放 卜錫/銻、錫/銀、錫/銀/銅等不使用金L之 物質亦非常適合。 'σ 在利用硬銲材形成接著材層時,可利 銅、璘、鎳、把、鋅、銦、飽❹中^ 銀 錳之中1種以上之金屬來 y ,以使用以金合金所形成之金銲材以及以銀合 金所形成之銀銲材較佳。其理由係因為導電性佳、不 飯之故。 利用導電性之粒子狀物質與熱硬化性樹脂以及熱可塑 =月曰形成接著材層時,粒子狀物f可利用金屬、無機、 ί曰來I$纟理由為與樹脂之線膨脹係數或溶點等容易 調整,且與樹月旨混合時亦不易發生分散凝集之故。但是, 亦可利用上述物質料之物f來形成。可作為導電性之粒 =狀物質來使用的情形舉例如下··利用金屬、㈣性樹脂 4^4 t ^ ^ ^ ^ a ^ f ^ 4 # ^ ^ ^ ;^ ^ ^ 機树酉曰等非導電性物質塗裝金屬層等之後所形成者;或 是以,屬層、導電性樹脂等塗裝之後所形成者。上述之導 電性樹脂係在熱硬化性樹脂或熱可塑性樹脂中使均一地攪 半/匕口刀佈後再作為接著材層來使用。就樹脂而言, 係以使用熱硬化性樹脂較佳。此乃因為其在常溫下的作業 性較隹崎^_—! 導電性之接著材層係利用印刷、電鍵、裝瓶法、光阻 #刻法來形成。上述之方法係對銲錫綠之開口部内施行 2160-2888A-PF 7 6 12822552160-2888A-PF .1282255 ^Temple is better to use solder to form the backing layer. The reason is because the strength of the connection is strong and the selection method is wider. When the contact layer is formed by soldering a tin-shaped dot or pulling t 2 , a blending ratio of lead of 3 5 to 7 μm can be used. In addition, it is also very suitable for materials such as Sisters/Bus/锑, Tin/Silver, Tin/Silver/Copper that do not use Gold L. 'σ When a brazing material is used to form a backing layer, one or more metals such as copper, niobium, nickel, niobium, zinc, indium, and satium can be used to form a gold alloy. The gold solder material and the silver solder material formed of a silver alloy are preferred. The reason is because the conductivity is good and it is not good. When a conductive particulate material and a thermosetting resin and a thermosetting resin are used to form a backing layer, the particulate matter f can be made of a metal, an inorganic or a cerium, and the reason is a linear expansion coefficient or dissolution with the resin. The dots and the like are easily adjusted, and the dispersion and aggregation are less likely to occur when mixed with the tree. However, it can also be formed using the material f of the above material. Examples of the case where it can be used as a conductive particle=like substance are as follows: • using metal, (tetra) resin 4^4 t ^ ^ ^ ^ a ^ f ^ 4 # ^ ^ ^ ; ^ ^ ^ The conductive material is formed after the metal layer or the like is formed; or is formed by coating with a genus layer, a conductive resin, or the like. The above-mentioned conductive resin is used as a binder layer in a thermosetting resin or a thermoplastic resin, and is uniformly used as a binder layer. In the case of a resin, it is preferred to use a thermosetting resin. This is because the workability at room temperature is better than that of the Miyazaki ^_-! conductive layer is formed by printing, electric bonding, bottling, and photoresist. The above method is applied to the opening of the solder green 2160-2888A-PF 7 6 1282255
電性金屬以達成電氣上之接續。Electrical metal to achieve electrical continuity.
但在開 凸部。本案實施例之封裝基板, 由於配置在基板上之凸起狀鎖會後合於外部基板的接續部 内而相連接,故能緩和熱壓合時的應力集中,以防止凸起 亦可設計成能插入凹部内的 在實際裝到外部基板之際, 狀銷以及該凸起狀銷的載置部龜裂、損壞。 此外,即使是在信賴性試驗之熱循環條件下,亦比配 置BGA之基板更不容易在接續部發生龜裂、損壞。 以下,就第5實施例之封裝基板及其製造方法參照圖 式進行具體的說明。 首先’就弟5貫施例之封裝基板510的構成參照第5 9 圖以及第60圖進行說明。第59圖所示係半導體零件之IC 晶片590裝置前之封裝基板510的剖面圖。第60圖所示係 裝置了 1C晶片590且呈已安裝於母板(外部基板)之狀態的 封裝基板510剖面圖。如第60圖所示般,在封裝基板510 板:554-相—連属—。— 參照第5 9圖而就封裝基板之構成進行詳細的說明。在 該封裝基板510中,係於多層模芯基板530的表面以及裏 2160-2888A-PF 77 1282255 面形成疊合線路層580A、580B。該疊合線路層58〇A係由 形成有介層孔5 60與導體線路558之層間樹脂絕緣層55〇 以及形成有介層孔660與導體線路658之層間樹脂絕緣層 650所構成。此外,疊合線路層580B係由形成有介層孔 與導體線路558之層間樹脂絕緣層550以及形成有介層孔 6 60與導體線路658之層間樹脂絕緣層650所構成。 在上面側係配設有用來與IC晶片5 9 0之接續部5 9 2 (炎 照第6 0圖)相接續之凸起狀銷5 7 6 A。另一方面,在下面側 係配没有用來與子板(底板(subboard) )594之接續部 596 (參照第60圖)相接續之凸起狀銷576A。該凸起狀鎖 576A係藉由銲錫575而與介層孔660以及導體線路658相 連接。另外,在該實施例中,雖然亦於子板侧配設凸起狀 銷576A,但是也可在該子板側配設與習知技術相同的槽脊。 凸起狀銷5 7 6 A為具有用來插入於I ◦晶片5 9 0之接續 部592以及子板594之接續部596的圓錐狀凸起,並係以 錯來形成。 就貫際安裝1C晶片59〇於該封裝基板51〇上參照第 61圖進仃說明。第61圖(A)係表示實際安裝前之Ic晶片, 第61圖(B)係在第60圖中之ΐί所指的凸起狀銷576A放大 圖。 如第61圖(A)所示般,選定了 IC晶片59〇之接續部 5 92與封裝基板51〇之凸起狀銷576人間的對應位置後,在But in the convex part. In the package substrate of the embodiment of the present invention, since the convex locks disposed on the substrate are connected to the connection portions of the external substrate and are connected, the stress concentration during the thermocompression bonding can be alleviated, so that the protrusions can also be designed to be capable of being When the insertion into the concave portion is actually attached to the external substrate, the pin and the mounting portion of the convex pin are cracked and damaged. In addition, even under the thermal cycle conditions of the reliability test, it is less likely to be cracked or damaged in the joint portion than the substrate on which the BGA is disposed. Hereinafter, the package substrate of the fifth embodiment and a method of manufacturing the same will be specifically described with reference to the drawings. First, the configuration of the package substrate 510 of the fifth embodiment will be described with reference to Figs. 5 and 60. Fig. 59 is a cross-sectional view showing the package substrate 510 before the IC wafer 590 device of the semiconductor component. Fig. 60 is a cross-sectional view showing the package substrate 510 in a state in which the 1C wafer 590 is mounted and mounted on a mother board (external substrate). As shown in Fig. 60, in the package substrate 510 board: 554-phase-connected-. — The configuration of the package substrate will be described in detail with reference to Fig. 59. In the package substrate 510, laminated circuit layers 580A, 580B are formed on the surface of the multilayer core substrate 530 and the surface of the inner layer 2160-2888A-PF 77 1282255. The laminated wiring layer 58A is composed of an interlayer resin insulating layer 55A on which the via hole 506 and the conductor wiring 558 are formed, and an interlayer resin insulating layer 650 in which the via hole 660 and the conductor wiring 658 are formed. Further, the laminated wiring layer 580B is composed of an interlayer resin insulating layer 550 formed with a via hole and a conductor wiring 558, and an interlayer resin insulating layer 650 formed with a via hole 660 and a conductor wiring 658. A convex pin 5 7 6 A for splicing with the splicing portion 5 9 2 of the IC chip 590 (inflammation photo 60) is disposed on the upper side. On the other hand, a convex pin 576A which is not connected to the splicing portion 596 (see Fig. 60) of the sub-board (subboard) 594 is attached to the lower side. The raised lock 576A is connected to the via hole 660 and the conductor line 658 by solder 575. Further, in this embodiment, the projection pin 576A is also disposed on the sub-plate side, but the same ridge as the prior art may be disposed on the sub-plate side. The projecting pin 5 7 6 A is a conical projection having a joint portion 596 for inserting the joint portion 592 of the I ◦ wafer 590 and the sub-plate 594, and is formed by mistake. The mounting of the 1C chip 59 on the package substrate 51 is described with reference to Fig. 61. Fig. 61(A) shows an Ic wafer before actual mounting, and Fig. 61(B) is an enlarged view of a convex pin 576A referred to in Fig. 60. As shown in Fig. 61(A), after the corresponding position between the connecting portion 5 92 of the IC chip 59 and the protruding pin 576 of the package substrate 51 is selected,
—於| 旗 I 592(第 61 圖(B))。 更進一步,就別例參照第7〇圖來說明之。在該別例 2160-2888A-PF 78 1282255 中,於子板594上形成作為接續部之通孔。在此處, 選定基板510與子板之相對位置後(第7〇圖⑴),在未加 熱狀態下將基板1G加壓以使凸起狀銷5m插人於該通孔 (接續部)596中(第70圖(B))。 在心別例中,因為係於未加熱下施行加麼時將封裝基 板之凸起狀銷576A插入於子板594側之電極(接續部596) 以使該壓合日守之應力緩和,故可防止實際安裝時凸起狀銷 以及該凸起狀銷之載置部(銲錫)575產生龜裂、破壞。此 外,因為凸起狀鎖576A與接合劑層(銲錫)575之間的接合 面積很大,故其接合強度比起習知技術之以鮮錫凸塊所形 成者更高。 參照第71圖來就凸起狀銷之實施例進行說明。凸起狀 銷576A基本上係如帛71圖⑴所示般為1支的凸起576a, 但亦可如第71圖⑹所示之凸起狀銷電般為2支以上。 在為2支以上的情形下,可將其並立配置,亦可將其以圍 繞在1支周圍的方式來配置。以凸起576a的形狀而言,可 知用如第71圖(A)所不般的圓錐狀,或採用如第71圖(上) 所示之凸起狀銷576B般的圓柱狀。 凸起狀銷576A的下面(接合面)係以平滑較佳。但是’ 在於開口部之㈣設有凹部的情形下,亦可如第71圖⑻ 所示之凸起狀鎖576D般,藉由在接合面(底面)設立鎖狀之 凸部576b來提高凸起狀銷之接合強度。 -全金丄教合〜金之 磷青銅所形成。在此處’凸起狀銷576八除了如第71圖(八) (〇、0))所示般利用ϊ種金屬或合金來形成外,也可如第 2160-2888A-PF 79 !282255 71圖(B)以及第7i圖(e)所示之凸起狀銷576B、576£般, 使用用來加強銷之強度的陶瓷577作主幹而於其上塗裝金 屬層來形成。 & 接著,就第5實施例之封裝基板的製造方法列舉一例 進行具體的說明。 封裝基板的製造 (1) 以在厚度1·且為由玻璃環氧樹脂或Βτ(雙馬來酸 酐縮亞胺三丫秦)樹脂所構成之基板53〇的兩面上層壓 18# m的銅箔532所成的鍍銅層壓板53〇A作為起始材料(第 52圖之工程(A))。首先,將該鍍銅層壓板53〇a以鑽頭鑽 洞,再施予無電解電鍍處理,並藉由依照圖案形狀進行蝕 刻而於基板530的兩面上形成内層銅圖案534以及貫穿孔 536(第52圖之工程(B))。 (2) 將已形成内層銅圖案534及貫穿孔536之基板53〇 水洗並乾燥後,藉著在氧化浴(黑化浴)上使用—在|旗 I 592 (Fig. 61 (B)). Further, an example will be described with reference to the seventh diagram. In the alternative example 2160-2888A-PF 78 1282255, a through hole as a joint portion is formed on the sub-plate 594. Here, after the relative position of the substrate 510 and the sub-board is selected (Fig. 7 (1)), the substrate 1G is pressurized in an unheated state so that the convex pin 5m is inserted into the through hole (connecting portion) 596. Medium (Fig. 70 (B)). In the case of the card, since the convex pin 576A of the package substrate is inserted into the electrode on the side of the sub-plate 594 (the joint portion 596) when the application is performed without heating, the stress of the press-fit is relaxed, so that it can be prevented. In the actual mounting, the projection pin and the mounting portion (solder) 575 of the projection pin are cracked and broken. Further, since the joint area between the boss-shaped lock 576A and the bonding agent layer (solder) 575 is large, the joint strength is higher than that of the prior art which is formed by the fresh tin bump. An embodiment of the projecting pin will be described with reference to Fig. 71. The projection pin 576A is basically a projection 576a as shown in Fig. 1 (1), but may be two or more projections as shown in Fig. 71 (6). In the case of two or more, it may be arranged side by side or may be arranged around one. In the shape of the projection 576a, it is known to have a conical shape as in Fig. 71(A) or a cylindrical shape like the convex pin 576B shown in Fig. 71 (above). The lower surface (joining surface) of the convex pin 576A is preferably smooth. However, in the case where the recessed portion is provided in the fourth portion of the opening portion, the convex portion 576b as shown in Fig. 71 (8) can be used to raise the convex portion by setting the lock-like convex portion 576b on the joint surface (bottom surface). The joint strength of the pin. - All gold 丄 丄 ~ ~ gold formed by phosphor bronze. Here, the 'bulge pin 576 eight is formed by using a metal or an alloy as shown in Fig. 71 (8) (〇, 0)), and may be as described in the 2160-2888A-PF 79 !282255 71 The convex pins 576B and 576 shown in Fig. (B) and Fig. 7i (e) are formed by using a ceramic 577 for reinforcing the strength of the pin as a trunk and coating a metal layer thereon. & Next, an example of a method of manufacturing the package substrate of the fifth embodiment will be specifically described. Manufacture of Package Substrate (1) Lamination of 18# m copper foil on both sides of a substrate 53 made of a glass epoxy resin or a yttrium (bis-malealeimide) resin A copper-clad laminate 53A formed of 532 was used as a starting material (engineering (A) of Fig. 52). First, the copper-clad laminate 53A is drilled with a drill, and then subjected to an electroless plating treatment, and an inner layer copper pattern 534 and a through hole 536 are formed on both surfaces of the substrate 530 by etching in accordance with the pattern shape. Project of Figure 52 (B)). (2) The substrate 53 having the inner layer copper pattern 534 and the through hole 536 formed is washed with water and dried, and then used in an oxidation bath (blackening bath).
NaOH(10g/l)、NaCl〇2(4〇g/i)、Na3P〇4(6g/1),在還原浴上 k用NaOH(l〇g/l)、NaM4(6g/l)之氧化—還原處理,於内 層銅圖案534及貫穿孔536的表面設立粗化層538(第52 圖之工程(C))。 (3 )將樹脂填充劑調製用之原料組合物進行混合混煉 而得到樹脂填充劑。 (4)藉著將在前述(3)中所得到的樹脂填充劑於調製後 ^ 塗〜旅1塗—旅表基—板」[的五^ 充於内層銅圖案34-内層銅圖案534之間或貫穿孔536之 内,接著於70 C下乾燥2〇分鐘,其他之面亦利用同上之NaOH (10g / l), NaCl 〇 2 (4 〇 g / i), Na3P 〇 4 (6g / 1), in the reduction bath k with NaOH (l 〇 g / l), NaM4 (6g / l) oxidation The reduction treatment is performed to form a rough layer 538 on the surface of the inner layer copper pattern 534 and the through hole 536 (work (C) of Fig. 52). (3) The raw material composition for preparing a resin filler is mixed and kneaded to obtain a resin filler. (4) By the resin filler obtained in the above (3), after the preparation, the coating of the inner layer copper pattern 34 - the inner layer copper pattern 534 Inter- or through-hole 536, then dried at 70 C for 2 〇 minutes, the other faces are also the same as above
2160-2888A-PF 80 1282255 方式而將樹脂填充劑540填充於内層銅圖案534之間或貫 穿孔536之内,並於7(rc下加熱乾燥2〇分鐘(第52圖之 工程(D)) 〇 (5) 將經上述(4)處理終了之基板530的一面藉由使用 # 600帶狀研磨紙(三共理化學製)的帶狀打磨器來進行研 磨,接著再施行拋光(buff)研磨。 然後,進行在120°c下1小時、150°C下1小時之加熱 處理以使樹脂填充劑540硬化。 (6) 在已形成導體電路之封裝基板上進行鹼性脫脂之 軟蝕刻,接著使用由氯化鈀及有機酸構成之觸媒溶液進行 處理,再賦予Pd觸媒,將該觸媒活性化之後,於由硫·酸銅 3.2xl(T2m〇l/l 、硫酸鎳 3· 9xl(T3m〇l/l 、配位劑 5.4xl(T2m〇l/l 、次磷酸鈉 3.3/10^01/1 、硼酸 5· 0x10 'mol/l及界面活性劑(日信化學工業製、surf in〇l 465)0. lg/1及pH = 9等條件所構成之無電解電鍍液中浸 泡,並於浸泡1分鐘後進行每4秒1次之縱、橫振動,以 在導體電路534以及貫穿孔536的槽脊536a之表面上設置 由Cu-Ni-P構成的針狀合金被覆層及粗化層542(第53圖 之工程(F))。粗化層542之凹凸的最大高度為3//m。 粗化層形成後’在獨氟化錫〇· 、硫代尿素 1· Omol/1、溫度35°C及ρΗ=1· 2的條件下進行Cu-Sn取代 反應’以於粗化層的表面上設置厚度為0.3#!!!之Sn層(未 ____________B1——〇_ ___ — ~-----* ··—' ,.…—.—.一.— (7 )將層間樹脂絕緣劑調製用之原料组合物攪拌混 合,而得到粘度調整成1 · 5Pa · s之層間樹脂絕緣劑(下層 2160-2888A-PF 81 1282255 用)。 、、曰=著,將無電解電鑛用接著劑調製用之原料組合物授 :°而知到粘度調整為7Pa . S之無電解電鍍用接著劑 溶液(上層用)。 、,)在則过(6)之基板530的兩面上將前述(7)中所得 1的點度為1.5Pa.s之層間樹脂絕緣劑(下層用)544於調 1隻2 4 i b守以内使用滾筒塗佈器進行塗佈,並在水平狀態 下放置20分鐘之後,於60 °C下乾燥30分鐘(前烘烤 (prebake)),接著,將前述(7)中所得到的粘度為7pa s之 感光性接著劑溶液(上層用)546於調製後24小時以内進行 塗佈,並在水平狀態下放置2〇分鐘之後,於6〇c>c下乾燥 3〇分鐘(前烘烤),即可形成厚度為% # ffl之接著劑層 550α (第53圖之工程(g))。 (9)將上述(8)中已形成接著劑層550 α之基板530的 兩面上’使已印刷有85//πιφ黑圓551a之光罩膜(photomask film)551緊密枯著,並使用超高壓水銀燈以5〇0mj/cm2進 行曝先(第5 3圖之工程(η ))。接著以dm%溶液喷洗顯影, 再進一步將該基板使用超高壓水銀燈以3〇〇〇mj/cm2進行曝 光,並藉由施予在l〇〇t下1小時、在i20°C下1小時及之 後的在150°C下3小時之加熱處理(後烘烤(postbake)), 而形成具有相當於光罩膜尺寸且精密度優異的85// _開口 (介層孔形成用開孔)48之厚度35# m的層間樹脂絕緣層(2 ........®—之工.程X丄_)丄:―另—I」—在^ „之—— 開口 548處使錫電鍍層(未圖示)部份地露出。或者,也可 在樹脂膜上利用微影或雷射來設立介層孔以當作層間樹脂 2160-2888A-PF 82 J282255 ψ 絕緣層。 19八(1〇)藉由將已形成開口 548之基板530浸潰於鉻酸中 、,刀鐘,可將存在於層間樹脂絕緣層550表面之環氧樹脂 …々子'奋解除去,並同時粗化該層間樹脂絕緣層550之表面 (第54圖之工程(J))。其後,再將所得到之基板浸潰於中 和溶液(シyY社製)後再水洗。 更進一步,於經粗面化處理(粗化深度…後之該基 板的表面上,藉著鈀觸媒(7卜于V夕製)之賦予,將觸媒 >核(未圖示)附著於層間樹脂絕緣層55〇的表面上以及介層 孔用開口 548的内壁面上。 (11)將基板浸潰在如以下所示之組成的無電解銅電鍍 水溶液中,而在粗化面全體上形成厚度為OH 之無 電解銅電鍍膜552(第54圖之工程(K))。 [無電解電鍵水溶液] EDTA 〇.08mol/l 硫酸銅 (K Ohol/l ® HCHO 0.05ffl〇l/lIn the manner of 2160-2888A-PF 80 1282255, the resin filler 540 is filled between the inner layer copper patterns 534 or through the through holes 536, and dried by heating at 7 (rc for 2 minutes (Fig. 52 (D)) (5) One side of the substrate 530 which had been subjected to the above (4) treatment was ground by a belt-shaped sander using a #600 strip-shaped abrasive paper (manufactured by Tri-Chemical Chemicals), followed by buff polishing. Then, heat treatment is performed at 120 ° C for 1 hour and 150 ° C for 1 hour to cure the resin filler 540. (6) Soft etching by alkaline degreasing on a package substrate on which a conductor circuit has been formed, followed by use It is treated with a catalyst solution composed of palladium chloride and an organic acid, and then a Pd catalyst is added, and after the catalyst is activated, it is 3.2xl (T2m〇l/l, nickel sulfate 3·9xl). T3m〇l/l, complexing agent 5.4xl (T2m〇l/l, sodium hypophosphite 3.3/10^01/1, boric acid 5.0·10x10 'mol/l and surfactant (made by Nissin Chemical Industry, surf in 〇l 465)0. Immersion in electroless plating solution consisting of conditions such as lg/1 and pH = 9, and immersing for 1 minute, then performing vertical and horizontal every 4 seconds. Vibrating, a needle-shaped alloy coating layer made of Cu-Ni-P and a roughened layer 542 are provided on the surface of the conductor circuit 534 and the land 536a of the through hole 536 (work (F) of Fig. 53). The maximum height of the concavities and convexities of the layer 542 is 3/m. After the formation of the rough layer, it is carried out under the conditions of bismuth monofluoride hydride, thiourea 1·Omol/1, temperature 35° C., and ρΗ=1·2. Cu-Sn substitution reaction 'to provide a Sn layer with a thickness of 0.3#!!! on the surface of the roughened layer (not ____________B1——〇_ ___ — ~------* ··-', . . . (1) The raw material composition for preparing the interlayer resin insulating agent was stirred and mixed to obtain an interlayer resin insulating agent having a viscosity adjusted to 1.25 Pa·s (for the lower layer 2160-2888A-PF 81 1282255).曰 着 , , , 将 将 将 将 将 将 将 将 将 将 将 将 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料 原料On both sides of the substrate 530 of (6), the interlaminar resin insulating agent (for the lower layer) 544 having the degree of 1 obtained in the above (7) of 1.5 Pa.s is used to adjust the use of the roller within 1 2 ib. The cloth was coated, and after standing for 20 minutes in a horizontal state, it was dried at 60 ° C for 30 minutes (prebake), and then, the viscosity obtained in the above (7) was 7 Pa s. The adhesive solution (upper layer) 546 is applied within 24 hours after preparation, and is allowed to stand in a horizontal state for 2 minutes, and then dried at 6 ° C > c for 3 minutes (pre-baking) to form The adhesive layer 550α having a thickness of % #ffl (engineering (g) of Fig. 53). (9) The photomask film 551 on which the 85//πιφ black circle 551a has been printed is closely dried on both sides of the substrate 530 on which the adhesive layer 550α has been formed in the above (8), and the super-use is used. The high pressure mercury lamp is exposed at 5 〇 0 mj/cm 2 (engineering (η ) of Fig. 5). Then, it was spray-developed with a dm% solution, and the substrate was further exposed at 3 〇〇〇mj/cm 2 using an ultrahigh pressure mercury lamp, and was applied at 1 Torr for 1 hour at i20 ° C for 1 hour. And subsequent heat treatment (postbake) at 150 ° C for 3 hours to form an 85// _ opening (opening for forming a via hole) having an excellent precision corresponding to the size of the mask film. Interlayer resin insulation layer of thickness 38# m (2.....®—Working. X丄_) 丄: “Alternative—I”—in the opening 548 of the tin The plating layer (not shown) is partially exposed. Alternatively, a via hole or a laser may be used on the resin film to form a via hole as an interlayer resin 2160-2888A-PF 82 J282255 ψ insulating layer. 1)) by immersing the substrate 530 having the opening 548 in chromic acid, the gutta-percha, the epoxy resin present on the surface of the interlayer resin insulating layer 550 can be removed and simultaneously roughened. The surface of the interlayer resin insulating layer 550 (work (J) in Fig. 54). Thereafter, the obtained substrate was immersed in a neutralizing solution (manufactured by シyY Co., Ltd.) and then washed with water. Further, on the surface of the substrate after the roughening treatment (the roughening depth...), the catalyst > nuclei (not shown) are attached by the palladium catalyst (7 于 V V )) The surface of the interlayer resin insulating layer 55 is on the inner wall surface of the opening 548 for the via hole. (11) The substrate is immersed in an electroless copper plating aqueous solution having the composition shown below, and is on the entire roughened surface. An electroless copper plating film 552 having a thickness of OH is formed (engineering (K) of Fig. 54) [aqueous solution of electroless electrophoresis] EDTA 〇.08 mol/l copper sulfate (K Ohol/l ® HCHO 0.05ffl〇l/l
Na0H 〇. 05mol/l -聯二比咬 80mg/1 (a , a J -bipyridy 1 ) PEG 0.10g/l [無電解電鍍條件] —溫—度_.6—5—C—之-液—體-2ϋ—分鐘 ,a— —.— _______________________— * ———-——_______ _______________________________________________________ (12)在上述(11)中所形成之無電解銅電鍍膜gw上貼 上市售的感光性乾膜(dry film),接著安裝幕罩(mask), 2160-2888A-PF 83 1282255 再以lOOmJ/cm進行曝光,並以〇·8%碳酸鈉進行顯影處 理,而設置厚度15 // m之電鍍光阻554(第54圖之 ^ 不王C L ) )〇 (13)接著,在未形成光阻之部份施行以下條件之電解 銅電鍍,而形成厚度電解銅電鍍膜556(第/5圖 之工程(Μ))。 [電解電鍍水溶液] 硫酸 硫酸銅Na0H 〇. 05mol/l - bis 2 bite 80mg/1 (a , a J -bipyridy 1 ) PEG 0.10g / l [electroless plating conditions] - temperature - degree _.6 -5 - C - - liquid - Body-2ϋ-minute, a-.._____________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________ Dry film), then install the mask, 2160-2888A-PF 83 1282255 and expose it at 100mJ/cm, and develop it with 〇·8% sodium carbonate, and set the plating resistance of 15 // m thickness. 554 (Fig. 54 ^ 不王CL) ) 〇 (13) Next, electrolytic copper plating is performed on the portion where no photoresist is formed, and a thickness electrolytic copper plating film 556 is formed (the construction of the fifth drawing ( Μ)). [electrolytic plating aqueous solution] sulfuric acid copper sulfate
2.24mol/l 〇.26mol/l Japan製,商品名力八5〉卜、、 HL) 添加劑(7卜于7夕 19.5ml/1 [電解電鐘條件] 1 λ/ am 時間 65分2.24mol/l 〇.26mol/l made of Japan, the product name is eight VIII> Bu, HL) Additives (7 Bu in 7 eve 19.5ml / 1 [Electrical clock conditions] 1 λ / am time 65 minutes
溫度 22±2〇C (14) 將電鍍光阻554以5% K〇H剝離去除後,再將該 鍍光阻下之無電解鋼電鍍膜52以硫酸與過氧化氯之混 液施行㈣處理而溶解去除,而形成由無電解銅電鍍膜 電解銅電鑛膜所構成之厚度為18㈣的導體線路㈣以 介層孔560(第55圖之工程(n))。 (15) 進行與(6)相同步驟之處理’而形成由十 成之粗化面562,並更進—步在其表面進行Sn取代U 圖之工程⑽。此外,也可不利用電鍍合金而改以㈣/ (16) 藉由反覆操作上述⑺〜⑽之製程以進:步: 上層之導體線路658以及介層孔66Q(導體電路),而得! 2160-2888A-PF 84 1282255 多層印刷線路基板(第55圖之工程(p))。但是,此處並不 進行Sn取代。 (17) 另一方面,將溶解於DMDG之60重量%的甲酚酚 酸固形物型環氧樹脂(曰本化藥製)其環氧基5〇%丙烯化之 賦予感光性的寡聚物(oligomer)(分子量4000)46.67克、 溶解於曱基乙基甲酮(methyl ethyl ketone)之80重量% 的雙酚A型環氧樹脂(油化〉X儿製,EPC〇AT1〇〇1)15. 〇 克、咪唑硬化劑(四國化成製,2E4MZ-CN)1. 6克、感光性 單體之多價丙烯單體(曰本化藥製,r6〇4)3克、同類型多 價丙烯單體(共榮社化學製,DPE6A)1. 5克以及分散系消泡 劑(女> y / a公司製,S — 6 5) 0 · 71克相混合,再進一步 於該混合物中加入作為光引發劑之二苯甲酮(關東化學 製)2克及作為感光劑之米蚩酮(關東化學製)〇, 2克,即可 得到钻度在25°C下調整為2· OPa · s之銲錫光阻組合物。 (18) 在上述(16)中所得到之多層線路基板的兩面上將 上述銲錫光阻組合物以之厚度進行塗佈。其次,在 進行完於7 0 °C下2 〇分鐘及於7 0 °C下30分鐘之乾燥處理 後’使描繪有圓圖案(pattern)(幕罩圖案)且厚度為5mm之 光罩膜(未圖示)緊密粘著而固定,再以1〇〇〇mJ/cm2之紫外 線進行曝光,並進行DMTG顯影處理。然後再更進一步以 80°C下1小時、loo^下}小時、12〇t:下!小時以及15〇 C下3小日^·之條件下施行加熱處理之後,形成了以鮮錫腳 ^ ^p 5 7^ ^ ^ p ^ 200 //ΙΠ)之銲錫光阻層(厚度2〇/zm)57〇(第π圖之工程 ⑻)。 2160-2888A-PF 85 1282255 η ‘ 、(19)其次,在銲錫光阻膜570的開口部571上將用來 作為接著材層的錫/鉛=4: 6之銲錫575藉由幕罩印刷而以 M/zm的厚度來形成(第56圖之工程(R))。 另方面,將利用42合金所形成的凸起狀銷576A以 未圖示之銷立起用冶具加以支持。把銲劑^化“塗佈於開 口部571内之後,藉著將支持該凸起狀銷576A之冶具抵接 於封裝基板側之狀態下而進行再熔銲(ref low),以使該凸 起狀銷576A與銲錫575相連接,而得到具有突起狀金屬銷 瞻之封裝基板510(第57圖)。 (第1改變例) 基本上而言與第5實施例完全相同,但於開口部内施 予金屬層。 由(1)〜(18 )為止皆與第5實施例相同而形成具有開口 571之銲錫光阻570 (第58圖之工程(Q))。 (1 9)其次’將該已於銲錫光阻層上施予開口部之基板 浸潰於由氣化鎳30g/l、次磷酸鈉10g/l及檸檬酸鈉1〇g/1 修 所橼成的PH=5之無電解鎳電鍍液中2 〇分鐘,而在開口部 上形成厚度5//m之錄電鐘層572。接著,再將該基板530 在93 C的條件下浸潰於由氰化金卸2g/l、氯化銨75g/i、 檸檬酸鈉50g/l及次磷酸鈉10g/l所構成之無電解金電錄 液中23秒,以在鎳電鍍層572上形成厚度為〇 〇3#m之金 電鍍層574(第58圖之工程(R))。 C2 〇〇.^ ^ ^ im—來—ϋ—m 1膜一《開 ψ 部 5 71 的接著材層之錫/鉛=4 : 6的銲錫575利用幕罩印刷而以 18//m的厚度來形成。 2160-2888A-PF 86 1282255 另-方面,將利用42合金所形成的凸起狀銷5m以 未圖示之銷立起用冶具加以支持。把銲劑塗佈於開口部 内之後,藉著將支持該凸起狀銷576A之冶具抵接於封裝基 板側之狀態下於200t:進行再熔銲以使兩者相連接,而得 到具有突起狀金屬銷之封裝基板51〇(第59圖)。 于 (第2改變例) 基本上而έ與第5實施例相同,但於各開口部571的 周圍設立4處凹部。 由(1)〜(17)為止皆與第5實施例完全相同。 (18)在上述(16)中所得到之多層線路基板1〇的兩面 上將上述銲錫光阻組合物570以2〇//[11之厚度進行塗佈(第 62圖之工程(A))。其次,在進行完於几它下2〇分鐘及於 70 C下30分鐘之乾燥處理後,使用來形成開口部與開口部 周圍之凹部之描繪有圓圖案(幕罩圖案)且厚度為5_之1 罩膜(未圖不)緊密粘著而固定,再以5〇〇mJ/cm2之紫外線 進行曝光,而於開口部之周圍設立凹部571b(第62圖之工 程(B))。其後,使用來形成開口部之描緣有圓圖案(幕罩圖 案)且厚度為5mm之光罩膜(未圖示)緊密粘著而固定,再以 lOOOmJ/cm2之紫外線進行曝光,並進行mtg顯影處理。然 後再更進-步以8(TCT 1小時、i〇(rcT J小時、12〇tT 1、小時以及15Gt下3小時之條件下施行加熱處理之後,形 成了以銲錫腳位部份(包含介層孔及其槽脊部份)作為開口 個規定處設立有直徑10,m、深度10//m之凹部57ib的銲 錫光阻層(厚度20/^ 111)570(第62圖之工程(c))。 2160-2888A-PF 87 1282255 (丨9)其次,將用來作為銲錫光阻膜57〇之開口部 的接著材層之錫/鉛=4: 6的銲錫575利用幕罩印刷而以 18#m的厚度來形成(第63圖之工程(D))。 ”—另一方面’將利用42合金所形成的凸起狀銷576D(參 以弟Ή圖(D))以未圖示之鎖立起用冶具加以支持。抱鲜劑 ㈣於開口部571内之後,藉著將支持該凸起狀鎖576D之 冶具抵接於封|基板側之狀態下進行再熔銲以使兩者相連 接’而得到具有突起狀金屬鎖之封裝基板51G(第63圖工 程(E))。 (第3改變例) 基本上而言與第2改變例相同,但如第64圖所示般於 開口部5Π内施予金屬層。該金屬層之構成與第ι改變例 相同,係由鎳層572、金電鍍層574所形成。 (第4改變例) 基本上而言與第 作為金屬層之鋁層。 相同。 1改變例相同,但係於開口部内施予 (1)〜(18)之步驟皆與第i改變例完全 (19)針對在銲錫光出 1联DiU上形成有開口部571之某 板5 3 0,於開口部e 71 、 、、 斤路出的導體線路658以及介層孔 6 6 0上以賤錢之方式报士、 '形成4#m的鋁層672(第65圖之工程 C A) ) 〇 在開 邛5 71之鋁層6 7 2上加入銀銲;j ~ (-B A g 二 8 ) 5 7 -5—C—0 ·—1 夯,并▲ —之際(第65圖之工3 (B ))將以鈷作成之Λj 珉之凸起狀銷576A裝上壓合以Temperature 22±2〇C (14) After the plating resist 554 is peeled off by 5% K〇H, the electroless steel plating film 52 under the light blocking resistance is treated by a mixture of sulfuric acid and chlorine peroxide. The solution is dissolved and removed, and a conductor line (4) having a thickness of 18 (four) composed of an electroless copper plating film is formed to form a via hole 560 (working item (n) of Fig. 55). (15) The process of the same step as (6) is performed to form a roughened surface 562 of 10,000, and the process of performing a Sn-substituting U map on the surface thereof is further advanced (10). In addition, instead of using the plating alloy, the process of (7) to (10) may be repeated by the operation of the above steps (7) to (10) to: step: the upper conductor track 658 and the via hole 66Q (conductor circuit), and get 2160- 2888A-PF 84 1282255 Multilayer printed circuit board (Project (p) of Figure 55). However, Sn substitution is not performed here. (17) On the other hand, a 60% by weight cresol phenolic acid solid type epoxy resin (manufactured by Sakamoto Chemical Co., Ltd.) dissolved in DMDG is acrylized with 5 〇% of an epoxy group to impart photosensitivity oligomers. (oligomer) (molecular weight: 4000) 46.67 g, 80% by weight of bisphenol A epoxy resin dissolved in methyl ethyl ketone (oiled > X, EPC 〇 AT1 〇〇 1) 15. gram, imidazole hardener (4E4MZ-CN), 6 grams, multi-valent propylene monomer of photosensitive monomer (made by 曰本化制药, r6〇4) 3 grams, the same type The propylene monomer (manufactured by Kyoeisha Chemical Co., Ltd., DPE6A) 1. 5 g and the dispersion defoamer (female > y / a company, S - 6 5) 0 · 71 g of the mixture, further to the mixture 2 g of benzophenone (manufactured by Kanto Chemical Co., Ltd.) as a photoinitiator and rice ketone (manufactured by Kanto Chemical Co., Ltd.) as a sensitizer were added, and 2 g was obtained, and the obtained degree of drilling was adjusted to 2 at 25 ° C. OPa · s solder resist composition. (18) The solder resist composition is applied to both surfaces of the multilayer wiring board obtained in the above (16). Next, after finishing the drying treatment at 70 ° C for 2 及 minutes and at 70 ° C for 30 minutes, a photomask film having a circular pattern (curtain pattern) and having a thickness of 5 mm was formed ( It is fixed by being adhered tightly, and is exposed to ultraviolet rays of 1 〇〇〇mJ/cm 2 and subjected to DMTG development treatment. Then go further at 80 ° C for 1 hour, loo ^ under } hours, 12 〇 t: down! After the heat treatment was carried out under the conditions of 5 hours and 15 hours under 15 ° C, a solder resist layer (thickness 2 〇 / thick tin foot ^ ^ p 5 7 ^ ^ ^ p ^ 200 / ΙΠ) was formed. Zm) 57〇 (the work of the πth figure (8)). 2160-2888A-PF 85 1282255 η ', (19) Next, the tin/lead=4:6 solder 575 used as the adhesive layer on the opening 571 of the solder resist film 570 is printed by the mask It is formed in the thickness of M/zm (engineering (R) of Fig. 56). On the other hand, the projecting pin 576A formed of the 42 alloy is supported by a pin-up tool (not shown). After the flux is applied to the opening 571, reflow welding (ref low) is performed by abutting the tool supporting the projecting pin 576A against the package substrate side to make the bump The pin 576A is connected to the solder 575 to obtain a package substrate 510 having a protruding metal shape (Fig. 57). (First modification) Basically, it is completely the same as the fifth embodiment, but is applied to the opening. The metal layer is formed from (1) to (18) in the same manner as in the fifth embodiment to form a solder resist 570 having an opening 571 (engineering (Q) of Fig. 58). (1 9) Secondly, The substrate applied to the solder resist layer is immersed in an electroless nickel having a pH of 5, which is composed of 30 g/l of vaporized nickel, 10 g/l of sodium hypophosphite, and 1 g/l of sodium citrate. 2 minutes in the plating solution, and a recording clock layer 572 having a thickness of 5/m was formed on the opening portion. Then, the substrate 530 was immersed in a condition of 93 C at 2 g/l of gold cyanide. An electroless gold electroplating liquid composed of ammonium chloride 75 g/i, sodium citrate 50 g/l and sodium hypophosphite 10 g/l was used for 23 seconds to form a gold having a thickness of 〇〇3#m on the nickel plating layer 572. Electricity Layer 574 (Project (R) of Fig. 58.) C2 〇〇.^ ^ ^ im-来—ϋ—m 1 Membrane “The tin/lead of the adhesive layer of the opening part 5 71 = 4: 6 solder 575 is formed by a mask printing and is formed to have a thickness of 18/m. 2160-2888A-PF 86 1282255 In addition, the projecting pin 5m formed of the 42 alloy is supported by a pin-up tool (not shown). After the flux is applied to the opening, the mold is supported by the mold supporting the projecting pin 576A at a position of 200 t: re-welding to connect the two, thereby obtaining a protrusion. The package substrate 51 of the metal pin (Fig. 59). (Second modification) Basically, the same as the fifth embodiment, but four recesses are provided around each opening 571. From (1) to (1) 17) It is the same as that of the fifth embodiment. (18) The solder resist composition 570 is applied to the surface of the multilayer wiring substrate 1A obtained in the above (16) at a thickness of 2 Å//[11]. Coating (Project (A) of Fig. 62). Secondly, after drying for 2 minutes and 30 minutes at 70 C, it is used to form an opening. The concave portion around the opening and the recessed portion are drawn with a circular pattern (the mask pattern) and have a thickness of 5 _ 1 (not shown), which is closely adhered and fixed, and then exposed to ultraviolet rays of 5 〇〇 mJ/cm 2 . A concave portion 571b is formed around the opening portion (engineering (B) in Fig. 62). Thereafter, a mask film having a circular pattern (mask pattern) and a thickness of 5 mm is formed to form an opening portion (not shown) It is shown that it is closely adhered and fixed, and exposed to ultraviolet rays of 1000 mJ/cm 2 and subjected to mtg development treatment. Then, after further stepping into the step of 8 (TCT 1 hour, i 〇 (rcT J hour, 12 〇 tT 1, hour and 15 Gt under 3 hours), the solder pin portion (including The layer hole and its land portion) is a solder resist layer (thickness 20/^111) 570 having a recessed portion 57ib having a diameter of 10, m and a depth of 10/m as a predetermined portion (the work of Fig. 62 (c) ))) 2160-2888A-PF 87 1282255 (丨9) Next, the solder 575 which is used as the adhesive layer of the opening portion of the solder resist film 57 is tin/lead=4:6, which is printed by the mask. The thickness of 18#m is formed (the engineering (D) of Fig. 63). "On the other hand, the convex pin 576D formed by the 42 alloy (refer to the drawing (D)) is not shown. The lock is erected and supported by the metallurgical tool. After the retaining agent (4) is placed in the opening 571, the refinishing is performed by abutting the tool supporting the convex lock 576D against the sealing plate side to make the two phases The package substrate 51G having a protruding metal lock is obtained by connecting '(Fig. 63 (E)). (Third modification) Basically, it is the same as the second modification, but as shown in Fig. 64 A metal layer is applied to the opening 5A. The metal layer is formed of a nickel layer 572 and a gold plating layer 574 in the same manner as the first modification. (Fourth modification) Basically, the first metal is used. The aluminum layer of the layer is the same. 1 The modification is the same, but the steps of applying (1) to (18) in the opening are all complete with the ith modification (19) for forming an opening on the solder diode 1 DiU A plate 530 of the portion 571, on the opening portion e 71 , , the conductor line 658 from the jinji road and the via hole 6 6 0, is used as a money-saving method to form a 4#m aluminum layer 672 ( Figure 65, Project CA)) 银 Add silver solder on the aluminum layer 6 7 2 of the opening 5 71; j ~ (-BA g 2 8 ) 5 7 -5-C-0 · -1 夯, and ▲ — At the time of the work (Fig. 65, work 3 (B)), the convex pin 576A made of cobalt is attached and pressed.
封裝基板(第65圖之工程(〇)。 2160-2888A-PF 88 1282255 ψ , (弟5改變例) 基本上而言與第5實施例相同,但在接著材層中係使 用銅作為金屬粒子,此外,又係使用聚亞胺樹脂作為熱可 塑性樹脂。(1)〜(18)之步驟皆與第1改變例完全相同。 (19) 接著材係使用金屬粒子與熱可塑樹脂所作成。金 屬粒子之銅係以直徑1 # m與直徑0 · 6 // m之球狀來成形。 將已成形之銅粒子以直徑1 # in與直徑〇· 6 // m之調配比為 3 : 1所調製成之物質作為熱可塑性樹脂,並於聚醚亞胺樹 _ 脂中以不使產生凝結之方式攪拌之,以成形為填充率85 % 、直徑 50 // m、厚度 10 /z m 之薄片(tablet)675。 (20) 將已成形之薄片675插入開口部571内之後(第 6 6圖之工程(A))’以2 0 0 °C加熱基板,其後再將以録作成 之凸起狀銷576A裝上壓合以相接合,即得封裝基板(第65 圖之工程(B))。 (第6改變例) 基本上而a與弟3改變例相同,但在金屬層中係利用 春 銅-錫取代反應來形成錫層。此外,在接著材層中係使用無 機粒子、作為熱硬化性樹脂之二氧化矽、環氧樹脂。(丨)〜(i 6) 之步驟皆與弟5貫施例完全相同。 (17) 在銲錫光阻層形成前,先於導體電路之粗化層上 利用錫取代來形成0·3//πι之錫層。 (18) 另一方面,將溶解於DMDG之β〇重量%的甲酚酚 -〜--醛善形I垂恭氧I脂Cl本化藥111嚴農―基舰1魅冬 賦予感光性的募聚物(分子量4000)46· 67克、溶解於甲基 乙基甲酮之80重量%的雙酚A型環氧樹脂(油化〉工儿 2160-2888A-PF 89 1282255 製,EPCOATl001 )15. 0克、咪唑硬化劑(四國化成製, 2E4MZ-CN)1· 6克、感光性單體之多價丙烯單體(日本化藥 製’ R604)3克、同類型多價丙烯單體(共榮社化學製, DPE6A)1.5克以及分散糸消泡劑(廿 > 夕7^公司製,$ — 6 5) 0 · 71克相混合,再進一步於該混合物中加入作為光引 發劑之二苯曱酮(關東化學製)2克及作為感光劑之米蚩酮 (關東化學製)0 · 2克,即可得到粘度在2 5 °C下調整為 2. OPa · s之銲錫光阻組合物。 此外’粘度測定則使用B型粘度計(東京計器,DVL-B 型),在60rpm之情形下係使用轉子(rot〇r)N〇. 4,而在6rpm 之情形下係使用轉子(rotor)No. 3。 (19)在上述(17)中所得到之多層線路基板的兩面上將 上述銲錫光阻組合物570以20//m之厚度進行塗佈(第67 圖之工程(A))。其次,在進行完於7〇χ:τ 2〇分鐘及於7〇 C下30分鐘之乾燥處理後,使描繪有圓圖案(幕罩圖案) 且厚度為5mm之光罩膜(未圖示)緊密粘合而固定,再以 100Ora J/cffl2之紫外線進行曝光,並進行dmTG顧影處理。然 後再更進一步以8(TC下1小時、100t:T }小時、12(rc下 1小時以及150°c下3小時之條件下施行加熱處理之後,形 成了以銲錫腳位部份(包含介層孔及其槽脊部份)作為開口 571(開口徑200 //m)之銲錫光阻層(厚度2〇//m)57〇(第67 圖之工程(B))。 ——(如表 —63 來形成2個直徑50/zm、深度15//m之凹部571b(第67圖 之工程(C))。 2160-2888A-PF 90 1282255 (21)接著材係利用無機粒子與熱硬化性樹脂來作成。 無機粒子之二氧切係以直徑之多角形狀來成形。將 已成形之無機粒子浸泡在鎳電鑛液中,以於無機粒/的表 層塗裝上鎳層。將已塗裝上錄之無機粒子加入作為敎硬化 性樹脂之環氧樹脂中,並以不使產生凝結之方式授拌之, 以作成填充率90% ,再於不讓空氣進入的情形下裝入於裝 瓶法(potting)用之瓶(p〇t)内。 ' (22)藉由裝瓶法,將上述接著材575])插入於開口部 571内(第68圖之工程(D))。接著加熱之後,再把以鈷作 成之凸起狀鎖576D裝上並於20(TC下硬化接合,即可得封 裝基板(第68圖之工程(E))。 (苐7改變例) 基本上而a與第1改變例相同,但係如第6 9圖(A)所 示般施以鎳電鍍572當作金屬層,且未施行金電鍍。凸起 肖5 7 6 A ’係使用内部以始作成且在表層藉由金電鏡而塗 裝上金者。 (第8改變例) 基本上而言與第1改變例相同,但係如第71圖(E)所 不般’所得到的封裝基板之凸起狀銷576E係使用内部以陶 竟7 7成形且在表層以鎳、銅施行塗裝者。 (第9改變例) 參照第72圖以及第73圖就第9改變例之封裝基板進 在該第9改變例中係使用如第71圖(F)的側面及底面 所不之凸起狀銷57 6F。在此處,該凸起狀銷576F係於底 2160-2888A~Pf 91 ,1282255 面形成5支之凸起576b。首先,在如第72圖(A)所示之封 裝基板的銲錫光阻5 7 0上設立開口部5 71,並在該開口部 571内設立可連通到導體電路658之凹部571b(第72圖 (B))。其次,在該開口部571内設立由鎳等構成之金屬層 573(第72圖(〇),更進一步,再於該金屬層573之上設立 由銲錫等構成的接著劑層575(第73圖(D))。最後,將凸 起狀銷576F收納於該開口部571内。 在該第9改變例中,由於不僅經由開口部571、還藉 由凹部571b而與導體電路658取得電氣上之接續,故就算 疋對於大容量之電氣、電氣信號也不會故障,而能將其傳 達至外部基板。 (第10改變例) 基本上而言與第5實施例相同,但在銲錫層係使用錫, 銻。 (比較例) 基本上而言與第5實施例相同,但係將來自開口部的 電極成形為銲錫球,再實際裝上Ic晶片。 針對以上在第5實施例〜第8改變例與比較例中所製造 的封裝基板’就其接合強度、外部基板實裳後之拉伸試驗 C有無信賴性之試驗)、電極之淼列 $蚊龜裂、損&之發生等進行比 較,其結果如第74圖之圖表中所示。 由第 只卜弟8改變例之結果可看出,直接人強^ 以上 ^在#賴性试驗或熱循環條件下 未見電極之龜裂、損壞。 人人循Package substrate (Project of Fig. 65 (〇). 2160-2888A-PF 88 1282255 ψ , (Variation 5 modified example) Basically the same as the fifth embodiment, but copper is used as the metal particle in the subsequent layer Further, a polyimide resin is used as the thermoplastic resin. The steps (1) to (18) are all the same as those of the first modification. (19) The material is then made of metal particles and a thermoplastic resin. The copper of the particles is formed by a spherical shape with a diameter of 1 # m and a diameter of 0 · 6 // m. The ratio of the diameter of the formed copper particles to the diameter #·6 // m is 3:1. The prepared substance is used as a thermoplastic resin, and is stirred in a polyether imide tree so as not to cause coagulation to form a sheet having a filling rate of 85%, a diameter of 50 // m, and a thickness of 10 /zm ( Tablet) 675. (20) After the formed sheet 675 is inserted into the opening portion 571 (the engineering (A) of Fig. 6), the substrate is heated at 200 ° C, and then the projection is recorded as a projection. The pin 576A is press-fitted to be joined, that is, the package substrate is obtained (the work (B) of Fig. 65). (6th modification) The above is the same as the modified example of the younger brother, but the tin layer is formed by a spring copper-tin substitution reaction in the metal layer. Further, inorganic particles, cerium oxide as a thermosetting resin, and the like are used in the adhesive layer. The steps of epoxy resin (丨)~(i 6) are exactly the same as those of the fifth embodiment. (17) Before the formation of the solder resist layer, the tin is replaced by tin on the roughened layer of the conductor circuit to form 0. ·3//πι tin layer. (18) On the other hand, the cresol phenol which is dissolved in DMDG by weight of 〇 - 〜 醛 醛 醛 醛 垂 垂 垂 垂 垂 垂 111 ― ― ― ― ― ― ― ― The base ship 1 charm winter gives a photosensitive polymer (molecular weight 4000) 46 · 67 grams, 80% by weight of bisphenol A epoxy resin dissolved in methyl ethyl ketone (oilification > work 2160-2888A - PF 89 1282255, EPCOATl001) 1. 0 g, imidazole hardener (manufactured by Shikoku Chemical Co., Ltd., 2E4MZ-CN) 1. 6 g, multivalent propylene monomer of photosensitive monomer ("604" manufactured by Nippon Kasei Co., Ltd.)克, the same type of multivalent propylene monomer (Kyoeisha Chemical, DPE6A) 1.5 grams and disperse 糸 defoamer (廿 > 夕 7 ^ company system, $ — 6 5) 0 · 71 grams mixed, Further, 2 g of benzophenone (manufactured by Kanto Chemical Co., Ltd.) as a photoinitiator and 0. 2 g of ketone (manufactured by Kanto Chemical Co., Ltd.) as a sensitizer are added to the mixture to obtain a viscosity at 25 ° C. Adjusted to 2. OPa · s solder resist composition. In addition, the viscosity measurement uses a B-type viscometer (Tokyo gauge, DVL-B type), at 60 rpm, the rotor (rot〇r) N〇. 4, and in the case of 6 rpm, a rotor No. 3 is used. (19) The solder resist composition 570 is applied to the both sides of the multilayer wiring board obtained in the above (17) at a thickness of 20 / / m (the item (A) of Fig. 67). Next, after finishing the drying process of 7 〇χ: τ 2 〇 minutes and 30 minutes at 7 〇 C, a mask film (not shown) having a circular pattern (mask pattern) and having a thickness of 5 mm was formed. It is tightly bonded and fixed, and exposed to ultraviolet light of 100°ra J/cffl2, and subjected to dmTG treatment. Then, further heat treatment is performed under conditions of 8 (1 hour under TC, 100t: T} hour, 12 (1 hour under rc, and 3 hours at 150 °c), and the solder pin portion is formed. The layer hole and its land portion) are used as the solder resist layer (thickness 2〇//m) of the opening 571 (opening diameter: // //m) 57〇 (the engineering (B) of Fig. 67). Table - 63 to form two recesses 571b having a diameter of 50/zm and a depth of 15/m (engineering (C) of Fig. 67). 2160-2888A-PF 90 1282255 (21) The subsequent use of inorganic particles and thermal hardening A dioxic system of inorganic particles is formed in a polygonal shape of a diameter. The formed inorganic particles are immersed in a nickel electro-mineral liquid to apply a nickel layer to the inorganic particles/surface layer. The inorganic particles loaded are added to the epoxy resin as a bismuth curable resin, and are mixed without causing condensation to form a filling rate of 90%, and then loaded into the container without allowing air to enter. In the bottle for potting (p〇t). ' (22) The above-mentioned material 575] by the bottling method is inserted into the opening 571 (Fig. 68) After the heating (C), the convex lock 576D made of cobalt is attached and hardened at 20 (TC) to obtain a package substrate (Project (E) of Fig. 68). 7 Modified Example) Basically, a is the same as the first modified example, but nickel plating 572 is applied as a metal layer as shown in Fig. 6 (A), and gold plating is not performed. A ' is the one that is internally used and painted on the surface by a gold electron microscope. (8th modification) Basically, it is the same as the first modification, but it is not as shown in Fig. 71 (E). The convex pin 576E of the obtained package substrate is formed by using the inside to be formed by ceramics and coated with nickel or copper on the surface layer. (Nineth modification) Referring to Fig. 72 and Fig. 73, In the ninth modification, the convex pin 57 6F which is not the side surface and the bottom surface of Fig. 71 (F) is used. Here, the convex pin 576F is attached to the bottom. 2160-2888A~Pf 91 , 1282255 surface is formed with 5 protrusions 576b. First, an opening portion 5 71 is formed on the solder resist 507 of the package substrate as shown in Fig. 72(A), and is opened there. A recess 571b (Fig. 72(B)) that can be connected to the conductor circuit 658 is provided in the portion 571. Next, a metal layer 573 made of nickel or the like is formed in the opening 571 (Fig. 72 (〇), and further, Further, an adhesive layer 575 made of solder or the like is formed on the metal layer 573 (Fig. 73(D)). Finally, the convex pin 576F is housed in the opening 571. In the ninth modification Since the conductor circuit 658 is electrically connected not only through the opening 571 but also by the recess 571b, it can be transmitted to the external substrate even if the electrical and electrical signals of a large capacity are not broken. (Tenth Modification) Basically, it is the same as that of the fifth embodiment, but tin and antimony are used for the solder layer. (Comparative Example) Basically, it is the same as that of the fifth embodiment, but the electrode from the opening is formed into a solder ball, and the Ic wafer is actually mounted. With respect to the above-described package substrates of the fifth to eighth modified examples and the comparative examples, the joint strength was tested, and the tensile test C of the external substrate was tested for reliability. The occurrence of cracks, damages, and the like were compared, and the results are shown in the graph of Fig. 74. It can be seen from the results of the change of the first Budi 8 that the direct person is stronger than the above. ^The crack and damage of the electrode are not observed under the condition of the regression test or the thermal cycle. Everyone
2160-2888A-PF 92 •1282255 ♦〈第6實施例〉2160-2888A-PF 92 • 1282255 ♦ <6th embodiment>
就第6實施例之封裝基板參照第75圖來進行說明。 在該多層印刷線路板10中,係於模芯基板3()的表面 及裡面形成疊合線路層80U、80D。該疊合線路層8〇u、8〇D 係由形成有介層孔46的下層層間樹脂絕緣層5〇、形成有 上層介層孔66的上層層間樹脂絕緣層6〇以及在上層層間 樹脂絕緣層6〇上所形成的銲錫光阻層7〇所構成。藉由該 — 銲錫光阻7〇的開口部71,在上側之介層孔66上形成IC | 片(未圖示)接績用之銲錫凸塊(外部接續端子)了6,並在 下側之;1層孔6 6上連接子板(未圖示)接續用之導電性接 續銷(外部接續端子)78。 在第6實施例中,連接該疊合線路層8〇u、8〇d之貫穿 孔3 6係以貝通模芯基板3 〇以及下層層間樹脂絕緣層$ 〇之 方式來形成。在該貫穿孔36中填充樹脂填充劑54,並在 汗 1 P配w又覆蓋電鍍5 8。同樣地,於下層層間樹脂絕緣層 50上所形成的介層孔46上填充樹脂填充劑,並在開口 | 部配設覆蓋電鍍5 8。 ^在第6實施例中,以貫通模芯基板30以及下層層間樹 脂絕緣層50之方式利用鑽頭或雷射來穿設貫通孔以形成 貫穿孔36,並在貫穿孔36的正上方形成介層孔66。藉此, 可使貝牙孔36與介層孔66呈直線狀而縮短線路長度,並 因而提高信號的傳送速度。此外,由於貫穿孔36與連接外 --78)^^ M fi 係直接相連接’故接續信賴性非常優異。特別是在第6實 施例卜由於係先將填充於貫穿孔36中之填充劑54藉由The package substrate of the sixth embodiment will be described with reference to Fig. 75. In the multilayer printed wiring board 10, laminated wiring layers 80U, 80D are formed on the surface and inside of the core substrate 3 (). The laminated wiring layer 8〇u, 8〇D is composed of a lower interlayer resin insulating layer 5〇 formed with a via hole 46, an upper interlayer resin insulating layer 6〇 formed with an upper via hole 66, and a resin insulating layer in the upper layer. The solder resist layer 7 formed on the layer 6 is formed. By the opening portion 71 of the solder resist 7 turns, a solder bump (external connection terminal) for IC chip (not shown) is formed on the upper via hole 66, and is on the lower side. A 1-layer hole 6 6 is connected to a conductive connection pin (external connection terminal) 78 for connecting a sub-board (not shown). In the sixth embodiment, the through holes 36 connecting the laminated wiring layers 8〇u and 8〇d are formed in such a manner as the Beton core substrate 3 〇 and the lower interlayer resin insulating layer 〇. The through-hole 36 is filled with a resin filler 54 and covered with electroplating 5 8 in the sweat. Similarly, the via hole 46 formed on the lower interlayer resin insulating layer 50 is filled with a resin filler, and a cap plating 5 is disposed at the opening portion. In the sixth embodiment, a through hole is formed by a drill or a laser so as to penetrate the core substrate 30 and the lower interlayer resin insulating layer 50 to form a through hole 36, and a via layer is formed directly above the through hole 36. Hole 66. Thereby, the bead hole 36 and the via hole 66 can be linearly shortened to shorten the line length, and thus the signal transmission speed can be improved. Further, since the through hole 36 is directly connected to the connection -78), the reliability is excellent. In particular, in the sixth embodiment, the filler 54 filled in the through hole 36 is first used.
2160-2888A-PF 93 J282255 鵷 / 研磨而平坦化之後再配設被覆該填充劑54的覆蓋電鍍(導 體層)58並於其上形成介層孔66,故貫穿孔%表面的平滑 性报高,同時該貫穿孔36與介層孔66之間的接續信賴性 也很優異。 此外,在第β實施例之多層印刷線路板中,由於貫穿 孔36與下層之介層孔46係利用相同的填充樹脂w來填充 之且係同時將該填充樹脂54施行研磨而使其平坦化,故其 構成可很便宜’又因為上述構成能使貫穿孔内與介層孔内 _ 之強度保持均-,故亦可提高多層印刷線路板之信賴性。 另外、由於係先將填充於介層孔46中之填充劑54藉由研 磨而平坦化之後再配設被覆該填充劑54的覆蓋電鍍(導體 θ )58並於其上开> 成上層介層孔66,故下層介層孔46表面 的平滑性很高,同時該下層介層孔46與上層介層孔66之 間的接續信賴性也很優異。 為了在下側之介層孔66上固定導電性接續銷,故 口又立錫/銻、錫/銀、錫/銀/銅等之銲錫層77。 【圖式簡單說明】 第1圖(a)、第1圖(b)、第!圖(c)及第!圖(d)係本 發明第1實施例之封裝基板的製造工程圖。 +第2圖(a)、第2圖(b)、第2圖(幻及第2圖(d)係第 1貫施例之封裝基板的製造工程圖。 ——3 WUc)A^ 3 (d)#^g 1見施例之封裝基板的製造工程圖。 第4圖(a)、第4圖(b)、第4圖(C)及第4圖(d)係第 2160-2888A-PF 94 ,1282255 ♦ ·· 1實施例之封裝基板的製造工程圖。 第5圖係第i實施例之封裝基板的製造工程圖。 第6圖係第1實施例之封裝基板的製造工程圖。 第7圖係第1實施例之封裝基板的製造工程圖。 第8圖係在第7圖中導電性接續銷與腳位相接續部份 之放大剖面圖。 第9圖(A)所示係第1實施例之別例1的剖面圖,第g 圖(B)係第9圖(A)之B箭頭方向直視圖。 • 第10圖係第1實施例之第2改變例的封裝基板剖面 圖。 第11圖係第2改變例之別例1的剖面圖。 第12圖(A)係第2改變例之別例2所示的封裝基板的 腳位部份剖面圖,第12圖。)係第12圖(人)之6箭頭方向 直視圖。 第13圖(A)係第2改變例之別例3所示之封裝基板的 腳位部份剖面圖,第13圖⑻係第12圖⑴之b箭頭方向 • 直視圖。 第14圖係第2改變例之別{列4的剖面圖。 第15圖係第3改變例之封裝基板的剖面圖。 第16圖係第3改變例之別例}的剖面圖。 第Π圖係第3改變例之別例2的剖面圖。 A弟18圖係第1實施例之改變例的封裝基板評價結果示 ---------------------------思—圖—表—〇 ,一一---- -— ---------------------------— 第19圖係第2實施例^裝基板的製造:程圖:-一 第2。圖係第2實施例之封裝基板的剖面圖。2160-2888A-PF 93 J282255 鹓/ After polishing and planarization, a cap plating (conductor layer) 58 covering the filler 54 is disposed and a via hole 66 is formed thereon, so that the smoothness of the surface of the through-hole is high. At the same time, the connection reliability between the through hole 36 and the via hole 66 is also excellent. Further, in the multilayer printed wiring board of the seventh embodiment, the through hole 36 and the lower via hole 46 are filled with the same filling resin w, and the filling resin 54 is simultaneously polished and planarized. Therefore, the composition can be made very cheaper. Moreover, since the above configuration can maintain the strength of the inside of the through hole and the inside of the via hole, the reliability of the multilayer printed wiring board can be improved. In addition, since the filler 54 filled in the via hole 46 is first planarized by polishing, then the cap plating (conductor θ) 58 covering the filler 54 is disposed and opened thereon. Since the layer holes 66 are provided, the smoothness of the surface of the lower interlayer holes 46 is high, and the connection reliability between the lower interlayer holes 46 and the upper via holes 66 is also excellent. In order to fix the conductive connecting pin on the lower via 66, a solder layer 77 such as tin/germanium, tin/silver, tin/silver/copper is formed. [Simple description of the diagram] Figure 1 (a), Figure 1 (b), and the first! Figure (c) and the first! Figure (d) is a manufacturing drawing of the package substrate of the first embodiment of the present invention. +Fig. 2(a), Fig. 2(b), Fig. 2 (phantom and Fig. 2(d) are manufacturing drawings of the package substrate of the first embodiment. - 3 WUc) A^ 3 ( d) #^g 1 See the manufacturing drawing of the package substrate of the embodiment. Fig. 4(a), Fig. 4(b), Fig. 4(C), and Fig. 4(d) are the 2160-2888A-PF 94, 1282255 ♦ · 1 embodiment of the package substrate manufacturing drawings . Fig. 5 is a manufacturing drawing of the package substrate of the i-th embodiment. Fig. 6 is a manufacturing drawing of the package substrate of the first embodiment. Fig. 7 is a manufacturing drawing of the package substrate of the first embodiment. Fig. 8 is an enlarged cross-sectional view showing the portion where the conductive connecting pin and the pin are connected in Fig. 7. Fig. 9(A) is a cross-sectional view showing an alternative example 1 of the first embodiment, and Fig. g(B) is a straight view in the direction of the arrow B of Fig. 9(A). Fig. 10 is a cross-sectional view showing a package substrate of a second modification of the first embodiment. Fig. 11 is a cross-sectional view showing another example 1 of the second modification. Fig. 12(A) is a cross-sectional view showing the pin portion of the package substrate shown in the second example of the second modification, Fig. 12. ) Figure 12 is a straight view of the arrow direction of Figure 6. Fig. 13(A) is a cross-sectional view showing the pin portion of the package substrate shown in the third example of the second modification, and Fig. 13(8) is the arrow direction of Fig. 12(1)b. Figure 14 is a cross-sectional view of the second modification (column 4). Fig. 15 is a cross-sectional view showing a package substrate of a third modification. Fig. 16 is a cross-sectional view showing an alternative example of the third modification. The figure is a cross-sectional view of the second example of the third modification. A brother 18 shows the evaluation results of the package substrate of the modified example of the first embodiment--------------------------- thought-graph-table -〇,一一-------------------------------- - Figure 19 is the second embodiment of the substrate Manufacturing: Cheng Tu: - a second. The drawing is a cross-sectional view of a package substrate of a second embodiment.
2160-2888A—PF 1282255 續銷與腳位相接續部 第21圖係在第20圖中導電性接 份之放大剖面圖。2160-2888A—PF 1282255 Renewal and Pinion Connections Figure 21 is an enlarged cross-sectional view of the conductive interface in Figure 20.
第22圖係帛2實施例之別例中封裝基板的剖面 ^ 23圖係第2實施例之第1改變例中封裝基板 圖。 的剖面 之別例1中封 24圖(Α)之β 第24圖(A)係第2實施例之第!改變例 裝基板的腳位部份剖面圖,第24圖(β)係第 箭頭方向直視圖。 第25圖(Α)係第2實施例之篦! # μ 例之弟1改變例之別例2中封 剖面㈣25圖⑻係第25圖(Α)之Β 前頭方向直視圖。 圖 第2 6圖係第2實施例之第1改 第27圖係第2實施例之第2改 變例之別例3的剖面圖。 變例之封裝基板的剖面 第28圖係第2實施例之第2改變例之別例i的剖面圖。 第2 9圖係第2實施例之第2改變例之繼的剖面圖。 130 ® ^ J 2^ Μ ^ ^ # t % ^ 不意圖表。 第31圖係第3實施例之封裝基板的製造工程圖。 第32圖係第3實施例之封裝基板的剖面圖。 第33圖⑴係在第32圖中導電性接續鎖與腳位相接續 口 1M刀之放大剖面圖’第33圖(B)係導電性接續銷之變形例 s_氣级—面—圖」— ^—_________ 第34圖係第3實施例之第7^變例^別例^的封裝基 板剖面圖。 2160-2888A-PF 96 4 ^282255 第3 5圖係第3實施例之第1改變例的封裝基板剖面 圖0 第36圖(A)係第3實施例之第1改變例之別例1的封 裳基板腳位部份剖面圖,第36圖(B)係第36圖(A)之B箭 頭方向直視圖。 第37圖(A)係第3實施例之第1改變例之別例2的封 裝基板腳位部份剖面圖,第37圖(B)係第37圖(A)之β箭 頭方向直視圖。Fig. 22 is a cross-sectional view of a package substrate in another example of the second embodiment. Fig. 23 is a view showing a package substrate in a first modification of the second embodiment. The cross section of the first example is shown in Fig. 24 (Fig. 24). Fig. 24 (A) is the second embodiment! Change the cross-sectional view of the pin portion of the mounting substrate, and Fig. 24 (β) is a straight view in the direction of the arrow. Figure 25 (Α) is the second embodiment! # μ Example of the brother 1 change example of the exception 2 seal section (four) 25 diagram (8) is the 25th diagram (Α) Β front direction straight view. Fig. 26 is a first modification of the second embodiment. Fig. 27 is a cross-sectional view showing a third example of the second modification of the second embodiment. Cross section of the package substrate of the modification Fig. 28 is a cross-sectional view showing another example i of the second modification of the second embodiment. Fig. 29 is a cross-sectional view showing a second modification of the second embodiment. 130 ® ^ J 2^ Μ ^ ^ # t % ^ Unintentional chart. Fig. 31 is a manufacturing drawing of the package substrate of the third embodiment. Figure 32 is a cross-sectional view showing a package substrate of a third embodiment. Figure 33 (1) is an enlarged cross-sectional view of the 1M knife of the conductive joint lock and the foot in the 32nd figure. Figure 33 (B) is a modified example of the conductive joint pin s_gas-surface-graph"- ^—_________ Figure 34 is a cross-sectional view of the package substrate of the seventh embodiment of the third embodiment. 2160-2888A-PF 96 4 ^ 282255 FIG. 5 is a cross-sectional view of a package substrate according to a first modification of the third embodiment. FIG. 36 is a third example of the first modification of the third embodiment. A cross-sectional view of the foot of the cover plate, Fig. 36 (B) is a straight view of the direction of the arrow B of Fig. 36 (A). Fig. 37(A) is a cross-sectional view showing the pin portion of the package substrate of the second example of the first modification of the third embodiment, and Fig. 37(B) is a perspective view of the arrow arrow direction of Fig. 37(A).
第38圖(Α)、第38圖(Β)係第3實施例之第i改變例 之別例3的剖面圖。 圖 第39圖係第3實施狀第2改變例之封裝基板 圖係第3實施例之第2改變例之別例^剖面圖 :41圖係第3實施例之第2改變例之別例2的剖面圖 示意圖Γ。圖係第3實施例之各改變例的封裝基板評價結為 圖係第4實施例之封穿美 第45圖 丁放基板的製造工程圖。 第46㈣實施例之封裳基板的剖面圖。 弟46圖係第4實施例之第丨 圖。 弟1改變例之封裝基板的剖面 在第46圖中導電性接續鎖與腳位相接續 』分—之杳i|—面圖 第48圖係第 弗4灵鈿例之第2改 部 圖 變例之封裝基板的剖面Fig. 38 (Α) and Fig. 38 (Β) are sectional views of another example 3 of the ith modification of the third embodiment. FIG. 39 is a second embodiment of the third embodiment of the third embodiment, and a second modification of the third embodiment is a cross-sectional view: FIG. 41 is a second example of the second modification of the third embodiment. Schematic diagram of the section view. The package substrate evaluation of each modification of the third embodiment is shown in Fig. 4 is a block diagram of the fourth embodiment. A cross-sectional view of the sealing substrate of the 46th (fourth) embodiment. Figure 46 is a diagram of the fourth embodiment. The cross section of the package substrate of the modified example of the first embodiment is shown in Fig. 46. The conductive connection lock and the pin are connected to each other. 分 杳 | | | | | | | | | 第 第 第 第 第 第 第 4 4 4 4 4 4 4 4 4 4 4 4 4 4 Profile of the package substrate
2160-2888A-PF 97 1282255 第49圖係在第48圖中導電性接續銷與腳位相接續部 份之放大剖面圖。 第5 0圖係第4實施例之平坦層平面圖。 第51圖係第4實施例之封裝基板評價結果示意圖表。 第52圖(A)、第52圖(B)、第52圖(C)及第52圖⑻ 係第5實施例之封裝基板的製造工程圖。 第53圖⑻、第53圖⑺、第53圖⑻及第53圖⑻ 係第5實施例之封裝基板的製造工程圖。 第54圖⑴、第54圖⑴、第54圖⑴及第54圖⑴ 係苐5貫施例之封裝基板的製造工程圖。 第55圖(M)、第55圖(N)、第55圖(〇)及第55圖(?) 係第5貫施例之封裝基板的製造工程圖。 第56圖(Q)及第56圖(1〇係第5實施例之封裝基板的 製造工程圖。 第5 7圖係苐5實施例之封裝基板的剖面圖。 第58圖(Q)、第58圖(“及第58圖(幻係第5實施例 之第1政變例之封裝基板的製造工程圖。 第59圖係第5實施例之第i改變例之封裝基板的剖面 圖。 第60圖係在第5實施例之封裝基板上安裳晶片之 狀態剖面圖。 第61圖(A)係第5實施例之IC晶片剖面圖,第μ圖 U JI 部放大圖。_________________ 第62圖U)、第62圖(B)及第62圖(c)係第5實施例 之第2改變例之封装基板的製造工程圖。 2160-2888A-PF 98 I282255 第63圖(D)及第63圖(E)係第5實施例之第2改變例 之封裝基板的製 造工程圖。 第6 4圖係第5貫施例之第3改變例之封裝基板的製造 工程圖。 —第65圖(A)、第65圖(B)及第65圖(c)係第5實施例 之第4改變例之封裝基板的製造工程圖。 苐6 6圖(A)及弟6 6圖(B)係第5實施例之第5改變例 之封裝基板的製 造工程圖。 第67圖(A)、第67圖(B)及第67圖(C)係第5實施例 之第6改變例之封裝基板的製造工程圖。 第68圖(D)及第68圖(E)係第5實施例之第6改變例 之封裳基板的製 造工程圖。 第69圖(A)係第5實施例之第7改變例之封裝基板的 ^面圖’苐6 9圖(B)係第5實施例之第8改變例之封裝基 板的剖面圖。 第7 0圖(A)及第7 0圖(B)係第5實施例之改變例之封 裝基板的製造工程圖。 弟71圖(A)、第71圖(B)、第71圖(C)、第71圖(D)、 第71圖(E)及第71圖(F)係關於第5實施例之各實施例之 凸起狀銷的說明圖。 第72圖(A)、第72圖(B)及第72圖(C)係第5實施例 之第9改變例之封裝基板的製造工程圖。 一〜第〜71圖丄ΡΛΙΙ屬丄EJ 第5實施例之第g改變例 之封裝基板的製造工程圖。 苐7 4圖係第5實施例以及比較例之封裝基板的試驗結 2160-2888A-PF 99 W2255 果示意圖表。 第75圖係第6實 、Μ列之封裝基板的剖面圖 第76圖係習知技術 [主要元件符號說明】 1〜板芯基板; 2a〜樹脂層; 3〜電鍍光阻; 4a〜粗面; 6〜介層孔用開口; 8〜銅箔; 9 a〜粗面; Π〜粗化層; 13〜通電電鍍膜; 15〜有機樹脂絕緣層 16 a〜延伸部; 16 c〜信號線; 18〜開口部; 21〜平坦層; 21b〜接續部份; 3 4〜内層銅圖案; 4 6〜介層孔; ---------二層」[榭』|息缘層; 5 8〜電艘; 66〜内層導體層· 之封裝基板的剖面圖。 2〜樹脂絕緣層; 2b〜樹脂層; 4〜導體層; 5〜導體層; 7〜介層孔; 9〜貫穿孔; 10〜樹脂填充材, 12〜無電解電鍍膜; 〜鎳電鍍膜; 1β〜腳位; 16b〜本體部; 17〜銲錫膏; 19〜金屬膜; 2 la〜導體未形成部份; 30〜模芯基板; 36〜貫穿孔; 50〜下層層間樹脂絕緣層2160-2888A-PF 97 1282255 Fig. 49 is an enlarged cross-sectional view showing the connection portion of the conductive connecting pin and the pin in Fig. 48. Fig. 50 is a plan view of the flat layer of the fourth embodiment. Fig. 51 is a schematic diagram showing the results of evaluation of the package substrate of the fourth embodiment. Fig. 52 (A), Fig. 52 (B), Fig. 52 (C) and Fig. 52 (8) are manufacturing drawings of the package substrate of the fifth embodiment. Fig. 53 (8), Fig. 53 (7), Fig. 53 (8), and Fig. 53 (8) are manufacturing drawings of the package substrate of the fifth embodiment. Fig. 54 (1), Fig. 54 (1), Fig. 54 (1), and Fig. 54 (1) A manufacturing drawing of a package substrate according to a fifth embodiment. Fig. 55 (M), Fig. 55 (N), Fig. 55 (〇), and Fig. 55 (?) are manufacturing drawings of the package substrate of the fifth embodiment. Fig. 56 (Q) and Fig. 56 (Fig. 5 is a manufacturing drawing of the package substrate of the fifth embodiment. Fig. 5 is a sectional view of the package substrate of the embodiment of Fig. 5. Fig. 58 (Q), 58 (" and Fig. 58 (manufacture drawing of the package substrate of the first embodiment of the fifth embodiment of the phantom system). Fig. 59 is a cross-sectional view of the package substrate of the ith modification of the fifth embodiment. Figure 7 is a cross-sectional view showing a state in which a wafer is mounted on a package substrate of a fifth embodiment. Fig. 61(A) is a cross-sectional view of the IC wafer of the fifth embodiment, and an enlarged view of the U JI portion of Fig. _________________ Fig. 62 62, (B) and 62 (c) are manufacturing drawings of the package substrate of the second modification of the fifth embodiment. 2160-2888A-PF 98 I282255 Fig. 63 (D) and Fig. 63 (E) is a manufacturing drawing of the package substrate of the second modification of the fifth embodiment. Fig. 6 is a manufacturing drawing of the package substrate of the third modification of the fifth embodiment. - Fig. 65 (A) Fig. 65(B) and Fig. 65(c) are diagrams showing the manufacturing process of the package substrate of the fourth modification of the fifth embodiment. 苐6 6 (A) and 6 6 (B) 5th modification of the embodiment Fig. 67(A), Fig. 67(B) and Fig. 67(C) are diagrams showing the manufacturing process of the package substrate of the sixth modification of the fifth embodiment. (D) and (E) are the manufacturing drawings of the sealing substrate of the sixth modification of the fifth embodiment. Fig. 69(A) shows the packaging substrate of the seventh modification of the fifth embodiment. FIG. 6 is a cross-sectional view of a package substrate according to an eighth modification of the fifth embodiment. FIGS. 7(A) and 7(0) are modifications of the fifth embodiment. Manufacturing drawings of the package substrate. Brother 71 (A), 71 (B), 71 (C), 71 (D), 71 (E) and 71 (F) Fig. 72(A), Fig. 72(B) and Fig. 72(C) are packages of a ninth modification of the fifth embodiment. [Manufacturing drawing of the substrate] The structure of the package substrate of the modification of the fifth embodiment of the fifth embodiment is the manufacturing process of the package substrate of the fifth embodiment of the fifth embodiment. Test knot 2160-2888A-PF 99 W2255 fruit diagram. Figure 75 is a cross-sectional view of a package substrate of the sixth and the array. Fig. 76 is a conventional technique [description of main components] 1 to a core substrate; 2a to a resin layer; 3 to electroplating photoresist; 4a to rough surface; 6~interlayer opening; 8~copper foil; 9 a~rough surface; Π~roughened layer; 13~electroplated film; 15~organic resin insulating layer 16 a~extension; 16 c~signal line; ~ opening portion; 21~ flat layer; 21b~ contiguous portion; 3 4~ inner layer copper pattern; 4 6~ via hole; --------- two layer" [榭] | 8 to electric boat; 66 to inner conductor layer · a cross-sectional view of the package substrate. 2~resistive insulating layer; 2b~resin layer; 4~conductor layer; 5~conductor layer; 7~ via hole; 9~through hole; 10~resin filler, 12~electroless plating film; 1β~foot position; 16b~ body part; 17~ solder paste; 19~ metal film; 2 la~ conductor unformed part; 30~ core substrate; 36~through hole; 50~ lower interlayer resin insulation layer
MrjjtJ旨填充劑;________________________ 6〇〜銲錫凸塊; 7 0〜銲锡光阻層;MrjjtJ is a filler; ________________________ 6〇~ solder bumps; 7 0~ solder resist layer;
2160-2888A-PF 100 12822552160-2888A-PF 100 1282255
7 6〜鮮錫凸塊; 78〜導電性接續銷; 80U〜疊合線路層; 91〜槽脊; 1 01〜固定部; 103〜蜂腰部; 120〜導電性接續銷; 131〜封裝基板; 133〜封裝基板; 135〜封裝基板; 137〜封裝基板; 139〜封裝基板; 231〜封裝基板; 233〜封裝基板; 235〜封裝基板; 237〜封裝基板; 330〜封裝基板; 332〜封裝基板; 334〜封裝基板; 336〜封裝基板; 338〜封裝基板; 4 3 2〜封裝基板; 5丄0〜封裝—基板; 530A〜鍍銅層壓板; 534〜内層銅圖案; 7 7〜鮮錫層; 80D〜疊合線路層; 90〜導體層; 100〜導電性接續銷; 102〜柱狀接續部; 110〜導電性接續銷; 130〜封裝基板; 132〜封裝基板; 134〜封裝基板; 136〜封裝基板; 138〜封裝基板; 230〜封裝基板; 232〜封裝基板; 234〜封裝基板; 236〜封裝基板; 238〜封裝基板; 331〜封裝基板; 333〜封裝基板; 335〜封裝基板; 337〜封裝基板; 431〜封裝基板; 433〜封裝基板; 5 3 Q〜多―層模芯基板; 532〜銅箔; 536〜貫穿孔;7 6~ fresh tin bumps; 78~ conductive connecting pins; 80U~ laminated circuit layers; 91~ lands; 1 01~ fixed parts; 103~ bee waist; 120~ conductive connecting pins; 131~ package substrates; 133~ package substrate; 135~ package substrate; 137~ package substrate; 139~ package substrate; 231~ package substrate; 233~ package substrate; 235~ package substrate; 237~ package substrate; 330~ package substrate; 332~ package substrate; 334~ package substrate; 336~ package substrate; 338~ package substrate; 4 3 2~ package substrate; 5丄0~ package-substrate; 530A~ copper-plated laminate; 534~ inner copper pattern; 7 7~ fresh tin layer; 80D~ superimposed wiring layer; 90~ conductor layer; 100~ conductive connecting pin; 102~column connecting portion; 110~ conductive connecting pin; 130~ package substrate; 132~ package substrate; 134~ package substrate; Package substrate; 138~ package substrate; 230~ package substrate; 232~ package substrate; 234~ package substrate; 236~ package substrate; 238~ package substrate; 331~ package substrate; 333~ package substrate; 335~ package substrate; A mounting substrate; 431~ package substrate; 433~ package substrate; 5 3 Q~ multi - layer of the core substrate; 532~ foil; 536~ through hole;
2160-2888A-PF 101 J2822552160-2888A-PF 101 J282255
5 3 8〜粗化層; 5 4 2〜樹脂填充劑, 5 4 8〜開口; 550〜層間樹脂絕緣層; 551〜光罩膜; 552〜無電解銅電鍍膜; 556〜電解銅電鍍膜; 570〜銲錫光阻層; 57lb〜凹部; 574〜金電鍍層; 5 7 5 C〜銀銲材; 576A〜凸起狀銷; 576B〜凸起狀銷; 576C〜凸起狀銷; 576E〜凸起狀銷; 577〜陶瓷; 580B〜疊合線路層; 592〜接續部; 596〜接續部; 650〜層間樹脂絕緣層; 6 6 0〜介層孔; 675〜薄片; T1-6〜腳位」 72卜固定部; 752〜層間樹脂絕緣層。 540〜樹脂填充劑; 544〜層間樹脂絕緣劑; 546〜感光性接著劑溶液; 550 α〜接著劑層; 5 51 a〜黑圓; 554〜電鍍光阻; 558〜導體線路; 571〜開口部; 572〜鎳層; 575〜接著劑層; 575D〜接著材; 576a〜凸起; 576b〜凸部; 576D〜凸起狀銷; 576F〜凸起狀銷; 580A〜疊合線路層; 590〜1C晶片; 5 9 4〜子板; 630〜鑽頭; 658〜導體線路; 6 7 2〜铭層; 710〜導電性接續銷; 717〜導電性接著1; 722〜接續部;5 3 8~ roughened layer; 5 4 2~ resin filler, 5 4 8~ opening; 550~ interlayer resin insulating layer; 551~mask film; 552~electroless copper plating film; 556~ electrolytic copper plating film; 570~ solder resist layer; 57lb~ recess; 574~ gold plating; 5 7 5 C~ silver solder; 576A~ bump pin; 576B~ bump pin; 576C~ bump pin; 576E~ convex Lifting pin; 577~ ceramic; 580B~ laminated circuit layer; 592~ connection part; 596~ connection part; 650~ interlayer resin insulation layer; 6 6 0~ interlayer hole; 675~ sheet; 72b fixing portion; 752~ interlayer resin insulating layer. 540~resin filler; 544~interlayer resin insulating agent; 546~photosensitive adhesive solution; 550α~adhesive layer; 5 51 a~black circle; 554~electroplated photoresist; 558~ conductor line; 571~opening 572~nickel layer; 575~adhesive layer; 575D~substrate; 576a~protrusion; 576b~protrusion; 576D~bully pin; 576F~bully pin; 580A~superimposed circuit layer; 1C wafer; 5 9 4~ daughter board; 630~ drill bit; 658~ conductor line; 6 7 2~ Ming layer; 710~ conductive connection pin; 717~ conductivity followed by 1; 722~ connection;
2160-2888A-PF 1022160-2888A-PF 102
Claims (1)
Applications Claiming Priority (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP35703998A JP2000183532A (en) | 1998-12-16 | 1998-12-16 | Printed wiring board |
JP3461699 | 1999-01-04 | ||
JP9765099 | 1999-04-05 | ||
JP9764999 | 1999-04-05 | ||
JP9764899 | 1999-04-05 | ||
JP10429499 | 1999-04-12 | ||
JP23193299A JP2000353775A (en) | 1999-01-04 | 1999-08-18 | Conductive connecting pin and package substrate |
JP23193199A JP4554741B2 (en) | 1999-01-04 | 1999-08-18 | Package substrate |
JP23193499A JP4458582B2 (en) | 1999-01-04 | 1999-08-18 | Package substrate |
JP23193399A JP4480207B2 (en) | 1999-01-04 | 1999-08-18 | Resin package substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200610457A TW200610457A (en) | 2006-03-16 |
TWI282255B true TWI282255B (en) | 2007-06-01 |
Family
ID=37565513
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094140779A TWI282255B (en) | 1998-12-16 | 1999-12-15 | Conductive connecting pin and package board |
TW88121979A TWI252719B (en) | 1998-12-16 | 1999-12-15 | Conductive connecting pin and package board |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW88121979A TWI252719B (en) | 1998-12-16 | 1999-12-15 | Conductive connecting pin and package board |
Country Status (1)
Country | Link |
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TW (2) | TWI282255B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102881672A (en) * | 2011-07-14 | 2013-01-16 | 南亚电路板股份有限公司 | Electronic component and pin thereof |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4881211B2 (en) * | 2007-04-13 | 2012-02-22 | 新光電気工業株式会社 | Wiring substrate manufacturing method, semiconductor device manufacturing method, and wiring substrate |
TWI636710B (en) * | 2017-03-21 | 2018-09-21 | 欣興電子股份有限公司 | Circuit board stacked structure and method for manufacturing the same |
US10950535B2 (en) | 2017-05-09 | 2021-03-16 | Unimicron Technology Corp. | Package structure and method of manufacturing the same |
US10178755B2 (en) | 2017-05-09 | 2019-01-08 | Unimicron Technology Corp. | Circuit board stacked structure and method for forming the same |
US10685922B2 (en) | 2017-05-09 | 2020-06-16 | Unimicron Technology Corp. | Package structure with structure reinforcing element and manufacturing method thereof |
-
1999
- 1999-12-15 TW TW094140779A patent/TWI282255B/en not_active IP Right Cessation
- 1999-12-15 TW TW88121979A patent/TWI252719B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102881672A (en) * | 2011-07-14 | 2013-01-16 | 南亚电路板股份有限公司 | Electronic component and pin thereof |
Also Published As
Publication number | Publication date |
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TW200610457A (en) | 2006-03-16 |
TWI252719B (en) | 2006-04-01 |
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