TWI282066B - Apparatus and method for extending data modes in a microprocessor - Google Patents

Apparatus and method for extending data modes in a microprocessor Download PDF

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Publication number
TWI282066B
TWI282066B TW91124005A TW91124005A TWI282066B TW I282066 B TWI282066 B TW I282066B TW 91124005 A TW91124005 A TW 91124005A TW 91124005 A TW91124005 A TW 91124005A TW I282066 B TWI282066 B TW I282066B
Authority
TW
Taiwan
Prior art keywords
extended
microprocessor
instruction
prefix
operand
Prior art date
Application number
TW91124005A
Inventor
G Glenn Henry
Rodney E Hooker
Terry Parks
Original Assignee
Ip First Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US10/227,008 priority Critical patent/US7395412B2/en
Application filed by Ip First Llc filed Critical Ip First Llc
Application granted granted Critical
Publication of TWI282066B publication Critical patent/TWI282066B/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30185Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode

Abstract

An apparatus and method are provided for extending a microprocessor instruction set beyond its current capabilities to allow for extended size operands specifiable by programmable instruction in the microprocessor instruction set. The apparatus includes translation logic and extended execution logic. The translation logic translates an extended instruction into corresponding micro instructions for execution by the microprocessor. The extended instruction has an extended prefix and an extended prefix tag. The extended prefix specifies an extended operand size for an operand corresponding to a prescribed operation, where the extended operand size cannot be specified by an existing instruction set. The extended prefix tag indicates the extended prefix, where the extended prefix tag is an otherwise architecturally specified opcode within the existing instruction set. The extended execution logic is coupled to the translation logic. The extended execution logic receives the corresponding micro instruction and performs the prescribed operation using the operand.
TW91124005A 2002-03-08 2002-10-18 Apparatus and method for extending data modes in a microprocessor TWI282066B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/227,008 US7395412B2 (en) 2002-03-08 2002-08-22 Apparatus and method for extending data modes in a microprocessor

Publications (1)

Publication Number Publication Date
TWI282066B true TWI282066B (en) 2007-06-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW91124005A TWI282066B (en) 2002-03-08 2002-10-18 Apparatus and method for extending data modes in a microprocessor

Country Status (2)

Country Link
CN (1) CN1218243C (en)
TW (1) TWI282066B (en)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7181596B2 (en) 2002-02-12 2007-02-20 Ip-First, Llc Apparatus and method for extending a microprocessor instruction set
US7529912B2 (en) 2002-02-12 2009-05-05 Via Technologies, Inc. Apparatus and method for instruction-level specification of floating point format
US7315921B2 (en) 2002-02-19 2008-01-01 Ip-First, Llc Apparatus and method for selective memory attribute control
US7328328B2 (en) 2002-02-19 2008-02-05 Ip-First, Llc Non-temporal memory reference control mechanism
US7546446B2 (en) 2002-03-08 2009-06-09 Ip-First, Llc Selective interrupt suppression
US7395412B2 (en) 2002-03-08 2008-07-01 Ip-First, Llc Apparatus and method for extending data modes in a microprocessor
US7373483B2 (en) 2002-04-02 2008-05-13 Ip-First, Llc Mechanism for extending the number of registers in a microprocessor
US7380103B2 (en) 2002-04-02 2008-05-27 Ip-First, Llc Apparatus and method for selective control of results write back
US7302551B2 (en) 2002-04-02 2007-11-27 Ip-First, Llc Suppression of store checking
US7380109B2 (en) 2002-04-15 2008-05-27 Ip-First, Llc Apparatus and method for providing extended address modes in an existing instruction set for a microprocessor
US7532722B2 (en) 2003-04-18 2009-05-12 Ip-First, Llc Apparatus and method for performing transparent block cipher cryptographic functions
US8060755B2 (en) 2003-04-18 2011-11-15 Via Technologies, Inc Apparatus and method for providing user-generated key schedule in a microprocessor cryptographic engine
CN1661958B (en) 2004-03-15 2010-04-28 威盛电子股份有限公 Microprocessor apparatus of block cryptographic functions and method
US7519833B2 (en) 2003-04-18 2009-04-14 Via Technologies, Inc. Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine
US7900055B2 (en) 2003-04-18 2011-03-01 Via Technologies, Inc. Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms
US7529368B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent output feedback mode cryptographic functions
TWI247241B (en) * 2003-09-29 2006-01-11 Ip First Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7536560B2 (en) 2003-04-18 2009-05-19 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic key size
US7539876B2 (en) 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7392400B2 (en) 2003-04-18 2008-06-24 Via Technologies, Inc. Microprocessor apparatus and method for optimizing block cipher cryptographic functions
US7529367B2 (en) 2003-04-18 2009-05-05 Via Technologies, Inc. Apparatus and method for performing transparent cipher feedback mode cryptographic functions
US7844053B2 (en) 2003-04-18 2010-11-30 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7925891B2 (en) 2003-04-18 2011-04-12 Via Technologies, Inc. Apparatus and method for employing cryptographic functions to generate a message digest
US7502943B2 (en) 2003-04-18 2009-03-10 Via Technologies, Inc. Microprocessor apparatus and method for providing configurable cryptographic block cipher round results
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
US7542566B2 (en) 2003-04-18 2009-06-02 Ip-First, Llc Apparatus and method for performing transparent cipher block chaining mode cryptographic functions
US20090031110A1 (en) 2007-07-24 2009-01-29 Via Technologies Microcode patch expansion mechanism

Also Published As

Publication number Publication date
CN1218243C (en) 2005-09-07
CN1431584A (en) 2003-07-23

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