TWI281368B - PCB drill method - Google Patents

PCB drill method Download PDF

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Publication number
TWI281368B
TWI281368B TW94118786A TW94118786A TWI281368B TW I281368 B TWI281368 B TW I281368B TW 94118786 A TW94118786 A TW 94118786A TW 94118786 A TW94118786 A TW 94118786A TW I281368 B TWI281368 B TW I281368B
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Taiwan
Prior art keywords
copper
layer
pattern
dielectric layer
opening
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TW94118786A
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Chinese (zh)
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TW200644747A (en
Inventor
Hung-En Hsu
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Nan Ya Printed Circuit Board C
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Publication of TWI281368B publication Critical patent/TWI281368B/en

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Abstract

The present invention is a PCB drill method. The method comprises providing a core layer comprises the copper foil circuit and the aimed point formed on the core layer, a dielectric film formed on the core layer, the copper layer formed on the dielectric film. The method further comprises removing the copper layer, providing a light illuminates to find out the aimed point and the copper foil circuit, to form an open on the dielectric film above the copper foil circuit.

Description

1281368 九、發明說明: 【發明所屬之技術領域】 本發明係提供-印刷電路板之製作方法,尤指一種以雷 射對位進行印刷電路板的銅窗製程。 【先前技術】 印刷電路板是將零件與零件之間複雜的㈣電路,統整 在-塊板子上,以提供電子零元件在安裝與互連時的主要 支撐體,是所有電子産品不可或缺的基礎零件。 由於印刷電路板的電路越趨複雜,高密度互連(High Density Imerconnection;画)技術應運而生,其係在電路板 外額外增層,並以雷射鑽孔的方式製作出非機鑽微盲孔 (Microvia,孔徑6mil以下)之層間互連。 苇見習知技術係先於銅層上開銅窗再進行雷射鑽孔,習 知技術之印刷電路板製作流程如第丨圖至第3圖所示。 月ί考弟1圖,首先,提供兩片預浸材(prepreg)l〇a和 l〇b作爲絕緣核心層(corelayer),並依序將銅層i4a、介電 1281368 層12a、預浸材10a、介電層l2c、預浸材1〇b、介電層】π1281368 IX. Description of the Invention: [Technical Field] The present invention provides a method of fabricating a printed circuit board, and more particularly to a copper window process for performing a printed circuit board by laser alignment. [Prior Art] The printed circuit board is a complex (four) circuit between parts and parts, which is integrated on the board to provide the main support for the installation and interconnection of electronic components. It is indispensable for all electronic products. Basic parts. Due to the increasingly complex circuit of printed circuit boards, high-density interconnect (High Density Imerconnection; painting) technology emerged, which is additionally added outside the circuit board, and laser-drilled to make non-machine drilling micro Interlayer interconnection of blind vias (Microvia, pore size below 6 mils). The 苇 知 知 技术 先 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 1 month, 1 first, provide two prepregs l〇a and l〇b as the core layer of insulation, and sequentially layer copper layer i4a, dielectric layer 1281368 12a, prepreg 10a, dielectric layer l2c, prepreg 1〇b, dielectric layer] π

銅層14b壓合在一起,形成印刷電路板1〇〇的結構,H 表面17a和17b分別具有銅箔電路圖案“^沾和對準圖 案 18a、18b〇 接著,如第2圖所示,藉由電腦對壓合誤差的計算, 算出第1圖中的對準圖案18a和18b和鋼羯電路圖案I6a »和16b的相對位置,並以此資料製作出—光軍(未顯示) 再進行曝光及則,在銅層14a和14b中^開出開口瓜 和22b,而開口 22a和22b位於銅镇電路圖案丨如和i6b 的上方。 如第3圖所示,以雷射光束去除開口 2以和2沈上方 ,的介電層12a和12b,形成銅窗32a和32b,銅窗32&和 Mb使得銅箔電路圖案16a和16b暴露出來,使銅箔電路 圖案16a和i6b可藉由之後的化學銅沈積和電鍍銅等步驟 再形成電性連接。 在習知技術中,由於必須用估算的方式,推測銅層14a 和14b和介電層12a和12b所覆蓋的對準圖案18a和18b 和銅箱電路圖案16a和16b的位置,所以開出的銅窗32a 1281368 b通$和真正銅箱電路圖案1如和16b的位置會有較 大的决差’有時誤差更可能達到7mil左右,因此如何增加 ,銅窗製程的對位精密度,並提升線寬/線距(line/space)的 能力實爲該領域之當務之急。 【發明内容】 本發明係提供一種改良之印刷電路板之製作方法,以解 響決上述問題。 本毛明之敢佳實施例中,係提供一種印刷電路板之製作 方法,該方法包含有提供絕緣核心層,此絕緣核心層表面 鋼磘電路圖案和對準圖案,介電層覆蓋於絕緣核心層 及銅冷電路圖案和對準圖案上,以及銅層覆蓋於介電層 • 斤恭去除銅層,以及提供光束掃瞄出對準圖案以定位出銅 ’自4圖案並去除定位出之鋪路線圖案上方之声以 形成開Q。 “本發明中因爲將銅層先利用蝕刻製程去除,並直接利 用雷^光束找出銅箔的位置,所以本發明不需利用光罩定 義銅囱所以有效增加雷射鑽孔的對位能力、提升線寬/線距 1281368 (line/spaee)職力,並使製程減短,且成本下降,有效 解決了習知技術之缺點。 【實施方式】 請參考第4圖至第9圖,第4圖至第9圖爲本發明之 印刷電路板(PCB)製作方法示意圖。 > .請參考第4圖’首先’將兩片絕緣核心層⑽⑹㈣術 和楊之間麗合介電層42c,其中絕緣核心層術、她和 介電層42c之間可以是内連線電路,絕緣核心層術、猶 可以是由數層表面已形成内連線路的銅絲層板(—per Clad Laminate,CCL)壓合而成。介電層似可以是以預浸 材(Prepreg)作爲材料。絕緣核心層4〇a、4〇b的表面、 > 47b上皆具有銅f自電路圖案46a、46b和對準圖案48a、48b。 然後將介電層42a壓合於絕緣核心層4〇a、銅箱電路圖案 46a和對準圖案48a的表面,銅層4乜再壓合於介電層42& 之上,而絕緣核心層40b也如同絕緣核心層4〇a 一般,其 表面依序壓合介電層42b和鋼層44b。最後,此壓合板形 成印刷電路板400的結構。其中,介電層42a、4沘並不僅 限於以預浸材(Prepreg)作爲材料。本發明之另一實施利則 l28l368 為介電層42a、42b採用背膠銅箔(RCC)壓合而成,此時就 不需要另外再實施壓合製程以壓合銅層44a、44b。 如第5圖所示,本發明先利用濕蝕刻製程去除第4圖 中的銅層44a和44b,此蝕刻步驟的目的在使介電層42a、 42b表面在去除銅層44a和44b後變得更粗糙,增加後續 > 化學鋼層與介電層42a、42b之黏著力。接著,再利用一雷 射光束掃瞄印刷電路板400,當雷射光束照射到表面47a、 47b時,可於機台的監視螢幕上看出對準圖案48a、48b會 顯示出色差,因此可以依此計算出對準圖案48a及48b的 位置,同理,可藉由對準圖案48a、48b和銅箱電路圖案 46a、46b的相對位置計算出銅箔電路圖案46a、46b的位 置,藉此定位出銅箔電路圖案46a、46b。 ) 請參考第6圖,確定銅箔電路圖案46a、46b位置後, 再施以雷射鑽孔製程,去除銅箔路線圖案46a、46b上方的 介電層42a、42b,以形成如第6圖中的開口 62a、62b,其 中開口 62a是以介電層42a做為兩側邊以及銅箔電路圖案 46a作為底邊所構成,而開口 62b是以介電層4沘做為兩 侧邊以及銅箔電路圖案46b作為底邊所構成。 !281368 鎳/金或有機保焊劑(Organic Solder Preservative,OSP)等 材料所構成之保護層(未顯示),即完成本發明之印刷電 路板0 習知技術由於必須用估算的方式,推測銅層14a、14b 和介電層12a、12b所覆蓋的對準圖案18a、18b和銅箔電 路圖案16a、16b的位置,所以開出的銅窗32a和32b通常 和真正銅箔電路圖案16a、16b的位置會有比較大的誤差, 但是,在本發明中因爲將介電層42a、42b之上的銅層44a、 44b先利用蝕刻製程去除,並直接利用雷射光束找出銅箔 電路圖案46a、46b的位置,所以開出的銅窗位置和習知技 術比較,則較為精確。本發明因爲不需利用光罩(c〇nf〇rmal mask)定義銅窗,所以成本下降、製程縮短,且有效增加 雷射鑽孔的對位能力,並提升線寬/線距(line/space)的能 力,有效解決了習知技術之瓶頸。 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範 圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 11The copper layers 14b are pressed together to form a structure of the printed circuit board 1b, and the H surfaces 17a and 17b respectively have a copper foil circuit pattern "^ and alignment patterns 18a, 18b", as shown in Fig. 2, The calculation of the pressing error by the computer calculates the relative positions of the alignment patterns 18a and 18b in FIG. 1 and the reel circuit patterns I6a » and 16b, and produces the data - the light army (not shown) and then exposes And, the opening melons and 22b are opened in the copper layers 14a and 14b, and the openings 22a and 22b are located above the copper circuit patterns such as i6b. As shown in Fig. 3, the opening 2 is removed by the laser beam. And the dielectric layers 12a and 12b above the second sink, forming the copper windows 32a and 32b, the copper windows 32 & and Mb exposing the copper foil circuit patterns 16a and 16b so that the copper foil circuit patterns 16a and i6b can be followed by Electrochemical copper deposition and electroplating of copper and the like are followed by electrical connection. In the prior art, alignment patterns 18a and 18b and copper covered by the copper layers 14a and 14b and the dielectric layers 12a and 12b are presumed to be estimated in an estimated manner. The position of the box circuit patterns 16a and 16b, so the opened copper window 32a 1281368 b Through $ and the actual copper box circuit pattern 1 and 16b position will have a larger difference 'sometimes the error is more likely to reach about 7mil, so how to increase the alignment precision of the copper window process, and increase the line width / line The capability of line/space is a top priority in the field. SUMMARY OF THE INVENTION The present invention provides an improved method of fabricating a printed circuit board to solve the above problems. A method of fabricating a printed circuit board is provided, the method comprising providing an insulating core layer having a steel ruthenium circuit pattern and an alignment pattern, the dielectric layer covering the insulating core layer and the copper cold circuit pattern and the alignment pattern And the copper layer covers the dielectric layer. • The copper layer is removed, and the beam is scanned to align the pattern to locate the copper 'from the 4 pattern and remove the sound above the positioned route pattern to form the opening Q. In the present invention, since the copper layer is first removed by an etching process and the position of the copper foil is directly determined by using a lightning beam, the present invention does not need to use a photomask to define a copper bronze, thereby effectively increasing the laser drill. An ability to enhance the line / space 1281368 (line / spaee) power level, and the process is shortened, and decreased cost, effective solution to the shortcomings of conventional technologies. [Embodiment] Please refer to Figures 4 to 9, and Figures 4 to 9 are schematic views showing a method of fabricating a printed circuit board (PCB) according to the present invention. > Please refer to Figure 4 'First' to connect two insulating core layers (10) (6) (4) and Yang between the dielectric layer 42c, where the insulating core layer, her and the dielectric layer 42c may be interconnected circuits The insulating core layer can be formed by pressing together a plurality of copper wire sheets (-per Clad Laminate, CCL) having interconnected lines on the surface. The dielectric layer may be made of a prepreg. The surfaces of the insulating core layers 4a, 4b, > 47b have copper f self-circuit patterns 46a, 46b and alignment patterns 48a, 48b. Then, the dielectric layer 42a is press-bonded to the surfaces of the insulating core layer 4a, the copper box circuit pattern 46a, and the alignment pattern 48a, and the copper layer 4 is further pressed onto the dielectric layer 42& and the insulating core layer 40b. Also like the insulating core layer 4a, the surface thereof is sequentially pressed against the dielectric layer 42b and the steel layer 44b. Finally, the plywood forms the structure of the printed circuit board 400. Among them, the dielectric layers 42a, 4A are not limited to being made of a prepreg. Another embodiment of the present invention l28l368 is formed by laminating dielectric layers 42a, 42b with a backing copper foil (RCC). In this case, no additional pressing process is required to press the copper layers 44a, 44b. As shown in Fig. 5, the present invention first removes the copper layers 44a and 44b of Fig. 4 by a wet etching process for the purpose of making the surfaces of the dielectric layers 42a, 42b after removing the copper layers 44a and 44b. Rougher, increasing the adhesion of the subsequent > chemical steel layer to the dielectric layers 42a, 42b. Then, the laser printed circuit board 400 is scanned by a laser beam. When the laser beam is irradiated onto the surface 47a, 47b, the alignment patterns 48a, 48b can be displayed on the monitoring screen of the machine to show excellent difference, so The positions of the alignment patterns 48a and 48b are calculated accordingly. Similarly, the positions of the copper foil circuit patterns 46a, 46b can be calculated by the relative positions of the alignment patterns 48a, 48b and the copper box circuit patterns 46a, 46b. Copper foil circuit patterns 46a, 46b are taken out. Referring to FIG. 6, after determining the positions of the copper foil circuit patterns 46a, 46b, a laser drilling process is applied to remove the dielectric layers 42a, 42b above the copper foil routing patterns 46a, 46b to form a pattern as shown in FIG. The openings 62a, 62b, wherein the opening 62a is formed by the dielectric layer 42a as the two sides and the copper foil circuit pattern 46a as the bottom side, and the opening 62b is the dielectric layer 4 as the two sides and the copper The foil circuit pattern 46b is constructed as a base. !281368 A protective layer (not shown) made of a material such as nickel/gold or an organic solder retainer (OSP), that is, the printed circuit board of the present invention is completed. The conventional technique is to estimate the copper layer by an estimation method. 14a, 14b and the alignment of the alignment patterns 18a, 18b and the copper foil circuit patterns 16a, 16b covered by the dielectric layers 12a, 12b, so the copper windows 32a and 32b which are opened and the positions of the actual copper foil circuit patterns 16a, 16b are generally There will be a relatively large error, but in the present invention, the copper layers 44a, 44b over the dielectric layers 42a, 42b are first removed by an etching process, and the copper foil circuit patterns 46a, 46b are directly identified by the laser beam. The location, so the position of the copper window opened is more accurate than the conventional technology. The invention not only needs to define a copper window by using a photomask, so the cost is reduced, the process is shortened, and the alignment capability of the laser drilling hole is effectively increased, and the line width/line spacing (line/space) is increased. The ability to effectively solve the bottleneck of the prior art. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should fall within the scope of the present invention. 11

Claims (1)

i28l368 、申請專利範菌 =印_板之製作方法,該方法包含有: 知供一絕緣核心層,苴力人 円宝^ 、 銅荡電路圖案和一對準 =:於:絕緣核心層表面,-介電層覆蓋於該 錢核心層及該鋼箱電路圖案和該對準圖案上, 以及一銅層覆蓋於該介電層上; 去除该銅層,· =-光束,掃晦出該對準圖案以定位出該 圖案;以及 去除該定位出之該銅落路線圖案上方之該介電層,以 形成一開口。 勺申明專#j範圍第i項所述之方法,其中該絕緣核心層 =含至少一銅箔基層板(Copper Clad Laminate,CCL),該 ;丨電層包含有預浸材(Prepreg)及背膠銅箔(rcC)。 申明專利範圍第1項所述之方法,其中該光束係爲一 雷射光束。 ' 4 M rU ^ π專利範圍第3項所述之方法,其中該雷射光束掃 13 f28l368 、 〜一一一-一— 日田出邊對準圖幸係M L〜一〜^〜^ ,wi 對望闻/ 雷射光束照射到; 對準圖案時,可 表面上之 別該對準圖案位置。 看出色差,藉此判 5.如申請專利範圍第4項所述之方— 電跃FI安A '、中疋位出該銅箔 θ案係以雷射光束判別出的該 該對藥阊安$ ^ _ 干口茶位置,糟由 電路=:圖索的相對位置計算出該_ ”、、立置’糟此定位出該銅箔電路圖案。 H料利卿1項所述之方法,其中去除該第-銅 运和弟一銅層係利用一蝕刻製程。 7.如申請專利範圍第!項所述之方法,其中該開口係由該 介電層構成開口的兩側邊、該銅羯電路圖案構 底邊。 .如申請專利第7項所述之方法,其中該方法在形成 該開口後包含有以下步驟: 提供一表面粗化製程於該鑽孔製程之後,用以增加哼 第介電層表面、該開口兩侧邊表面和該開口底邊表 面的粗糙度; 14 1281368 進行-化學銅沈積製程,形成—化學銅於該介電層表 面、該開口兩側邊表面和該開口底邊表面;以及、 利用-電_程’心形成—電_層於該化學銅表 面。 9.=專職圍第8項所述之方法,更包含於電鑛製程 ^ 、Μ化予銅表面,該電鍍製程不會在 5亥光阻圖案上形成該電鍍銅層。 如申請專利範圍第9項 屏形心、隹- 、斤述之方法’更包含於該電鍍銅 成後知—去光阻製㈣絲該光阻圖案。 11 ‘種印刷電路板之製作方法,該方法包含有: 提供一壓合板,其係由 々 弟硐層、一弟一介電層、 一第一絕緣核心厚 唾 、 人、續一弟二介電層、一第二絕緣 核。層—第三介電層以及一第二銅層依序壓合 而—成,第—介電層和第—絕緣核心層之間具有一 第一銅箔電路圖牵釦锋 ^ 口茶和一弟一對準圖案,第三介電 層和弟—絕緣核心屬夕卜 9之間具有一第二銅箔電路圖 案和一第二對準圖案; 去除該第一鋼層和該第二銅層; 15 ^281368 r~—— 1牌u月丨1特(更证翻頁 提供-雷射光束掃瞄該壓合案 和該第二對準圖案所顯現的色差,辨別出該第°」' 對準圖案和該第二對準圖案的位置,以定位出該 第一銅箔電路圖案和第二銅箔電路圖案;以及 去除該定位出之該第一銅羯電路圖案和第二銅箱電 路圖案上方之該介電層,以形成一開口。 u·如申料職圍第u項所述之方法,其中去除該第一 鋼層和第二銅層係利用一蝕刻製程。 3= 申請糊範㈣U項所叙方法,其中該方法在形 成该開口後包含有以下步驟·· 提,—表面粗化製程於該鑽孔製程之後’用以增加該 第—介電層和該第三介電層表面以及該開口表面 的粗糙度; 、_化予銅沈積製程,形成一化學銅於該第一介電 ,層和該第三介電層表面以及該開口表面;以及 利用—電1^製程’用以形成—電鑛銅層於該化學銅表 面。 16 ί281368 __________ __________一 1年(1月(工日修g)正替換頁 •如申請專利範圍第13項所述之方法,更包含於電鍍製 ^則形成一光阻圖案於該化學銅表面,該電鍍製程不會 在該光阻圖案上形成該電鍍銅層。 15.如申請專利_第14销叙方法,更包含於該電錢 鋼層形成後進行-去光阻製程以去除該光阻圖案。 十一、圖式·· 17 12813.68 七、指定代表圖: (一) 本案指定代表圖為:第(9 )圖。 (二) 本代表圖之元件符號簡單說明: 40a、40b 絕緣核心層 42 a、42b、42c 介電層 46 a、46b 銅箔電路圖案· 48a、48b 對準圖案 72a、72b 化學銅層 92a、92b 電鍵銅層 400 印刷電路板 八、本案若有化學式時,請揭示最能顯示發明特徵的化學I28l368, the patent application method = printing plate manufacturing method, the method includes: knowing an insulating core layer, 苴力人円宝^, copper circuit pattern and an alignment =: on: the surface of the insulating core layer, a dielectric layer covering the core layer of the money and the steel box circuit pattern and the alignment pattern, and a copper layer covering the dielectric layer; removing the copper layer, ·--beam, brooming the pair a quasi-pattern to position the pattern; and removing the dielectric layer above the positioned copper drop routing pattern to form an opening. The method of claim i, wherein the insulating core layer comprises at least one copper foil base layer (CCL), and the tantalum layer comprises a prepreg and a back Copper foil (rcC). The method of claim 1, wherein the beam is a laser beam. ' 4 M rU ^ π patent range method according to the third item, wherein the laser beam sweep 13 f28l368, ~ one-one-one - Hita out edge alignment map lucky ML ~ one ~ ^ ~ ^, wi pairs When the pattern is aligned, the position of the pattern can be aligned on the surface. If you look at the excellent difference, you can judge 5. If the application mentioned in item 4 of the scope of patent application - electric jump FI An A ', the copper foil θ case is the laser beam discriminating the pair of medicines An $ ^ _ dry mouth tea position, the bad circuit =: the relative position of the figure to calculate the _ ”,, stand the 'bad' to locate the copper foil circuit pattern. H material Li Qing 1 method, The method of claim 2, wherein the opening is formed by the dielectric layer on both sides of the opening, the copper is removed by the etching process. The method of claim 7, wherein the method comprises the following steps after forming the opening: providing a surface roughening process after the drilling process to increase the 哼Roughness of the surface of the dielectric layer, the side surfaces of the opening, and the bottom surface of the opening; 14 1281368 performing a chemical copper deposition process to form - chemical copper on the surface of the dielectric layer, the side surfaces of the opening, and the opening Bottom side surface; and, using - electric_process' heart formation - electricity_layer The chemical copper surface. 9.= The method described in Item 8 of the full-time division is further included in the electro-mine process, and the surface of the copper is deposited on the surface of the copper, and the electroplating process does not form the electroplated copper layer on the pattern of 5 hares. For example, the method of applying for the ninth item of the screen range, the method of 隹-, and the description of the syllabus is further included in the electroplated copper, and the photoresist is formed by the photoresist (4). 11 'Production method of the printed circuit board, The method comprises: providing a pressure plate, which is composed of a 々 layer, a first dielectric layer, a first insulating core thick, a human, a second dielectric layer, and a second insulating core. The third dielectric layer and the second copper layer are sequentially pressed together, and the first dielectric layer and the first insulating layer have a first copper foil circuit diagram. Aligning the pattern, the third dielectric layer and the brother-insulating core have a second copper foil circuit pattern and a second alignment pattern; removing the first steel layer and the second copper layer; ^281368 r~—— 1 card u month 丨 1 special (more proof page turning - laser beam scanning this compression case a color difference exhibited by the second alignment pattern, the positions of the first alignment pattern and the second alignment pattern are discriminated to locate the first copper foil circuit pattern and the second copper foil circuit pattern; Removing the first copper bead circuit pattern and the dielectric layer over the second copper box circuit pattern to form an opening. The method of claim u, wherein the method is removed A steel layer and a second copper layer are processed by an etching process. 3 = A method of applying the paste (4) U, wherein the method comprises the following steps after forming the opening, the surface roughening process is performed on the hole After the process is used to increase the roughness of the surface of the first dielectric layer and the third dielectric layer and the surface of the opening; and to form a copper deposition process to form a chemical copper on the first dielectric layer and the a surface of the third dielectric layer and the surface of the opening; and a process for forming an electro-mineral copper layer on the surface of the chemical copper. 16 ί281368 __________ __________ 1 year (January (working day repair) is replacing page • The method described in claim 13 of the patent application, further included in the electroplating system to form a photoresist pattern on the chemical copper surface The electroplating process does not form the electroplated copper layer on the photoresist pattern. 15. The method of claim 14 is further included after the formation of the electromoney steel layer is subjected to a photoresist removal process to remove the light.十一,图·············································································································· Layers 42 a, 42b, 42c Dielectric layers 46 a, 46b Copper foil circuit patterns 48a, 48b Alignment patterns 72a, 72b Chemical copper layers 92a, 92b Key copper layer 400 Printed circuit board 8. If there is a chemical formula in this case, please Reveal the chemistry that best shows the characteristics of the invention
TW94118786A 2005-06-07 2005-06-07 PCB drill method TWI281368B (en)

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US8274798B2 (en) 2010-07-28 2012-09-25 Unimicron Technology Corp. Carrier substrate and method for making the same

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TW200802544A (en) 2006-04-25 2008-01-01 Osram Opto Semiconductors Gmbh Composite substrate and method for making the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8274798B2 (en) 2010-07-28 2012-09-25 Unimicron Technology Corp. Carrier substrate and method for making the same

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