1276818 九、發明說明·· 【發明所屬之技術領域】 本發明係提供一種半導體檢測件缺陷檢測方法，尤指 -種於半導體檢測件背面進躲陷檢測的方法。 【先前技術】 在積體電路的製作過程中，各種製程的因素常常是瓖環 相扣，也就是說’前—個製程步驟所產生的缺陷常常在下 -個或是之後的製程中也產生相對應的缺陷，以至於造成 最後產品良率上的問題。因此，能即時地對已產生的缺陷 仪出刀析’找出缺陷發生的原因’並加以排除，便成為品 保技術的核㈣力之―。隨著半導體元件尺寸木斷的縮 小’由半導體製程所引發並足以冑良率產生影響的缺陷尺 寸，亦不斷地微小化。在此種趨勢之下，要對這牝微 缺陷做精確的橫切面分析已經變得越來越不容易，因此= 種顯微及失效分析（failure analysis，FA)技術不斷的產生 以期能藉由對試片製備方法的改良、分析儀器精密度的提 昇、以及分析儀器與分析原理的交互運用，來克服這個 1276818 、 二參考第1圖，第1圖為習知技術中一缺陷檢測方法 10、之不意圖。如第1圖所示，首先進行取樣12，選定 -半‘體晶圓為樣本來進行後續缺陷檢難分析工作，接 著進行-缺陷檢測步驟14。_般而言，大多係利用適當的 •職台以大範圍掃描的方式，來比對城測出此半 導體晶圓上之所有缺陷。由於半導體晶圓上之缺陷數量多 半相田大因此在實務上不可能――以人工的方式進行掃 • “ A 1子”、貞《鏡(SEM)再檢測，是以為了方便^見，現行大 都疋先進行一人工缺陷分類16，建立起一缺陷資料庫，再 由可镇測到的所有缺陷中，嚴選出一些較具有代表性之主 要缺(killer defect)類型，最後再讓工程師以人工的方式對 所選出之樣本來進行缺陷再檢測(defect review)i8，以進一 步對該等缺陷進行缺陷原因分析 root cause analysis)20,期找出抑制或減少這些缺陷的方法。 d μ知技*巾’所遭制最大的問題就是往往在缺陷 檢測μ中會發現大量之缺陷數量，例如可能一兩千個，但 程師往往也，、▲從巾以抽樣的方式挑選出—部份的缺陷 作為樣本，例如100個，來進行缺陷再檢測^以及後續缺 分析、排除的工作。—般而言，初期主要缺陷(killer defect) 的k取成乎疋疋全罪工程師的個人經驗判斷來進行檢測分 析外，大多數時間，也僅能從中隨機選取一些缺陷作為缺 陷再檢測18之樣本，這將嚴重降造成時間與人力之耗費， 1276818 ， 連帶影響後續缺陷分析的準確度。 此外，在所有的缺陷當中，除了大多數係直接位於半 導體晶圓表面之缺陷，可以利用正面分析技術(fr〇ntside • analysis)來作失效分析(FA)，許多與製程息息相關之缺陷更 存在於半導體晶圓之下層、底層與背面，而要檢測位於晶 圓底層之缺陷往往是製程中極為困難之步驟，尤其是對於 多層金屬導線的晶片（multi metal layers chip)而言。因此， ® 目前便利用正面分析技術並辅助以背面分析技術(backside analysis)來作更精確的失效分析(FA)，而在檢測於半導體晶 圓之背面分析技術時，一般只能利用佈局圖導向系統 (layout navigation system)於半導體元件背面進行缺陷檢 測。然而，由於電路佈局圖係為各客戶的高度商業機密， 並無法輕易得知，因此常導致晶圓代工廠時之缺陷分析、 排除時間的大幅延長或是在量產時對電性效能（electrical # performance)、可靠度（reliability)、良率(yield rate)及產 能(throughput)造成嚴重的影響。是以，目前迫切需要一種 快速而有效率的缺陷檢測方法，以解決上述問題。 【發明内容】 本發明之主要目的在於提供一種缺陷檢測方法，以改 善習知利用佈局圖導向系統(layout navigation system)於半 1276818 ’導體檢測件背面進行缺陷檢測所耗f之成本與時間。 、根據本發明申請專利範圍所揭露之一種缺陷檢測方 /去f先提卩半導體檢測件，且該半導體檢測件中包含 有至少斜曰’然後利用一失效分析(FA)技術，於該半導 •體檢測件之背面檢測出至少-可疑異常區域(suspected area)接著利用—物理能量，於該半導體檢測件背面之該 可疑異（區域周圍形成複數個參考標記，最後利用該等袁 考標記’於該半導體檢測件之正面標定出該缺陷之相對位 置。 根據本發月申睛專利範圍所揭露之另一種缺陷檢測方 法，百先提供一半導體檢測件，且該半導體檢測件中包含 有至彡—缺陷，然後湘-失效分析(FA)技術，於該半導 體檢測件之背面檢測出至少-可疑異常區域(suspected area) ’接著利用—第_物理能量，於該半導體檢測件背面 之4可疑異系區域周圍形成複數個第一參考標記，最後利 第二物理能量及該等第—參考標記，於該半導體檢挪 件之正面形成複數個第二參考標記，以標定出該缺陷之相 對位置。 1276818 v 根據本發明申請專利範圍所揭露之另一種缺陷檢測方 法，首先提提供一半導體檢測件，且該半導體檢測件中包 含有至少一缺陷，然後利用一失效分析(fa)技術，於該半 導體檢測件之为面檢測出至少一可疑異常區域(SUSpected area)，接著利用一物理能量，於該半導體檢測件背面之該 • 可疑異常區域周圍形成複數個第一參考標記，最後利用一 電壓對比異常(voltage contrast abnormal)及該等第一炎考 • 標記，於該半導體檢測件之正面標定出該缺陷之相對位置。 有別於習知於半導體檢測件背面進行缺陷檢測之方 法，本發明係先利用失效分析(FA)技術，以於一半導體檢 測件之背面找出可疑異常區域的位置，然後在鎖定物理能 里抽壞訊5虎之後，再利用一非接觸式之物理妒旦，、^ 、 b里，以破 性的方式於半導體檢測件f面之可疑異t區域的 ^數個參考標記，如標定缺_位置，因此可有效改盖 系半導體元㈣面進行缺;_ 【實施方式】 請參考第2圖。第2圖為本發明第—實施例於一半導 双測件背面檢視暨敎缺陷之示意圖。如第2圖所示， 1276818 • 首先提供一半導體檢測件100，半導體檢測件100視應用 之製程階段不同而可為一半導體晶圓（wafer)、晶粒(die)、 或晶片（chip)，在此係以一半導體晶圓為例，半導體檢測件 100包含一正面102與一背面104,且半導體檢測件1〇〇中 包含有至少一缺陷106或一可疑異常點（suspected spot)。其 中，缺陷106或可疑異常點可藉由熱點(hot spot)分析、紅 外線誘發阻抗變化分析(IR 0BIRCH)、放射(emissi〇n)等失 • 效分析(FA)技術來追蹤半導體檢測件100背面1〇4所呈現 之可疑異常訊號(suspected signal)，進而鎖定可疑異常區域 (suspected area)的位置。 以利用光子顯微鏡(photo-emission microscope)來進行 -雷射光束誘發阻抗變化分析(0BIRCH)的方式為例。首 Φ 先’利用雷射光束在半導體檢測件⑽之背面1〇4進行掃 在掃0¾過％巾’雷射光束的部分能量則會轉化為熱量。 如果在半導體檢測件100上存在著任何缺陷或者空洞，這 些區域附近的熱量料將會列於其他的完整區域， 起局部溫度變化，形成可疑異常訊號。除此之外，亦可利 2固定電壓導通半導體檢測件100兩端，並藉由該電墨 供之電流變化的大小與所成影像的像素亮度對應，而 ”的位置則與電流發生變化時來與雷射光掃描到的位置 1276818 相對應。如此，就可以產生〇BIRCH像來確定缺陷位置。 藉此，本發明可尋找半導體檢測件100中之缺陷，以有效 地對電路中缺陷定位，諸如線條中的空洞、通孔下的空洞 等，並有效的檢測短路或漏電位置。 接著提供一非接觸式之物理能量(physical energy)，以 破壞性的方式於半導體檢測件100之背面104之可疑異常 區域(suspected area)的周圍形成複數個參考標記122。換句 話說’本發明是先利用前述之熱點、紅外線誘發阻抗變化、 放射(emission)等失效分析(FA)裝置（未顯示)找出半導體檢 測件100背面104之可疑異常區域（SUSpecte(j area)的位置， 然後在鎖定物理能量損壞訊號(phySicai energy (jamage signal)之後，便利用一雷射發射裝置12〇直接在背面1〇4 之缺陷106周圍形成複數個參考標記122，藉以標定缺陷 106的位置。 值得注意的是，形成於背面1〇4之缺陷1〇6周圍的參 考標記122需可由半導體檢測件100的正面102來觀察 之。請參考第3圖，第3圖為本發明第一實施例之半導體 檢測件100正面1〇2之上視圖。一般而言，半導體晶圓之 厚度係介於9000埃(入)至14000埃中間，而為了能於半導 π 1276818 體檢測件刚之正面搬辨別出參考標記i22的正確位 置，使用者可職雷射光束域之強度，以纽於半導體 檢测件_之背㈣4形成複數個破壞性受損點，亦即前 述之參考標記122，且該等參考和巧丄丄…# /亏知圮丨22需可由半導體檢 測件100的正面102來觀察之。 最後再利用光學顯微鏡、掃瞄式電子顯微鏡、穿透式 電子顯微鏡或是聚焦離子束顯微鏡由半導體檢測件1〇〇的 正面102來檢視，並視實際狀況需要配合物理性(如電漿蝕 刻）方法或是化學性（如溶液的作用）的去除膜層（心1吖以)技 術來分析，終而找出缺陷106位置及發生原因，加以排除。 而根據本發明之另一實施例，本發明又可利用至少^一 非接觸式之物理能量(physical energy)分別於半導體檢測件 之正、反兩面各形成複數個破壞性受損點，並藉由該等受 損點來判斷出缺陷之正確位置。請參照第4圖至第6圖， 第4圖至第6圖為本發明另一實施例於半導體檢測件之背 面、正面檢視暨標定缺陷之示意圖。 如同先前所述之第一實施例，首先提供一半導體檢測 件200，半導體檢测件200包含一正面202與一背面204， 12 8 ϊ2768ι 且半導體檢測件200中包含有至少一缺陷206或一可疑異 $點。接著利用前述之熱點、紅外線誘發阻抗變化、放射 等失致分析(FA)裝置(未顯示）由半導體檢測件200背面204 拽出可疑異常區域(suspected area)的位置，然後在鎖定物理 月匕里摘壞訊號(physical energy damage signal)之後，隨即利 雷射發射裝置220直接在背面204之缺陷206周圍形 成複數個參考標記222，藉以標定缺陷206的位置，如第5 圖所示。然後再利用雷射發射裝置220於半導體檢測件2〇〇 之正面202另形成複數個參考標記224，並視實際狀況， 可重複上述步驟，以使正面202之參考標記224趨近 (approach)背面204之各參考標記222，終使參考標記μ〕 之位置係與半導體檢測件背面綱參考標記之位置相 互重疊，如第ό圖所示。 同樣地，最後再利用光學顯微鏡、掃晦式電子顯微鏡、 穿透式電子賴鏡或技焦軒束顯微鏡由轉體檢測件 200的正面202來檢視，並視實際狀況需要配合物理性方 法或是化學性的去除膜層技術來分析，終而找出缺陷咖 位置即發生原因，加以排除。 固定電壓導通半導體檢 此外，本發明亦可直接利用一 13 1276818 測件，並藉由該電壓所產生之電流變化而於半導體檢測件 之正面標定出缺陷之位置。請參照第7圖，第7圖為本發 明又一實施例於一半導體檢測件之正面檢視暨標定缺陷之 不意圖。首先提供一半導體檢測件3〇〇，半導體檢測件3〇〇 包含一正面302與一背面（圖未示），且半導體檢測件300 中包含有至少一缺陷306或一可疑異常點。接著利用前述 之熱點、紅外線誘發阻抗變化、放射等失效分析(FA)裝置 (未顯不）找出半導體檢測件3〇〇背面之可疑異常區域的位 置，然後在鎖定物理能量損壞訊號之後，便利用一雷射發 射裝置（未顯不）直接在背面之缺陷3〇6周圍形成複數個標 記 322。 接著提供一固定電壓，並利用該電壓形成複數條電流 導通半導體檢測件3GG，其中半導體檢測件雇之一端係 連接電左源Vcc，另一端則接地(groun(j)。由於在雷射光 束掃聪過程中’雷射光束的部分能量則會轉化為熱量，因 此如果在半導體檢測件±存在著任何縣，這些缺陷附近 的熱量傳導將會不同於其他的完整區域，引起局部溫度變 化而造成破壞性受損點。因此在破壞性受損點形成後，便 可刺用該固定電壓導通半導體檢測件3〇〇，然後經由缺陷 306附近之電屡對比異常⑽tage c_rast abn〇rmai)而由半 14 1276818 導體檢測件300之正面302標定出缺陷306之所在位置。 相較於習知用來檢測半導體缺陷之方法，本發明係先 利用失效分析(FA)技術，以於一半導體檢測件之背面找出 可疑異常區域的位置，然後在鎖定物理能量損壞訊號之 後’再利甩一非接觸式之物理能量，以破壞性的方式於半 導體檢測件背面之可疑異常區域的周園形成複數個參考標 記，藉以標定缺陷的位置。接著可再利用雷射標記或電壓 對比異常（voltage contrast abnormal)等方式，於半導體於对 件之正面另形成複數個減狀參考標記或凸顯缺陷之= 在位置。最後再·光學顯微鏡、掃料電子顯微鏡、* 透式電子賴鏡或是聚焦離子絲微鏡由铸體檢測件= 正面來檢視，並配合物理財法或是化學㈣ 術來分析缺陷位置及發生原因，加以排除。如此 僅可以解決f知利用佈局圖導向純的ϋ難性，又可= Ζ知利用該系統以於半導體檢測件#面進行缺陷軸 費之成本與時間。 、斤耗 直=上所述僅為本發明之較佳實施例，凡依 圍。 W夂化與修飾，皆應屬本發明之涵蓋範 15 1276818 ^ 【圖式簡單說明】 第1圖為習知技術中一缺陷檢測方法之流程示意圖。 第2圖為本發明第一實施例於一半導體檢測件背面檢視暨 標定缺陷之示意圖。 第3圖為本發明第一實施例之半導體檢測件正面之上視 圖。 第4圖至第6圖為本發明另一實施例於半導體檢測件之背 > 面、正面檢視暨標定缺陷之示意圖。 第7圖為本發明又一實施例於一半導體檢測件之正面檢視 暨標定缺陷之示意圖。[Technical Field] The present invention provides a method for detecting a defect of a semiconductor detecting member, and more particularly to a method for detecting a defect in the back side of a semiconductor detecting member. [Prior Art] In the process of manufacturing an integrated circuit, the factors of various processes are often interlocked, that is, the defects generated by the 'pre-process step often occur in the next- or subsequent process. Corresponding defects, causing problems in the final product yield. Therefore, it is possible to immediately analyze and eliminate the cause of the defect that has been generated, and to eliminate it, which becomes the core of the quality assurance technology. As the size of semiconductor components shrinks, the size of defects caused by semiconductor processes and which is sufficient to affect yield is continually miniaturized. Under this trend, it has become increasingly difficult to make accurate cross-section analysis of such micro-defects. Therefore, the microscopic and failure analysis (FA) techniques are constantly being produced. The improvement of the preparation method of the test piece, the improvement of the precision of the analytical instrument, and the interaction of the analytical instrument and the analysis principle are used to overcome the 1276818 and the second reference, and the first figure is a defect detection method in the prior art. Not intended. As shown in Fig. 1, sampling 12 is first performed, and a -half "body wafer" is selected as a sample for subsequent defect inspection analysis work, followed by - defect detection step 14. In general, most of the defects on this semiconductor wafer are measured by a large-scale scanning method using a suitable platform. Since the number of defects on the semiconductor wafer is mostly large, it is impossible in practice - to scan manually. "A1" and "SEM" re-detection are for convenience. First, a manual defect classification 16 is established, and a defect database is established. Then, among the all defects that can be measured, some more representative types of killer defects are selected, and finally the engineers are artificially The method is to perform a defect review i8 on the selected samples to further analyze the root cause analysis of the defects, and to find a method for suppressing or reducing these defects. The biggest problem with the d μ technology* towel is that a large number of defects are often found in the defect detection μ, for example, one or two thousand, but the programmer often also, ▲ sort out from the towel by sampling - Part of the defects as a sample, for example, 100, for defect re-detection ^ and subsequent lack of analysis, exclusion work. In general, the initial killer defect is taken from the personal experience of the guilty engineer for testing and analysis. Most of the time, only some defects can be randomly selected as defects for re-detection. Samples, which will seriously reduce the time and labor costs, 1276818, with the accuracy of subsequent defect analysis. In addition, among all the defects, except for most of the defects directly on the surface of the semiconductor wafer, the front analysis technique (fr〇ntside • analysis) can be used for failure analysis (FA). Many defects related to the process are more present in the defect. The underlying, underlying, and backside of a semiconductor wafer, while detecting defects at the underside of the wafer, is often an extremely difficult step in the fabrication process, especially for multi metal layers of chips. Therefore, ® currently facilitates the use of positive analysis techniques and assists with backside analysis for more accurate failure analysis (FA), while in the detection of backside analysis techniques for semiconductor wafers, it is generally only possible to use layout guidance. A layout navigation system performs defect detection on the back side of the semiconductor element. However, since the circuit layout is highly trade secret for each customer and cannot be easily known, it often leads to defects in the foundry, a significant extension of the exclusion time, or electrical performance during mass production. #performance), reliability, yield rate, and throughput have serious consequences. Therefore, there is an urgent need for a fast and efficient defect detection method to solve the above problems. SUMMARY OF THE INVENTION A primary object of the present invention is to provide a defect detecting method for improving the cost and time required for defect detection on the back side of a half-length 1276818 'conductor detecting member using a layout navigation system. According to the invention of the present invention, a defect detecting/removing semiconductor detecting member is provided, and the semiconductor detecting member includes at least a skewer' and then utilizes a failure analysis (FA) technique on the semiconductor • The back side of the body test piece detects at least a suspected suspected area and then utilizes - physical energy, the suspicious difference on the back side of the semiconductor test piece (a plurality of reference marks are formed around the area, and finally the reference mark is used) The relative position of the defect is calibrated on the front side of the semiconductor detecting member. According to another defect detecting method disclosed in the scope of the patent application of the present invention, a semiconductor detecting member is provided, and the semiconductor detecting member includes the same - Defect, then Xiang-Failure Analysis (FA) technique, detecting at least - suspected area on the back side of the semiconductor test piece 'and then using - the first physical energy, 4 suspects on the back side of the semiconductor test piece a plurality of first reference marks are formed around the system region, and finally the second physical energy and the first reference mark are used in the semi-conductive A plurality of second reference marks are formed on the front surface of the detecting member to calibrate the relative position of the defect. 1276818 v According to another defect detecting method disclosed in the scope of the present application, a semiconductor detecting device is first provided, and the semiconductor is provided. The detecting component includes at least one defect, and then uses a failure analysis (fa) technique to detect at least one SUSpected area on the surface of the semiconductor detecting component, and then uses a physical energy to the semiconductor detecting component. On the back side, a plurality of first reference marks are formed around the suspected abnormal region, and finally a voltage contrast abnormality and the first inflammation test mark are used to mark the opposite side of the semiconductor test piece. Different from the conventional method for detecting defects on the back side of a semiconductor detecting member, the present invention first uses a failure analysis (FA) technique to find the position of a suspicious abnormal region on the back side of a semiconductor detecting member, and then locks the physical body. After you can smother the bad 5 tigers, you can use a non-contact physical physics, ^, b In a fragmented manner, the number of reference marks in the suspiciously different t region of the semiconductor detector f surface, such as the calibration of the missing _ position, can effectively change the semiconductor semiconductor (4) surface to be missing; _ [Embodiment] Please refer to Fig. 2 is a schematic view showing the back side inspection and defect of the half-guided double-test piece according to the first embodiment of the present invention. As shown in Fig. 2, 1276818 • First, a semiconductor detecting member 100 is provided, and the semiconductor detecting member 100 is regarded as The process stage of the application may be a semiconductor wafer, a die, or a chip. Here, a semiconductor wafer is taken as an example. The semiconductor detecting component 100 includes a front surface 102 and a back surface. 104, and the semiconductor detecting member 1 包含 includes at least one defect 106 or a suspected spot. Wherein, the defect 106 or the suspected abnormal point can track the back surface of the semiconductor detecting device 100 by a hot spot analysis, an infrared induced impedance change analysis (IR 0BIRCH), an emission (emissi〇n), and the like (FA) technology. The suspected signal presented by 1〇4, which in turn locks the location of the suspected suspected area. A method of performing a laser beam induced impedance change analysis (0BIRCH) using a photo-emission microscope is taken as an example. The first Φ first uses the laser beam to sweep on the back side of the semiconductor detector (10) 1〇4. The part of the energy of the laser beam is converted into heat. If there are any defects or voids in the semiconductor detecting member 100, the heat in the vicinity of these regions will be listed in other complete regions, causing local temperature changes to form suspicious abnormal signals. In addition, the fixed voltage can also be used to turn on both ends of the semiconductor detecting device 100, and the magnitude of the current change by the ink corresponds to the brightness of the pixel of the formed image, and the position of the "change" occurs when the current changes. The position corresponding to the scanning of the laser light is 1276818. Thus, the 〇BIRCH image can be generated to determine the defect position. Thereby, the present invention can find defects in the semiconductor detecting member 100 to effectively locate defects in the circuit, such as A void in the line, a void under the through hole, etc., and effectively detecting the short-circuit or leakage position. Next, a non-contact physical energy is provided, which is suspicious in the destructive manner on the back side 104 of the semiconductor detecting member 100. A plurality of reference marks 122 are formed around the suspected area. In other words, the present invention first uses the aforementioned hot spot, infrared induced impedance change, emission, and other failure analysis (FA) devices (not shown) to find out. The suspected abnormal region of the back surface 104 of the semiconductor detecting member 100 (the location of the SUSpecte (j area), and then the physical energy damage signal (phySicai energy) After the jamage signal, a plurality of reference marks 122 are formed directly around the defect 106 of the back side 1〇4 by a laser emitting device 12, thereby calibrating the position of the defect 106. It is noted that it is formed on the back side 1〇4. The reference mark 122 around the defect 1〇6 needs to be viewed by the front side 102 of the semiconductor detecting member 100. Referring to FIG. 3, FIG. 3 is a front view of the semiconductor detecting member 100 of the first embodiment of the present invention. In general, the thickness of the semiconductor wafer is between 9000 angstroms (in) and 14,000 angstroms, and in order to be able to identify the correct position of the reference mark i22 on the front side of the semi-conductive π 1276818 body detecting member, the user The intensity of the laser beam field of the service is formed by a plurality of destructive damage points, that is, the aforementioned reference mark 122, and the reference mark and the like. The 圮丨22 needs to be observed by the front side 102 of the semiconductor detecting member 100. Finally, an optical microscope, a scanning electron microscope, a transmission electron microscope or a focused ion beam microscope is used to positively detect the semiconductor device. 102 to view, and depending on the actual situation needs to be combined with physical (such as plasma etching) or chemical (such as the role of the solution) of the removal of the film (heart 1) technology to analyze, and finally find the location of the defect 106 And the cause of the problem is excluded. According to another embodiment of the present invention, the invention can utilize at least one non-contact physical energy to form a plurality of damages on the front and back sides of the semiconductor detecting component, respectively. Sexual damage points, and the correct location of the defect is determined by the damage points. Please refer to FIG. 4 to FIG. 6 . FIG. 4 to FIG. 6 are schematic diagrams showing the back side, front view and calibration defects of the semiconductor detecting member according to another embodiment of the present invention. As with the first embodiment described above, a semiconductor detecting member 200 is first provided. The semiconductor detecting member 200 includes a front surface 202 and a back surface 204, 12 8 ϊ 2768 ι and the semiconductor detecting member 200 includes at least one defect 206 or a suspicious Different $ points. Then, the position of the suspected abnormal area is extracted from the back surface 204 of the semiconductor detecting member 200 by using the above-described hot spot, infrared induced impedance change, radiation, etc. (FA) device (not shown), and then locked in the physical moon. After the physical energy damage signal, the laser emitting device 220 then forms a plurality of reference marks 222 directly around the defect 206 of the back side 204 to thereby calibrate the position of the defect 206, as shown in FIG. Then, a plurality of reference marks 224 are further formed on the front surface 202 of the semiconductor detecting member 2 by using the laser emitting device 220, and the above steps may be repeated according to actual conditions, so that the reference mark 224 of the front surface 202 approaches the back surface. Each of the reference marks 222 of 204, the position of the reference mark μ] is overlapped with the position of the back surface reference mark of the semiconductor detecting member, as shown in the figure. Similarly, the optical microscope, the broom electron microscope, the transmissive electron microscope or the telephoto beam microscope is finally used to examine the front side 202 of the swivel detecting member 200, and depending on the actual situation, it is necessary to cooperate with the physical method or The chemical removal of the film layer technology to analyze, and ultimately find the location of the defect coffee is the cause, to be excluded. Fixed Voltage Conduction Semiconductor Inspection In addition, the present invention can also directly utilize a 13 1276818 test piece and mark the position of the defect on the front side of the semiconductor detecting member by the current change generated by the voltage. Please refer to FIG. 7. FIG. 7 is a schematic view showing the front view of a semiconductor detecting member and the calibration defect according to still another embodiment of the present invention. First, a semiconductor detecting member 3 is provided. The semiconductor detecting member 3 includes a front surface 302 and a back surface (not shown), and the semiconductor detecting member 300 includes at least one defect 306 or a suspicious abnormal point. Then, using the aforementioned hot spot, infrared induced impedance change, radiation and other failure analysis (FA) devices (not shown), the position of the suspected abnormal region on the back side of the semiconductor detecting member 3 is found, and then after the physical energy damage signal is locked, A plurality of indicia 322 are formed directly around the defect 3〇6 on the back side by a laser emitting device (not shown). Then, a fixed voltage is provided, and the voltage is used to form a plurality of current conducting semiconductor detecting members 3GG, wherein one end of the semiconductor detecting member is connected to the electric left source Vcc, and the other end is grounded (groun(j). Because of the laser beam sweeping During the Cong process, part of the energy of the laser beam is converted into heat, so if there are any counties in the semiconductor test piece ±, the heat conduction near these defects will be different from other complete areas, causing local temperature changes and causing damage. Sexual damage point. Therefore, after the formation of the destructive damage point, the fixed voltage can be used to turn on the semiconductor detecting member 3〇〇, and then pass through the defect 306 near the defect 306 (10)tage c_rast abn〇rmai) The front side 302 of the conductor detecting member 300 is calibrated to the location of the defect 306. Compared with the conventional method for detecting semiconductor defects, the present invention first uses the failure analysis (FA) technique to find the location of the suspected abnormal region on the back side of a semiconductor detecting member, and then after locking the physical energy damage signal. Further, a non-contact physical energy is used to destructively form a plurality of reference marks on the circumference of the suspected abnormal region on the back side of the semiconductor detecting member, thereby calibrating the position of the defect. Then, a laser mark or a voltage contrast abnormality may be used to form a plurality of subtractive reference marks or highlight defects at the front of the semiconductor. Finally, the optical microscope, the scanning electron microscope, the *transparent electron microscope or the focused ion micromirror are inspected by the casting test piece = front side, and the physical position or chemical (4) technique is used to analyze the defect position and occur. Reasons to be excluded. In this way, it can only solve the problem of using the layout map to guide the pure martial arts, and can also know the cost and time of using the system to perform the defect axis on the semiconductor detector ##.公斤, consumption, straight = the above is only a preferred embodiment of the present invention, and is subject to all. W 夂 与 修饰 修饰 修饰 15 15 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 Fig. 2 is a schematic view showing the backside inspection and calibration defects of a semiconductor detecting member according to the first embodiment of the present invention. Fig. 3 is a front elevational view of the semiconductor detecting member of the first embodiment of the present invention. 4 to 6 are schematic views showing the back surface of the semiconductor detecting member, the front side inspection, and the calibration defect according to another embodiment of the present invention. Figure 7 is a schematic view showing the front side inspection and calibration defects of a semiconductor detecting member according to still another embodiment of the present invention.
16 1276818 【主要元件符號說明】 10缺陷檢測方法 12取樣 14缺陷檢測 16 人工缺陷分類 18缺陷再檢測 20 缺陷原因分析 100半導體檢測件 102正面 104背面 106缺陷 120雷射發射裝置 122參考標記 200半導體檢測件 202正面 204背面 206缺陷 220雷射發射裝置 222參考標記 224參考標記 300半導體檢測件 302正面 322參考標記 306缺陷 1716 1276818 [Description of main component symbols] 10 Defect detection method 12 Sampling 14 Defect detection 16 Artificial defect classification 18 Defect re-detection 20 Defect cause analysis 100 Semiconductor detector 102 Front side 104 Back surface 106 Defect 120 Laser emitting device 122 Reference mark 200 Semiconductor detection Piece 202 front side 204 back side 206 defect 220 laser emitting device 222 reference mark 224 reference mark 300 semiconductor detecting piece 302 front side 322 reference mark 306 defect 17