1271680 A7 B7 五、發明説明（） 發明所J之技術領域： (請先閱讀背面之注意事項再填寫本頁) 訂· 線 本發明係與一種導電凸塊（bump)之結構有關， 特別是有關於一種具平衡功能之導電凸塊（bump)之結 構有關。 先前技術： 在製造液晶顯示螢幕的製程應用領域之中，包 含了許多複雜的製造程序，一般而言，液晶顯示螢幕 疋由接合命夕的液日日顯示驅動晶片（LCD chip)、以及 ，邊驅動與控制電路的晶片至一玻璃基板上而形成， 每一液晶顯示螢幕上皆有許多的液晶顯示驅動晶片， 而晶片上的接觸塾（contacting pad)必須與玻璃基板 上的導線正確的加以對準並接合，並提供良好的導電 性，以使液晶顯示螢幕能由良好的訊號傳遞來顯示正 確無誤的影像。 經濟部智慧財產局員工消費合作社印製 為了達到上述的對準度及導電特性，目前已發 展出許多的接合方法，在眾多的接合方法之中，其; 較常應用的兩種方法可為捲帶式晶粒自動接合aape automated bonding; TAB)法以及晶片-玻璃接入 LH〇n-glass;。0(?)法。除了可應用於液晶顯示i 幕的1程之中，上述的方法亦可應用於其他多種不同 的晶片之中，以將晶片接合至電路板上或是苴他導電 ^氏張尺度適财關g^CNS)A4^^iGx觀 -_ ---: A7 1271680 五、發明説明（） 線路之上。在接合方法的應用中，由於導電膜的發展， 使得晶片接點的密度得以提昇，而，減少高接點密度下 相鄰接點間可能發生短路的問題。 參見第一圖所示，即為一接合過程的截面示意 圖，為便於介紹接合製程，圖中顯示的1(：晶片1Q係 以上下相反之方向來放置，IC晶片1〇之上已形成所 需的各種主動元件，以液晶顯示驅動晶片的丨C晶片 10的應用而言，1C晶片10之上會形成金凸塊12， 金凸塊12並與基材10上的鋁接墊相連，IC晶片1〇 並接合於玻璃基板14上以形成液晶顯示幕，IC晶片 10與玻璃基板14之間可以導電膜16提供電性的連 接。 一般而言，導電膜16係為一包含黏著性 材 質及導電顆粒的膜層，在IC晶片10對 2 14相對應的位置之後，ic晶片 壓。於玻璃基板14上，並由於壓合而使每個金凸 與玻璃基板上相對應的導電點丨5間藉由導電顆粒 形成通路，同時由於樹脂材質的高溫硬化而將 片10與玻璃基板U緊密結合。傳統使用金凸塊: 法，在對於對準精度以及導電膜丨6的導電特性比处 j好的控制之下’可提供相當有效而良好 ： 合’金的良妤導電特性並可提供IC晶片u j 板14間低電阻值的電性連接。 項基 其金凸塊結構如第二圖所示，在IC晶片1〇之 本紙張尺度適财國國家標準(CNS)A4規格(210x297公翁） .................•…訂......... (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 1271680 A7 B7 五、發明説明（） (請先閲讀背面之注意事項再填寫本頁) 鋁接墊22之周遭存有一層鈍態保護層24其上再形成 一金凸塊1 2，其結構可分為兩部分，分別為多層金 屬薄膜 26(稱為 Under Bump Metal lurgy，UBM 或 Ball Limiting Metallurgy，BLM)以及金凸塊 28 本身。 由於同一顆IC晶片10所形成之金凸塊12高度會有 誤差，為了克服此高度上的誤差，在進行如第一圖所 示之壓合製程時，由於金凸塊12具金屬高鋼性之特 徵’亦即其楊氏係數相當大（約11 0 GPa )，需施加 相當大之力量，方能使所有之金凸塊12與玻璃基板 14上之相對應導電點1 5導通，然而，如此亦造成鈍 態保護層24之斷裂。 經濟部智慧財產局員工消費合作社印製 傳統上為了降低金凸塊之揚氏係數，曾提出複 合凸塊之結構，如第三圖所示，複合凸塊之結構係在 铭接墊22上先形成一高分子膜30，由於高分子膜 不導電，因此其不能全部覆蓋紹接墊22，接著在於 其上形成一金屬膜38，其係由黏附層32、障蔽層34 與導體層36所共同形成，其依序之材料可為鉻、銅 與金。由於在傳統之結構設計上，此金屬膜3 8相各 薄，因此於做探針點測測試時，易將此金屬膜38 ^ 破，反而增加後續製程之難度，且其高分子膜3〇係 形成於紹接墊22之中心，而金屬膜38包覆於其 ” 因此其與銘接墊22間之傳導面積下降，且在^人· 程時，於轉折處42與44’由於金屬膜38相卷簿亦 容易斷裂，進而影響接合品質。 胃@ # 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐）~ ' ------- 1271680 A7 B7 五、發明説明（ (請先閲讀背面之注意事項再填寫本頁) 傳統金凸塊結構，由於具高揚氏係數，在壓合 製程上會造成鈍態保護層之斷裂，而傳統用以解決高 揚氏係數之複合凸塊結構，由於過薄之金屬膜，於做 探針點測測試時，亦造成金屬膜之破裂，反影響後續 金凸塊與接點之導通，因此目前需要一種改良金 塊結構，來解決上述之問題。 發明内容： 鑑於上述+之發明背景所述，傳統的金凸塊結構， 由於金本身具高揚氏係數，因此在壓合製 加相當大之力*，方能使所有之金凸塊 應導電顆粒接觸而導通，但此大的壓合力會造成鈍態 保護層之斷裂，而傳統用以解決高揚氏係數之複合凸 塊結構其係使用一高分子膜，然其結構上高分子膜係 形成於鋁接墊之中心，而金屬膜包覆於其外，由於此 金屬膜很薄，於做探針點測時，易造成金屬膜之破裂。 ，此實需一種改良金凸塊結構，來同時降低金凸塊之 揚氏係數’且又不會造成過薄之導電膜，或過度影響 其導電接觸面積。 經濟部智慧財產局員工消費合作社印製 本發明的目的為提供一種導電凸塊之結構。 本發明·的另一目的為提供一種導電凸塊之結 構’以應用於液晶顯示（LCD)驅動晶片的晶片—玻璃接 合（chip - on - glass; C0G)製程之中。1271680 A7 B7 V. INSTRUCTIONS () Technical Field of Invention J: (Please read the notes on the back and fill out this page.) Order The wire is related to the structure of a conductive bump, especially It relates to the structure of a conductive bump with a balanced function. Prior Art: In the field of process applications for manufacturing liquid crystal display screens, many complicated manufacturing processes are involved. In general, liquid crystal display screens are driven by a liquid crystal display chip (LCD chip), and The wafer of the driving and controlling circuit is formed on a glass substrate, and each liquid crystal display screen has a plurality of liquid crystal display driving chips, and the contact pads on the wafer must be correctly matched with the wires on the glass substrate. It is bonded and provides good electrical conductivity so that the liquid crystal display screen can be transmitted by a good signal to display the correct image. Printed by the Intellectual Property Office of the Ministry of Economic Affairs, the Consumers' Cooperatives. In order to achieve the above-mentioned alignment and conductivity characteristics, many bonding methods have been developed. Among the many bonding methods, the two methods that are commonly used can be volumes. Tape die automatic bonding aape automated bonding; TAB) method and wafer-glass access LH〇n-glass; 0 (?) method. In addition to being applicable to the LCD process, the above method can also be applied to a variety of different wafers to bond the wafer to the circuit board or to conduct electrical conduction. ) A4^^iGx view-_ ---: A7 1271680 V. Invention description () above the line. In the application of the bonding method, the density of the wafer contacts is improved due to the development of the conductive film, and the problem that a short circuit may occur between adjacent contacts at a high junction density is reduced. Referring to the first figure, it is a schematic cross-sectional view of a bonding process. In order to facilitate the introduction of the bonding process, the 1 shown in the figure (the wafer 1Q is placed in the opposite direction above, and the IC wafer 1 has been formed above The various active components, in the application of the 丨C wafer 10 of the liquid crystal display driving wafer, gold bumps 12 are formed on the 1C wafer 10, and the gold bumps 12 are connected to the aluminum pads on the substrate 10, the IC chip. 1 〇 is bonded to the glass substrate 14 to form a liquid crystal display screen, and the conductive film 16 can be electrically connected between the IC wafer 10 and the glass substrate 14. Generally, the conductive film 16 is made of an adhesive material and conductive. The film layer of the particles is pressed at the position corresponding to the IC wafer 10 pair 2 14 , and the ic wafer is pressed on the glass substrate 14 , and each gold bump and the corresponding conductive dot on the glass substrate are pressed by the press bonding. The vias are formed by conductive particles, and the sheet 10 is tightly bonded to the glass substrate U due to high-temperature hardening of the resin material. Conventionally, the gold bump: method is used, which is superior to the alignment accuracy and the conductive property of the conductive film 丨6. Under the control Providing quite effective and good: It combines the good electrical conductivity of 'gold' and can provide electrical connection between the low-resistance value of the IC chip uj board 14. The gold bump structure of the base is as shown in the second figure, on the IC chip 1〇 The paper size is suitable for the National Standard (CNS) A4 specification (210x297). ...........•...Set......... (Please Read the notes on the back and fill out this page.) Ministry of Economic Affairs Intellectual Property Office Staff Consumer Cooperative Printed 1271680 A7 B7 V. Invention Description () (Please read the note on the back and fill in this page) Aluminum pads 22 are stored around There is a passive protective layer 24 on which a gold bump 12 is formed, and the structure can be divided into two parts, namely a multilayer metal film 26 (referred to as Under Bump Metal lurgy, UBM or Ball Limiting Metallurgy, BLM) and gold. The bumps 28 themselves. Since the gold bumps 12 formed by the same IC wafer 10 have errors in height, in order to overcome the error in this height, the gold bumps 12 are used in the pressing process as shown in the first figure. The characteristic of high metality of metal is that its Young's coefficient is quite large (about 11 0 GPa), and it is necessary to apply phase. The force of the large force enables all the gold bumps 12 to be electrically connected to the corresponding conductive dots 15 on the glass substrate 14. However, this also causes the breakage of the passive protective layer 24. The Ministry of Economy, Intellectual Property Office, employee consumption cooperative prints Traditionally, in order to reduce the Young's modulus of gold bumps, the structure of the composite bumps has been proposed. As shown in the third figure, the structure of the composite bumps first forms a polymer film 30 on the pad 22, due to the polymer. The film is not electrically conductive, so that it cannot completely cover the bonding pad 22, and then a metal film 38 is formed thereon, which is formed by the adhesion layer 32, the barrier layer 34 and the conductor layer 36, and the material thereof may be chromium. , copper and gold. Since the metal film 38 is thin in the conventional structural design, it is easy to break the metal film 38 when performing the probe spot test, which increases the difficulty of the subsequent process, and the polymer film 3〇 It is formed at the center of the splicing pad 22, and the metal film 38 is covered by it" so that the conduction area between the splicing pad 22 and the splicing pad 22 is lowered, and at the turning point 42 and 44' due to the metal film The 38-phase book is also easy to break, which affects the quality of the joint. Stomach @ # This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X297 mm)~ ' ------- 1271680 A7 B7 V. Description of invention ( (Please read the precautions on the back and then fill out this page.) The traditional gold bump structure, due to the high Young's coefficient, will cause the breakage of the passive protective layer in the pressing process, and the traditional compound convex to solve the high Young's coefficient. The block structure, due to the excessively thin metal film, also causes the metal film to rupture during the probe spot test, which adversely affects the conduction of the subsequent gold bumps and contacts. Therefore, an improved gold nugget structure is needed to solve the above-mentioned problems. Problem. SUMMARY OF THE INVENTION: In view of the above + According to the background of the invention, the conventional gold bump structure, because the gold itself has a high Young's coefficient, so that a considerable force* is applied in the press-bonding system, so that all the gold bumps can be made conductive by contact with the conductive particles, but this The large pressing force causes the breakage of the passive protective layer, and the conventional composite bump structure for solving the high Young's coefficient uses a polymer film, but the polymer film is formed at the center of the aluminum pad. The metal film is coated on the outside, because the metal film is very thin, it is easy to cause the metal film to rupture when the probe is spotted. This requires an improved gold bump structure to simultaneously reduce the bump of the gold bump. The coefficient of '' does not cause too thin conductive film, or excessively affects its conductive contact area. Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printed The purpose of the present invention is to provide a structure of conductive bumps. One object is to provide a structure of conductive bumps for use in a chip-on-glass (C0G) process for liquid crystal display (LCD) driven wafers.
12716801271680
五、發明説明（） 本發明的又一目的為提供一種可自動平衡之導 電凸塊之結構，避免因施加壓力之不平均造成接點電 阻差異大的現象並應用於液晶顯示（L c ]))模組的晶片一 玻璃接合（chip - on-glass; C0G)製程之中。 本發明中導電凸塊之結構至少包含一層緩衝 層，此緩衝層於接合過程中可形成一小形變，藉由緩 衝層之形變可彌補所形成之不等高之金凸塊間可能造 成接合不良之問題。於此緩衝層上，具有一多廣金屬 膜，此多層金屬膜係由一黏附層、障蔽一 所形成。接著於此多層金屬膜上為金。；體保= 明之導電凸塊，由於具有低揚氏係數之緩衝層，因此 =壓合製程時，可有效之調配壓合力，讓接合更加緊 密，且可避免接點電阻不均現象發生。 (請先閲讀背面之注意事項再填寫本頁)V. INSTRUCTION DESCRIPTION OF THE INVENTION () Another object of the present invention is to provide a structure for automatically balancing conductive bumps, which avoids a phenomenon in which the difference in contact resistance is large due to uneven application of pressure and is applied to a liquid crystal display (L c ]) The module is in a chip-on-glass (C0G) process. In the present invention, the structure of the conductive bump includes at least one buffer layer, and the buffer layer can form a small deformation during the bonding process, and the deformation of the buffer layer can compensate for the poor bonding between the gold bumps formed by the unequal height. The problem. On the buffer layer, there is a multi-metal film formed by an adhesion layer and a barrier. Next, gold is applied to the multilayer metal film. Body protection = Bright conductive bumps, because of the low Young's factor buffer layer, so when the press-fit process, the press-fit force can be effectively adjusted to make the joint more tight and avoid uneven contact resistance. (Please read the notes on the back and fill out this page)
T 經濟部智慧財產局員工消費合作社印製 實施方法： 在不限制本發明之精神及應用範圍之下，以下 即以一實施例，介紹本發明之實施；熟悉此領域技藝 者’在瞭解本發明之精神後，當可應用本發明之導電 凸塊於多種不同的接合製程及不同的晶片上，藉由本 發明之結構，可在不造成過薄之導電薄膜的情況下， 降低金凸塊之揚氏係數，如此即可不需過大之壓合力 而形成良好之接合狀態，且本發明之結構，由於具有 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 1271680 A7 B7 五、發明説明（ <請先閲讀背面之注意事項再填寫本頁) 低之楊氏係數，因此於壓合製程時，可有效之調配壓 合力’讓接合更加緊密，且可避免鈍態保護層斷裂發 生’本發明之應用當不僅限於以下所述之實施例。 本發明中提供一種導電凸塊之結構，在較佳實 施例之中，如第四圖所示，此結構可應用於形成液晶 顯示驅動晶片402所需之導電凸塊，以將驅動晶片402 接合至玻璃基板400之上，用以驅動液晶顯示螢幕 4〇4 ’其中此驅動晶片會與周邊電路4〇6相接，並可 用以取代傳統製程中之金凸塊，以降低楊氏係數，此 結構所提供之具低揚氏係數之金凸塊，可改善傳統導 電凸塊的特性。 以下即以一實施例，來介紹本發明之實施，而 本發明中之導電凸塊結構可應用於多種不同的接合製 程及不同的晶片上，在了解本發明之實施後，熟知此 領域技藝者當可應用本發明之方法於相似的應用之 中，以下所述之實施例僅為一單純之介紹例。〜 經濟部智慧財產局員工消費合作社印製 請再次參見第一圖所示之接合過程的截面示意 圖，於1C晶片10上之金凸塊12可藉由導電膜16與 玻璃基板14上之導電點15相接合，一般而言'，在^ 合過程之中，須施加足夠的接合壓力，以使^凸塊12 與玻璃基板14上之導電點15的連接。為了能產生 好之接合力，於第一圖中所示之各金凸塊12間須且 ί同ί丨高f ’否則金凸塊本身所具有之高楊。 數，根據下式所示： 1271680 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（）T Ministry of Economic Affairs Intellectual Property Office Employees Consumption Cooperative Printing Method: Without limiting the spirit and application of the present invention, the following is an embodiment to describe the implementation of the present invention; those skilled in the art 'understand the present invention' After the spirit, when the conductive bump of the present invention can be applied to a plurality of different bonding processes and different wafers, the structure of the present invention can reduce the bump of the gold bump without causing an excessively thin conductive film. Coefficient, so that a good bonding state can be formed without excessive pressing force, and the structure of the present invention is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) according to the paper scale. 1271680 A7 B7 V. Invention Description ( <Please read the note on the back and then fill out this page.) The low Young's coefficient, so when the pressing process can effectively adjust the pressing force 'to make the joint more tight, and avoid the breakage of the passive protective layer' The application of the present invention is not limited to the embodiments described below. The present invention provides a structure of conductive bumps. In the preferred embodiment, as shown in the fourth figure, the structure can be applied to the conductive bumps required to form the liquid crystal display driving wafer 402 to bond the driving wafer 402. Above the glass substrate 400, for driving the liquid crystal display screen 4〇4', wherein the driving chip is connected with the peripheral circuit 4〇6, and can be used to replace the gold bumps in the conventional process to reduce the Young's modulus. Gold bumps with a low Young's modulus provided by the structure improve the characteristics of conventional conductive bumps. The embodiment of the present invention will be described below by way of an embodiment, and the conductive bump structure of the present invention can be applied to a plurality of different bonding processes and different wafers. After understanding the implementation of the present invention, those skilled in the art are familiar with the art. While the method of the present invention can be applied to similar applications, the embodiments described below are merely a brief introduction. ~ Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing Please refer again to the cross-sectional schematic diagram of the bonding process shown in the first figure. The gold bumps 12 on the 1C wafer 10 can pass through the conductive dots on the conductive film 16 and the glass substrate 14. The 15 phase bonding, in general, is required to apply sufficient bonding pressure during the bonding process to connect the bumps 12 to the conductive dots 15 on the glass substrate 14. In order to produce a good bonding force, the gold bumps 12 shown in the first figure are required to be the same as the height of the gold bumps. The number is as follows: 1271680 A7 B7 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing 5, invention description ()
F= Kx S 其中Κ為揚氏係數，f為外加·接合力，S為在外 加接合力下所產生之形變。 咼楊氏係數’勢必造成於接合過程時，需外加 一高壓合力，才能使不等高之各金凸塊間，藉由小形 變來與玻璃基板1 4上對應之導電點1 $接合，然此面 壓合力對於1C晶片10會有不良之影響。因此，本發 明中具低楊氏係數的導電凸塊之結構如下戶斤述。 參見第五圖中之截面示意圖所示，ic晶片 上具有接觸墊102形成於其上，在本例之中，1C晶 片1 0 0可為液晶顯示驅動晶片，液晶顯示驅動晶片上 已完成所需之元件，並藉由接觸墊102來提供對外的 連接；在其他的應用之中，IC晶片10 〇亦可為其他 種類的晶片，藉由接觸墊102來形成對外的連接或接 合；在大部分的應用之中，接觸墊1〇2可為鋁接觸墊， 接觸墊102周圍區域並以保護層104加以覆蓋，保護 層104用以間隔1C晶片1〇〇上的各個接觸塾之 間’並用以保護IC晶片1 〇 〇上之電路不與外界接觸， 保護層1 04可使用如氧化矽或氮化矽等等的介電材 質。 接著請參考第六圖所示，本發明導電凸 士 如下所示，於1C晶片100上方形成一緩衝層 &， 此緩衝層1 06為單一層高分子材質所構成，例’ 酿胺（poly imide )，此層之主要目的係用來與& 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公爱) " '^- ............費........訂.........線· (請先閲讀背面之注意事項再填寫本頁) 1271680 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（ 成長之金凸塊相連，來降低整體之楊氏係數。由於楊 氏係數之降低，因此於接合過程時，，所需外加之壓合 力並不需要太高，即可藉由此緩衝層106之作用，讓 可能於形成過程中造成彼此不等高之各金凸塊間，藉 由緩衝層106之小形變來與玻璃基板14上對應之導 電點15接合（如第一圖所示），因此並不需要施加 過大之塵合力，可將壓合過程中，對1C晶片1〇〇所 造成之衝擊降至最低，其中緩衝層1〇6可使用如旋轉 塗佈之方式加以形成，且其形成厚度至少約為5微米 (β m)。 由於此緩衝層1 〇 6係由不導電之材質所形成， 因此要將所覆蓋之部分接觸墊丨02暴露出來，以進行 後續金凸塊之成長，參見第七圖所示，首先形成光阻 層於1C晶片1〇〇上之緩衝層1〇6上，並定義開口 ι3〇 於光阻層内、接觸墊102上方的位置處，其中此開口 寬/度為m ’最後以定義完成後之光阻層為罩幕，對 緩衝層106進行蝕刻，其蝕刻之方法可為濕式蝕刻法 或，式姓刻法。於餘刻完成後並將剩餘之光阻層剝離 而形成如第七圖所示之截面圖形。 接著形成金凸塊本體於緩衝層1〇6與接觸墊1〇2 之上方如第八圖所示，為一金凸塊（g〇i(j Bump) 之結構圖，當要進行覆晶結合（FUp Chip)時，首 要在1C晶片100上成長一金凸塊，其結構可分為兩 部分，分別為多層金屬薄膜丨丨〇 (稱為Under Bump 本紙張尺度適用中國國家標準(CNS)A4規格(21〇χ297公釐) :............變.........訂：.......線· (請先閲請背面之注意事項再填寫本頁) 1271680 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明説明（）F = Kx S where Κ is the Young's modulus, f is the applied and joining force, and S is the deformation caused by the external joining force. The "Yangyang coefficient" is bound to cause a high-pressure resultant force in the joining process, so that the gold bumps of the unequal height can be joined to the corresponding conductive points 1 on the glass substrate 14 by small deformation. This surface pressing force has an adverse effect on the 1C wafer 10. Therefore, the structure of the conductive bump having a low Young's modulus in the present invention is as follows. Referring to the cross-sectional view in the fifth figure, the ic wafer has a contact pad 102 formed thereon. In this example, the 1C wafer 100 can be a liquid crystal display driving wafer, and the liquid crystal display driving wafer has been completed. The components are provided by the contact pads 102 to provide external connections; among other applications, the IC chips 10 can also be other types of wafers, which are formed by the contact pads 102 to form external connections or joints; In the application, the contact pad 1 2 may be an aluminum contact pad, the area around the contact pad 102 is covered with a protective layer 104, and the protective layer 104 is used to space between the contact pads on the 1C wafer 1 The circuit for protecting the IC chip 1 is not in contact with the outside, and the protective layer 104 may be made of a dielectric material such as tantalum oxide or tantalum nitride. Referring to the sixth figure, the conductive bump of the present invention is formed as follows. A buffer layer & is formed on the 1C wafer 100. The buffer layer 106 is composed of a single layer of polymer material. Imide ), the main purpose of this layer is to use & this paper scale applies Chinese National Standard (CNS) A4 specification (210X297 public) " '^- ............ fee. .......定.........线· (Please read the notes on the back and fill out this page) 1271680 A7 B7 Ministry of Economic Affairs Intellectual Property Bureau Employees Consumption Cooperative Printed V. The growing gold bumps are connected to reduce the overall Young's coefficient. Due to the reduction of the Young's coefficient, the additional pressing force does not need to be too high during the bonding process, so that the buffer layer 106 can be Acting to allow the gold bumps which may not be equal to each other during the formation process to be bonded to the corresponding conductive dots 15 on the glass substrate 14 by the small deformation of the buffer layer 106 (as shown in the first figure), It is not necessary to apply excessive dust force, and the impact on the 1C wafer can be reduced during the pressing process. The lowest, wherein the buffer layer 1〇6 can be formed by spin coating, and formed to a thickness of at least about 5 μm (β m). Since the buffer layer 1 〇 6 is formed of a non-conductive material, To expose some of the covered contact pads 02 for subsequent growth of the gold bumps, as shown in the seventh figure, first, a photoresist layer is formed on the buffer layer 1〇6 of the 1C wafer 1 ,, and The opening ι3 is defined in the photoresist layer at a position above the contact pad 102, wherein the opening width/degree is m', and finally the photoresist layer is defined as a mask, and the buffer layer 106 is etched and etched. The method may be a wet etching method or a singular method. After the completion of the process, the remaining photoresist layer is peeled off to form a cross-sectional pattern as shown in Fig. 7. Then, a gold bump body is formed on the buffer layer 1 6 and the top of the contact pad 1〇2 as shown in the eighth figure, is a structure diagram of a gold bump (g〇i (j Bump), when the FUp Chip is to be performed, the first in the 1C wafer 100 Growing a gold bump, the structure can be divided into two parts, respectively, a multilayer metal film丨〇 (called Under Bump This paper scale applies to China National Standard (CNS) A4 specification (21〇χ297 mm):............change......... :.......线· (Please read the note on the back and fill in the page again) 1271680 Α7 Β7 Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing 5, invention description ()
Metallurgy， UBM 或 Ball Limiting Metallurgy， BLM)以及金凸塊108本身，其中，多層金屬薄膜至少 由一層金屬所組成’其功能分別為黏附層 112(Adhesion Layer)，如鈦（Ti)、鉻（Cr)、鈦 化鑛（TiW)等’其主要目的在於提供與接觸墊1〇2 和緩衝層1 0 6間有較強之黏著性。另一金屬層為障蔽 層 114 ( Wett ing Layer )，如鎳（Ni )，銅（Cu ) 荨。在蔽層114上會再艘上一層導電層116 (conductive Layer )，如金（Au)等，目前對多層 金屬薄膜之製作主要是以蒸鍍及濺鍍之方式進行。曰 請再次參見第八圖所示，之後形成金凸塊1 〇 8 於多層金屬薄膜110上與接觸墊1〇2上方之位置處， 金凸塊108與接觸墊102間即透過多層金屬薄膜 形成電性之連接。本例中金凸塊1〇8可以'電鍛 (electroplated)的方式形成於多層金屬薄膜u"〇 上。在本例之中，形成金凸塊1〇8之步驟可如下述， 首先开>成光阻層118於1C晶片1〇〇上之多層金屬薄 膜11 0上；並定義出一用以形成金凸塊丨〇8之開口 ' 接著形成金凸塊108於開口處之内的多層金屬薄膜 110上，最後去除剩餘之光阻層。 '、 金凸塊108係以均勻的厚度覆蓋於其下方 金屬薄膜110之上，而形成與其下方多層金屬薄臈 相同的表面形狀，由於邊緣處多層金屬薄膜丨丨〇、略 凸起的形狀以及接觸墊102表面平坦之形狀，金凸= • r.....................、可.........線· (請先閲讀背面之注意事項再填寫本頁)Metallurgy, UBM or Ball Limiting Metallurgy, BLM) and gold bumps 108 themselves, wherein the multilayer metal film is composed of at least one layer of metal, which functions as an adhesion layer 112, such as titanium (Ti), chromium (Cr). ), titanium ore (TiW), etc.'s main purpose is to provide strong adhesion to the contact pad 1〇2 and the buffer layer 106. The other metal layer is a Wett ing layer, such as nickel (Ni), copper (Cu) yttrium. A conductive layer 116, such as gold (Au), is placed on the mask 114. The current fabrication of the multilayer metal film is mainly carried out by evaporation and sputtering.再次Please refer to FIG. 8 again, and then a gold bump 1 〇8 is formed on the multilayer metal film 110 at a position above the contact pad 1〇2, and a gold bump 108 and the contact pad 102 are formed through the multilayer metal film. Electrical connection. In this example, the gold bumps 1〇8 can be formed in an electroplated manner on the multilayer metal film u". In this example, the step of forming the gold bumps 1 〇 8 may be as follows, firstly forming a photoresist layer 118 on the multilayer metal film 110 on the 1 C wafer 1 ;; and defining a The opening of the gold bump 8 is then formed on the multilayer metal film 110 within the opening of the gold bump 108, and finally the remaining photoresist layer is removed. ', the gold bumps 108 are overlaid on the underlying metal film 110 with a uniform thickness to form the same surface shape as the multilayer metal thin layer below it, due to the ruthenium, slightly convex shape of the multilayer metal film at the edges, and The shape of the surface of the contact pad 102 is flat, gold convex = • r....................., can be.........line (please first Read the notes on the back and fill out this page)
1271680 五、發明説明（） 經濟部智慧財產局員工消費合作社印製 108可形成中央區域平货、而於蠢 向於遭緣極小之區域具有 略為凸起之形狀，如第八圖所示之表面形狀。 _接著參閱第九圖，去除多層金屬薄膜110與緩 衝層106中未被金凸塊1〇8所覆蓋之部分，本例中 =金凸塊1 08為罩幕，進行蝕刻製程來加以去除。值 得注意的是，於本發明之金凸塊1〇8之製程中，其中 緩衝層106於接觸墊1〇2之開口寬度為W1,而接觸 墊102於保護層1〇4開口之寬度為W2，其中W1與W2 之比例關係如下所示： 1/3S W1/W2S 2/3 另一方面，緩衝層1〇6於接觸墊1〇2上方之成 長高度為Η1，而緩衝層1〇6、多層金屬薄膜11〇與金 凸塊1 0 8於接觸墊1 〇 2上方之總高度為η 2，於本發 明中，緩衝層106之高度Η1，占總高度Η2之比例至 少需為1/3，其楊氏係數才得有效降低，於接合過程 時，才能使不等高之各金凸塊間，於小外加力下，即 可產生形變來與玻璃基板14上對應之導電點15接 合0 參見第十圖所示，在金凸塊108形成於1C晶片 100上之後，即可進行1C晶片100與玻璃基板120 相接合，為便於描述、圖中之IC晶片1 〇 〇係以上下 相反的方向顯示，I c晶片1 〇 〇與玻璃基板1 2 0之間 可以導電膜122貼合於玻璃基板120上。 參閱第十一圖，為本發明結構之另一實施例， 再 f 訂 12 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) 12716801271680 V. INSTRUCTIONS () The Ministry of Economic Affairs' Intellectual Property Office employee consumption cooperative prints 108 to form a central area of flat goods, and has a slightly convex shape in a region that is slightly stupid, such as the surface shown in Figure 8. shape. Next, referring to the ninth figure, the portion of the multilayer metal film 110 and the buffer layer 106 which is not covered by the gold bumps 1〇8 is removed. In this example, the gold bumps 108 are masked and removed by an etching process. It should be noted that in the process of the gold bumps 1 to 8 of the present invention, the opening width of the buffer layer 106 at the contact pad 1 〇 2 is W1, and the width of the contact pad 102 at the opening of the protective layer 1 〇 4 is W2. The ratio of W1 to W2 is as follows: 1/3S W1/W2S 2/3 On the other hand, the growth height of the buffer layer 1〇6 above the contact pad 1〇2 is Η1, and the buffer layer is 〇6, The total height of the multilayer metal film 11〇 and the gold bumps 108 above the contact pads 1 〇2 is η 2 . In the present invention, the height of the buffer layer 106 Η 1 is at least 1/3 of the total height Η 2 . The Young's coefficient is effectively reduced. During the bonding process, the gold bumps of unequal height can be deformed to bond with the corresponding conductive dots 15 on the glass substrate 14 under a small external force. Referring to the tenth figure, after the gold bumps 108 are formed on the 1C wafer 100, the 1C wafer 100 can be bonded to the glass substrate 120. For convenience of description, the IC wafer 1 in the figure is opposite to the above. In the direction display, the conductive film 122 can be attached to the glass substrate 120 between the Ic wafer 1 〇〇 and the glass substrate 120 . Referring to the eleventh figure, another embodiment of the structure of the present invention, and the second paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1271680
五、發明説明（） (請先閲讀背面之注意事項再填寫本頁) 於1C晶片100上具有接觸墊1〇2形成於其上，接觸 墊102周圍區域並以保護層1〇4加以覆蓋，保護層1〇4 用以間隔IC晶片1 〇 〇上的各個接觸墊丨〇 2之間，並 用以保護1C晶片1〇〇上之電路不與外界接觸。接著 於IC晶片1 0 〇上方形成一緩衝層1 〇 6，並利用微影 製程，將所需之圖案定義出來。 第二實施例與第一實施例之最大不同點在於， 於第一實施例時，此時會開始成長多層金屬薄膜，然 而於第二實施例中，此時會以無電锻製程 (Electroless plating)將一鎳金屬128填充於圖 案化之緩衝層1 06中，接著再以蝕刻製程或化學研磨 製程’將凸出於緩衝層1〇6之部分除去，以形成鎳金 屬128與緩衝層106之表面切齊。接著再以錢鍍之方 式形成一層金層1 24，做為黏附層，之後形成金凸塊 126於金層124上，金凸塊126可以電鍍 (electroplated)的方式形成於金層124上。於此結 構中，由於鎳金屬128與緩衝層1〇6之表面切齊，因 此所形成之金凸塊126之表面將無高低差異存在，如 此於後續之製程中，可與玻璃基板做更完美之結合。 經濟部智慧財產局員工消費合作社印製 另一方面，於本結構中，若緩衝層1〇6於接觸 墊102之開口寬度為W3，而接觸墊1〇2於保護層1〇4 開口之寬度為W4，其中W3與W4之比例關係如下所 示： 1/3S W3/W4S 2/3 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公爱) 127168〇 A7 B7 五、發明説明（） 經濟部智慧財產局員工消費合作社印製 由於本發明之導電凸塊結構具有一層緩衝層， 因此總導電凸塊之揚氏係數可大為降低，且於接二過 程中，此緩衝層可形成一小形變，藉由緩衝層之it 可彌補不等高之金凸塊可能造成接合不良之問題/ 本發明以較佳之實施例說明如上，僅用於藉以 幫助了解本發明之實施，非用以限定本發明之精^， 而熟悉此領域技藝者於領悟本發明之精神後，在不脫 離本發明之精神範圍内，當可作些許更動潤飾及等同 之變化替換，其專利保護範圍當視後附之申請專利範 圍及其等同領域而定。 i式簡單說明Z 參考下列的發明詳細說明，本發明的後續方向與 優點可以很容易的被瞭解與被鑑賞，並配合後面的圖 式加以說明，其中包含： 第一圖顯示IC晶片與玻璃基板間接合製程之截 面示意圖； 第二圖顯示傳統金凸塊之截面示意圖； 第三圖顯示傳統複合金凸塊之截面示意圖； 第四圖顯示液晶顯示驅動晶片接合至玻璃基板 之不意圖； 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) ..............變.........、可......... (請先閲讀背面之注意事項再填寫本頁 } 1271680 A7 B7 五、發明説明（ 第五圖顯示本發明中具有接觸墊形成於其上之 IC晶片截面示意圖； 第六圖顯示本發明中形成緩衝層於I C晶片上之 截面示意圖； 第七圖顯示本發明中利用光阻層定義出緩衝層 圖案之截面示意圖； 第八圖顯示本發明中形成多層金屬薄膜與金凸 塊之截面不意圖， 第九圖顯示本發明中去除多層金屬薄膜與緩衝 層中未被金凸塊所覆蓋之部分之截面示意圖； 第十圖顯示將本發明之導電凸塊接合至玻璃基 板上之截面示意圖；以及 第十一圖顯示本發明第二實施例金凸塊之截面 示意圖。 圖號對照說明： (請先閲讀背面之注意事項再填寫本頁) -訂· 經濟部智慧財產局員工消費合作社印製 線 1 0 IC晶片 1 4玻璃基板 16導電膜 2 2鋁接墊 26多層金屬薄膜 3 0南分子膜 34障蔽層 1 2金凸塊 15導電點 1 8導電顆粒 24鈍態保護層 28金凸塊 32黏附層 36導體層 15 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐) 1271680 A7 B7 五、發明説明（） 3 8金屬膜 1 0 2接觸墊 I 0 6 緩衝層 110多層金屬 II 4障蔽層 11 8光阻層 122導電膜 126金凸塊 130 開口 4 0 2驅動晶片 406周邊電路 100 1C晶片 1 0 4保護層 1 0 8金凸塊 膜11 2黏附層 116導電層 1 2 0玻璃基板 1 2 4金層 128鎳金屬 4 0 0玻璃基板 404液晶顯示螢幕 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐)V. Inventive Note () (Please read the precautions on the back side and then fill out this page) On the 1C wafer 100, a contact pad 1 2 is formed thereon, and the area around the contact pad 102 is covered with a protective layer 1〇4. The protective layer 1〇4 is used to space between the respective contact pads 2 on the IC chip 1 and to protect the circuit on the 1C wafer 1 from contact with the outside. A buffer layer 1 〇 6 is then formed over the IC wafer 10 〇 and the desired pattern is defined using a lithography process. The greatest difference between the second embodiment and the first embodiment is that, in the first embodiment, the multilayer metal film is grown at this time, but in the second embodiment, the electroless plating process is performed at this time. A nickel metal 128 is filled in the patterned buffer layer 106, and then a portion protruding from the buffer layer 1〇6 is removed by an etching process or a chemical polishing process to form a surface of the nickel metal 128 and the buffer layer 106. Cut together. Then, a gold layer 1 24 is formed by a gold plating method as an adhesion layer, and then a gold bump 126 is formed on the gold layer 124, and the gold bump 126 can be formed on the gold layer 124 in an electroplated manner. In this structure, since the surface of the nickel metal 128 and the buffer layer 1〇6 are aligned, the surface of the formed gold bump 126 will have no difference in height, so that it can be more perfect with the glass substrate in the subsequent process. The combination. On the other hand, in the present structure, if the width of the opening of the buffer layer 1〇6 to the contact pad 102 is W3, and the width of the contact pad 1〇2 is the opening of the protective layer 1〇4 For W4, the ratio of W3 to W4 is as follows: 1/3S W3/W4S 2/3 This paper scale applies to China National Standard (CNS) A4 specification (210X297 public) 127168〇A7 B7 V. Invention description () Since the conductive bump structure of the present invention has a buffer layer, the Young's coefficient of the total conductive bump can be greatly reduced, and in the second process, the buffer layer can form a buffer layer. Small deformation, the fact that the bumps of the buffer layer can compensate for the gold bumps of the unequal height may cause the problem of poor joints. The present invention has been described above with reference to the preferred embodiments, and is only used to help understand the implementation of the present invention, and is not limited to In the spirit of the present invention, those skilled in the art will appreciate that the scope of the patent protection can be changed after a certain degree of modification and equivalent change without departing from the spirit of the invention. It is subject to the scope of application for patents and its equivalent fields. BRIEF DESCRIPTION OF THE DRAWINGS With reference to the following detailed description of the invention, the subsequent aspects and advantages of the present invention can be readily appreciated and appreciated, and described in conjunction with the following drawings, including: The first figure shows the IC wafer and the glass substrate A cross-sectional view of the inter-joining process; the second figure shows a schematic cross-sectional view of a conventional gold bump; the third figure shows a schematic cross-sectional view of a conventional composite gold bump; the fourth figure shows the intention of the liquid crystal display driving the wafer to be bonded to the glass substrate; The scale applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) ..............Change........., can... (Please read the note on the back and then fill out this page.) 1271680 A7 B7 V. Inventive Description (The fifth figure shows a schematic cross-sectional view of an IC wafer having a contact pad formed thereon in the present invention; and the sixth figure shows a buffer formed in the present invention. FIG. 7 is a schematic cross-sectional view showing a buffer layer pattern defined by a photoresist layer in the present invention; FIG. 8 is a cross-sectional view showing a cross-section of forming a multilayer metal film and a gold bump in the present invention, Nine map A cross-sectional view showing a portion of the multilayer metal film and the buffer layer not covered by the gold bumps in the present invention; FIG. 10 is a schematic cross-sectional view showing the bonding of the conductive bump of the present invention to the glass substrate; and FIG. A schematic cross-sectional view of a gold bump according to a second embodiment of the present invention is shown. Figure number comparison description: (Please read the note on the back and then fill in the page) - Order · Ministry of Economic Affairs Intellectual Property Bureau employee consumption cooperative printing line 1 0 IC chip 1 4 glass substrate 16 conductive film 2 2 aluminum pad 26 multilayer metal film 3 0 south molecular film 34 barrier layer 1 2 gold bump 15 conductive point 1 8 conductive particles 24 passive protective layer 28 gold bump 32 adhesion layer 36 conductor Layer 15 This paper size applies to China National Standard (CNS) A4 specification (210X 297 mm) 1271680 A7 B7 V. Invention description () 3 8 metal film 1 0 2 contact pad I 0 6 buffer layer 110 multilayer metal II 4 barrier layer 11 8 photoresist layer 122 conductive film 126 gold bump 130 opening 4 0 2 drive wafer 406 peripheral circuit 100 1C wafer 1 0 4 protective layer 1 0 8 gold bump film 11 2 adhesion layer 116 conductive layer 1 2 0 glass substrate 1 2 4 gold layer 128 nickel metal 40 0 0 glass substrate 404 LCD screen (please read the note on the back and fill out this page) Printed by the Intellectual Property Office of the Intellectual Property Office of the Ministry of Economic Affairs This paper scale applies the Chinese National Standard (CNS) A4 specification (210X 297 mm).