1268129 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電路之驗證方法及製造方法，且特別是 有關於一種軟板電路之驗證方法及製造方法。 【先前技術】 -般而言，傳統軟板電路封裝技術分為晶粒軟板接合技術 (ChiponFihn，COF)以及軟板捲帶式封裝技術⑶㈣⑸心1268129 IX. Description of the Invention: [Technical Field] The present invention relates to a verification method and a manufacturing method of a circuit, and more particularly to a verification method and a manufacturing method for a flexible board circuit. [Prior Art] In general, the traditional soft board circuit packaging technology is divided into chip soft board bonding technology (ChiponFihn, COF) and soft board tape and tape packaging technology (3) (4) (5)
Package，TCP)。由於構裝流程不同，驗證方法亦有差異，以下_ 係舉例作詳細說明。 請參照第1圖’其繪示以晶粒軟板接合技術（C〇F)形成之 傳統軟板電路的剖面示意圖。傳統c〇F軟板電路1()包括：驅動 晶片9、防銲層（SolderResist, SR) 14、金屬層13以及聚乙醯 胺層（Poiyimide layer，PI)11。驅動晶片9係與金屬層13電性連 接。聚乙醯胺層1!係黏附於金屬層13之下表面，防辉層^係 覆蓋金屬層13之上表面。防銲層14具有__開口 14&作為測試區， 暴露出金屬層13，以利探針15接觸金屬層13進行電性測試。 請參照第2圖，其㈣以軟板捲帶式封裝技術（Tcp)形成 之傳統軟板電路的剖面示意圖。傳統Tcp軟板電路2〇包括：驅 動晶片19、防銲層24、金屬層23、黏著層^以及聚乙酿胺層 21。驅動日日片19係愈> 屬展9 q φ 、由 H、金屬層23電性連接。_層24係黏附於 金屬層23之上表面。聚乙酿胺層21藉由黏著層η而與金屬層 23接合，其係覆蓋於金屬層23之下表面。聚乙酿胺層21及黏著 層22具有-開口 21a作為測試區，暴露出金屬層U，以利探針 25接觸金屬層23進行電性測試。 然而’傳統軟板電路之測試區，如前述之測試區⑷及仏， 5 1268129 係裸露於空氣中’容易產生氧化以及靜電放電（Electr〇static Discharge，ESD)的問題。由於傳統軟板電路之測試區裸露出金 屬層，暴路於空氣中的金屬層容易被氧化。此外，裸露的金屬層 對於靜電放電的防觀力很差，使得軟板電路㈣受到靜電放電 之干擾，進而導致半導體元件永久性的破壞。 【發明内容】Package, TCP). Due to the different manufacturing processes, the verification methods are also different. The following _ are examples for detailed description. Referring to Figure 1, a schematic cross-sectional view of a conventional flexible circuit formed by a die bonding technique (C〇F) is shown. The conventional c〇F flexible board circuit 1() includes a driving wafer 9, a solder resist layer (Solder Resist, SR) 14, a metal layer 13, and a Poiyimide layer (PI) 11. The drive wafer 9 is electrically connected to the metal layer 13. The polyacetamide layer 1 is adhered to the lower surface of the metal layer 13, and the anti-corrosion layer covers the upper surface of the metal layer 13. The solder resist layer 14 has a __opening 14& as a test area, the metal layer 13 is exposed, so that the probe 15 contacts the metal layer 13 for electrical testing. Please refer to Fig. 2, which shows a cross-sectional view of a conventional flexible board circuit formed by a flexible tape reel packaging technology (Tcp). The conventional Tcp flexible board circuit 2 includes a driving wafer 19, a solder resist layer 24, a metal layer 23, an adhesive layer, and a polyethylamine layer 21. The driving sunday film 19 is more and more > the extension 9 q φ is electrically connected by H and the metal layer 23. The layer 24 is adhered to the upper surface of the metal layer 23. The polyaniline layer 21 is bonded to the metal layer 23 by the adhesive layer η, which covers the lower surface of the metal layer 23. The polyaniline layer 21 and the adhesive layer 22 have an opening 21a as a test area, and the metal layer U is exposed to facilitate the electrical test of the probe 25 contacting the metal layer 23. However, the test area of the conventional flexible board circuit, such as the aforementioned test area (4) and 仏, 5 1268129 is exposed to the air, is prone to oxidation and electrostatic discharge (ESD) problems. Since the metal layer is exposed in the test area of the conventional flexible circuit, the metal layer in the air is easily oxidized. In addition, the bare metal layer has a poor resistance to electrostatic discharge, causing the soft board circuit (4) to be disturbed by electrostatic discharge, which in turn causes permanent destruction of the semiconductor element. [Summary of the Invention]
有於此本發明的目的就是在提供一種軟板電路之測試方 法及製造方法，以使金屬層不需裸露於空氣中，並可方便地進行 測試，軟板電路可以是以TCP封裝或以c〇F封裝。The object of the present invention is to provide a test method and a manufacturing method for a flexible board circuit, so that the metal layer does not need to be exposed to the air, and can be conveniently tested. The flexible board circuit can be packaged in TCP or c. 〇F package.
根據本發明的目的，提出一種軟板電路之驗證方法。首先 提供軟板電路，而軟板電路包括軟板、第—導線、第三導線以^ 驅動晶片。軟板具有二絕緣層，且第_導線及第二導線係包覆力 絕緣層間。驅動晶片係設置於軟板上，驅動晶片至少具有一第 接腳以及-第二接腳，第—接腳以及第二接腳係分別與第一導矣 及第二導線電性連接。接著，輸人_第—訊號至驅動晶片，⑽ 體步驟為產生第-訊號至-第_探針之後，將第—探針刺穿絕與 層之-與第-導線電性連接，用以將第—訊號輸人驅動晶片。势 後，接收-第二訊號，其係由驅動晶片依據第—訊號所產生。^ 步驟之具體作法為將-第二探針刺穿絕緣層之―以盘第 電性連接，將第二訊號經由第二探針而輸出。最後，依據第二可 號而驗證軟板電路。 a 根據本發明的目的，提出-種軟板電路之製造方法，白心 成軟板電路以及驗證軟板電路兩A步驟。在形成軟板電^ 中，首先，形成具有二絕緣層之軟板，並於絕緣層間形成 導線及一第二導線。之後，設置-驅動晶片於軟板上，驅動以 6 1268129 至少具有一第一接腳以及一第二接腳，第一接腳以及第二接腳係 分別與第一導線及第二導線電性連接。在驗證軟板電路之步驟 中’首先，提供軟板電路，而軟板電路包括軟板、第一導線、第 一導線以及驅動晶片。軟板具有二絕緣層，且第一導線及第二導 線係包覆於絕緣層間。驅動晶片係設置於軟板上，驅動晶片至少 具有一第一接腳以及一第二接腳，第一接腳以及第二接腳係分別 與第一導線及第二導線電性連接。接著，輸入一第一訊號至驅動 晶片’其具體步驟為產生第一訊號至一第一探針之後，將第一探 針刺穿絕緣層之一與第一導線電性連接，用以將第一訊號輸入驅 動晶片。然後，接收一第二訊號，其係由驅動晶片依據第一訊號 所產生。此步驟之具體作法為將一第二探針刺穿絕緣層之一以與 第二導線電性連接，將第二訊號經由第二探針而輸出。最後，依 據第二訊號而驗證軟板電路。 為讓本發明之上述目的、特徵、和優點能更明顯易懂，下文 特舉一較佳實施例，並配合所附圖式，作詳細說明如下： 【實施方式】 本發明的主要構想就是在提供一種軟板電路的測試方法及 製造方法，軟板電路可以是利用晶粒軟板接合技術（chip onAccording to an object of the present invention, a verification method of a flexible board circuit is proposed. First, a soft board circuit is provided, and the soft board circuit includes a soft board, a first lead, and a third lead to drive the wafer. The flexible board has two insulating layers, and the first wire and the second wire are coated between the insulating layers. The driving chip is disposed on the flexible board. The driving chip has at least one first pin and a second pin. The first pin and the second pin are electrically connected to the first lead and the second lead, respectively. Then, the input signal is sent to the driving chip, and the step (10) is to generate the first signal to the -th probe, and the first probe is pierced and electrically connected to the first and the first wires. The first signal is input to drive the chip. After the potential is received, the second signal is generated by the driver chip according to the first signal. ^ The specific method of the step is to electrically connect the second probe to the insulating layer, and to output the second signal via the second probe. Finally, the soft board circuit is verified based on the second sign. a According to the object of the present invention, a method of manufacturing a flexible board circuit, a white card into a flexible board circuit, and a verification soft board circuit are proposed. In forming the flexible board, first, a soft board having two insulating layers is formed, and a wire and a second wire are formed between the insulating layers. After that, the driving-driving chip is mounted on the flexible board, and the driving device has at least a first pin and a second pin, and the first pin and the second pin are respectively electrically connected to the first wire and the second wire. connection. In the step of verifying the flexible board circuit, 'first, a soft board circuit is provided, and the flexible board circuit includes a soft board, a first lead, a first lead, and a drive wafer. The flexible board has two insulating layers, and the first wire and the second wire are wrapped between the insulating layers. The driving chip is disposed on the flexible board. The driving chip has at least a first pin and a second pin. The first pin and the second pin are electrically connected to the first wire and the second wire, respectively. Then, a first signal is input to the driving chip. The specific step is to generate a first signal to a first probe, and electrically connect one of the first probes to the first layer to electrically connect the first probe. A signal is input to the driver chip. Then, a second signal is received, which is generated by the driving chip according to the first signal. In this step, a second probe is pierced by one of the insulating layers to be electrically connected to the second wire, and the second signal is output through the second probe. Finally, the soft board circuit is verified based on the second signal. The above described objects, features and advantages of the present invention will become more apparent from the following description. Providing a test method and a manufacturing method for a flexible board circuit, which can be a chip on board bonding technology (chip on
Film ’ COF )或軟板捲帶式封裝技術（Taped Carrier Package，TCP ) 兩種技術所生產，以使金屬層不需裸露於空氣中，並可方便地進 行測試。以下係舉一 TCP軟板電路為例作詳細說明，然而本實施 例並不會限縮本發明所欲保護之範圍。 請參照第4A及4B 圖，其繪示為依照本發明一較佳實施例之Tcp軟板電路之結構 圖。第4A圖繪示TCP軟板電路之俯視圖，第4B圖繪示沿第4A 圖中之剖面線4B-4B’且沿箭頭方向所視之軟板電路剖面圖。請參 1268129 照第4A圖，軟板電路500至少包括軟板50、第一導線51、第二 導線52以及驅動晶片55。請參照第4B圖，軟板50具有二絕緣 層53及54，第一導線51及第二導線52係包覆於二絕緣層53 及54之間。二絕緣層53及54例如分別是防銲（Solder Resist，SR) 層以及聚亞醯胺（Polyimide，PI)層之一，絕緣層54較佳的是防 銲層，絕緣層53較佳的是聚亞醯安層。驅動晶片55係設置於軟 板50上，驅動晶片55至少具有一第一接腳56以及一第二接腳 57，分別與第一導線51及第二導線52電性連接。較佳的是，第 一導線51以及第二導線52例如是圖案化之銅箔（c〇pper Foil)。 本實施例之軟板電路500不需如習知之軟板電路預留測試區，因 此第一導線51及第二導線52係不暴露於空氣中，因而減少其氧 化的問題。 一般製造軟板電路時，形成軟板電路後係需進行驗證，以確 定軟板電路的正確性。請參照第3圖，其繪示依照本發明一較佳 實施例之軟板電路之驗證方法的流程圖。請同時參照第4b圖。 首先，在步驟S301中，產生第一訊號至第一探針6〇，以第一探 針60刺穿絕緣層54而與第—導線51電性連接，以將第一訊號 輸^至驅動晶片55。之後第一導線51係透過第一接腳％將第一 輸入至驅動晶片55。或者另外，第—探針6〇亦可以透過刺 牙絶緣層5 3的方式而與第一導線51電性連接。 驅動晶片55係依據第一訊號而產生第二訊號。接著在第 圖中之步驟S302中’以第二探針7〇刺穿絕緣層Μ而盥第二 線IT生連接’以接收第二訊號。之後，第二導線52係透過 Γ二Γ二訊號經由第二探針70而輪出。另外，第二探: ::可:透過刺穿絕緣層53的方式而與第 取後，如㈣咖所示，依據純之第二訊號而驗證軟板電: 1268129 500。 本實施例係以經由軟板捲帶式封裝（Tape Carrier Package， TCP)製成之軟板電路及其驗證方法作詳細說明，但本發明並不 限定於此。本發明之軟板電路係可晶粒軟膜接合技術（Chip On Film, COF)製成，或是捲帶式晶粒接合技術（Tape Automated Bonding，TAB)製成。 請參照第5圖，其繪示為依照本發明另一較佳實施例之軟板 電路示意圖。軟板電路600至少包括軟板60、第一導線61、第 二導線62以及驅動晶片65。軟板電路600係以晶粒軟膜接合技 術（Chip On Film，COF)製成之軟板電路。第一導線61及第二 導線62係包覆於二絕緣層63及64之間，絕緣層63係藉由黏著 層63a貼附於第一導線61以及第二導線62之下表面。二絕緣層 63及64例如分別是防銲（Solder Resist，SR)層以及聚亞醯胺 (Polyimide，PI)層之一，絕緣層64較佳的是防銲層，絕緣層 63較佳的是聚亞醯安層。驅動晶片65係設置於軟板60上，驅動 晶片65至少具有一第一接腳66以及一第二接腳67,分別與第一 導線61及第二導線62電性連接。較佳的是，第一導線61以及 第二導線62例如是圖案化之銅箔（Copper Foil)。本實施例之軟 板電路600不需如習知之軟板電路預留測試區，因此第一導線61 及第二導線62係不暴露於空氣中，因而減少其氧化的問題。 軟板電路600之驗證方法與軟板電路500的驗證方法相似， 可以用探針刺穿絕緣層而與第一導線及第二導線電性連接，以輸 入或接收訊號而驗證軟板電路600，於此不再贅述。 本發明上述實施例所揭露之軟板電路之製造以及驗證方 法，具有不易氧化、靜電防護能力佳、減少製程步驟以及節省成 本等優點。首先，本發明係利用探針刺穿絕緣層的方法進行電性 1268129 測試，銅箔導線表面具有絕緣層保護而不易氧化且靜電放電的防 濩月b力佳，使得軟板電路不易受到破壞，延長半導體元件之使用 壽命。其次，由於絕緣層不需開設一開口作為電性測試區，於形 成此、、、巴緣層日^亦不需另外的治具以及步驟，可減少製程步驟亦可 節省製作成本。 綜上所述，雖然本發明已以一較佳實施例揭露如上，然其並 非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内，當可作各種之更動與潤飾，因此本發明之保護範圍當 視後附之申請專利範圍所界定者為準。 1268129 【圖式簡單說明】Film ‘ COF ) or Taped Carrier Package (TCP ) are produced in two technologies so that the metal layer does not need to be exposed to the air and can be easily tested. The following is a detailed description of a TCP soft board circuit, but the present embodiment does not limit the scope of the present invention. Please refer to FIGS. 4A and 4B, which are diagrams showing the structure of a Tcp flexible board circuit in accordance with a preferred embodiment of the present invention. Fig. 4A is a plan view showing the circuit of the TCP flexible board, and Fig. 4B is a cross-sectional view showing the circuit of the flexible board taken along the line 4B-4B' in Fig. 4A and viewed in the direction of the arrow. Referring to FIG. 4A, the flexible circuit 500 includes at least a flexible board 50, a first lead 51, a second lead 52, and a drive wafer 55. Referring to Fig. 4B, the flexible board 50 has two insulating layers 53 and 54. The first conductive line 51 and the second conductive line 52 are wrapped between the two insulating layers 53 and 54. The two insulating layers 53 and 54 are, for example, one of a Solder Resist (SR) layer and a Polyimide (PI) layer, the insulating layer 54 is preferably a solder resist layer, and the insulating layer 53 is preferably Poly Asiaan layer. The driving chip 55 is disposed on the flexible board 50. The driving chip 55 has at least a first pin 56 and a second pin 57 electrically connected to the first wire 51 and the second wire 52, respectively. Preferably, the first wire 51 and the second wire 52 are, for example, patterned copper foil (c〇pper Foil). The soft board circuit 500 of the present embodiment does not need to reserve a test area as in the conventional soft board circuit, so that the first wire 51 and the second wire 52 are not exposed to the air, thereby reducing the problem of oxidation. When a soft-board circuit is generally manufactured, it is necessary to verify the soft-board circuit to determine the correctness of the soft-board circuit. Referring to FIG. 3, a flow chart of a method for verifying a soft board circuit in accordance with a preferred embodiment of the present invention is shown. Please also refer to Figure 4b. First, in step S301, a first signal is generated to the first probe 6A, and the first probe 60 is pierced through the insulating layer 54 to be electrically connected to the first wire 51 to transfer the first signal to the driving chip. 55. The first wire 51 is then first input to the drive wafer 55 through the first pin %. Alternatively, the first probe 6 can be electrically connected to the first wire 51 via the ratchet insulating layer 53. The driving chip 55 generates a second signal according to the first signal. Next, in step S302 in the figure, the second probe 7 is pierced by the second probe 7 and the second line IT is connected to receive the second signal. Thereafter, the second wire 52 is rotated through the second probe 70 through the second signal. In addition, the second probe: :: can: through the way of piercing the insulating layer 53 and after the first take, as shown in (4) coffee, verify the soft board according to the pure second signal: 1268129 500. This embodiment is described in detail by a soft board circuit manufactured by a Tape Carrier Package (TCP) and a verification method thereof, but the present invention is not limited thereto. The flexible circuit of the present invention is made of Chip On Film (COF) or Tape Automated Bonding (TAB). Please refer to FIG. 5, which is a schematic diagram of a soft board circuit in accordance with another embodiment of the present invention. The flexible board circuit 600 includes at least a flexible board 60, a first lead 61, a second lead 62, and a drive wafer 65. The flexible board circuit 600 is a flexible board circuit made of Chip On Film (COF). The first wire 61 and the second wire 62 are wrapped between the two insulating layers 63 and 64, and the insulating layer 63 is attached to the lower surface of the first wire 61 and the second wire 62 by the adhesive layer 63a. The two insulating layers 63 and 64 are, for example, one of a Solder Resist (SR) layer and a Polyimide (PI) layer, the insulating layer 64 is preferably a solder resist layer, and the insulating layer 63 is preferably Poly Asiaan layer. The driving chip 65 is disposed on the flexible board 60. The driving chip 65 has at least a first pin 66 and a second pin 67 electrically connected to the first wire 61 and the second wire 62, respectively. Preferably, the first wire 61 and the second wire 62 are, for example, patterned copper foil (Copper Foil). The flexible circuit 600 of the present embodiment does not need to reserve a test area as in the conventional soft board circuit, so that the first wire 61 and the second wire 62 are not exposed to the air, thereby reducing the problem of oxidation. The verification method of the flexible board circuit 600 is similar to the verification method of the flexible board circuit 500. The probe can be pierced through the insulating layer to be electrically connected to the first wire and the second wire, and the soft board circuit 600 can be verified by inputting or receiving signals. This will not be repeated here. The method for manufacturing and verifying the soft board circuit disclosed in the above embodiments of the present invention has the advantages of being less oxidizable, having good electrostatic protection capability, reducing process steps, and saving cost. Firstly, the present invention performs the electrical 1268129 test by the method of piercing the insulating layer by the probe. The surface of the copper foil wire is protected by the insulating layer and is not easy to be oxidized, and the anti-smashing force of the electrostatic discharge is good, so that the soft board circuit is not easily damaged. Extend the life of semiconductor components. Secondly, since the insulating layer does not need to open an opening as an electrical test area, the formation of the and the edge layer does not require additional fixtures and steps, which can reduce the manufacturing steps and save manufacturing costs. In view of the above, the present invention has been described above in terms of a preferred embodiment, and is not intended to limit the invention, and various modifications may be made without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims. 1268129 [Simplified illustration]
第1圖繪不根據以晶粒軟板接合技術（c〇F)形成之傳統軟 板電路的剖面示意圖。 '' A 第2圖繪讀據以軟板捲帶式封裝技術（TCp)形成之傳統 軟板電路的剖面示意圖。 第3圖繪不依照本發明一較佳實施例之軟板電路之驗證方 法的流程圖。 第4A圖繪示依照本發明之較佳實施例之軟板電路之俯視 圖。 第4B圖繪不沿第4A圖中之剖面線4B_4b，且沿箭頭方向所 視之剖面圖。 第5圖繪示為依照本發明另一較佳實施例之軟板電路示意 【主要元件符號說明】 1〇 :傳統COF軟板電路 11 :聚乙醯胺層 13 :金屬層 14 :防銲層 2〇 ·•傳統TCP軟板電路 21 :聚乙醯胺層 22 :黏著層 24 :防銲層 23 :金屬層 5〇 =軟板 1268129 5 1 :第一導線 52 :第二導線 53、54 :絕緣層 5 5 ·驅動晶片 56 :第一接腳 57 :第二接腳 60、70 :探針 500 :軟板電路Figure 1 depicts a cross-sectional view of a conventional flexible circuit that is not formed by a die bonding technique (c〇F). '' A Figure 2 depicts a cross-sectional view of a conventional flexible board circuit formed by a flexible tape reel packaging technology (TCp). Figure 3 is a flow chart showing a method of verifying a soft board circuit in accordance with a preferred embodiment of the present invention. Figure 4A is a top plan view of a flexible circuit in accordance with a preferred embodiment of the present invention. Fig. 4B is a cross-sectional view taken along line 4B_4b of Fig. 4A and viewed in the direction of the arrow. FIG. 5 is a schematic diagram of a soft board circuit according to another preferred embodiment of the present invention. [Main component symbol description] 1: Traditional COF flexible board circuit 11: Polyacetamide layer 13: Metal layer 14: solder resist layer 2〇•• Traditional TCP Soft Board Circuit 21: Polyacetamide Layer 22: Adhesive Layer 24: Solder Mask 23: Metal Layer 5〇 = Soft Board 1268129 5 1 : First Conductor 52: Second Conductor 53, 54: Insulation layer 5 5 · drive wafer 56 : first pin 57 : second pin 60 , 70 : probe 500 : soft board circuit