(1) 1251944 玖、發明說明 【發明所屬之技術領域】 本發明爲關於，在呈現P型傳導之磷化硼系半導體層 的表面上接觸設置之P型電阻性電極構造，及利用其P型 電阻性電極構造之化合物半導體元件，特別是，構成化合 物半導體發光元件之技術。 【先前技術】 以往，揭示有利用ΠΙ-ν族化合物半導體之一種的磷 化硼（化學式：Β Ρ )及其混晶構成之發光二極體（英文 簡稱：LED )等的磷化硼系半導體元件之技術（例如，參 考專利文件1 )。例如，ρ型的導電性的單量體磷化硼（ 化學式：BP )層爲，利用以作爲pn接合型雙異質結構（ D Η )接合構造型之發光部構成之障壁層（例如，參考專 利文件2 )。磷化硼系半導體發光二極體爲，例如，由磷 化硼層形成Ρ型的鍍銅層（clad)的表面上設置ρ型電阻 性電極之構成。關於先前技術，例如，關於P型磷化硼層 爲，從銘（A1 )形成P型電阻性電極之例子已是眾所皆知 (例如，非專利文件1 ) ° 磷化硼爲，不刻意添加不純物也可得到低電阻的n型 或P型之任何傳導型半導體層（例如’參考專利文件1 ) 。依此，由被導電性的磷化硼層所構成之’例如’鍍銅層 (c 1 a d )層或接觸層（c ο n t a c t )層等爲，得到形成電阻性 電極。揭示有由具備作爲接觸層之添加錶（兀素付5虎： -4- (2) 1251944 M g )的P型磷化硼層之以往的化合物半導體發光元件， 從金（元素符號：An ) •鋅（元素符號：Zn )所構成之 例子（例如，參考專利文件2 )。 但’如同上述從金屬爲，無法達到對於p型磷化硼給 予良好的電阻性接觸性之電阻性電極的安定形成。因此， 爲使發光兀件動作之電流（兀件驅動電源）流通時的輸入 電阻爲，無意義的增加，成爲順方向電流（V f )高的L E D 相異結論之問題。又，在成爲得到低臨限値電壓（Vth ) 的雷射二極體（LD )時成爲不利的狀況。 【專利文件1】 參考美國專利第6,069,02 1號公報明細書 【專利文件2】 參考日本特開平2 - 2 8 8 3 8 8號公報 【非專利文件1】 K.Shohno 等、Jaanaru o b u kur i sutaru guroosu ( J.Crystal Growth)，第 2 4/2 5 集，1 9 74 年（荷蘭），193 頁 【發明內容】 〔發明爲解決之課題〕 本發明爲，呈現含有硼（B)與磷（p)作爲構成元 素之P型磷化硼系半導體層的表面使其接觸設置之P型電 阻性電極，並具備良好的電阻性接觸性之電極構成。P型 電阻性電極爲’指設置於P型半導體層正（陽）電極。又 -5- (3) 1251944 ’提供具備由關於本發明構成所製成之P型電阻性電極之 化合物半導體發光元件。 L爲解決課題之方法〕 (1 )設置有接觸在包含以呈現p型傳導的硼與磷作 爲構成元素之導電性磷化硼系半導體層的表面上的電阻性 電極之電阻性電極構造；至少接觸在前述P型磷化硼系半 導體層的表面上的電極之底面爲，由鑭系元素或含有鑭系 元素之合金所構成爲其特徵之電阻性電極構造。 (2) 接觸gij述p型碟化硼系半導體層表面之底面爲 ’由鑭與功函數在4.5eV以下的元素之合金所構成爲其特 徵之如上述（1 )所記載之電阻性電極構造。 (3) 接觸在前述P型磷化硼系半導體層表面之底面 爲，由鑭與鋁的元素之合金所構成爲其特徵之如上述（1 )或（2 )所記載之電阻性電極構造。 (4) 接觸在前述P型磷化硼系半導體層表面之底面 爲，由鑭與矽的元素之合金所構成爲其特徵之如上述（1 )或（2 )所記載之電阻性電極構造。 (5) 前述P型化硼系半導體層爲，以不刻意添加 不純物之未摻雜且在室溫的能隙寬爲2.8 e V以上5.4 e v以 下的p型單體隣化硼爲其特徵之包含有如上述（1)或（2 )所記載的電阻性電極構造之化合物半導體裝置。 (6) 由上述（5)所記載之化合物半導體裝置所製成 之化合物半導體發光兀件 -6 - (4) 1251944 (7 )具備由絕緣性或導電性結晶製 該結晶基板上形成之化合物半導體層製成 置於該發光層上含有作爲呈現p型傳導之 素之導電性磷化硼系半導體層，和使其接 系半導體層之電阻性接觸性的p型電阻性 導體發光元件；至少接觸前述磷化硼系半 前述p型電阻性電極之底面爲，由鑭系元 元素合金所構成爲其特徵之化合物半導體 (8) 前述p型磷化硼系半導體層表 鑭與功函數在4.5eV以下的元素之合金所 如上述（7 )所記載之化合物半導體發光元 (9) 接觸在前述p型磷化硼系半導 爲，由鑭與鋁的元素之合金所構成爲其转 )或（8 )所記載之化合物半導體發光元件 (10) 接觸前述P型磷化硼系半導體 ’由鑭與矽的元素之合金所構成爲其特f 或（8 )所記載之化合物半導體發光元件。 (11 )前述化合物半導體層由III-V 體製成爲其特徵之如上述（7)及（8)所 導體發光元件。 (12)前述化合物半導體層由氮々 Gaxini_xN : ；[)或氮燐化鎵（組成 SYS1)的化合物半導體製成爲其特徵；^ .(8 )所記載之化合物半導體發光元件。 成之基板，和由 之發光層，和設 硼與磷之構成元 觸該P型磷化硼 電極之化合物半 導體層的表面之 素又或含有鑭系 發光元件。 面之底面爲，由 構成爲其特徵之 .件。 體層表面之底面 :徵之如上述（7 〇 層表面之底面爲 :之如上述（7 ) 族的化合物半導 記載之化合物半 :銦鎵（組成式 式 GaNi-γΡγ: 〇 :如上述（7 )或 (5) 1251944 (1 3 )擁有從鑭系元素或含有鑭系元素合金所構成之 前述P型電阻性電極前述底部部分’作爲平面形狀，連線 用基台電極的形狀以及鄰接形成之網狀部分爲其特徵之如 上述（7 )或（8 )所記載之化合物半導體發光元件。 (1 4 )前述p型磷化硼系半導體層爲，以不刻意添加 不純物之未摻雜且在室溫的能隙寬 在2.8eV以上5.4eV以下的p型單體磷化硼爲其特徵 之如上述（7)或（8)所記載之化合物半導體發光元件。 (1 5 )使用上述（7 )〜（1 4 )其中任1項所記載之 化合物半導體元件之LED燈。 【實施方式】 本發明爲，關於對於P型磷化硼系半導體層提供優良 的電阻性接觸性之電極構造。 關於本發明之磷化硼系半導體層爲，含有硼（B)與 磷（P )爲構成元素之化合物半導體，例如，(1) The present invention relates to a P-type resistive electrode structure that is placed in contact with a surface of a P-type conductive phosphide-based semiconductor layer, and a P-type is used. A compound semiconductor element having a resistive electrode structure, in particular, a technique of constituting a compound semiconductor light-emitting element. [Prior Art] In the past, a boron phosphide semiconductor such as a light-emitting diode (LED) composed of boron phosphide (chemical formula: Β Ρ ) and a mixed crystal thereof, which is one of ΠΙ-ν compound semiconductors, has been disclosed. The technology of the component (for example, refer to Patent Document 1). For example, a p-type conductive single-quantity boron phosphide (chemical formula: BP) layer is a barrier layer composed of a light-emitting portion which is a pn junction type double heterostructure (D Η ) junction structure type (for example, reference patent) File 2). The boron phosphide-based semiconductor light-emitting diode is, for example, a structure in which a p-type resistive electrode is provided on the surface of a ruthenium-plated copper plated layer formed of a boron phosphide layer. Regarding the prior art, for example, regarding the P-type boron phosphide layer, an example of forming a P-type resistive electrode from Ming (A1) is well known (for example, Non-Patent Document 1) ° Boron phosphide is not deliberate Any conductive semiconductor layer of low resistance n-type or P-type can also be obtained by adding an impurity (for example, 'Reference Patent Document 1>). Accordingly, a resistive electrode is formed by a 'copper layer (c 1 a d ) layer or a contact layer (c ο n t a c t ) layer composed of a conductive boron phosphide layer. A conventional compound semiconductor light-emitting device having a P-type boron phosphide layer having an addition table (兀素付5虎: -4-(2) 1251944 M g ) as a contact layer is disclosed, from gold (element symbol: An) • An example of the composition of zinc (element symbol: Zn) (for example, refer to Patent Document 2). However, as described above, from the metal, it is impossible to achieve stable formation of a resistive electrode which imparts good resistive contact to p-type phosphide. Therefore, the input resistance when the current (the driving power source) for operating the light-emitting element is distributed is meaninglessly increased, and the L E D having a high forward current (V f ) is different. Further, it becomes an unfavorable situation when the laser diode (LD) having a low threshold voltage (Vth) is obtained. [Patent Document 1] Japanese Patent No. 6,069,02 1 (Patent Document 2) Reference Japanese Patent Laid-Open No. 2 - 2 8 8 3 8 8 [Non-Patent Document 1] K. Shohno et al., Jaanaru obu kur i sutaru guroosu (J.Crystal Growth), 2nd 4/2 5th episode, 1970 (Netherlands), 193 pages [invention] [The present invention solves the problem] The present invention is characterized by containing boron (B) and The surface of the P-type boron phosphide-based semiconductor layer in which phosphorus (p) is a constituent element is brought into contact with the P-type resistive electrode provided, and has an electrode structure having excellent resistive contact properties. The P-type resistive electrode is referred to as a positive (positive) electrode of the P-type semiconductor layer. Further, -5-(3) 1251944' provides a compound semiconductor light-emitting device having a P-type resistive electrode made of the composition of the present invention. L is a method for solving the problem. (1) A resistive electrode structure in which a resistive electrode on a surface of a conductive phosphide-based semiconductor layer containing boron and phosphorus as a constituent element exhibiting p-type conductivity is contacted is provided; The bottom surface of the electrode that is in contact with the surface of the P-type boron phosphide-based semiconductor layer is a resistive electrode structure characterized by a lanthanoid element or an alloy containing a lanthanoid element. (2) The bottom surface of the surface of the p-type boron-based semiconductor layer in contact with gij is a resistive electrode structure as described in (1) above, which is characterized by an alloy of an element having a work function of 4.5 eV or less. . (3) The bottom surface of the surface of the P-type boron phosphide-based semiconductor layer is a resistive electrode structure as described in the above (1) or (2), which is characterized by an alloy of bismuth and aluminum. (4) The bottom surface of the surface of the P-type boron phosphide-based semiconductor layer is a resistive electrode structure as described in the above (1) or (2), which is characterized by an alloy of bismuth and antimony. (5) The P-type boron-based semiconductor layer is characterized in that p-type monomer boron hydride having an undoped impurity which is not intentionally added with impurities and having a band gap of 2.8 e V or more and 5.4 ev or less at room temperature is characterized. A compound semiconductor device comprising the resistive electrode structure according to (1) or (2) above. (6) The compound semiconductor light-emitting device 6 - (4) 1251944 (7) produced by the compound semiconductor device according to the above (5), comprising a compound semiconductor formed on the crystalline substrate by insulating or conductive crystal The layer is formed of a p-type resistive conductor light-emitting element having a conductive boron phosphide-based semiconductor layer as a p-type conductive element and a resistive contact property of the semiconductor layer; The bottom surface of the phosphide-based boron-type p-type resistive electrode is a compound semiconductor characterized by a lanthanide element alloy (8). The surface of the p-type phosphide-based semiconductor layer and the work function are 4.5 eV. The alloy of the following elements is in contact with the compound semiconductor light-emitting element (9) described in the above (7), and the p-type boron phosphide-based semiconductor is formed by an alloy of an element of bismuth and aluminum. (8) The compound semiconductor light-emitting device (10) described above is in contact with the P-type boron phosphide-based semiconductor, and is composed of an alloy of an element of ytterbium and ytterbium, which is a compound semiconductor light-emitting device described in detail or in (8). (11) The above-mentioned compound semiconductor layer is characterized by the III-V system, and the conductor light-emitting element according to the above (7) and (8). (12) The compound semiconductor layer is characterized by being a compound semiconductor of nitrogen 々 Gaxini_xN : ; [) or gallium arsenide (constituting SYS1); and the compound semiconductor light-emitting device described in (8). The substrate, and the light-emitting layer, and the surface element of the compound semiconductor layer of the P-type boron phosphide electrode, which is composed of boron and phosphorus, or a lanthanide light-emitting element. The bottom surface of the surface is composed of the features. The bottom surface of the surface of the bulk layer: as described above (the bottom surface of the surface of the 7 〇 layer is: a compound semi-conductive compound such as the above (7) group: indium gallium (composition formula GaSi-γΡγ: 〇: as above (7 Or (5) 1251944 (1 3 ) having the P-type resistive electrode composed of a lanthanoid element or a lanthanide-based alloy, the bottom portion 'as a planar shape, the shape of the base electrode for wiring, and the adjacent formation A compound semiconductor light-emitting device according to the above (7) or (8), wherein the p-type boron phosphide-based semiconductor layer is undoped without intentionally adding impurities. The p-type monomer phosphide having a band gap of 2.8 eV or more and 5.4 eV or less at room temperature is characterized by the compound semiconductor light-emitting device of the above (7) or (8). (1 5 ) Using the above (7) (1) The LED lamp of the compound semiconductor device according to any one of the above aspects. [Embodiment] The present invention relates to an electrode structure which provides excellent resistive contact with a P-type boron phosphide-based semiconductor layer. Boron phosphide semiconductor layer of the present invention , A constituent element of the compound semiconductor containing boron (B) and phosphorus (P) is, for example,
BaAl^GayIni.a.p.7Pi-5As5 ( 0 < a ^ 1 ' β <1 ' γ <ι 、0<α + β + γ$1、0 ^ δ < 1 ) 〇 又，例如，BaAl^GayIni.a.p.7Pi-5As5 ( 0 < a ^ 1 ' β <1 ' γ <ι , 0 < α + β + γ$1, 0 ^ δ < 1 ) 〇 Again, for example,
BaAlpGaylni.a.p.yPi.gNg ( 0 < a ^ 1 n β <1 - γ <1 > 0<α + β + γ s l、0 s δ<1 )。例如，含有單量體的磷化硼（ BP )、磷化硼·銦•鎵（組成式 BaGaYIn i _α_γΡ : 0<α$ 1 、〇$γ<1)，又，含有氮燐化硼（組成式 ΒΡι.δΝδ: 〇$ δ < 1 )及砒化磷化硼（組成式 Β Ρ ! · δ A s δ )等複數的V族元 素之混晶體。例如，ΒΡι·δΝδ或BPi.sAss等，希望磷（Ρ) (6) 1251944 的下限組成比（1 - δ )爲，Ο . 5 0以上，更希望爲〇 . 7 5以上 〇 爲設置P型電阻性電極之p型磷化硼系半導體層爲， 鹵素（h a 1 〇 g e η )法、氫化物（h y d r i d e )法及有機金屬化 學氣相沉積法（MOCVD( Metal Organic Chemical VaporBaAlpGaylni.a.p.yPi.gNg ( 0 < a ^ 1 n β <1 - γ <1 >0<α + β + γ s l, 0 s δ <1 ). For example, boron phosphide (BP) containing a single body, boron phosphide, indium gallium phosphide (composition formula BaGaYIn i _α_γΡ : 0< α $ 1 , 〇 $ γ < 1), and, in addition, boron hydride (composition) Formula ΒΡι.δΝδ: 〇$ δ < 1) and mixed crystals of complex group V elements such as bismuth phosphide (formula Β · ! · δ A s δ ). For example, ΒΡι·δΝδ or BPi.sAss, etc., it is desirable that the lower limit composition ratio (1 - δ ) of phosphorus (Ρ) (6) 1251944 is Ο . 50 or more, and more desirably 〇. 7 5 or more is set to P type. The p-type boron phosphide-based semiconductor layer of the resistive electrode is a halogen (ha 1 〇ge η ) method, a hydride method, and an organic metal chemical vapor deposition method (MOCVD (Metal Organic Chemical Vapor)
Deposition)，以下簡稱爲MOCVD法）形成。又，分子 線磊晶法也可形成（參考J. Solid State C hem. ，1 33 ( 1 9 9 7 ) 、2 6 9〜2 7 2頁）。例如，p型單量體的磷化硼層爲 ，可以以三乙基硼（分子式：（C2H5)3B)與磷化氫（分 子式：PH3)作爲原料的MOCVD法形成。作爲p型BP層 的形成溫度，適合1 〇 〇 〇 °C〜1 2 0 0 °C的溫度。形成時的供 給原料比率（=PH3/ ( C2H5 ) 3B )爲，適合.爲10°c〜50°C 。不刻意添加不純物，即所謂，不摻雜（undope )的BP 層爲有效的回避因不純物的擴散使他層變性。加上形成溫 度、V/III的比率，如在精密的控制形成速度，可形成能 隙寬大的磷化硼系半導體層（參考日本特願2 0 0 2 - 1 5 8 2 8 2 )° 特別是，在室溫的能隙寬爲2.8電子伏特（單位·· eV )以上5.4eV以下之p型磷化硼系半導體層爲希望可利用 。更希望爲2.8eV〜3.2eV之能隙寬（wide bandgap)之p 型磷化硼系半導體層爲，化合物半導體發光元件，例如， 可利用擁有P型鑛銅（clad)層等的阻障（barrier)作用 作爲障壁層。又，能隙寬的P型磷化硼系半導體層爲，適 合從由氮化銦·鎵（組成式 GaxIni_xN:0gX$l)及氮 -9 - (7) 1251944 燐化鎵（組成式 G a N ! · γ Ρ γ : 0 ^ Y $ 1 )製成的發光層將藍 色光或 色光等的可視光構成爲透過發光元件的外部的窗 (window)層。能隙超過5.4eV後，發光層的障壁差變大 ’不利於得到順方向電壓或閥値電壓低的化合物半導體發 光元件。例如’ p型鍍銅層爲’可適合從在室溫爲載體濃 度在lxl019cnT3以上’電阻率在5χ10·2Ω· cm以下之低 抵抗磷化硼層形成。構成p型鍍銅層的p型磷化硼的層厚 爲’適合爲5 0 0奈米（單位：nm )以上5〇〇〇 nm以下。接 觸P型鍍銅層並設置p型電阻性電極之構成，如p型鍍銅 層爲不必要的薄層，因經由電阻性電極供給之元件驅動電 流無法在全發光層上平面的遍佈擴散，成爲不利的狀況。 利用如此般的p型磷化硼系半導體層之化合物半導體 裝置的代表例爲，雖不是強制的，但爲磷化硼系化合物半 導體LED。特別是，由如上述，之氮化銦鎵（組成式 GaxIni.xN· 〇‘Χ$1)及氣憐化錄（組成式 GaNi-γΡγ: 0 SYS 1)製成之發光層爲適合之組合。另外，雷射二極 體（LD)等的化合物半導體發光元件也可適合使用。 關於本發明，以鍍銅層或電極形成用接觸（contact ) 層形成之p型磷化硼系半導體層的表面接觸設置的p型電 阻性電極的底部面爲，從鑭系元素的膜或含有其元素的合 金膜構成。 鑭系元素爲，原子序5 7的鑭（L a )到原子序7 1的镏 (元素符號：L u )的元素（參考J · A · D u f f i e著，「無 機化學」’（有）廣川書店，昭和46年4月1 5日發行， -10- (8) 1251944 5版，2 6 2頁）。姉（C e ;原子序5 8 )、鐯（P r ;原子序 59 )鈸（Nd ;原子序60 )、鈥（Ho ;原子序67 )等鑭系 元素類（lanthancnds)(參考上述「無機化學」，263頁 )。特別’本發明爲，p型電阻性電極的底面部適合從鑭 (L a )及其合金構成。在鑭系元素中，鑭及其合金爲，給 予與p型磷化硼系半導體層良好的電阻性接觸性。又，與 磷化硼系半導體層的密接性因在鑭系元素中極優良，可以 構成結實的被著後的底面部。 又’鑭與功函數（work function)在4.5eV以下物質 的合金爲’構成與p型磷化硼系半導體層的表面接觸之p 型電阻性電極的底面部反而爲有利的情況。功函數超過 4 ♦ 5 eV後，與p型磷化硼系半導體層的障壁急速變大，對 形成P型電阻性電極不利。與加上大功函數，熔點高的物 質的合金爲’適合構成耐熱性優良的p型電阻性電極。依 & ’比功函數小但熔點低的鎵（功函數=4. 〇eV，熔點 〜29’8°C )與銦（功函數= 3 8eV，熔點=156°C )的合金， gjL — Ά尚的合金更適合。例如，從鑭與鋁（功函數=4.3 e V， 培點= 66〇t )或鑭與矽（功函數= 4.0eV，熔點=1414t：) 的合金，可構成給予良好電阻性接觸性的底面部爲有利的 ^錦（A1 )或矽（S i )的含有量爲質量百分比（質量％ ) ’適合在1 %以上未滿50%。鑭合金膜爲，可依照真空蒸 ’法、電子束蒸著法及高頻濺鍍法等方法行程。如眾所皆 知的光學微影製程技術將合金膜圖案加工，作爲平面形狀 •的®形、方形等可形成所希望的形狀之底面部。其他爲， -11 - (9) 1251944 例如，鑭與碲（功函數=4.3 e V，熔點=4 5 0 °C )的合金之碲 化鑭（組成式：La2Te3 )或，與鎳（功函數= 4.5eV，熔點 = 1453°C )之鑭鎳合金（組成式：LaNi5 )示例。 關於本發明含有由鑭又其合金製成底面部之電阻性電 極爲，例如，可從一般的電流-電壓（I - V )等特性調查。 作爲一例，從鑭·鋁合金（組成式：LaAl2 )構成p型電 阻性電極的Ι-V特性，與以往電極特性比較以圖1示例。 Ι-V特性爲，與3 5 0 // m的間隔鄰接p型電阻性電極間之 者。又，利用擁有同一電阻的p型磷化硼層測定之特性， 依此，電阻的小的程度爲反映接觸電阻的低的程度。如圖 1所示例，關於本發明之LaAl2電極爲，與以往的鋁（A1 )單體或金（An) •鋅（Zn )或金（Au ) •鈹（Be ).合 金電極的比較，在同一電壓可流通多的電流，附予接觸電 阻小的p型電阻性電極。 P型電阻性電極，特別是，其底面部爲，爲與p型磷 化硼系半導體層良好接觸，適合從無細孔連續膜構成。因 此，底面部爲適合從膜厚1 Onm以上，含有鑭之膜構成。 更適合爲lOOnm以上到300nm。 底面部的表面上爲，更，如使其他的金屬膜重層，可 以構成由重層構造製成電阻性電極。例如，從1 2 Onm膜 厚的鑭（質量95%) •銘（質量5 % )合金構成的圓形的 平面形狀之底面部上，依順序將鈦（Ti )膜與金（Au )膜 重層’構成3層構造的p型電阻性電極爲佳。關於構成重 層構造的p型電阻性電極，最上層爲，爲容易成爲連線（ -12- (10) 1251944 bonding )，適合從金（A u )或鋁（AI )的構成（ 層重層構造的p型電阻性電極，底面部與最上層的 置中間層，例如，可以鈦、鉬（Mo )等的過渡性 鉑（Pt )構成。 利用關於本發明構成之P型電阻性電極，可提 特性特性優良的化合物半導體發光元件。例如，有 順方向電壓（Vf)低的LED。Vf的低可視光LED 如，具備藍寶石基板/η型氮化鎵（GaN )鍍銅層/η 銦鎵（GalnN ) /ρ型電阻性電極（BP )鍍銅層之積 體，可在P型BP鍍銅層的表面設置由鑭·鋁合金 之P型電阻性電極構成。晶片大小例如，3 00 μ m〜 μ m之LED，ρ型電阻性電極的底面部爲，例如， 直徑 9 0 // m〜1 5 0 a m。如果從與銦組成（=1 - X ) 數的相（phase)所含之多相構造之GaxIn^NCO 層構成，可有效的形成發光強度更高的化合物半導 (參考日本專利第3090057號）。 又，例如一邊長爲5 0 0上之平面積大的LED ，在P型磷化硼系半導體層的表面上經過廣泛圍配 法爲有效。因平面的廣泛圍擴散元件驅動電流，得 強度高，或發光面積大的LED成有利的狀態。電 極爲，希望擁有可均一擴散般的形狀配置。例如， 發光層上的ρ型磷化硼鎵混晶層的表面接觸，並配 由電的導通格子狀或網狀之鑭·鋁合金製成之ρ型 電極。又，由使ρ型磷化硼系半導體層的表面上接 3又，3 中間設 金屬或 供電的 可提供 爲，例 型氮化 層構造 膜製成 350 適合爲 相異複 <X< 1 ) 體元件 構成時 置之方 到發光 阻性電 使接觸 置互相 電阻性 觸設置 -13- (11) 1251944 的鑭·矽合金製成的底面部，與該當底面部邊保持電的導 通’邊使在晶片的周邊延伸枝狀或放射狀，形成P型電阻 性電極。又，使在P型磷化硼系半導體層的中央設置基台 電極導通，從複數同心圓狀之鑭·鋁合金膜構成P型電阻 性電極。附帶這些形狀的電阻性電極之連線用的基台電極 ’其底面對於P型磷化硼系半導體層由電阻性接觸電阻高 的材料構成後，可防止基台電極正下方之元件驅動電流直 接流動，反而，對可取出向外部發光有利的向外部開放之 發光領域廣泛圍擴散元件驅動電流成爲有利的情況。 形成所希望的平面形狀的P型電阻性電極，例如，首 先’將P型磷化硼系半導體層的表面全部，例如，依照鑭 •鋁合金膜以通常的真空蒸著法、電子束蒸著法等的方法 使其先附著。其次，利用眾所皆知的光學微影製程技術將 所希望的形狀實施圖形。在P型磷化硼系半導體層可形成 等電位的分布之形狀做圖形爲適合的。其次，不要的合金 膜以濕式蝕刻法，或氯氣體（分子式：Cl2 )等的鹵素（ h a 1 〇 g e η )氣體之電漿乾式蝕刻法等的方法去除。鑭系合 金的濕式蝕刻爲可利用含有冰醋酸-過氧化氫混合液等的 冰醋酸之酸混合液（參考G y u n t a a P e 11 s ο 〇著，松村源太 郎譯，「金屬蝕刻技術」，（（有）A gne，1 9 7 7年9月 1 0日發行，第1版第1刷），9 1頁）。 〔作用〕 接觸P型磷化硼系半導體層的表面之底面以從鑭系元 -14- 1251944 M2) 素或含有其元素的合金構成之電極爲，關於p型磷化硼系 半"_體®有*給予表示良好的電阻性特性之p型電阻性電極 之作用。 P M M ft _系半導體層的表面接觸之底面，由鑭系元 素或含有其兀素的合金構成之P型電阻性電極爲，擁有使 兀件驅動電流在發光區域的廣範圍擴散的作用。 【實施例】 (第1實施例） 在P型碟化硼系半導體層的表面設置由鑭·鋁合金（ L a A 12 )製成之p型電阻性電極之化合物半導體[e d構成 時舉例對本發明做具體說明。 圖2表示爲製作雙異質結構（DH )接合構造的 LED100使用之積層構造體段面構造模式。積層構造體爲 ’在磷（P)摻雜η型（111)-矽（Si)單結晶基板m上 ’依順將由以未摻雜η型磷化硼（B P )製成之下部鍍銅 層102、η型氮化銦鎵（Ga()9()In()i()N) 與氮化鎵（Deposition), hereinafter referred to as MOCVD method). Further, molecular line epitaxy can also be formed (refer to J. Solid State C hem., 1 33 (1 9 9 7 ), 2 6 9 to 2 7 2). For example, the p-type monolithic boron phosphide layer can be formed by MOCVD using triethylboron (molecular formula: (C2H5)3B) and phosphine (molecular formula: PH3) as a raw material. As the formation temperature of the p-type BP layer, it is suitable for a temperature of 1 〇 〇 〇 °C to 1 2 0 0 °C. The ratio of the feedstock at the time of formation (=PH3/(C2H5)3B) is suitably 10 °c to 50 °C. Undesired addition of impurities, the so-called undoped BP layer is effective to avoid densification of the layer due to the diffusion of impurities. In addition, the formation temperature and the ratio of V/III, such as the precise control formation rate, can form a phosphide-based semiconductor layer with a wide energy gap (refer to Japan's special purpose 2 0 0 2 - 1 5 8 2 8 2 ) ° Therefore, a p-type boron phosphide-based semiconductor layer having a band gap of 2.8 eV (unit··eV) or more and 5.4 eV or less at room temperature is desirably available. More preferably, the p-type boron phosphide-based semiconductor layer having a wide bandgap of 2.8 eV to 3.2 eV is a compound semiconductor light-emitting device, and for example, a barrier having a P-type clad layer or the like can be used ( Barrier) acts as a barrier layer. Further, the P-type boron phosphide-based semiconductor layer having a wide gap is suitable for indium gallium nitride (composition formula GaxIni_xN: 0gX$1) and nitrogen-9 - (7) 1251944 gallium antimonide (composition formula Ga) N ! · γ Ρ γ : 0 ^ Y $ 1 ) The light-emitting layer thus formed constitutes a visible light such as blue light or color light as a window layer that transmits the outside of the light-emitting element. When the energy gap exceeds 5.4 eV, the barrier rib difference of the light-emitting layer becomes large, which is disadvantageous for obtaining a compound semiconductor light-emitting element having a forward voltage or a low valve voltage. For example, the 'p-type copper plating layer' can be suitably formed from a low-resistance boron phosphide layer having a carrier concentration of lxl019cnT3 or more and a specific resistance of 5 χ10·2 Ω·cm or less at room temperature. The p-type phosphide constituting the p-type copper plating layer has a layer thickness of 'suitably 500 nm (unit: nm) or more and 5 Å nm or less. Contacting the P-type copper plating layer and providing a p-type resistive electrode, for example, the p-type copper plating layer is an unnecessary thin layer, and the driving current supplied through the resistive electrode cannot be spread over the entire light-emitting layer. Become an unfavorable situation. A representative example of a compound semiconductor device using such a p-type boron phosphide-based semiconductor layer is a boron phosphide-based compound semiconductor LED, although it is not mandatory. In particular, a light-emitting layer made of indium gallium nitride (composition formula GaxIni.xN· 〇 'Χ$1) and a gas-depleted recording (composition formula GaNi-γΡγ: 0 SYS 1) as described above is a suitable combination. Further, a compound semiconductor light-emitting element such as a laser diode (LD) can also be suitably used. In the present invention, the bottom surface of the p-type resistive electrode provided in contact with the surface of the p-type boron phosphide-based semiconductor layer formed by the copper plating layer or the electrode formation contact layer is a film or a lanthanide-containing film. The alloy film of its elements is composed. The lanthanoid element is an element of 原子 (L a ) from atomic sequence 5 7 to 镏 (element symbol: L u ) of atomic sequence 7 1 (refer to J · A · D uffie, "Inorganic Chemistry" (Yes) Hirokawa Bookstore, issued on April 15, 46, Showa, -10- (8) 1251944 5th edition, 2 6 2 pages). Lanthanums (C e ; atomic sequence 5 8 ), 鐯 (P r ; atomic sequence 59 ) 钹 (Nd ; atomic sequence 60 ), 鈥 (Ho; atomic sequence 67 ) and other lanthanoids (lanthancnds) Chemistry, p. 263). In particular, in the present invention, the bottom surface portion of the p-type resistive electrode is suitably composed of lanthanum (L a ) and its alloy. Among the lanthanoid elements, lanthanum and its alloys give good electrical resistivity to the p-type boron phosphide-based semiconductor layer. Further, the adhesion to the boron phosphide-based semiconductor layer is extremely excellent in the lanthanoid element, and a strong bottom surface portion can be formed. Further, it is advantageous that the alloy having a work function of 4.5 eV or less is a bottom surface portion of the p-type resistive electrode which is in contact with the surface of the p-type boron phosphide-based semiconductor layer. When the work function exceeds 4 ♦ 5 eV, the barrier layer of the p-type boron phosphide-based semiconductor layer rapidly increases, which is disadvantageous for forming a P-type resistive electrode. An alloy having a high melting point and a high melting point is a p-type resistive electrode which is excellent in heat resistance. An alloy of gallium (work function = 4. 〇eV, melting point ~ 29'8 ° C) and indium (work function = 3 8 eV, melting point = 156 ° C) with small work function but low melting point, gjL — The noble alloy is more suitable. For example, an alloy derived from bismuth and aluminum (work function = 4.3 e V, pitting point = 66 〇t) or yttrium and lanthanum (work function = 4.0 eV, melting point = 1414 t:) can constitute a bottom surface giving good resistive contact. The content of the brocade (A1) or bismuth (S i ) is advantageously a mass percentage (% by mass) 'suitable to be 1% or more and less than 50%. The tantalum alloy film can be processed by a vacuum evaporation method, an electron beam evaporation method, or a high-frequency sputtering method. The optical lithography process, which is well known, processes the alloy film pattern to form a bottom surface portion of a desired shape as a planar shape, a shape of a square, or the like. The other is, -11 - (9) 1251944 For example, bismuth and antimony (work function = 4.3 e V, melting point = 4500 ° C) alloy of antimony telluride (composition formula: La2Te3) or, with nickel (work function = 4.5eV, melting point = 1453 ° C) Example of a niobium nickel alloy (composition formula: LaNi5). The present invention contains a resistive electrode having a bottom portion made of bismuth and an alloy thereof, and can be investigated, for example, from characteristics such as a general current-voltage (I - V). As an example, the Ι-V characteristic of the p-type resistive electrode formed of yttrium aluminum alloy (composition formula: LaAl2) is exemplified in Fig. 1 in comparison with the conventional electrode characteristics. The Ι-V characteristic is such that it is adjacent to the p-type resistive electrode at an interval of 3 5 0 // m. Moreover, the characteristics measured by the p-type phosphide layer having the same resistance are used, and accordingly, the degree of resistance is small to reflect the low contact resistance. As shown in Fig. 1, the LaAl2 electrode of the present invention is compared with a conventional aluminum (A1) monomer or a gold (An) zinc (Zn) or gold (Au) • bismuth (Be) alloy electrode. A current that can flow a large amount of the same voltage is attached to a p-type resistive electrode having a small contact resistance. The P-type resistive electrode has, in particular, a bottom surface portion which is in good contact with the p-type boron phosphide-based semiconductor layer and is preferably formed of a continuous film having no pores. Therefore, the bottom surface portion is preferably formed of a film containing 镧 from a film thickness of 1 Onm or more. More suitable for lOOnm or more to 300nm. On the surface of the bottom surface portion, it is possible to form a resistive electrode from a heavy layer structure, such as by re-layering other metal films. For example, a titanium (Ti) film and a gold (Au) film are sequentially layered on the bottom surface of a circular planar shape composed of a 1 2 Onm film thickness of 镧 (mass 95%) • Ming (mass 5%) alloy. It is preferable that a p-type resistive electrode constituting a three-layer structure is preferable. The p-type resistive electrode constituting the heavy-layer structure is preferably composed of gold (A u ) or aluminum (AI) in order to be easily connected (-12-(10) 1251944 bonding) (layer-layered structure) The p-type resistive electrode may have a bottom layer portion and an uppermost intermediate layer, and may be formed of, for example, transitional platinum (Pt) such as titanium or molybdenum (Mo). The P-type resistive electrode having the structure of the present invention can be used to provide characteristics. A compound semiconductor light-emitting element having excellent characteristics, for example, an LED having a low forward voltage (Vf). A low visible light LED of Vf has, for example, a sapphire substrate/n-type gallium nitride (GaN) copper plating layer/η indium gallium (GalnN) ) /p type resistive electrode (BP) copper plating layer, can be formed on the surface of the P-type BP copper plating layer by a P-type resistive electrode of bismuth aluminum alloy. The wafer size is, for example, 300 μm~ The LED of μ m, the bottom surface of the p-type resistive electrode is, for example, a diameter of 9 0 // m to 1 5 0 am. If it is contained in a phase consisting of (=1 - X ) with indium The phase structure of the GaxIn^NCO layer is formed to effectively form a semi-conductive compound with higher luminescence intensity (refer to Japan Further, for example, an LED having a large flat area of 500 Å is effective on a surface of a P-type boron phosphide-based semiconductor layer by a wide-ranging method. Driving current, high intensity, or LED with large light-emitting area is in an advantageous state. The electrode is desirably has a uniform diffusion-like shape configuration. For example, the surface contact of the p-type phosphide gallium mixed layer on the light-emitting layer, And a p-type electrode made of an electrically conductive grid-like or mesh-shaped aluminum alloy. Further, the surface of the p-type boron phosphide-based semiconductor layer is connected to the third and third, and the metal is provided with metal or power supply. Provided as a sample-type nitride layer structure film made of 350 suitable for the dissimilar complex <X<1) body element to form the square to the luminescent resistive electrical contact with the mutual resistive touch setting - 13 - (11) The bottom surface portion of the iridium-niobium alloy of 1251944 is extended in a branch shape or a radial shape around the wafer while maintaining electrical conduction between the bottom surface portion, thereby forming a P-type resistive electrode. Further, a base electrode is provided in the center of the P-type boron phosphide-based semiconductor layer, and a P-type resistive electrode is formed from a plurality of concentric annular aluminum alloy films. When the bottom surface of the base electrode for connecting the resistive electrodes having these shapes is made of a material having a high resistive contact resistance for the P-type boron phosphide-based semiconductor layer, the element driving current directly under the base electrode can be prevented from being directly The flow, on the other hand, is advantageous in that the light-emitting field that is open to the outside, which is advantageous for external illumination, is widely distributed around the diffusion element. A P-type resistive electrode having a desired planar shape is formed, for example, first, the surface of the P-type boron phosphide-based semiconductor layer is entirely formed, for example, by a conventional vacuum evaporation method or electron beam evaporation in accordance with a tantalum aluminum alloy film. The method of law or the like makes it adhere first. Second, the desired shape is patterned using well-known optical lithography process technology. It is suitable to form a pattern in which a P-type boron phosphide-based semiconductor layer can form an equipotential distribution. Next, the unnecessary alloy film is removed by a wet etching method or a plasma dry etching method of a halogen (h a 〇 g e η ) gas such as a chlorine gas (molecular formula: Cl2). The wet etching of the lanthanide alloy is an acid mixture of glacial acetic acid containing a glacial acetic acid-hydrogen peroxide mixture or the like (refer to G yuntaa P e 11 s ο ,, translated by Matsumura Yutaro, "Metal Etching Technology", ( (Yes) A gne, issued on September 10, 2007, the first edition of the first brush), 9 1 page). [Action] The bottom surface of the surface of the P-type phosphide-based semiconductor layer is contacted with an electrode composed of a lanthanide-14-1251944 M2) or an alloy containing the element thereof, and the p-type phosphide-based half is " The body® has a function of giving a p-type resistive electrode indicating good resistive properties. The P M M ft _ is the bottom surface of the surface contact of the semiconductor layer, and the P-type resistive electrode composed of the lanthanide element or the alloy containing the halogen is required to diffuse the driving current of the element in a wide range of the light-emitting region. [Embodiment] (First embodiment) A compound semiconductor in which a p-type resistive electrode made of a lanthanum aluminum alloy (L a A 12 ) is provided on the surface of a P-type boron-based semiconductor layer is exemplified. The invention will be specifically described. Fig. 2 shows a layered structure surface structure pattern used for the LED 100 for fabricating a double heterostructure (DH) junction structure. The laminated structure is 'on the phosphorus (P) doped n-type (111)-yttrium (Si) single crystal substrate m' compliant with the underlying copper plating layer made of undoped n-type boron phosphide (BP) 102, n-type indium gallium nitride (Ga () 9 () In () i () N) and gallium nitride (
GaN)障壁層i〇3b以5週期使其重層之多質量子井構造 的發光層103’由以未摻雜之p型磷化硼製成上部鍍銅層 104，堆積形成。 未摻雜的η型及p型磷化硼層i 02、丨〇4爲，利用將 三乙基硼（分子式：（C2H5 ) 3B )作爲硼（B )源，將磷 化氫（分子式：PH;)作爲磷源之常壓（略爲大氣壓）有 機金屬氣相（MOVPE)方法形成。η型磷化硼層1〇2爲 -15- (13) 1251944 9 2 5 °C ，p型磷化硼層1 〇 4爲1 Ο 2 5 °C形成。發光層1 〇 3爲 ，藉由三甲基鎵（分子式：（CH3)3Ga)/NH3/H2反應系 常壓MOCVD方法，以800 °C形成。構成并層l〇3a上述之 氮化銦鎵層爲，從相異銦組成複數的相（P h a s e )所構成 之多相構造構成，其平均的銦組成爲0.10(=10%)。井 層103a及障壁層l〇3b的層後爲，各爲，5nm及10nm。 成爲上述鍍銅層104之未摻雜之p型磷化硼層104的 載體（正孔）濃度爲2xl019cm·3，層後爲7 2 0 nm。同層 104之在室溫的抵抗率爲5χ1(Τ2Ω· cm。又，因p型磷化 硼層104在室溫的能隙爲3.2eV，利用其作爲爲從發光層 1〇3的發光透過外部之窗層兼用之p型鍍銅層。 在成爲P型上部鍍銅層之P型磷化硼層104的表面之 全面上，以通常的真空蒸著法及電子束蒸著法附著鑭·鋁 (LaAl2 )合金膜 105、鈦（Ti )膜106，.及金（Au )膜 1 0 7。其次，限於連線用的基座電極1 〇 8所設置領域，爲 殘留作爲底面部LaAl2合金膜105之上述3層的重層電極 ，利用眾所週知的光學微影製成技術選擇實施圖案。其次 ，使用冰醋酸-硫酸系等的酸混合液蝕刻去除基座電極 108以外的領域之LaA12合金膜等，使p型磷化硼104的 表面露出。光阻蝕劑材料剝離後，再次，對爲設置晶片裁 斷之格子狀溝孔選擇的施予圖案。然後，利用含氯的鹵素 系混合氣體做依照電漿乾式蝕刻手法，限定將上述施予圖 案的領域，在P型磷化硼層1 04選擇的蝕刻去除。 另外，在矽單結晶基板1 0 1的裏面的全面，依照一般 -16- (14) 1251944 真空蒸著法附著金（Au )膜形成η型電阻性電極（負電 極）1 0 9。設置S i單結晶基板1 〇 1的（1 1 1 )—結晶表面垂 直交叉< 1 1 0>結晶方位平行，沿著線幅5 0 // m上述的帶狀 溝孔劈開，作爲一邊爲3 5 Ο μ m的正方形的L E D晶片。 本發明爲，因由底面部與成爲上部鍍銅層104之P型 磷化硼層密著性優良的鑭·鋁（L a A 12 )合金膜1 〇 5所構 成，關於連線時，也可形成部從P型磷化硼層1 0 4剝離之 基台電極間之p型電阻性電極1 〇 8。 P型極η型電阻性電極1 0 8、1 0 9間，向順方向流動 2 〇mA的元件驅動電流並確認LED晶片1〇〇的發光特形。 從LED100放射作爲中心波長440nm之藍色帶光，發光光 譜的半値幅爲2 1 0毫電子伏特（單位：me V )。使用一般 的積分球測定在樹脂模塑以前的晶片（chip )狀態之亮度 爲1 1毫堪德拉（mcd )。又，p型電阻性電極1 〇 5的底面 部爲，從對於p型磷化硼層接觸電阻小的LaAl2合金膜構 成，成爲在順方向電流作爲20mA時的順方向電壓（Vf) 爲3 . 1 V之低値。另外，成爲在逆方向電流作爲1 〇 v A時 的逆方向電壓爲9.5V之高値。又，因爲從在高載體濃度 構成之未摻雜p型磷化硼層之上部鍍銅層，並，設置接觸 p型磷化硼的表面並含有低接觸電阻的鑭·鋁合金膜之p 型電阻性電極，元件驅動電流使除基台電極的投影領域以 外的發光領域約同全面發光。 (第2實施例） -17- (15) 1251944 P型磷化硼·鎵混晶層上設置含有鑭·矽合金之 電阻性電極之化合物半導體L E D構成時作爲例具體 本發明。化合物半導體發光元件的基本構造與第1實 相同，關於同樣的部分使用同樣的參考數字，其斷面 爲圖3、平面構造爲圖4。 以未摻雜的p型磷化硼·鎵混晶層（B〇.98Ga0.( 層2 04爲，在上述第1實施例所記載的發光層103上 。8〇.98〇&〇.〇2?層 2 04 爲，藉由（C2H5) 3B) / (CH3 ) 3Ga/PH3系減壓MOCVD法以8 5 0 °c形成。層 3 4 0nm。成爲 BG.98GaG.()2P層 2 04在室溫之載體濃 8><1018cm·3，電阻率爲 5χ10_2Ω· cm。 其次，P型B0.9sGa0.02P層204的表面之全面， 矽（La · Si )合金膜2 0 5依照通常的真空蒸著法形成 • Si合金膜105的膜厚爲540nm。其次，利用眾所皆 光學微影製成技術及電漿蝕刻技法做圖案。其後，依 漿乾式蝕刻法，去除不要的合金膜，如圖3所示’在 晶片200中央部直徑150//m圓形205，又，在周圍 型以.980&().()2?層的表面使其接觸網狀210殘留於La 合金膜。圓形殘留部分爲形成中間層206及金膜207 成基座電極2 0 8。 此外，矽單結晶基板1 0 1的裏面的全面爲’將 A u ) 9 9質量％ •銻（S b ) 1質量°/。合金膜2 0 9以一般 蒸著法附著。 其後，在施予上述圖案加工之La· Si合金膜之 P型 說明 施例 構造 2P ) 堆積 厚爲 度爲 鑭· 〇 La 知的 照電 LED 的P .· Si 並完 金（ 真空 金蒸 -18- (16) 1251944 著膜於被附著狀態，在氫氣流中以4 5 0 °C 1 0分鐘間的熱處 理（sinter )，使電阻性接觸性增加。因此，B 〇 . 9 8 G a 〇 . 〇 2 P 層2 0 4的表面由L A · S i製成之p型電阻性電極2 0 5，及 矽單結晶基板1 Ο 1的裏面上形成Au電阻性電極2 0 9。成 爲η型電阻性電極2 0 9的A u膜的膜厚爲2 // m。 其次，沿著上述L a · S i合金膜的蝕刻加工一倂形成 之裁斷線，將個別的LED分離，裁斷。裁斷用途的溝爲 ，成爲基板101的Si單結晶的[1.-1.0]及[-1.-1. 1]結晶方 位平行設置。因此，成爲一邊爲500/zni，另一邊爲600 βηι的長方形LED晶片200。大型LED晶片200的p型 及η型電阻性電極2 0 5、2 0 9間，將20mA順方向電流流 通時之發光中心波長爲4 4 0 n m。又，依照近視野發光像， 從晶片2 0 0的中央部的基台電極以外的發光領域確認給予 同一強度發光。此爲’可以因元件動作電流在 B0.98Ga〇.()2P層廣範圍均一擴散的形狀配置p型電阻性電 極。順方向電流作爲20mA時順方向電壓爲3 .4V，順方向 電流作爲1 0 // A時順方向電壓爲8.3 V。 〔發明效果〕 依照本發明，因爲p型磷化硼系半導體層的表面使其 接觸設置的P型電阻性電極從鑭系元素或其合金膜構成， 因可形成低接觸電阻的電極，爲被供給之元件驅動電流有 效率的發光所被利用，依此，給予高發光強度的化合物半 導體發光元件之效果被舉出。更，本發明的化合物半導體 -19- 1251944 (17 發光元件 燈。 【圖式簡 【圖 之表示圖 【圖 模式圖。 【圖 模式圖。 【圖 模式圖。 〔符號說 100、 10 1·. 102·. 103.. 104、 105、 106、 107、 108、 109、 連接導線’錯由封入樹脂，可製作高亮度的L E D 單說明】 1】根據本發明與以往的材料的電流·電壓特性 〇 2】表不弟1貫施例所§2載之L E D的斷面構造之 3】表示第2實施例所記載之LED的斷面構造之 4】表示第2實施例所記載之LED的平面構造之 明〕The GaN) barrier layer i〇3b is formed by stacking the light-emitting layer 103' of the multi-mass well structure in which the multi-layer is formed in five cycles from the undoped p-type boron phosphide. The undoped n-type and p-type phosphide layers i 02 and 丨〇4 are phosphine (molecular formula: PH) using triethylboron (molecular formula: (C2H5) 3B) as a boron (B) source. ;) formed as a phosphorus source at atmospheric pressure (slightly atmospheric pressure) in the organometallic gas phase (MOVPE) process. The n-type boron phosphide layer 1〇2 is -15-(13) 1251944 9 2 5 °C, and the p-type boron phosphide layer 1 〇 4 is formed at 1 Ο 25 °C. The light-emitting layer 1 〇 3 was formed at 800 ° C by a normal pressure MOCVD method of trimethylgallium (molecular formula: (CH3)3Ga) / NH3 / H2 reaction system. The indium gallium nitride layer constituting the parallel layer 〇3a is composed of a multiphase structure composed of a plurality of phases (P h a s e ) having a complex indium composition, and the average indium composition is 0.10 (= 10%). The layers of the well layer 103a and the barrier layer 10b3b are, respectively, 5 nm and 10 nm. The carrier (positive hole) concentration of the undoped p-type boron phosphide layer 104 which is the above-mentioned copper plating layer 104 is 2 x 1019 cm·3, and the layer is 720 nm. The resistance of the same layer 104 at room temperature is 5 χ 1 (Τ 2 Ω·cm. Further, since the energy gap of the p-type phosphide layer 104 at room temperature is 3.2 eV, it is used as the luminescence through the luminescent layer 1 〇 3 The p-type copper plating layer used for the outer window layer is attached to the surface of the P-type boron phosphide layer 104 which is a P-type upper copper plating layer by a general vacuum evaporation method and electron beam evaporation method. Aluminum (LaAl2) alloy film 105, titanium (Ti) film 106, and gold (Au) film 107. Secondly, it is limited to the field in which the susceptor electrode 1 〇8 for wiring is provided, and remains as the bottom portion of the LaAl2 alloy. The three-layered multi-layer electrode of the film 105 is selected and patterned by a well-known optical micro-patterning technique. Next, an LaA12 alloy film in a field other than the susceptor electrode 108 is removed by etching with an acid mixture such as glacial acetic acid-sulfuric acid. The surface of the p-type boron phosphide 104 is exposed. After the photo-etching resist material is peeled off, the application pattern selected for the lattice-shaped groove for cutting the wafer is again selected. Then, the halogen-based mixed gas containing chlorine is used. Plasma dry etching method, defining the field in which the above-mentioned pattern is applied The etching is removed by selective etching of the P-type boron phosphide layer 104. In addition, in the entirety of the inside of the single-crystal substrate 010, the gold (Au) film is formed by vacuum evaporation according to the general-16-(14) 1251944 vacuum deposition method. Type resistive electrode (negative electrode) 1 0 9. Set S 1 single crystal substrate 1 1 1 (1 1 1 ) - the crystal surface is vertically crossed < 1 1 0> the crystal orientation is parallel, along the line width 5 0 // m The above-mentioned strip-shaped groove hole is opened and is a square LED chip having a side of 3 5 Ο μ m. The present invention is excellent in adhesion to the P-type phosphide layer which is the upper copper plating layer 104 from the bottom surface portion. - Aluminum (L a A 12 ) alloy film 1 〇 5 is formed, and when wiring is connected, a p-type resistive electrode 1 〇 8 between the base electrodes peeled off from the P-type boron phosphide layer 104 can be formed. P-type pole n-type resistive electrode 1 0 8 , 1 0 9 , a device driving current of 2 〇 mA flows in the forward direction, and confirms the light-emitting shape of the LED chip 1 。. The blue light of the center wavelength of 440 nm is emitted from the LED 100 Ribbon light, the half-width of the luminescence spectrum is 2 10 keV (unit: me V ). Use a general integrating sphere to measure the resin mold The brightness of the previous chip state is 11 mcd. Further, the bottom surface of the p-type resistive electrode 1 〇5 is a LaAl2 alloy film having a small contact resistance with respect to the p-type phosphide layer. In the configuration, the forward voltage (Vf) when the forward current is 20 mA is 3.4 V. In addition, the reverse voltage when the current in the reverse direction is 1 〇v A is 9.5 V. Further, since a copper layer is plated from the upper portion of the undoped p-type boron phosphide layer which is formed at a high carrier concentration, and a p-type of a tantalum-aluminum alloy film which is in contact with the surface of the p-type boron phosphide and contains a low contact resistance is provided. The resistive electrode and the element drive current cause the light-emitting field other than the projection field of the base electrode to emit approximately the same overall light. (Second embodiment) -17- (15) 1251944 The P-type phosphide-gallium mixed crystal layer is provided with a compound semiconductor L E D having a resistive electrode of a ruthenium-niobium alloy as an example. The basic structure of the compound semiconductor light-emitting device is the same as that of the first embodiment, and the same reference numerals are used for the same portions, and the cross section is shown in Fig. 3 and the planar structure is shown in Fig. 4. An undoped p-type phosphide-gallium mixed crystal layer (B〇.98Ga0. (layer 2 04 is on the light-emitting layer 103 described in the above first embodiment. 8〇.98〇&〇. 〇2? Layer 2 04 is formed by (C2H5) 3B) / (CH3) 3Ga/PH3 decompression MOCVD method at 850 ° C. Layer 340 nm becomes BG.98GaG. () 2P layer 2 04 at room temperature, concentrated 8<1018 cm·3, and the specific resistance is 5χ10_2 Ω·cm. Next, the surface of the P-type B0.9sGa0.02P layer 204 is comprehensive, and the lanthanum (La · Si ) alloy film 205 is in accordance with The conventional vacuum evaporation method is formed. The film thickness of the Si alloy film 105 is 540 nm. Secondly, the pattern is formed by using the optical micro-image forming technique and the plasma etching technique. Thereafter, the dry etching method is used to remove the unnecessary pattern. The alloy film, as shown in FIG. 3, has a diameter of 150/m in the central portion of the wafer 200, and is 205, and the surface of the .980&(). La alloy film. The circular residual portion is formed as the intermediate layer 206 and the gold film 207 to form the pedestal electrode 208. Further, the entire surface of the 矽 single crystal substrate 010 is 'will be A u 9 9 9 % by mass 锑(S b ) 1 mass ° /. The alloy film 2 0 9 is attached by a general vapor deposition method. Thereafter, the P-type description of the La-Si alloy film to which the patterning is applied is described as a structure 2P). The thickness of the light-emitting LED of the 镧·〇La is P.·Si and the gold is finished (vacuum gold steaming) -18- (16) 1251944 The film was placed in a state of being attached, and a heat treatment (sinter) was performed in a hydrogen stream at 405 ° C for 10 minutes to increase the resistive contact. Therefore, B 〇. 9 8 G a 〇. The surface of the P2 P layer 2 0 4 is formed of a p-type resistive electrode 2 0 5 made of LA · S i , and an Au resistive electrode 2 0 9 is formed on the inner surface of the single crystal substrate 1 Ο 1 . The film thickness of the A u film of the resistive electrode 2 0 9 is 2 // m. Next, the individual LEDs are separated and cut along the cutting line formed by the etching process of the above-described La a · S i alloy film. The groove for cutting use is such that the crystal orientations of [1.-1.0] and [-1.-1. 1] which are Si single crystals of the substrate 101 are arranged in parallel. Therefore, the side is 500/zni and the other side is 600 βηι. The rectangular LED chip 200. The p-type and n-type resistive electrodes of the large-sized LED chip 200 are between 0 0 5 and 2 0 9 , and the center wavelength of the light when the current is 20 mA is 4 4 0 n. Further, according to the near-field light-emitting image, it is confirmed that the same intensity of light is emitted from the light-emitting field other than the base electrode of the center portion of the wafer 2000. This is 'the operating current of the element can be B0.98Ga〇.() 2P layer A p-type resistive electrode is arranged in a wide-spread uniform diffusion shape, and the forward voltage is 3.4 V when the forward current is 20 mA, and 8.3 V is the forward voltage when the forward current is 10 0 A. [Effect of the invention] According to the invention, the P-type resistive electrode provided in contact with the surface of the p-type boron phosphide-based semiconductor layer is composed of a lanthanoid element or an alloy film thereof, and an electrode having a low contact resistance can be formed, and a component driving current is supplied thereto. Efficient luminescence is utilized, and accordingly, the effect of giving a compound semiconductor light-emitting element having high luminescence intensity is exemplified. Further, the compound semiconductor of the present invention-19-1251944 (17 illuminating element lamp) [Fig. Fig. [Picture mode diagram. [Picture mode diagram. [Picture mode diagram. [symbols say 100, 10 1·. 102·. 103.. 104, 105, 106, 107, 108, 109, connecting wires] wrong by encapsulating resin A high-brightness LED can be produced. 1] The current and voltage characteristics of the material according to the present invention and the conventional material are shown in the following section: 4] The cross-sectional structure of the LED described in the embodiment is a view showing the planar structure of the LED described in the second embodiment.
2 0 0 …LED •矽單結晶基板 • η型鍍銅層 • η型發光層 2 04…ρ型鍍銅層 2 0 5…ρ型電阻性電極 2 0 6…中間層 207…連線用台座金屬 2 0 8…基座電極 2 09…η型電阻性電極 -20- (18) 1251944 2 1 Ο ··· p型電阻性電極的網狀部分 -21 -2 0 0 ...LED •矽 single crystal substrate • n-type copper plating layer • n-type light-emitting layer 2 04...p-type copper plating layer 2 0 5...p-type resistive electrode 2 0 6...intermediate layer 207...connection pedestal Metal 2 0 8...Base electrode 2 09...n type resistive electrode-20- (18) 1251944 2 1 Ο ··· p-type resistive electrode mesh portion-21 -