TW200423439A - Resistance electrode structure, compound semiconductor light emitting device having the same, and LED lamp - Google Patents
Resistance electrode structure, compound semiconductor light emitting device having the same, and LED lamp Download PDFInfo
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200423439 (1) 玖、發明說明 【發明所屬之技術領域】 本發明爲,在給予p形傳導之磷化硼系半導體層的表 面上接觸設置之P形電阻性電極構造,及,利用其p形電 阻性電極構造關於爲了構成化合物半導體元件,特別是, 化合物半導體發光元件之技術。 【先前技術】 藉由以往,利用III-ν族化合物半導體的一種類之磷 化硼(化學式:BP )及其混晶構成之發光二極真空管( 英文簡稱:LED )等的磷化硼系半導體元件之技術被開示 (例如,參考專利文件1 )。例如,p形的導電性的單量 體磷化硼(化學式:BP )層爲,利用以作爲pn接合型雙 異質結構(DH )接合構造型之發光部構成之障壁層(例 如,參考專利文件2)。磷化硼系半導體發光二極真空管 爲,例如,由磷化硼層形成p形的鍍銅層(clad )的表面 上設置P形電阻性電極之構成。關於先前技術,例如,關 於p形磷化硼層爲,從鋁(A1 )形成p形電阻性電極之例 已眾所皆知(例如,非專利文件1 )。 碟化硼爲,不故意添加不純物也可得到低電阻的η形 或ρ形之任何傳導形半導體層(例如,參考專利文件1 ) 。依此,被導電性的磷化硼層構成之,例如,鍍銅層( clad )層或接觸層(contact )層等爲,得到形成電阻性電 極。關於具備作爲接觸層之添加鎂(元素符號:Mg)的ρ -4- (2) 200423439 形磷化硼層之以往的化合物半導體發光元件,從金(元素 符號:Au ) •鋅(元素符號:Zn )構成之例被開示(例 如,參考專利文件2 )。200423439 (1) 发明. Description of the invention [Technical field to which the invention belongs] The present invention is a P-shaped resistive electrode structure provided in contact with the surface of a boron phosphide-based semiconductor layer giving p-type conduction, and using the p-type The resistive electrode structure relates to a technology for forming a compound semiconductor element, and in particular, a compound semiconductor light emitting element. [Prior art] In the past, boron phosphide-based semiconductors such as boron phosphide (chemical formula: BP), a type of III-ν compound semiconductor, and light-emitting diode vacuum tubes (English: LED) composed of mixed crystals were used. The technology of the element is disclosed (for example, refer to Patent Document 1). For example, a p-shaped conductive monolithic boron phosphide (chemical formula: BP) layer is a barrier layer composed of a light-emitting portion that is a pn-junction type double heterostructure (DH) junction structure type (for example, refer to a patent document) 2). The boron phosphide-based semiconductor light emitting diode vacuum tube has, for example, a structure in which a p-shaped resistive electrode is provided on a surface of a p-shaped copper plating layer (clad) formed of a boron phosphide layer. Regarding the prior art, for example, an example of forming a p-shaped resistive electrode from aluminum (A1) with respect to the p-shaped boron phosphide layer is known (for example, Non-Patent Document 1). Saponified boron is such that any conductive semiconductor layer of low-resistance n-shaped or p-shaped can be obtained without intentionally adding impurities (for example, refer to Patent Document 1). Accordingly, a conductive boron phosphide layer is used to form a resistive electrode, for example, a clad layer or a contact layer. Regarding a conventional compound semiconductor light-emitting device having a ρ -4- (2) 200423439-shaped boron phosphide layer having a magnesium (element symbol: Mg) as a contact layer, gold (element symbol: Au) • zinc (element symbol: An example of the composition of Zn) is disclosed (for example, refer to Patent Document 2).
但,如同上述從金屬爲,無法達到對於p形磷化硼給 予良好的電阻性接觸性之電阻性電極的安定形成。因此, 爲使發光元件動作之電流(元件驅動電源)流通時的輸入 電阻爲,無意義的增加,成爲順方向電流(V f )高的L E D 相異結論之問題。又,在成爲得到低閥値電壓(Vth )的 雷射二極體(LD )時成爲不利的狀況。 【專利文件1】 參考美國專利第6,069,021號公報明細書 【專利文件2】 參考日本特開平2_288388號公報 【非專利文件1】 K.Shohno 等、J aanaru obu kurisutaru guroosu (However, as described above, the stable formation of a resistive electrode that gives good resistive contact to p-shaped boron phosphide cannot be achieved. Therefore, the input resistance when the current (element driving power) flowing through the light-emitting element flows is meaninglessly increased, and it becomes a problem that the L E D with a high forward current (V f) is different. In addition, it becomes a disadvantageous situation when a laser diode (LD) that obtains a low valve voltage (Vth) is obtained. [Patent Document 1] Reference is made to US Patent No. 6,069,021. [Patent Document 2] Refers to Japanese Patent Application Laid-Open No. 2_288388. [Non-Patent Document 1] K.Shohno et al., Jaanaru obu kurisutaru guroosu (
J.Crystal Growth),第 24/25 集,1 974 年(荷蘭),193 頁 【發明內容】 〔發明爲解決之課題〕 本發明爲’呈現含有硼(B)與磷(P)作爲構成元 ^之P形鱗化硼系半導體層的表面使其接觸設置之p形電 阻· t生電極’並具備良好的電阻性接觸性之電極構成。p形 電ffi性電極爲’指設置於p形半導體層正(陽)電極。又 -5- (3) 200423439 ,提供具備由關於本發明構成所製成之p形電阻性電極之 化合物半導體發光元件。 〔爲解決課題之方法〕J.Crystal Growth), Episode 24/25, 1974 (Netherlands), p. 193 [Content of the Invention] [Invention to Solve the Problem] The present invention is' presenting that it contains boron (B) and phosphorus (P) as constituent elements The surface of the P-shaped scaled boron-based semiconductor layer is in contact with a p-type resistor and a t-electrode provided thereon and has an excellent resistive contact. The p-shaped electrode is a positive electrode that is provided on the p-shaped semiconductor layer. In addition, (5) 200423439 provides a compound semiconductor light-emitting device including a p-shaped resistive electrode made of the constitution of the present invention. [Methods for solving problems]
(1 )設置使含有作爲給予p形傳導的硼與磷之構成 元素的導電性磷化硼系半導體層的表面上接觸的電阻性電 極之電阻性電極構造,從前述p形磷化硼系半導體層的表 面上接觸之電極最少底面由鑭系元素或含有鑭系元素之合 金所構成爲其特徵之電阻性電極構造。 (2) 接觸前述p形磷化硼系半導體層表面之底面爲 從鑭與功函數在4.5 eV以下的元素之合金所構成爲其特徵 之如上述(1 )所記載之電阻性電極構造。 (3) 接觸前述p形磷化硼系半導體層表面之底面爲 從鑭與鋁的元素之合金所構成爲其特徵之如上述(1 )或 (2 )所記載之電阻性電極構造。(1) A resistive electrode structure is provided in which a resistive electrode including a conductive boron phosphide-based semiconductor layer that is a constituent element of boron and phosphorus that imparts p-type conduction is brought into contact with the p-type boron phosphide-based semiconductor. The lowest bottom surface of the electrode in contact with the surface of the layer is a resistive electrode structure characterized by a lanthanide or an alloy containing a lanthanide. (2) The bottom surface contacting the surface of the p-type boron phosphide-based semiconductor layer is composed of an alloy of lanthanum and an element having a work function of 4.5 eV or less. The resistive electrode structure described in (1) above is characterized. (3) The bottom surface in contact with the surface of the p-type boron phosphide-based semiconductor layer is a resistive electrode structure as described in (1) or (2) above, which is composed of an alloy of elements of lanthanum and aluminum.
(4) 接觸前述P形磷化硼系半導體層表面之底面爲 從鑭與矽的元素之合金所構成爲其特徵之如上述(1)或 (2 )所記載之電阻性電極構造。 (5) 前述P形隣化硼系半導體層爲,以無故意添加 不純物之未摻雜且在室溫能隙在2 · 8 e v以上5 · 4 e V以下的 p形單體磷化硼爲其特徵之含有如上述(1)或(2)所記 載的電阻性電極構造之化合物半導體裝置。 (6) 由上述(5)所記載之化合物半導體裝置所製成 之化合物半導體發光元件 -6- (4) 200423439(4) The bottom surface in contact with the surface of the P-shaped boron phosphide-based semiconductor layer is a resistive electrode structure as described in (1) or (2) above, which is composed of an alloy of elements of lanthanum and silicon. (5) The aforementioned P-shaped boron-based semiconductor layer is made of p-type monomer boron phosphide that is undoped without intentionally adding impurities and has an energy gap at room temperature of 2 · 8 ev or more and 5 · 4 e V or less as It is characterized by the compound semiconductor device containing the resistive electrode structure as described in said (1) or (2). (6) Compound semiconductor light-emitting element made of the compound semiconductor device described in (5) above-(6) 200423439
(7 )具備由絕緣性或導電性結晶製成之基板與,由 該結晶基板上形成之化合物半導體層製成之發光層與,設 置於該發光層上含有作爲給予P形傳導之硼與磷之構成元 素之導電性磷化硼系半導體層與,使其接觸該P形磷化硼 系半導體層之電阻性接觸性的p形電阻性電極之化合物半 導體發光元件,接觸前述磷化硼系半導體層的表面之前述 P形電阻性電極最少也底面爲從鑭系元素又或含有鑭系元 素合金所構成爲其特徵之化合物半導體發光元件。 (8) 前述p形磷化硼系半導體層表面之底面爲從鑭 與功函數在4.5eV以下的元素之合金所構成爲其特徵之如 上述(7 )所記載之化合物半導體發光元件。 (9) 接觸前述p形磷化硼系半導體層表面之底面爲 從鑭與鋁的元素之合金所構成爲其特徵之如上述(7)或 (8 )所記載之化合物半導體發光元件。(7) Equipped with a substrate made of insulating or conductive crystals, a light-emitting layer made of a compound semiconductor layer formed on the crystal substrate, and provided on the light-emitting layer to contain boron and phosphorus that impart P-shaped conduction The conductive boron phosphide-based semiconductor layer of the constituent element is in contact with the compound semiconductor light-emitting element of the p-type resistive electrode which is in contact with the resistive contact of the P-shaped boron phosphide-based semiconductor layer, and is in contact with the aforementioned boron phosphide-based semiconductor. At least the aforementioned P-shaped resistive electrode on the surface of the layer is also a compound semiconductor light-emitting element characterized by being composed of a lanthanide element or an alloy containing a lanthanide element. (8) The bottom surface of the surface of the p-type boron phosphide-based semiconductor layer is a compound semiconductor light-emitting device as described in (7) above, which is composed of an alloy of lanthanum and an element having a work function of 4.5 eV or less. (9) The compound semiconductor light-emitting device according to (7) or (8) above, characterized in that the bottom surface contacting the surface of the p-type boron phosphide-based semiconductor layer is made of an alloy of lanthanum and aluminum elements.
(10) 接觸前述p形磷化硼系半導體層表面之底面爲 從鑭與矽的元素之合金所構成爲其特徵之如上述(7)或 (8 )所記載之化合物半導體發光元件。 (Π)前述化合物半導體層由III-V族的化合物半導 體製成爲其特徵之如上述(7 )及(8 )所記載之化合物半 導體發光元件。 (1 2 )前述化合物半導體層由氮化銦鎵(組成式(10) The compound semiconductor light-emitting device according to (7) or (8) above, characterized in that the bottom surface contacting the surface of the p-type boron phosphide-based semiconductor layer is composed of an alloy of lanthanum and silicon elements. (Π) The compound semiconductor layer is characterized in that the compound semiconductor light-emitting device described in (7) and (8) above is characterized by a group III-V compound semiconductor system. (1 2) The compound semiconductor layer is composed of indium gallium nitride (composition formula
GaxIni.xN ·· OS X‘ 1 )或氮燐化鎵(組成式 GaN^Py : 0 ^YSl)的化合物半導體製成爲其特徵之如上述(7)或 (8 )所記載之化合物半導體發光元件。 (5)200423439 (1 3 )擁 前述P形電阻 用基台電極的 上述(7 )或I (1 4 )前 不純物之未摻 在 2.8eV 之如上述(7 ) (15 )使 合物半導體元 【實施方式】 本發明爲 的電阻性接觸 關於本發 磷(P )爲構反 Ba Al^ GaYIni. 、0<α + β + γ g 1 Βα Α1.6 GayIni_ 0<α + β + γ ^ 1、 BP )、磷化硼 、0 $ γ<1 ), δ<1 )及砒化福 素之混晶體。 有從鑭系元素或含有鑭系元素合金所構成之 性電極前述底部部分,作爲平面形狀,連線 形狀以及鄰接形成之網狀部分爲其特徵之如 〔8 )所記載之化合物半導體發光元件。 述P形憐化硼系半導體層爲,以無故意添加 雜且在室溫能隙 以_t 5.4eV以下的p形單體磷化硼爲其特徵 或(8 )所記載之化合物半導體發光元件。 用上述(7 )〜(14 )其中1項所記載之化 件之LED燈。 ,關於對於p形磷化硼系半導體層提供優良 性之電極構造。 明之磷化硼系半導體層爲,含有硼(B)與 之元素之化合物半導體,例如, .a.p.YPr-5As5 ( 0< a ^ 1 ' β <\ ' 7 <1 、〇 $ δ < 1 )。又,例如, α·ρ·γΡ】-δΝδ ( 〇〈a S 1、0 ^ yS <1、〇 ^ γ <1、 0^δ<1)。例如,含有單量體的磷化硼( •銦•鎵(組成式 BaGaYIn 1 _α.γρ : 〇<α$ ;! 又,含有氮燐化硼(組成式ΒΡ^Νδ : 〇 ^ I化硼(組成式 BPyAss)等複數的ν族元 例如,ΒΡι-δΝδ 或 BPi_§As§%:,希望隣(P)GaxIni.xN ·· OS X '1) or gallium nitride nitride (compositional GaN ^ Py: 0 ^ YSl) is a compound semiconductor light-emitting device as described in (7) or (8) above, which is characterized in that . (5) 200423439 (1 3) The impure substance (7) or I (1 4) before the abutment electrode for the P-shaped resistor is not doped with 2.8eV as described in (7) (15) above. [Embodiment] The resistive contact of the present invention is that the present phosphorus (P) is a structural inversion Ba Al ^ GaYIni., 0 < α + β + γ g 1 Βα Α1.6 GayIni_ 0 < α + β + γ ^ 1 , BP), boron phosphide, 0 $ γ < 1), δ < 1), and mixed crystals of trifluorfon. The compound semiconductor light-emitting device described in [8] is characterized in that the bottom portion of a neutral electrode composed of a lanthanide element or an alloy containing a lanthanide element has a planar shape, a connection shape, and an adjacently formed mesh portion. The p-type boron-based semiconductor layer is characterized by p-type monomer boron phosphide without intentional addition of impurities and a room temperature band gap of _t 5.4eV or less, or the compound semiconductor light-emitting device according to (8). . Use the LED lamp described in any one of (7) to (14) above. An electrode structure that provides excellent properties for a p-type boron phosphide-based semiconductor layer. The bright boron phosphide-based semiconductor layer is a compound semiconductor containing boron (B) and its elements, for example, .apYPr-5As5 (0 < a ^ 1 'β < \' 7 < 1, 〇 $ δ < 1 ). Also, for example, α · ρ · γP] -δNδ (0 <a S 1, 0 ^ yS < 1, 0 ^ γ < 1, 0 ^ δ < 1). For example, boron phosphide (indium • gallium (composition formula BaGaYIn 1 _α.γρ: 〇 < α $) containing a single body; and boron azide (composition formula BP ^ Nδ: 〇 ^ I) (Composite formula BPyAss) and other plural ν family elements, for example, ΒΡι-δΝδ or BPi_§As§%: I hope that the neighbor (P)
-8 - (6) 200423439 的下限組成比(1-δ )爲,0· 50以上,更希望爲〇·75以上 爲設置P形電阻性電極之p形磷化硼系半導體層爲, 鹵素(halogen)法、氫化物(hydride)法及MOCVD (有 機金屬化學氣相堆積)形成。又,分子線磊晶法也可形成 (參考 J.Solid State Chem.,133 ( 1997) 、269 〜272 頁-8-(6) The lower limit composition ratio (1-δ) of 200423439 is 0.550 or more, and more preferably 0.75 or more. The p-type boron phosphide-based semiconductor layer provided with a P-shaped resistive electrode is: halogen ( halogen) method, hydride method, and MOCVD (organic metal chemical vapor deposition) formation. It can also be formed by molecular wire epitaxy (see J. Solid State Chem., 133 (1997), pp. 269 ~ 272)
)。例如,P形單量體的磷化硼層爲,可以以三乙基硼( 分子式:(C2H5)3B)與磷化氫(分子式:PH3)作爲原 料的MOCVD法形成。作爲p形BP層的形成溫度,適合 100(TC〜120CTC的溫度。形成時的供給原料比率(=PH3/ (C2H5)3B)爲,適合爲10°C〜50°C。不故意添加不純 物,即所謂,不摻雜(undope )的BP層爲有效的回避因 不純物的擴散使他層變性。加上形成溫度、V/III的比率 ,如在精密的控制形成速度,可形成能隙大的磷化硼系半 導體層(參考日本特願2002-158282)。). For example, the P-shaped single body boron phosphide layer can be formed by a MOCVD method using triethylboron (molecular formula: (C2H5) 3B) and phosphine (molecular formula: PH3) as raw materials. As the formation temperature of the p-shaped BP layer, it is suitable for 100 (temperature of TC to 120CTC. The ratio of raw materials supplied during formation (= PH3 / (C2H5) 3B) is suitable for 10 ° C to 50 ° C. Impurities are not intentionally added, That is to say, the undoped BP layer is effective to avoid denaturation of other layers due to the diffusion of impurities. In addition to the formation temperature and the V / III ratio, if the formation speed is precisely controlled, a large energy gap can be formed. Boron phosphide-based semiconductor layer (refer to Japanese Patent Application No. 2002-158282).
特別是,在室溫的能隙爲2 · 8電子伏特(單位:eV ) 以上5.4eV以下之p形磷化硼系半導體層爲希望可利用。 更希望爲2.8eV〜3.2eV之寬能隙(widebandgap)之p形 磷化硼系半導體層爲,化合物半導體發光元件,例如,可 利用擁有p形鍍銅(clad)層等的阻障(barrier)作用作 爲障壁層。又,寬能隙的P形磷化硼系半導體層爲,適合 從由氮化銦•鎵(組成式GaxIn】.xN : 0 S X S 1 )及氮燐 化鎵(組成式GaNuPy : OS YS 1 )製成的發光層將藍色 光或 色光等的可視光構成爲透過發光元件的外部的窗( -9- (7) (7)200423439 window)層。能隙超過5.4eV後,發光層的障壁差變大, 不利於得到順方向電壓或閥値電壓低的化合物半導體發光 元件。例如,· p形鍍銅層爲,可適合從在室溫爲載體濃度 在lxl019cm·3以上,電阻率在5χ1(Γ2Ω· cm以下之低抵 抗磷化硼層形成。構成p形鍍銅層的p形磷化硼的層厚爲 ,適合爲500奈米(單位:nm)以上5000nm以下。接觸 P形鍍銅層並設置p形電阻性電極之構成,如p形鍍銅層 爲不必要的薄層,因經由電阻性電極供給之元件驅動電流 無法在全發光層上平面的遍佈擴散,成爲不利的狀況。 利用如此般的p形磷化硼系半導體層之化合物半導體 裝置的代表例爲,雖不是強制的,但爲磷化硼系化合物半 導體LED。特別是,由如上述,之氮化銦鎵(組成式 GaxIni.xN: 0SXS1)及氮燐化鎵(組成式GaN】_YpY: 〇 SYS 1)製成之發光層爲適合之組合。另外,雷射二極 體(LD)等的化合物半導體發光元件也可適合使用。 關於本發明,以鍍銅層或電極形成用接觸(contact ) 層形成之p形磷化硼系半導體層的表面接觸設置的p形電 阻性電極的底部面爲,從鑭系元素的膜或含有其元素的合 金膜構成。 鑭系元素爲,原子序57的鑭(La)到原子序71的鍇 (元素符號:Lu)的元素(參考J.a· Duffie著,「無 機化學」,(有)廣川書店,昭和46年4月15日發行, 5版,262頁)。鈽(Ce;原子序58)、鐯(Pr;原子序 59)鈸(Nd ;原子序60)、鈥(Ho ;原子序67)等鑭系 -10- (8) 200423439 兀素類(lanthanoids)(參考上述「無機化學」,263頁 )。特別,本發明爲,p形電阻性電極的底面部適合從鑭 (La)及其合金構成。在鑭系元素中,鑭及其合金爲,給 予與P形磷化硼系半導體層良好的電阻性接觸性。又,與 磷化硼系半導體層的密接性因在鑭系元素中極優良,可以 構成結實的被著後的底面部。In particular, a p-type boron phosphide-based semiconductor layer having an energy gap at room temperature of 2.8 electron volts (unit: eV) or more and 5.4 eV or less is desirable. More preferably, the p-type boron phosphide-based semiconductor layer having a wide bandgap of 2.8eV to 3.2eV is a compound semiconductor light-emitting device. For example, a barrier having a p-type copper plating (clad) layer can be used. ) Acts as a barrier layer. In addition, the P-type boron phosphide-based semiconductor layer having a wide energy gap is suitable for a substrate composed of indium nitride and gallium (composition GaxIn) .xN: 0 SXS 1) and gallium nitride (composition GaNuPy: OS YS 1) The produced light-emitting layer constitutes visible light such as blue light or colored light as a window (-9- (7) (7) 200423439 window) layer that passes through the outside of the light-emitting element. When the energy gap exceeds 5.4 eV, the barrier difference of the light-emitting layer becomes large, which is disadvantageous for obtaining a compound semiconductor light-emitting device having a low forward voltage or a low threshold voltage. For example, · p-shaped copper plating layer can be formed from a low-resistance boron phosphide layer with a carrier concentration of lxl019cm · 3 or higher and a resistivity of 5 × 1 (Γ2Ω · cm or less at room temperature. The thickness of the p-shaped boron phosphide is suitable to be from 500 nanometers (unit: nm) to 5000 nm or less. The structure of a p-type resistive electrode that is in contact with the p-type copper plating layer is unnecessary. For example, the p-type copper plating layer is unnecessary. The thin layer is disadvantageous because the element drive current supplied through the resistive electrode cannot spread across the entire light-emitting layer, which is a disadvantage. A typical example of a compound semiconductor device using such a p-type boron phosphide-based semiconductor layer is, Although it is not compulsory, it is a boron phosphide-based compound semiconductor LED. In particular, as described above, indium gallium nitride (compositional formula GaxIni.xN: 0SXS1) and gallium nitride (compositional formula GaN) _YpY: 〇SYS 1) The produced light emitting layer is a suitable combination. In addition, compound semiconductor light emitting elements such as a laser diode (LD) can also be suitably used. In the present invention, a copper plating layer or a contact layer for electrode formation is used. P-type boron phosphide semiconductor The bottom surface of the p-shaped resistive electrode provided with a surface contact is composed of a film of lanthanide element or an alloy film containing the element. The lanthanide element is lanthanum (La) with atomic number 57 to thorium (La) with atomic number 71 Element Symbol: Lu) (Refer to Ja · Duffie, "Inorganic Chemistry", (Huangchuan Bookstore, April 15, Showa 46, 5th edition, 262 pages). 钸 (Ce; atomic number 58),镧 (Pr; atomic order 59) 钹 (Nd; atomic order 60), “(Ho; atomic order 67) and other lanthanides-10- (8) 200423439 lanthanoids (refer to the above“ Inorganic Chemistry ”, 263 In particular, in the present invention, the bottom surface portion of the p-shaped resistive electrode is suitable to be composed of lanthanum (La) and its alloy. Among the lanthanoid elements, lanthanum and its alloy are provided with a P-shaped boron phosphide-based semiconductor layer. Good resistive contact. In addition, the adhesion with the boron phosphide-based semiconductor layer is excellent among lanthanoid elements, and can form a strong bottom surface after being coated.
又,鑭與功函數(work function)在4.5eV以下物質 的合金爲,構成與p形磷化硼系半導體層的表面接觸之p 形電阻性電極的底面部反而爲有利的情況。功函數超過 4.5eV後,與p形磷化硼系半導體層的障壁急速變大,對 形成P形電阻性電極不利。與加上大功函數,熔點高的物 質的合金爲’適合構成耐熱性優良的p形電阻性電極。依 此’比功函數小但熔點低的鎵(功函數=4.〇eV,熔點 = 29.8°C )與銦(功函數= 3.8eV,熔點=156°C )的合金, 熔點高的合金更適合。例如,從鑭與鋁(功函數=4.3eV, 熔點=6 6 0 °C )或鑭與砂(功函數=4 · 0 e V,熔點=1 4 1 4 °C ) 的合金,可構成給予良好電阻性接觸性的底面部爲有利的 。鋁(A1 )或矽(Si )的含有量爲質量百分比(質量% ) ,適合在1 %以上未滿50%。鑭合金膜爲,可依照真空蒸 著法、電子束蒸著法及高頻濺鍍法等方法行程。如眾所皆 知的光學微影製程技術將合金膜圖案加工,作爲平面形狀 的圓形、方形等可形成所希望的形狀之底面部。其他爲, 例如,鑭與碲(功函數=4.3 eV,熔點=450 °C )的合金之硫 化鑭(組成式:L a 2 T e 3 )或,與鎮(功函數=4 · 5 e V,熔點 -11 - (9) 200423439 = 1 4 5 3 °C )之鑭鎳合金(組成式:LaNi5)示例。In addition, an alloy of lanthanum and a substance having a work function of 4.5 eV or less is advantageous in that the bottom surface portion of the p-type resistive electrode that is in contact with the surface of the p-type boron phosphide-based semiconductor layer is advantageous. When the work function exceeds 4.5 eV, the barrier with the p-type boron phosphide-based semiconductor layer rapidly increases, which is disadvantageous for forming a P-shaped resistive electrode. An alloy having a large work function and a high melting point is suitable for forming a p-shaped resistive electrode having excellent heat resistance. According to this, the alloy with lower specific work function but lower melting point (work function = 4.0 eV, melting point = 29.8 ° C) and indium (work function = 3.8eV, melting point = 156 ° C), the alloy with high melting point is more Suitable for. For example, an alloy of lanthanum and aluminum (work function = 4.3 eV, melting point = 66 ° C) or lanthanum and sand (work function = 4 · 0 e V, melting point = 14 1 4 ° C) can be composed to give A bottom surface with good resistive contact is advantageous. The content of aluminum (A1) or silicon (Si) is a mass percentage (mass%), and it is suitable to be 1% or more and less than 50%. The lanthanum alloy film can be formed in accordance with methods such as a vacuum evaporation method, an electron beam evaporation method, and a high-frequency sputtering method. A well-known optical lithography process technology processes an alloy film pattern to form a circular shape, a square shape, or the like in a planar shape to form a bottom surface of a desired shape. Others are, for example, lanthanum sulfide (composition formula: La 2 T e 3) or alloy (work function = 4 · 5 e V) with an alloy of lanthanum and tellurium (work function = 4.3 eV, melting point = 450 ° C). , Melting point -11-(9) 200423439 = 1 4 5 3 ° C) Example of lanthanum nickel alloy (composition formula: LaNi5).
關於本發明含有由鑭又其合金製成底面部之電阻性電 極爲’例如,可從一般的電流-電壓(I - V )等特性調查。 作爲一例,從鑭·鋁合金(組成式:LaAl2 )構成p形電 阻性電極的I-V特性,與以往電極特性比較以圖1示例。 I-V特性爲,與3 5 0 # m的間隔鄰接p形電阻性電極間之 者。又’利用擁有同一電阻的p形磷化硼層測定之特性, 依此’電阻的小的程度爲反映接觸電阻的低的程度。如圖 1所示例,關於本發明之LaAl2電極爲,與以往的鋁(A1 )卓體或金(A U ) •辞(Ζ π )或金(A u ) •皴(B e )合 金電極的比較,在同一電壓可流通多的電流,附予接觸電 阻小的p形電阻性電極。Regarding the present invention, a resistive electrode containing a bottom surface portion made of lanthanum and its alloy can be investigated from, for example, general current-voltage (I-V) characteristics. As an example, the I-V characteristics of a p-type resistive electrode composed of lanthanum aluminum alloy (composition formula: LaAl2) are compared with the conventional electrode characteristics. The I-V characteristic is one that is adjacent to the p-shaped resistive electrode at an interval of 3 5 0 # m. Furthermore, the characteristics measured by using a p-type boron phosphide layer having the same resistance reflect the low resistance to reflect the low contact resistance. As shown in the example of FIG. 1, the LaAl2 electrode of the present invention is compared with the conventional aluminum (A1) zirconium or gold (AU) • word (Z π) or gold (A u) • 皴 (B e) alloy electrode. A large amount of current can flow at the same voltage, and a p-shaped resistive electrode with a small contact resistance is attached.
P形電阻性電極,特別是,其底面部爲,爲與p形磷 化硼系半導體層良好接觸,適合從無細孔連續膜構成。因 此,底面部爲適合從膜厚1 〇nm以上,含有鑭之膜構成。 更適合爲lOOnm以上到300nm。 底面部的表面上爲,更,如使其他的金屬膜重層,可 以構成由重層構造製成電阻性電極。例如,從1 20nm膜 厚的鑭(質量95% ) •鋁(質量5% )合金構成的圓形的 平面形狀之底面部上,依順序將鈦(Ti )膜與金(Au )膜 重層,構成3層構造的p形電阻性電極爲佳。關於構成重 層構造的P形電阻性電極,最上層爲,爲容易成爲連線( bonding),適合從金(Au)或鋁(A1)的構成。又,3 層重層構造的P形電阻性電極,底面部與最上層的中間設 -12- (10) (10)200423439 置中間層,例如,可以鈦、鉬(Mo )等的過渡性金屬或 鉑(Pt )構成。 利用關於本發明構成之P形電阻性電極,可提供電的 特性特性優良的化合物半導體發光元件。例如,有可提供 順方向電壓(Vf)低的LED。Vf的低可視光LED爲,例 如,具備藍寶石基板/η形氮化鎵(GaN )鍍銅層/n形氮化 銦鎵(GalnN ) /ρ形電阻性電極(ΒΡ )鍍銅層之積層構造 體,可在Ρ形ΒΡ鍍銅層的表面設置由鑭·鋁合金膜製成 之Ρ形電阻性電極構成。晶片大小例如,3 0 0 // m〜3 5 0 // m之L E D,ρ形電阻性電極的底面部爲,例如,適合爲 直徑90//m〜150//m。如果從與銦組成(=ΐ-χ)相異複 數的相(phase )所含之多相構造之GaxIm-χΝ ( 0<X<1 ) 層構成,可有效的形成發光強度更高的化合物半導體元件 (參考日本專利第3090057號)。 又,例如一邊長爲5 00上之平面積大的LED構成時 ,在P形磷化硼系半導體層的表面上經過廣泛圍配置之方 法爲有效。因平面的廣泛圍擴散元件驅動電流,得到發光 強度高,或發光面積大的LED成有利的狀態。電阻性電 極爲,希望擁有可均一擴散般的形狀配置。例如,使接觸 發光層上的ρ形磷化硼鎵混晶層的表面接觸,並配置互相 由電的導通格子狀或網狀之鑭·鋁合金製成之ρ形電阻性 電極。又,由使ρ形磷化硼系半導體層的表面上接觸設置 的鑭•矽合金製成的底面部,與該當底面部邊保持電的導 通,邊使在晶片的周邊延伸枝狀或放射狀,形成ρ形電阻 -13- (11) 200423439 性電極。又,使在P形磷化硼系半導體層的中央設置基台 電極導通,從複數同心圓狀之鑭·鋁合金膜構成P形電阻 性電極。附帶這些形狀的電阻性電極之連線用的基台電極 ’其底面對於P形磷化硼系半導體層由電阻性接觸電阻高 的材料構成後,可防止基台電極正下方之元件驅動電流直 接流動,反而,對可取出向外部發光有利的向外部開放之 發光領域廣泛圍擴散元件驅動電流成爲有利的情況。The P-shaped resistive electrode, in particular, has a bottom surface portion that is in good contact with a p-type boron phosphide-based semiconductor layer, and is suitable for being composed of a continuous film without pores. Therefore, the bottom surface portion is preferably composed of a film having a thickness of 10 nm or more and containing lanthanum. More preferably, it is 100 nm to 300 nm. On the surface of the bottom portion, if another metal film is layered, a resistive electrode can be formed by a layered structure. For example, a titanium (Ti) film and a gold (Au) film are sequentially layered on a circular planar bottom surface made of a lanthanum (95% by mass) • aluminum (5% by mass) alloy with a film thickness of 1 to 20 nm. A p-shaped resistive electrode having a three-layer structure is preferred. The uppermost layer of the P-shaped resistive electrode constituting the heavy layer structure is a structure suitable for gold (Au) or aluminum (A1) in order to be easily bonded. In addition, a P-shaped resistive electrode having a three-layer heavy layer structure is provided with a middle layer of -12- (10) (10) 200423439 between the bottom surface portion and the uppermost layer. For example, a transition metal such as titanium or molybdenum (Mo) or Made of platinum (Pt). The P-shaped resistive electrode according to the present invention can provide a compound semiconductor light-emitting device having excellent electrical characteristics. For example, there are LEDs that can provide a low forward voltage (Vf). Vf's low visible light LED has, for example, a multilayer structure including a sapphire substrate / n-shaped gallium nitride (GaN) copper-plated layer / n-shaped indium gallium nitride (GalnN) / p-shaped resistive electrode (BP) copper-plated layer. It is possible to provide a P-shaped resistive electrode made of a lanthanum aluminum alloy film on the surface of the P-shaped BP copper plating layer. The wafer size is, for example, L E D of 3 0 0 // m to 3 5 0 // m, and the bottom surface of the p-shaped resistive electrode is, for example, preferably 90 // m to 150 // m in diameter. If it is composed of a GaxIm-χN (0 < X < 1) layer with a multi-phase structure contained in a phase different from the indium composition (= ΐ-χ), a compound semiconductor having a higher luminous intensity can be effectively formed. Element (refer to Japanese Patent No. 3090057). In addition, for example, in the case of an LED structure having a large flat area on one side with a length of 500, a method of arranging the P-type boron phosphide-based semiconductor layer on the surface of the P-shaped semiconductor layer in a wide range is effective. Due to the driving current of the wide-area diffuser element in the plane, an LED having a high light-emitting intensity or a large light-emitting area becomes favorable. It is desirable to have a resistive electrode with a uniform shape configuration. For example, the surface of the p-shaped boron gallium phosphide mixed crystal layer on the contact light-emitting layer is brought into contact with each other, and p-shaped resistive electrodes made of lanthanum-aluminum alloy in the form of electrical conduction grids or meshes are arranged on each other. In addition, a bottom surface portion made of lanthanum-silicon alloy which is provided in contact with the surface of the p-shaped boron phosphide-based semiconductor layer is electrically connected to the bottom surface portion while extending into a branch shape or a radial shape on the periphery of the wafer. To form a p-shaped resistor-13- (11) 200423439. Further, the base electrode provided in the center of the P-shaped boron phosphide-based semiconductor layer was turned on, and a P-shaped resistive electrode was formed from a plurality of concentric circular lanthanum-aluminum alloy films. The base electrode for the connection of the resistive electrodes with these shapes has a bottom surface made of a material with high resistive contact resistance for the P-shaped boron phosphide-based semiconductor layer, which can prevent the direct drive current of the device directly below the base electrode. Flowing, on the other hand, is advantageous in that it is possible to take out a wide range of diffusion element drive currents in a light emitting area that is advantageous for taking out light to the outside and opening to the outside.
形成所希望的平面形狀的P形電阻性電極’例如,首 先,將P形磷化硼系半導體層的表面全部’例如,依照鑭 •鋁合金膜以通常的真空蒸著法、電子束蒸著法等的方法 使其先附著。其次,利用眾所皆知的光學微影製程技術將 所希望的形狀實施圖形。在P形磷化硼系半導體層可形成 等電位的分布之形狀做圖形爲適合的。其次’不要的合金 膜以濕式蝕刻法,或氯氣體(分子式:ci2 )等的鹵素( halogen )氣體之電漿乾式鈾刻法等的方法去除。鑭系合 金的濕式蝕刻爲可利用含有冰醋酸-過氧化氫混合液等的 冰醋酸之酸混合液(參考Gyuntaa Pettsoo著,松村源太 郎譯,「金屬蝕刻技術」,((有)Agne,1 977年9月 1 〇日發行,第1版第1刷),91頁)。 〔作用〕 接觸P形磷化硼系半導體層的表面之底面以從鑭系元 素或含有其元素的合金構成之電極爲,關於P形磷化硼系 半導體層有給予表示良好的電阻性特性之P形電阻性電極 •14- (12) 200423439 之作用。 p形磷化硼系半導體層的表面接觸之底面,由鑭系元 素或含有其元素的合金構成之p形電阻性電極爲,擁有使 元件驅動電流在發光區域的廣範圍擴散的作用。 【實施例】 (第1實施例)For example, the P-shaped resistive electrode having a desired planar shape is formed, for example, the entire surface of the P-shaped boron phosphide-based semiconductor layer is first formed. For example, the lanthanum-aluminum alloy film is deposited by a normal vacuum evaporation method or an electron beam. The method is to make it adhere first. Second, the desired shape is patterned using a well-known optical lithography process technique. It is suitable to form a pattern in which an equipotential distribution can be formed in the P-shaped boron phosphide-based semiconductor layer. Next, the unnecessary alloy film is removed by a wet etching method or a plasma dry uranium etching method using a halogen gas such as chlorine gas (molecular formula: ci2). Wet etching of lanthanoid alloys is possible by using an acid mixture of glacial acetic acid containing a mixture of glacial acetic acid and hydrogen peroxide. Issued September 10, 977, 1st edition, 1st brush), page 91). [Function] The bottom surface which contacts the surface of the P-shaped boron phosphide-based semiconductor layer is an electrode composed of a lanthanide-based element or an alloy containing the element. The P-shaped boron phosphide-based semiconductor layer has an excellent resistance characteristic. P-shaped resistive electrode • 14- (12) 200423439. The p-shaped boron phosphide-based semiconductor layer has a bottom contact surface, and a p-shaped resistive electrode composed of a lanthanoid element or an alloy containing the element has a function of diffusing a device driving current in a wide range in a light-emitting region. [Embodiment] (First Embodiment)
在P形磷化硼系半導體層的表面設置由鑭·鋁合金( LaAl2 )製成之P形電阻性電極之化合物半導體LED構成 時舉例對本發明做具體說明。The present invention will be specifically described with reference to a compound semiconductor LED in which a P-shaped resistive electrode made of lanthanum aluminum alloy (LaAl2) is provided on the surface of the P-shaped boron phosphide-based semiconductor layer.
圖 2表示爲製作雙異質結構(DH )接合構造的 LED 10 0使用之積層構造體段面構造模式。積層構造體爲 ,在磷(P )摻雜η形(111 )-矽(Si )單結晶基板101上 ,依順將由以未摻雜η形磷化硼(BP )製成之下部鍍銅 層102、η形氮化銦鎵(GauGino.iGN) 103a與氮化鎵( GaN)障壁層103b以5週期使其重層之多質量子井構造 的發光層103,由以未摻雜之p形磷化硼製成上部鍍銅層 104,堆積形成。 未摻雜的η形及p形磷化硼層1〇2、104爲,利用將 三乙基硼(分子式:(C2H5)3B)作爲硼(Β)源,將磷 化氫(分子式:PH3)作爲磷源之常壓(略爲大氣壓)有 機金屬氣相(MOVPE)方法形成。η形磷化硼層102爲 925 °C,ρ形磷化硼層104爲1〇25 °C形成。發光層103爲 ,藉由三甲基鎵(分子式:(CH3)3Ga)/NH3/H2反應系 -15- (13) 200423439 常壓MOCVD方法,以800 °C形成。構成井層l〇3a上述之 氮化銦鎵層爲,從相異銦組成複數的相(Phase )所構成 之多相構造構成,其平均的銦組成爲〇·1〇 ( =1〇% )。井 層103a及障壁層103b的層後爲,各爲,5nm及10nm。FIG. 2 shows a multi-layer structure body surface structure pattern for the LED 100 which is used to make a double heterostructure (DH) junction structure. The laminated structure is: on the phosphorus (P) -doped n-shaped (111) -silicon (Si) single crystal substrate 101, a lower copper plating layer made of non-doped n-shaped boron phosphide (BP) is provided. 102. The n-shaped indium gallium nitride (GauGino.iGN) 103a and the gallium nitride (GaN) barrier layer 103b are made of a light emitting layer 103 with multiple layers of multi-mass wells in five cycles. The upper copper-plated layer 104 is made of boron and is formed by stacking. The undoped n-shaped and p-shaped boron phosphide layers 102 and 104 are made of triethyl boron (molecular formula: (C2H5) 3B) as a source of boron (B), and phosphine (molecular formula: PH3) An atmospheric (slightly atmospheric) organometallic vapor phase (MOVPE) method as a phosphorus source is formed. The n-shaped boron phosphide layer 102 is formed at 925 ° C, and the p-shaped boron phosphide layer 104 is formed at 1025 ° C. The light-emitting layer 103 is formed by trimethylgallium (molecular formula: (CH3) 3Ga) / NH3 / H2 reaction system -15- (13) 200423439 atmospheric pressure MOCVD method at 800 ° C. The indium gallium nitride layer constituting the well layer 103a is a multi-phase structure composed of a plurality of phases (Phase) of dissimilar indium composition, and the average indium composition is 0.10 (= 10%). . The layers of the well layer 103a and the barrier layer 103b are, respectively, 5 nm and 10 nm.
成爲上述鍍銅層104之未摻雜之p形磷化硼層104的 載體(正孔)濃度爲 2xl019cm_3,層後爲 720nm。同層 104之在室溫的抵抗率爲5χ1(Γ2Ω· cm。又,因p形磷化 硼層104在室溫的能隙爲3.2eV,利用其作爲爲從發光層 103的發光透過外部之窗層兼用之p形鍍銅層。The carrier (positive hole) concentration of the undoped p-shaped boron phosphide layer 104 that becomes the copper-plated layer 104 described above is 2 × 1019 cm_3, and 720 nm after the layer. The resistance rate of the same layer 104 at room temperature is 5 × 1 (Γ2Ω · cm. In addition, since the p-shaped boron phosphide layer 104 has an energy gap of 3.2 eV at room temperature, it is used as a means for transmitting light from the light-emitting layer 103 to the outside. The window layer also serves as a p-shaped copper plating layer.
在成爲P形上部鍍銅層之P形磷化硼層104的表面之 全面上,以通常的真空蒸著法及電子束蒸著法附著鑭•鋁 (1^六12)合金膜105、鈦(丁丨)膜106,及金(八11)膜 107。其次,限於連線用的基座電極108所設置領域,爲 殘留作爲底面部LaAl2合金膜105之上述3層的重層電極 ,利用眾所週知的光學微影製成技術選擇實施圖案。其次 ,使用冰醋酸-硫酸系等的酸混合液蝕刻去除基座電極 108以外的領域之LaAl2合金膜等,使p形磷化硼104的 表面露出。光阻蝕劑材料剝離後,再次,對爲設置晶片裁 斷之格子狀溝孔選擇的施予圖案。然後,利用含氯的鹵素 系混合氣體做依照電漿乾式蝕刻手法,限定將上述施予圖 案的領域,在P形磷化硼層1 04選擇的蝕刻去除。 另外,在矽單結晶基板1 0 1的裏面的全面,依照一般 真空蒸著法附著金(An )膜形成η形電阻性電極(負電 極)1 0 9。g受置S i單結晶基板1 〇 1的(1 1 1 ) ·結晶表面垂 -16- (14) 200423439 直交叉<1 10>結晶方位平行,沿著線幅50 # m上述的帶狀 溝孔劈開,作爲一邊爲3 5 0 // m的正方形的LED晶片。 本發明爲,因由底面部與成爲上部鍍銅層之p形 磷化硼層密著性優良的鑭•鋁(LaAl2 )合金膜1〇5所構 成,關於連線時,也可形成部從P形磷化硼層1 剝離之 基台電極間之P形電阻性電極108。On the entire surface of the P-shaped boron phosphide layer 104 serving as the P-shaped upper copper plating layer, a lanthanum-aluminum (1 ^ 6-12) alloy film 105 and titanium are attached by a normal vacuum evaporation method and an electron beam evaporation method. (Ding) film 106, and gold (eight 11) film 107. Next, limited to the area where the base electrode 108 for wiring is provided, the pattern is selected and implemented by using a well-known optical lithography manufacturing technique in which the above-mentioned three layers of the LaAl2 alloy film 105 remain as the bottom surface. Next, a LaAl2 alloy film or the like in a region other than the base electrode 108 is removed by etching using an acid mixed solution such as a glacial acetic acid-sulfuric acid system to expose the surface of the p-shaped boron phosphide 104. After the photoresist material is peeled off, the application pattern is again selected for setting the grid-like grooves for wafer cutting. Then, using a halogen-containing mixed gas containing chlorine as a plasma dry etching method, the area to which the pattern is applied is limited, and the P-type boron phosphide layer 104 is selectively removed by etching. In addition, on the entire surface of the silicon single crystal substrate 101, a gold (An) film was attached in accordance with a general vacuum evaporation method to form an n-shaped resistive electrode (negative electrode) 109. (1 1 1) S i single crystal substrate 1 〇 · Crystal surface vertical -16- (14) 200423439 Straight cross < 1 10 > Crystal orientation parallel, 50 # m above the stripe The trench is split to serve as a square LED chip with a side of 3 5 0 // m. The present invention is composed of a lanthanum-aluminum (LaAl2) alloy film 105 having excellent adhesion between a bottom surface portion and a p-shaped boron phosphide layer serving as an upper copper plating layer. When a connection is made, a portion may be formed from P The P-shaped resistive electrode 108 between the abutment electrodes of the exfoliated boron phosphide layer 1.
P形極η形電阻性電極1 08、1 09間,向順方向流動 2 0mA的元件驅動電流並確認LED晶片1〇〇的發光特形。 從LED 100放射作爲中心波長440nm之藍色帶光,發光光 譜的半値幅爲210毫電子伏特(單位:meV )。使用一般 的積分球測定在樹脂模塑以前的晶片(chip )狀態之亮度 爲1 1毫堪德拉(mcd )。又,p形電阻性電極105的底面 部爲,從對於P形磷化硼層接觸電阻小的LaAl2合金膜構 成,成爲在順方向電流作爲2 0mA時的順方向電壓(V f ) 爲3 . 1 V之低値。另外,成爲在逆方向電流作爲1 0 // A時 的逆方向電壓爲9.5V之高値。又,因爲從在高載體濃度 構成之未摻雜P形磷化硼層之上部鍍銅層,並,設置接觸 P形磷化硼的表面並含有低接觸電阻的鑭•鋁合金膜之p 形電阻性電極,元件驅動電流使除基台電極的投影領域以 外的發光領域約同全面發光。 (第2實施例) P形磷化硼•鎵混晶層上設置含有鑭•矽合金之p形 電阻性電極之化合物半導體LED構成時作爲例具體說明 -17- (15) 200423439 本發明。化合物半導體發光元件的基本構造與第1實施例 相同,關於同樣的部分使用同樣的參考數字,其斷面構造 爲圖3、平面構造爲圖4。Between the P-shaped n-shaped resistive electrodes 108 and 109, a device driving current of 20 mA flows in the forward direction, and the light emitting characteristic of the LED chip 100 was confirmed. The blue band light with a center wavelength of 440 nm is emitted from the LED 100, and the half-width of the light emission spectrum is 210 millielectron volts (unit: meV). The brightness of the chip state before the resin molding was measured using a general integrating sphere was 11 millicandelas (mcd). In addition, the bottom surface of the p-shaped resistive electrode 105 is composed of a LaAl2 alloy film having a low contact resistance to the P-shaped boron phosphide layer, and the forward voltage (V f) when the forward current is 20 mA is 3. As low as 1 V. In addition, when the reverse current is 1 0 // A, the reverse voltage is as high as 9.5V. In addition, a copper layer is plated from the top of an undoped P-shaped boron phosphide layer composed of a high carrier concentration, and a p-shape of a lanthanum-aluminum alloy film having a low contact resistance is provided to contact the surface of the p-shaped boron phosphide. The resistive electrode and the element driving current make the light emitting area other than the projection area of the abutment electrode emit approximately the same light. (Second Embodiment) A compound semiconductor LED including a lanthanum-silicon alloy p-type resistive electrode provided on a P-shaped boron phosphide-gallium mixed crystal layer will be specifically described as an example. -17- (15) 200423439 The present invention. The basic structure of the compound semiconductor light-emitting element is the same as that of the first embodiment, and the same reference numerals are used for the same parts. The sectional structure is shown in Fig. 3 and the planar structure is shown in Fig. 4.
以未摻雜的P形磷化硼•鎵混晶層(Bo.98Gao.o2P ) 層2 04爲,在上述第1實施例所記載的發光層丨〇3上堆積 。B〇.98Ga〇.〇2P 層 204 爲,藉由(C2H5 ) 3B ) / ( CH3 ) 3Ga/PH3系減壓MOCVD法以8 5 (TC形成。層厚爲3 4 0 nm 。成爲 Bo.wGamP 層 204在室溫之載體濃度爲 8xl018cnr3,電阻率爲 5χ10·2Ω· cm〇An undoped P-shaped boron phosphide-gallium mixed crystal layer (Bo.98Gao.o2P) layer 204 is deposited on the light-emitting layer 100 described in the first embodiment. The B〇.98Ga〇〇2P layer 204 is formed by 8 5 (TC by a (C2H5) 3B) / (CH3) 3Ga / PH3 series reduced pressure MOCVD method. The layer thickness is 3 4 0 nm. It becomes Bo.wGamP The carrier concentration of the layer 204 at room temperature is 8 × 1018cnr3, and the resistivity is 5 × 10 · 2Ω · cm.
其次,P形Bo.MGamP層204的表面之全面,鑭· 矽(La · Si )合金膜205依照通常的真空蒸著法形成。La • Si合金膜105的膜厚爲540nm。其次,利用眾所皆知的 光學微影製成技術及電漿蝕刻技法做圖案。其後,依照電 漿乾式蝕刻法,去除不要的合金膜,如圖3所示,在LED 晶片200中央部直徑150//m圓形205,又,在周圍的p 形BG.98Ga〇.()2P層的表面使其接觸網狀210殘留於La · Si 合金膜。圓形殘留部分爲形成中間層206及金膜20 7並完 成基座電極208。 此外,矽單結晶基板101的裏面的全面爲,將金( Au) 99質量% •銻(Sb) 1質量%合金膜209以一般真空 蒸著法附著。Next, the entire surface of the P-shaped Bo.MGamP layer 204 is formed, and a lanthanum-silicon (La · Si) alloy film 205 is formed according to a general vacuum evaporation method. The film thickness of the La • Si alloy film 105 is 540 nm. Secondly, patterning is performed using the well-known optical lithography technique and plasma etching technique. Thereafter, the unnecessary alloy film was removed in accordance with the plasma dry etching method. As shown in FIG. 3, the diameter of the central portion of the LED wafer 200 was 150 // m in a circle 205, and the surrounding p-shaped BG.98Ga. ) The surface of the 2P layer was in contact with the mesh 210 and remained on the La · Si alloy film. The circular residual portion forms the intermediate layer 206 and the gold film 207 and completes the base electrode 208. The entire surface of the silicon single crystal substrate 101 is such that gold (Au) 99% by mass • antimony (Sb) 1% by mass alloy film 209 is attached by a general vacuum evaporation method.
其後,在施予上述圖案加工之La· Si合金膜之金蒸 著膜於被附著狀態,在氫氣流中以450 °C 10分鐘間的熱處 理(s i n t e r ),使電阻性接觸性增加。因此,B g . 9 8 G a G _ 〇 2 P -18- (16) 200423439 層204的表面由LA· Si製成之P形電阻性電極205,及 矽單結晶基板101的裏面上形成Αιι電阻性電極209。成 爲η形電阻性電極209的Au膜的膜厚爲2 // m。Thereafter, the gold-deposited film of the La · Si alloy film subjected to the above-mentioned patterning was deposited in an adhered state, and heat-treated (sin t e r) at 450 ° C for 10 minutes in a hydrogen stream to increase the resistive contact. Therefore, B g. 9 8 G a G _ 〇2 P -18- (16) 200423439 The surface of the layer 204 is made of a P-shaped resistive electrode 205 made of LA · Si, and an inner surface of the silicon single crystal substrate 101 is formed. Resistive electrode 209. The thickness of the Au film formed as the n-shaped resistive electrode 209 is 2 // m.
其次,沿著上述La · Si合金膜的鈾刻加工一倂形成 之裁斷線,將個別的LED分離,裁斷。裁斷用途的溝爲 ,成爲基板101的Si單結晶的[1.-1.0]及[-1.-1.1]結晶方 位平行設置。因此,成爲一邊爲 5 00 // m,另一邊爲 600 // m的長方形LED晶片200。大型LED晶片200的p形 及η形電阻性電極205、209間,將20mA順方向電流流 通時之發光中心波長爲44 Onm。又,依照近視野發光像, 從晶片200的中央部的基台電極以外的發光領域確認給予 同一強度發光。此爲,可以因元件動作電流在 B0.98Ga〇.〇2P層廣範圍均一擴散的形狀配置p形電阻性電 極。順方向電流作爲20mA時順方向電壓爲3.4 V,順方向 電流作爲1 〇 V A時順方向電壓爲8.3 V。Next, individual LEDs are separated and cut along cutting lines formed by the uranium engraving process of the above-mentioned La · Si alloy film. The grooves used for cutting are, and [1.-1.0] and [-1.-1.1] crystal orientations of Si single crystals of the substrate 101 are provided in parallel. Therefore, it becomes a rectangular LED chip 200 with 5 00 // m on one side and 600 // m on the other side. The center wavelength of light emission when a 20 mA forward current flows between the p-shaped and n-shaped resistive electrodes 205 and 209 of the large-sized LED chip 200 is 44 Onm. In addition, it was confirmed from the near-field emission image that light emission at the same intensity was given from a light-emitting area other than the abutment electrode in the central portion of the wafer 200. This is because the p-type resistive electrode can be arranged in a shape in which the element operating current is uniformly diffused in a wide range of the B0.98Ga0.02P layer. When the forward current is 20 mA, the forward voltage is 3.4 V, and when the forward current is 10 V A, the forward voltage is 8.3 V.
〔發明效果〕 依照本發明,因爲P形磷化硼系半導體層的表面使其 接觸設置的P形電阻性電極從鑭系元素或其合金膜構成, 因可形成低接觸電阻的電極,爲被供給之元件驅動電流有 效率的發光所被利用,依此,給予高發光強度的化合物半 導體發光元件之效果被舉出。更,本發明的化合物半導體 發光元件連接導線,藉由封入樹脂,可製作高亮度的L E D 燈。 •19- (17) 200423439 【圖式簡單說明】 【圖1】根據本發明與以往的材料的電流•電壓特性 之表示圖。 【圖2】表示第1實施例所記載之LED的斷面構造之 模式圖。[Effects of the Invention] According to the present invention, since the P-shaped resistive electrode provided on the surface of the P-shaped boron phosphide-based semiconductor layer in contact with it is made of a lanthanoid element or an alloy film thereof, an electrode having a low contact resistance can be formed. The supplied element driving current is used for efficient light emission, and the effect of giving a compound semiconductor light emitting element with a high light emission intensity has been cited. Furthermore, the compound semiconductor light-emitting element of the present invention is connected to a lead wire, and a resin can be sealed to produce a high-luminance LED lamp. • 19- (17) 200423439 [Brief description of the drawings] [Figure 1] A graph showing the current and voltage characteristics of the present invention and conventional materials. [Fig. 2] A schematic diagram showing a cross-sectional structure of an LED described in the first embodiment.
【圖3】表示第2實施例所記載之LED的斷面構造之 模式圖。 【圖4】表示第2實施例所記載之LED的平面構造之 模式圖。 〔符號說明〕[Fig. 3] A schematic diagram showing a cross-sectional structure of an LED described in the second embodiment. [Fig. 4] A schematic diagram showing a planar structure of the LED described in the second embodiment. 〔Symbol Description〕
100、200··· LED 1 0 1…砂卓結晶基板 102…η形鍍銅層 1 0 3…η形發光層 104、 204…ρ形鍍銅層 105、 205…ρ形電阻性電極 106、 206…中間層 107、 207…連線用台座金屬 108、 208···基座電極 1 09、209…η形電阻性電極 2 1 0…ρ形電阻性電極的網狀部分 -20-100, 200 ··· LED 1 0 1 ... Sad crystal substrate 102 ... n-shaped copper plated layer 1 0 3 ... n-shaped light-emitting layer 104, 204 ... p-shaped copper plated layer 105, 205 ... p-shaped resistive electrode 106, 206 ... intermediate layer 107, 207 ... pedestal metal 108, 208 ... base electrode 1 09, 209 ... n-shaped resistive electrode 2 1 0 ... p-shaped resistive electrode mesh portion -20-
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CN111279495A (en) * | 2017-10-16 | 2020-06-12 | 阿卜杜拉国王科技大学 | Group III nitride semiconductor device having boron nitride alloy contact layer and method for manufacturing the same |
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CN111279495A (en) * | 2017-10-16 | 2020-06-12 | 阿卜杜拉国王科技大学 | Group III nitride semiconductor device having boron nitride alloy contact layer and method for manufacturing the same |
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KR100701879B1 (en) | 2007-03-30 |
TWI251944B (en) | 2006-03-21 |
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