TWI249919B - A processor and a system with reduced memory requirements for high-speed routing and switching of packets and a method therefor - Google Patents

A processor and a system with reduced memory requirements for high-speed routing and switching of packets and a method therefor Download PDF

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Publication number
TWI249919B
TWI249919B TW091134615A TW91134615A TWI249919B TW I249919 B TWI249919 B TW I249919B TW 091134615 A TW091134615 A TW 091134615A TW 91134615 A TW91134615 A TW 91134615A TW I249919 B TWI249919 B TW I249919B
Authority
TW
Taiwan
Prior art keywords
packet
processor
memory
stored
analyzer
Prior art date
Application number
TW091134615A
Other languages
English (en)
Chinese (zh)
Other versions
TW200303666A (en
Inventor
Mauricio Call
Joel R Davidson
Michael W Hathaway
James T Kirk
Original Assignee
Agere Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems Inc filed Critical Agere Systems Inc
Publication of TW200303666A publication Critical patent/TW200303666A/zh
Application granted granted Critical
Publication of TWI249919B publication Critical patent/TWI249919B/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/18—Protocol analysers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/103—Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
TW091134615A 2001-12-19 2002-11-28 A processor and a system with reduced memory requirements for high-speed routing and switching of packets and a method therefor TWI249919B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/025,352 US7113518B2 (en) 2001-12-19 2001-12-19 Processor with reduced memory requirements for high-speed routing and switching of packets

Publications (2)

Publication Number Publication Date
TW200303666A TW200303666A (en) 2003-09-01
TWI249919B true TWI249919B (en) 2006-02-21

Family

ID=21825510

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091134615A TWI249919B (en) 2001-12-19 2002-11-28 A processor and a system with reduced memory requirements for high-speed routing and switching of packets and a method therefor

Country Status (6)

Country Link
US (1) US7113518B2 (enExample)
EP (1) EP1331757B1 (enExample)
JP (1) JP4209186B2 (enExample)
KR (1) KR100937283B1 (enExample)
DE (1) DE60211466T2 (enExample)
TW (1) TWI249919B (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1791305A1 (en) * 2005-11-25 2007-05-30 Alcatel Lucent Storing and processing a data unit in a network device
US8572349B2 (en) * 2006-01-31 2013-10-29 Agere Systems Llc Processor with programmable configuration of logical-to-physical address translation on a per-client basis
US7835288B2 (en) * 2008-07-02 2010-11-16 OnPath Technologies Inc. Network switch with onboard diagnostics and statistics collection
US8897316B2 (en) 2010-12-31 2014-11-25 Telefonaktiebolaget L M Ericsson (Publ) On-chip packet cut-through
US8743715B1 (en) 2011-01-24 2014-06-03 OnPath Technologies Inc. Methods and systems for calibrating a network switch
US9141373B2 (en) * 2013-07-31 2015-09-22 Arista Networks, Inc. System and method for accelerated software upgrades
CN113472688B (zh) * 2020-03-30 2023-10-20 瑞昱半导体股份有限公司 应用在网络装置中的电路及网络装置的操作方法
US20230060275A1 (en) * 2021-08-20 2023-03-02 International Business Machines Corporation Accelerating multiplicative modular inverse computation

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0504537A1 (en) * 1991-03-22 1992-09-23 International Business Machines Corporation Method and apparatus for the testing and evaluation of geographically distributed telecommunication networks
JP4181645B2 (ja) * 1996-02-29 2008-11-19 富士通株式会社 データ処理装置
US6369855B1 (en) * 1996-11-01 2002-04-09 Texas Instruments Incorporated Audio and video decoder circuit and system
US6185630B1 (en) * 1997-02-14 2001-02-06 Advanced Micro Devices, Inc. Device initializing system with programmable array logic configured to cause non-volatile memory to output address and data information to the device in a prescribed sequence
US6032190A (en) * 1997-10-03 2000-02-29 Ascend Communications, Inc. System and method for processing data packets
US6160809A (en) * 1997-12-17 2000-12-12 Compaq Computer Corporation Distributed packet data with centralized snooping and header processing router
AU4848499A (en) 1998-07-08 2000-02-01 Broadcom Corporation Network switch utilizing packet based per head-of-line blocking prevention
US6438145B1 (en) * 1998-12-04 2002-08-20 Koninklijke Philips Electronics N.V. Transport packet distribution system and method using local header
KR100378372B1 (ko) * 1999-06-12 2003-03-29 삼성전자주식회사 데이터 네트워크에서 패킷 스위치 장치 및 방법
CA2402018A1 (en) 2000-03-03 2001-09-13 Tenor Networks, Inc. High-speed data processing using internal processor memory space
US6947931B1 (en) * 2000-04-06 2005-09-20 International Business Machines Corporation Longest prefix match (LPM) algorithm implementation for a network processor
US7114008B2 (en) * 2000-06-23 2006-09-26 Cloudshield Technologies, Inc. Edge adapter architecture apparatus and method
US7032031B2 (en) * 2000-06-23 2006-04-18 Cloudshield Technologies, Inc. Edge adapter apparatus and method
WO2002035847A2 (en) * 2000-10-27 2002-05-02 Polycom Israel Ltd. Apparatus and method for improving the quality of video communication over a packet-based network
US20020196737A1 (en) * 2001-06-12 2002-12-26 Qosient Llc Capture and use of service identifiers and service labels in flow activity to determine provisioned service for datagrams in the captured flow activity
US6915480B2 (en) * 2001-12-21 2005-07-05 Agere Systems Inc. Processor with packet data flushing feature

Also Published As

Publication number Publication date
EP1331757A3 (en) 2003-08-13
TW200303666A (en) 2003-09-01
JP4209186B2 (ja) 2009-01-14
KR100937283B1 (ko) 2010-01-18
DE60211466T2 (de) 2006-09-28
JP2003218907A (ja) 2003-07-31
KR20030051381A (ko) 2003-06-25
EP1331757A2 (en) 2003-07-30
EP1331757B1 (en) 2006-05-17
US7113518B2 (en) 2006-09-26
US20030112801A1 (en) 2003-06-19
DE60211466D1 (de) 2006-06-22

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MM4A Annulment or lapse of patent due to non-payment of fees