TWI246381B - Mounting structure of bumpless chip - Google Patents

Abstract

A mounting structure of bumpless chip mainly comprises a substrate, a chip and an ACF (anisotropic conductive film). The chip has an active surface. A plurality of bonding pads are formed on the active surface lack of bumps. The ACF is disposed on the active surface of the chip and covers the bonding pads. The ACF contains a plurality of hard metal particles. When the chip is attached to a surface of the substrate, some of the hard metal particles penetrate the bonding pads of the chip and are electrically connected to the connecting pads of the substrate. Thus the chip can be bumpless boned under low temperature, especially for connection of the optical-electrical chip.

Description

1246381 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a kind of wafer helmet, such as an image sensor wafer, and the like. The structure of the bumpless structure of the electric film. [Previous technology]

It is known that semiconductors or various types of wafers have bumps, which are combined by a flip chip to a substrate. At present, in the packaging of image sensors or optoelectronic electronic products, it is also common for an image sensing chip to have a light-acting area. A bump is made on an active surface, and then flip-chip bonded to the substrate. For example, the Republic of China Patent Publication No. 566067 "CMOS / CCD image sensor sealing method" discloses a combined structure of a conventional image sensor. Please refer to FIG. 丨. The bump-bonding structure 100 of the camera includes a PCB circuit board 110, an image sensor chip 120, and a glass cover 130. The PCB circuit board 110 It has a window 111 and a plurality of inner pins 丨 12. One active surface 121 of the image sensor chip 120 has a sensing area 122 and a plurality of pads 123. A passive layer 1 2 4 is formed on On the active surface 1 2 1, conventionally, a metal under a bump

The layer 125 (under bump metalization (UBM)) is formed on the pads 123 by means of plating or sputtering, so that a plurality of bumps 141 are formed on a UBM layer 125, and a flip-chip technology is used. The bumps 141 of the image sensor chip 120 are coupled to the PCB circuit board 110. The sensing area 1 22 is oriented to correspond to the window 111, and the bumps 141 are filled with an adhesive 142. The gap between the PCB and the PCB circuit board 110 is that the glass cover 1 30 is also bonded to the PCB circuit board 110 with the adhesive material 142. Since the UBM layer 125 on the pads 123 is electrically bonded or sputtered,

Page 7 12463381 V. Description of the invention (2), and the bumps 141 are formed by evaporation or electroplating, which easily pollutes the sensitive sensing area 1 22 and affects the image The quality of the sensor chip 120 and the image sensor chip 120 after the flip chip bonding must be filled with the glue 142 between the bumps 141 to hermetically seal the sensing area 122. However, the glue material 142 has good fluidity during the filling process, and will overflow and pollute the sensing area 1 2 2. If the filling amount is too small, the airtight effect cannot be achieved. [Summary of the Invention]

The main purpose of the present invention is to provide a bump-free bonding structure for a wafer, which includes a substrate, a wafer, and an anisotropic conductive film (ACF). The anisotropic conductive film is not provided there. One of the active surfaces of the chip covers a plurality of welding pads on the active surface. The anisotropic conductive adhesive contains a plurality of hard metal particles. When the wafer is attached to the substrate, a part of the anisotropic conductive adhesive is used. The hard metal particles are electrically connected to the wafer and the substrate, and it is not necessary to make a bump under metal layer and corresponding bumps on the solder pads of the wafer to bond the wafer to the substrate. The block bonding can avoid contaminating the sensitive light actuating area of the photovoltaic chip during the manufacturing process of the metal layer under the bumps and the bumps, thereby affecting the quality of the photovoltaic chip.

A second object of the present invention is to provide a bumpless bonding structure of a wafer, in which an anisotropic conductive adhesive system includes a plurality of hard metal particles, and each hard metal particle system has a plurality of puncture ends. It is provided on a substrate, and some of the hard metal particles are pierced with an oxidized layer on a plurality of pads of a 3D wafer with the puncture ends to promote the hard gold.

1246381

V. Description of the invention (3) Electrical connection effect of particles. Structure, when a system of one and two is provided with a bump-free chip combined with a hard metal = cathode = on—substrate, an anisotropic conductive adhesive is connected to the pad with a plurality of pads and connected to the wafer The plurality of bonding pads and one of the pieces of the substrate mainly describe a rectangular conductive adhesive colloid to form an air-tight space between one surface of the substrate and the substrate, which can save the conventional wafer from being bumped and then filled with one. Colloid production steps. The bump-free bonding structure of the wafer according to the present invention includes an anti-Japanese wafer and an anisotropic conductive adhesive (1 m 'ACF). The salt substrate has a surface and a plurality of connection pads are formed. On the side surface of the 4 substrate, the wafer has an active surface, a plurality of welding pads are formed on the active surface, and an oxide layer is formed on the pads, preferably the distance between adjacent pads is greater than 2 〇〇 # ^, the anisotropic conductive adhesive is provided on the active surface of the wafer to cover the pads, the anisotropic conductive adhesive contains a plurality of hard metal particles, preferably, the hard metals The particles are nickel particles. Each hard metal particle has a plurality of piercing ends. When the wafer is attached to the surface of the substrate, some of the hard metal particles pierce the pads with the piercing ends. An oxide layer is electrically connected to the connection pad of the substrate. [Embodiment] With reference to the drawings, the present invention will be described by the following embodiments. According to a first specific embodiment of the present invention, a bump-free bonding structure of a wafer 20 0 is shown in FIG. 2, which includes a substrate 21 0, a wafer 220 and an anisotropic conductive adhesive 23 0 (ani so tropi c conductive

Page 91246381 V. Description of the invention (4) fi 1 m, ACF), the substrate 2 1 0 is selected from one of a glass substrate, a flexible circuit board, a ceramic circuit board and a printed circuit board. In this embodiment, · In the substrate 210 is a glass substrate, the substrate 210 has a surface. 211, a plurality of connection pads 212 are formed on the surface 211 of the substrate 210, preferably, the wafer 220 is a Optoelectronic chip, which is selected from image sensor chip, Liquid Crystal On LCOS (Liquid Crystal On)

Silicon (liquid crystal silicon substrate) chip, CM0S (complementary Metal Oxide Semiconductor) chip and CCD (Charge-Coup led Device, charge-coupled device sensor) chip, which can also be one of the general In this embodiment, the chip 220 is an image sensing chip, and the chip 220 has an active surface 221. The active surface 221 of the wafer 220 includes a light active region 222, a plurality of Pads 223 are formed on the active surface 221 and are arranged outside the light active area 222. The distance between each adjacent pad 2 23 is greater than 200 / zm. The pure state layer 224 (passivation layer). In this embodiment, the pads 223 of the wafer 220 are aluminum pads, and an oxide layer 223a such as alumina is formed on the pads 223 of the wafer 220. . The anisotropic conductive adhesive 230 is disposed on the active surface 221 of the wafer 220 and covers the bonding pads 223. Preferably, the anisotropic conductive adhesive 230 is coated in a square shape to cover the wafer 220. The active surface 221 does not contaminate the light active region 222. The anisotropic conductive adhesive 230 includes a plurality of hard metal particles 231. In this embodiment, the hard metal particles 231 are nickel particles with high hardness. Preferably, each of the hard metal particles 2 31 series has a complex 12463381. V. Description of the invention (5) A plurality of puncture ends 231a, the puncture ends 23 la can be changed according to the different crystalline forms of the hard metal particles 231. When the anisotropic conductive adhesive 230 of the wafer 220 is bonded to the active surface 22 ι and the surface 211 of the substrate 2 10 by an external force, the anisotropic conductive adhesive 23 is hermetically sealed and the light-acting region 222 is An enclosed space 2 4 1 ′ and the piercing ends 2 3 1a of the hard metal particles 2 3 1 penetrate the oxide layer 2 23a due to the external force to electrically connect the chips 220 The bonding pad 223 and the corresponding connection pad 212 of the substrate 210.

The wafer 220 is electrically connected to the connection pads 212 of the substrate 21 with the hard metal particles 231 of the anisotropic conductive adhesive 23, and the gel of the anisotropic conductive adhesive 230 is applied to the wafer 220. The sealed space 24 1 is formed between the active surface 221 and the far surface 211 of the substrate 21 0. The bump-free bonding structure 2 0 of the wafer is simultaneously electrically connected with the anisotropic conductive adhesive 2 3 0. The need for denseness 'may not require the conventional step of forming a UBM layer and bumps on a wafer' to reduce the pollution to the light active region of the optoelectronic wafer, and to simplify the manufacturing steps of forming bumps before filling the colloid.

According to a second specific embodiment of the present invention, please refer to FIG. 3, a bump-free bonding structure of a wafer 300 mainly includes a substrate μ, a wafer 320, and an anisotropic conductive film 330 (anisotropic conductive film, ACF). In this embodiment, the substrate 310 is a flexible circuit board, and the substrate 310 has a first surface 311, a second surface 312, and a first surface 31 through the substrate 310. The window 313 ′ with the second surface 312 is formed on the first surface 31 > 1 of the substrate 31 () and is arranged around the window 313. In this embodiment, the wafer 320 is An image sensing chip, the chip 320 has an active surface

1246381 321 'The active surface 321 of a Haiji film 320 includes a light active area 322, and a plurality of pads 3 2 3 are formed on the active surface 3 2 1 and arranged outside the periphery of the light active straight 322' The distance between each adjacent bonding pad 323 is greater than 2000 # m, =. A pure state layer 324 is formed on the active surface 321 of the wafer 320. In this embodiment, the bonding pads of the wafer 320 are The 3 23 series are aluminum pads, and an oxide layer 3 2 3 a is formed on the solder pads 3 2 3 of the wafer 3 2 0.

The anisotropic conductive adhesive 330 is disposed on the active surface 321 of the wafer 320 and covers the solder pads 3 2 3. Preferably, the anisotropic conductive adhesive 330 is coated in a round shape to The outer periphery of the active surface 321 of the wafer 320 is covered without contaminating the photoactive region 322. The anisotropic conductive adhesive 330 contains a plurality of hard metal particles 3 31. In this embodiment, the hard metals The particles 3 3 1 are nickel particles of 咼 hardness. Preferably, each hard metal particle 3 3 1 has a plurality of puncture ends 3 3 1 a. When the anisotropic conductive adhesive 330 on the wafer 3 2 0 The active surface 321 is bonded to the first surface 311 of the substrate 31 by an external force, the light actuation region 3 2 2 is oriented and corresponds to the window 313 of the substrate 3 1 0, and the hard metal particles 331 The puncture ends 331a penetrate the oxide layer 32 3a due to the external force, so as to electrically connect the solder pads 323 of the wafer 320 and the corresponding connection pads 314 of the substrate 310. In this embodiment, In addition, a transparent cover plate 340 is combined, and the transparent cover plate 3 4 0 is bonded to the substrate 3 1 0 with an adhesive 351. Second surface 312, the transparent cover plate 340 is formed a sealed space 352 of the wafer 320 based on the active surface 321 of the substrate 310 at the mouth of the window 313, the light-based active area 322 to the hermetically sealed space 352. v The chip 320 is made of the hard metal particles of the anisotropic conductive adhesive 330

Page 12 124385 1. V. Description of the invention (7) The particles 3 3 1 are electrically connected to the connection pads 3 1 4 of the substrate 3 1 0, and the anisotropic conductive glue 330 colloid is used to bond the active part of the wafer 320. The surface 321 and the first surface of the substrate 310 are read μ > λ · shout, # s Yiyi σ Hairi sun film without bumps bonding structure 30 0 system homogeneous "glue 330 to achieve electrical properties The requirements for connection and airtightness can be === the step of forming _ layers and bumps, reducing the production steps of the light body. Forcible interstitials are formed first, and then filled with glue. Any changes and modifications made by anyone who is familiar with this technology, as defined by the scope of the patent application, without departing from the spirit and scope of the present invention, are all within the scope of the present invention. 1246381 Simple illustration of the drawing [Simple illustration of the drawing [Explanation] Figure 1: A schematic cross-sectional view of a bump bonding structure of a conventional image sensor \ Figure 2: A cross-sectional schematic view of a bumpless bonding structure of a wafer according to a first embodiment of the present invention; and Figure 3 ·· According to a second embodiment of the present invention, a bumpless bonding of a wafer A schematic cross-sectional view of the structure. Brief description of the component symbols: 1 0 0 The bump combination structure of the image sensor 110 PCB circuit substrate 111 window 112 inner pin 120 image sensor is chip 121 active surface 122 sensing area 123 fresh 塾 124 blunt State layer 125 UBM layer 130 Glass cover 141 Bump 142 Adhesive material 200 Wafer-free bonding structure of wafer 210 Substrate 211 Surface 212 Connection pad 220 Wafer 221 Active surface 222 Light active area 223 Welding pad 223a Oxidation layer 224 Passive layer 230 Anisotropic conductive adhesive 231 Hard metal particles 231a Puncture end 241 Confined space 300 wafer without bump bonding structure 310 Substrate 311 First surface 312 Second surface 313 Window 314 Connection pad

Page 14 1246381 Brief description of the diagram 320 Wafer 321 Active surface 322 Photoactive area 323 Pad 323a Oxidation layer 324 Passive layer 330 Anisotropic conductive adhesive 331 Hard metal particles 331a Piercing end 340 351 Transparent cover adhesive 352 Confined space Ο

Page 15

Claims (1)

1246381 VI. Scope of patent application [Scope of patent application] 1. A bump-free bonding structure for a wafer, including: · A substrate having a first surface and a second surface, and a plurality of connection pads are formed on the substrate The first surface; a wafer disposed on the first surface of the substrate, the wafer having an active surface, and a plurality of pads formed on the active surface; and an anisotropic conductive adhesive fi lm, ACF), which is provided on the active surface of the chip and covers the recording pads. The anisotropic conductive adhesive contains a plurality of hard metal particles to electrically connect the pads of the chip and Corresponding connection pads of the substrate. 2. The bump-free bonded structure of a wafer as described in item 1 of the scope of the patent application, wherein each hard metal particle has a plurality of puncture ends. 3. The bump-free bonding structure of the wafer as described in item 丨 of the patent application, wherein the hard metal particles are nickel particles. 4. The bump-free bonding structure of the wafer as described in item 2 of the scope of the patent application, wherein an oxide layer is formed on the pads of the wafer. 5. The bump-free bonding structure of the wafer as described in item 4 of the scope of the patent application, wherein the piercing ends of some of the hard metal particles pierce the oxide layer. 6. The bumpless bonding structure of the wafer as described in item 4 of the scope of the patent application ^ wherein the pads of the wafer are Shaoyu. 7. The bumpless bonding structure of the wafer as described in item 1 of the scope of patent application, wherein the wafer is a photovoltaic wafer. 8 The bump-free bonding structure of the wafer as described in item 7 of the scope of the patent application, page 16 1246381 6. The scope of the patent application, wherein the active surface of the wafer includes a light active area, and the pads are arranged in The light operates outside the periphery. · 2 The bump-free bonding structure of the wafer as described in item 8 of the patent application scope * The 'anisotropic conductive adhesive system is coated in a zigzag shape to cover the solder joints without contaminating the light action Area. 10. The bump-free bonding structure of a wafer as described in item 8 of the scope of the patent application, wherein the anisotropic conductive adhesive is used to bond the active surface of the wafer and the first surface of the substrate, and hermetically actuate the light. Area. The bump-free bonding structure of the wafer as described in item 7 of the application, ie Bazhong. The Helicon film is selected from the group consisting of image sensor wafers, IXOSaiquid CryStal On Silicon (liquid crystal silicon substrate) wafers, CMO ^ S (Complementary Metal Oxide Semiconductor) wafers and CCDs. (Charge-Coupled Device). 1 2. The bumpless bonding structure of a wafer as described in item i of the scope of the patent application, wherein the distance between adjacent pads of the wafer is greater than 200. 132. The bumpless bonding structure of a wafer as described in the above patent application item No. 8 or 8, wherein the substrate has a window that penetrates the first / second surface and the second surface of the substrate. 14. The bumpless bonded structure of a wafer as described in item 13 of the scope of the patent application, wherein the light actuation region of the wafer is oriented and corresponds to the window of the substrate. 15 The bump-free bonding structure of the wafer as described in item 13 of the patent scope of Shenyan 'wherein the connection pads of the substrate are arranged around the window. Page 17 J246381, the scope of the patent application 16, and the bump-free bonding structure of the wafer as described in the patent application scope item 3, which further includes a transparent cover plate, which is bonded to the first surface of the substrate 'The transparent cover and the active surface of the wafer form a closed space at the window. 1. The bump-free bonding structure of the wafer as described in item 6 of the scope of the patent application ^ Wherein, the light actuating area of the 5H1 wafer is hermetically sealed in the confined space. 2 t I · The bumpless bonding structure of the wafer as described in the first item of the patent scope = the substrate f is a substrate selected from among glass substrates, flexible circuit boards, ceramic circuit boards, and printed circuit boards. Proud Ceramics