TWI237533B - Circuit board and manufacturing method thereof - Google Patents

Circuit board and manufacturing method thereof Download PDF

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TWI237533B
TWI237533B TW93101286A TW93101286A TWI237533B TW I237533 B TWI237533 B TW I237533B TW 93101286 A TW93101286 A TW 93101286A TW 93101286 A TW93101286 A TW 93101286A TW I237533 B TWI237533 B TW I237533B
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Taiwan
Prior art keywords
circuit board
scope
patent application
item
circuit
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TW93101286A
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Chinese (zh)
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TW200526096A (en
Inventor
Yu-Tuan Lee
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Gigno Technology Co Ltd
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Priority to TW93101286A priority Critical patent/TWI237533B/en
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Publication of TW200526096A publication Critical patent/TW200526096A/en
Publication of TWI237533B publication Critical patent/TWI237533B/en
Priority to US11/958,191 priority patent/US20080093114A1/en

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Abstract

A circuit board includes a substrate, an insulating layer, at least one protrusion, and a first circuit layer. The insulating layer is disposed on the substrate, and has at least one protrusion-positioning region. At least part of the protrusion is disposed on the protrusion-positioning region. The first circuit layer is disposed on the insulating layer and has at least one trace line extending onto the protrusion.

Description

12375331237533

(一)、【發明所屬之技術領域】 本發明係關於一種電路板及其製造方法,特別係指一 種利用喷墨方式所形成之電路板及其製造方法。 (二)、【先前技術】 在現5電子產品中’電路板(circuit board)幾乎是 不可或缺的部品,而電路板的種類繁多,就用途而言就有 作為載置各種主動元件或被動元件之印刷電路板(printed ci rein t board)、或是利用於封裝製程中,作為載置晶片 用之載置電路板(carrier circuit board)。 而’就作為載置各種主動元件或被動元件之印刷電 路板而言’通常會在印刷電路板上之一電路線上形成一電 連塾(pad) ’或甚至在電連墊上形成一凸塊,以使其便於 與主動元件或被動元件電連接。一般而言,形成於該種電 路板上之凸塊大多為銲錫凸塊、或金凸塊等。 另外’就利用於封裝製程中作為載置晶片用之載置電 路板而言,通常也會在載置電路板上之一電路線上形成一 電連塾(pad)’或甚至在電連墊上形成一凸塊,以使其便 於與晶片電性連接。一般而言,形成於該種電路板上之凸 塊大多為銲錫凸塊、或金凸塊等。 承上所述,無論是何種電路板,其上之電路線大多採 用網版印刷、或是微影蝕刻等方式形成,之後,再於電路 線上之電連墊(pad)形成凸塊。然而,由於受限於電路線 形成技術以及電路板之基板材質,因此習知的電路板之電 1237533 案號 93101286 A_η 曰 修正 五、發明說明(2) 路線的線寬或是電路線上的電連墊大小通常無法有效縮 小。換言之,電路板之面積即無法有效縮小,此點實無法 合乎電子產品所要求之短、小、輕、薄之趨勢。此外,就 習知電路板而言,由於其形成電路線與凸塊必須經過繁複 製程,故不管是生產時間或是生產成本均無法有效縮短或 降低。 因此,如何提供一種可以有效縮減電路板之電路線的 線寬或是電連墊大小,同時亦可縮短電路板之生產時間、 降低生產成本之電路板及其製造方法實為業界之一大課 題。 (三)、 有 減電路 電路板 法。 緣 板、一 【發明内容】 鑑於上述課題,本發明之目的為提供一種可有效縮 板之電路線的線寬或是電連墊大小,同時亦可縮短 之生產時間、降低生產成本之電路板及其製造方 是,為達上述目的,依本發明之電路板係包含一基 絕緣層、至少一突起物、及一第一電路層。絕緣層 於基板上,且絕緣層中係至少設有一突起物設置 起物係至少部分設置於該絕緣層之突起物設置區 係設置 區。突 中。第一電路層係設置於絕緣層上,第一電路層之至少一 電路線係延設於突起物之上。另,依本發明之基板係更包 含一第二電路層,第二電路層係設置於基板之一表面上, 絕緣層係覆蓋第二電路層。此時,絕緣層中更形成至少一(1) [Technical Field to which the Invention belongs] The present invention relates to a circuit board and a manufacturing method thereof, and particularly to a circuit board formed by an inkjet method and a manufacturing method thereof. (II) [Previous technology] In the current 5 electronic products, the 'circuit board' is almost an indispensable part, and there are many types of circuit boards, as far as the use is concerned, it is used to place various active components or passive components. The printed circuit board of the component (printed ci rein t board), or the carrier circuit board used for mounting the chip in the packaging process. And 'for a printed circuit board on which various active or passive components are placed', usually an electric pad is formed on a circuit line of the printed circuit board, or even a bump is formed on an electric pad, This makes it easy to electrically connect with active or passive components. Generally speaking, the bumps formed on such circuit boards are mostly solder bumps or gold bumps. In addition, 'for a mounting circuit board used for mounting a chip in a packaging process, an electrical pad is usually formed on one of the circuit wires on the mounting circuit board' or even on an electrical pad. A bump to facilitate electrical connection with the chip. Generally speaking, the bumps formed on such circuit boards are mostly solder bumps or gold bumps. As mentioned above, no matter what kind of circuit board, the circuit lines on it are mostly formed by screen printing or lithographic etching, and then bumps are formed on the electrical pads on the circuit lines. However, due to the limitation of the circuit line forming technology and the substrate material of the circuit board, the conventional circuit board electricity 1237533 Case No. 93101286 A_η Revision V. Description of the invention (2) The line width of the route or the electrical connection on the circuit line Pad size is often not effectively reduced. In other words, the area of the circuit board cannot be effectively reduced, which cannot meet the short, small, light, and thin trend required by electronic products. In addition, as far as the conventional circuit board is concerned, since it must undergo a complicated process for forming circuit lines and bumps, neither the production time nor the production cost can be effectively shortened or reduced. Therefore, how to provide a circuit board that can effectively reduce the line width or the size of the electrical pads of the circuit board, and also shorten the production time of the circuit board, reduce the production cost of the circuit board and its manufacturing method is a major issue in the industry . (C), circuit board method with subtractive circuit. Edge board, [Abstract] In view of the above problems, the object of the present invention is to provide a circuit board that can effectively reduce the line width or the size of the electrical pads of the circuit wires, and can also shorten the production time and reduce the production cost. In order to achieve the above object, the circuit board according to the present invention includes a base insulating layer, at least one protrusion, and a first circuit layer. The insulating layer is on the substrate, and at least one protrusion is provided in the insulating layer. The protrusion is at least partially provided in the protrusion setting area of the insulating layer. Suddenly. The first circuit layer is disposed on the insulating layer, and at least one circuit line of the first circuit layer is extended on the protrusion. In addition, the substrate according to the present invention further includes a second circuit layer, the second circuit layer is disposed on one surface of the substrate, and the insulating layer covers the second circuit layer. At this time, at least one

第7頁 1237533 _案號 93101286_年月日_ifi_ 五、發明說明(3) 電連孔,第一電路層係經由電連孔而與第二電路層電性連 結。 另,依本發明之電路板製造方法係包含以下步驟:於 一基板上形成一絕緣層;於該絕緣層中形成至少一突起物 設置區;於該絕緣層之突起物設置區之處形成至少一突起 物;以及於該絕緣層上形成一第一電路層,並使該第一電 路層之至少一電路線延設於該突起物之上。另外,依本發 明之電路板製造方法係更包含:於基板之一表面上形成一 第二電路層,絕緣層係覆蓋第二電路層。此時,絕緣層中 更形成至少一電連孔,第一電路層係經由電連孔而與第二 電路層電性連結。 承上所述,於本發明中,突起物係可以利用喷墨方式 將高分子聚合物、或樹脂材料注入突起物設置區中形成。 第一電路層係可利用喷墨方式將一含有金屬微粒之塗液喷 置於絕緣層或突起物上形成。而,第二電路層係可利用喷 墨方式將一含有金屬微粒之塗液喷置於基板上形成。 綜上所述,就本發明之電路板及其製造方法而言,由 於突起物係可利用喷墨方式形成,且第一電路層及第二電 路層係亦可利用喷墨方式形成,換言之,即無須進行傳統 印刷方式、或是蝕刻方式等繁複程序。因此,本發明之電 路板及其製造方法係可縮短電路板之生產時間、降低生產 成本。另外,由於現今之喷墨技術已經可以製作出2 0微米 或更小之線寬,因此,本發明之電路板及其製造方法係可 有效縮減電路板之電路線的線寬或是電連墊大小。Page 7 1237533 _Case No. 93101286_year month_ifi_ V. Description of the invention (3) Electrical connection hole, the first circuit layer is electrically connected to the second circuit layer through the electrical connection hole. In addition, the method for manufacturing a circuit board according to the present invention includes the following steps: forming an insulating layer on a substrate; forming at least one protrusion setting area in the insulating layer; forming at least a protrusion setting area of the insulating layer A protrusion; and forming a first circuit layer on the insulating layer, and extending at least one circuit line of the first circuit layer over the protrusion. In addition, the method for manufacturing a circuit board according to the present invention further includes: forming a second circuit layer on one surface of the substrate, and the insulating layer covers the second circuit layer. At this time, at least one electrical connection hole is formed in the insulating layer, and the first circuit layer is electrically connected to the second circuit layer through the electrical connection hole. As mentioned above, in the present invention, the protrusions can be formed by injecting a high-molecular polymer or a resin material into the protrusion setting area by an inkjet method. The first circuit layer can be formed by spraying a coating liquid containing metal particles on an insulating layer or a projection by an inkjet method. The second circuit layer can be formed by spraying a coating liquid containing metal particles on a substrate by an inkjet method. In summary, as for the circuit board and the manufacturing method thereof of the present invention, since the protrusions can be formed by the inkjet method, and the first circuit layer and the second circuit layer can also be formed by the inkjet method, in other words, That is, there is no need to perform complicated procedures such as a traditional printing method or an etching method. Therefore, the circuit board and the manufacturing method thereof of the present invention can shorten the production time of the circuit board and reduce the production cost. In addition, since the current inkjet technology can already produce line widths of 20 microns or less, the circuit board and its manufacturing method of the present invention can effectively reduce the line width or electrical pads of the circuit lines of the circuit board. size.

1237533 修正 ----- 9310128B_年月曰 五、發明說明(4) (四)、【實施方式】 以下將參fl?、相關圖式,說明依本發明較佳實施例之電 =板、。在此要先說明的是,於本發明中,所謂電路板係= έ作為載置各種主動元件或被動元件之電路板、或是利用 於封裝製程中,作為載置晶片用之電路板。 二、為使本發明之内容更容易理解,以下將舉一實例,以 說明依本發明較佳實施例之電路板。 如圖1所示,本發明之電路板1係包含一基板1卜一絕 緣層12、至少一突起物13、及一第一電路層ι4。 請參考圖2所示,絕緣層1 2係設置於基板丨丨上。絕緣 ,1 2中係至少設有突起物設置區1 2丨,於本實施例中,絕 緣層12中之突起物設置區121係為一開孔,然而,如圖3所 : 大起物設置區1 2 1係亦可為一凹槽(請同時參考圖7 )。 =起物設置區121中係分別設置有一突起物13/突起物13 ,、至少部分設置於絕緣層丨2之突起物設置區丄2丨中。第一 電路層14係設置於絕緣層12上,而,第一 —電路線im延設於突起物13之上。 传勹二t實施例中基板1 1係為玻璃基板。,絕緣層12 幾材料或無機材料。而無機材料係可為石夕氧化合 或氮…物(S1NX)、或氣氧化石夕(sl0XNy) 施仑I :起物1 3係包3同分子聚合物、或樹脂材料。於本實 她例中,突起物13係包含—具有彈性材料者為佳。 另外,如圖4所不,本發明之電路板1之基板1 1更可預1237533 Amendment ----- 9310128B_Year and Month Five, Description of the Invention (4) (IV), [Embodiment] The following will refer to fl ?, related drawings, to explain the electric = board, . What needs to be explained here is that in the present invention, the so-called circuit board is used as a circuit board on which various active components or passive components are placed, or is used in a packaging process as a circuit board on which chips are placed. 2. To make the content of the present invention easier to understand, an example will be given below to illustrate a circuit board according to a preferred embodiment of the present invention. As shown in FIG. 1, the circuit board 1 of the present invention includes a substrate 1, an insulating layer 12, at least one protrusion 13, and a first circuit layer ι4. Please refer to FIG. 2, the insulating layer 12 is disposed on the substrate 丨 丨. Insulation, at least 1 2 is provided with a protrusion setting area 1 2 丨. In this embodiment, the protrusion setting area 121 in the insulation layer 12 is an opening. However, as shown in FIG. 3: a large object setting Zone 1 2 1 can also be a groove (please refer to Figure 7 at the same time). The protrusion setting area 121 is provided with a protrusion 13 / a protrusion 13 respectively, and is at least partially disposed in the protrusion setting area 丄 2 丨 of the insulating layer 丨 2. The first circuit layer 14 is disposed on the insulating layer 12, and the first circuit line im is extended on the protrusion 13. The substrate 11 in the embodiment of the transmission t is a glass substrate. , Insulating layer 12 several materials or inorganic materials. The inorganic material can be oxidized or nitrogen ... (S1NX), or aerobic oxidized (slOXNy) Shi Lun I: from the 1st, 3rd, 3th, 3 homopolymer, or resin materials. In this example, the protrusion 13 is included-it is better to have an elastic material. In addition, as shown in FIG. 4, the substrate 11 of the circuit board 1 of the present invention is more predictable.

1237533 __案號9310128fi_— 年月日___ 五、發明說明(5) 先形成一第二電路層1 5。第二電路層1 5係設置於基板11之 一表面11 1上,而,絕緣層1 2係覆蓋第二電路層1 5。此 時,絕緣層1 2中係更可至少設有一電連孔1 2 2,第一電路 層1 4之電路線1 4 1係可經由電連孔1 2 2而與第二電路層1 5電 性連結。 又,如圖5所示,本發明之電路板1更可包含一電子元 件1 6。電子元件1 6係可電性連接於設於突起物1 3上之第一 電路層1 4之電路線1 4 1。於本實施例中,電子元件1 6係為 一晶片,而晶片係以覆晶接合方式接合於第一電路層1 4。 當然,電子元件1 6係亦可為被動元件或主動元件。由於本 發明之突起物1 3係可有彈性,因此,當晶片接合於設於突 起物1 3上之第一電路層1 4之電路線1 4 1時,可有利於晶片 之接合。 以下將以圖6〜圖9來具體說明本發明之一電路板製造 方法。 如圖6所示,本發明之一電路板製造方法係於基板n 上形成絕緣層1 2 ;之後,如圖7所示,再利用雷射加工 (laser zap)方式、或微影蝕刻方式而於絕緣層中形成至 少一突起物設置區1 2 1。於本實施例中,突起物設置區1 2 1 係為一凹槽,然而突起物設置區1 2 1係亦可為一開孔。 當形成突起物設置區121後,如圖8所示,突起物設置 區121之處係形成至少一突起物13;突起斤物丁丨二^ 嘴墨方式將南分子聚合物、或樹脂材料13,注入突起物設 置區121中來形成。於本實施例中,突起物13係包含一具1237533 __Case No. 9310128fi_ — year, month and day ___ 5. Description of the invention (5) A second circuit layer 15 is formed first. The second circuit layer 15 is disposed on one surface 11 1 of the substrate 11, and the insulating layer 12 covers the second circuit layer 15. At this time, the insulating layer 12 can be further provided with at least one electrical connection hole 1 2 2, and the circuit line 1 4 1 of the first circuit layer 14 can be connected to the second circuit layer 1 5 through the electrical connection hole 1 2 2. Electrical connection. In addition, as shown in FIG. 5, the circuit board 1 of the present invention may further include an electronic component 16. The electronic component 16 is electrically connected to a circuit line 14 of the first circuit layer 14 provided on the protrusion 13. In this embodiment, the electronic component 16 is a wafer, and the wafer is bonded to the first circuit layer 14 in a flip-chip bonding manner. Of course, the electronic components 16 can also be passive components or active components. Since the protrusions 13 of the present invention can be elastic, when the wafer is bonded to the circuit wires 1 4 1 of the first circuit layer 14 provided on the protrusions 13, the bonding of the wafer can be facilitated. Hereinafter, a method for manufacturing a circuit board according to the present invention will be described in detail with reference to FIGS. 6 to 9. As shown in FIG. 6, a method for manufacturing a circuit board according to the present invention is to form an insulating layer 12 on a substrate n. Then, as shown in FIG. 7, a laser zap method or a lithographic etching method is used. At least one protrusion setting region 1 2 1 is formed in the insulating layer. In this embodiment, the protrusion setting area 1 2 1 is a groove, but the protrusion setting area 1 2 1 may also be an opening. After the protrusion setting area 121 is formed, as shown in FIG. 8, at least one protrusion 13 is formed at the protrusion setting area 121; the protrusions are small and small, and the polymer or resin material 13 , Is formed by being implanted into the protrusion setting region 121. In this embodiment, the protrusion 13 includes a

1237533 月 修正 曰 案號 93im?,8fi 五、發明說明(β) 有彈性材料者為佳。 成一二=成突起物1 3後,如圖9所示,在於絕緣層1 2上形 1 4 m #電路層U ’並使第一電路層1 4之至少一電路線 電路突起物1 3之上。此時,設於突起物1 3上之第一 相互^、車^電路線1 4 1即可用以與一電子元件,例如晶片 曰片接人私。此時’由於突起物1 3係可有彈性’因此,當 日曰ΐ 設於突起物13上之第一電路層14之電路線Ml 呀,可有利於晶片之接合。 传勺:ίI:例中’基板1 1係為玻璃基板。❿,絕緣層1 2 ί (si〇!) ° 物CSiOx)、或氮矽化合物(s 等。第一電路層14係可利用噴黑方;二乳2石夕Sl〇XNy) 塗液喷置於絕緣層12或突起含微粒之 為銀微粒、或金微粒、或銅微粒、或把微^金屬&拉係可 製造=將以圖10〜圖15來具體說明本發明之另一電路板 如圖1 0所示,本發明之另一雷 11之一表面111上形成一第二電路岸15 I造方法係於基板 ";;;";:;:Γ ^^ J, Γ:…、或:微:金屬微粒係可為銀微粒、或金微 之後,如圖1 1所示,再於基板 絕緣層12係覆蓋第二電路層15。反11上形成一絕緣層12, 形成絕緣層12後,如圖12所示,再利㈣射加工 1237533 j-案號!1P1.2_L6__一年 a n 修正 五、發明說明(7) (1 a s e r z a p )方式、或微影蝕刻方式而於絕緣層中 少一突起物設置區1 2 1以及至少一電連孔1 2 2。於本 中’犬起物设置區1 2 1係為一凹槽,然而突起物設 係亦可為一開孔。 當形成突起物設置區1 2 1及電連孔! 2 2後,如圖 示,突起物設置區1 2 1之處係形成至少一突起物j 3 物,1 3係可以利用噴墨方式將高分子聚合物、或樹脂 1 3注入突起物設置區1 2 1中來形成,於本實施例中 物1 3係包含一具有彈性材料者為佳。 當形成突起物1 3後,如圖1 4所示,在於絕緣層 成一第一電路層14,並使第一電路層14之至少一電 1 4 1延設於突起物1 3之上。於本實施例中,第一電5 係可利用喷墨方式將一含有金屬微粒之塗液噴置於 1 2或突起物1 3上形成,而金屬微粒係可為銀微粒、 粒、或銅微粒、或把微粒。此時,如圖1 5所示,設 物1 3上之第一電路層1 4之電路線1 4 1即可用以與一, 件1 6電連接。此時,由於突起物丨3係可有彈性,因 晶片接合於設於突起物丨3上之第一電路層1 4之電路 時,可有利於晶片之接合。 於本實施例中,電子元件1 6係為一晶片,而晶 覆晶接合方式接合於第一電路層1 4。當然,電子元 亦可為被動元件或主動元件。此外,於本實施例中 1 1係為玻璃基板。而,絕緣層1 2係包含有機材料或 料。而無機材料係可為矽氧化合物(s i 0χ)、或氮石夕 形成至 .實施例 置區1 21 13所 ;突起 材料 ,突起 1 2上形 路線 各層1 4 絕緣層 或金微 於突起 ^子元 此,當 線141 片係以 件16係 ’基板 無機材 化合物 1237533 _案號93101286_年月日__ 五、發明說明(8) (SiNx)、或氮氧化矽(SiOxNy)等。 綜上所述,就本發明之電路板及其製造方法而言,由 於突起物係可利用喷墨方式形成,且第一電路層及第二電 路層係亦可利用喷墨方式形成,換言之,即無須進行傳統 印刷方式、或是蝕刻方式等繁複程序。因此,本發明之電 路板及其製造方法係可縮短電路板之生產時間、降低生產 成本。另外,由於現今之喷墨技術已經可以製作出2 0微米 或更小之線寬,因此,本發明之電路板及其製造方法係可 有效縮減電路板之電路線的線寬或是電連墊大小。 以上所述僅為舉例性,而非為限制性者。任何未脫離 本發明之精神與範疇,而對其進行之等效修改或變更,均 應包含於後附之申請專利範圍中。1237533 month Amendment No. 93im ?, 8fi V. Description of the invention (β) Elastic material is preferred. After forming one or two = forming the protrusions 1 3, as shown in FIG. 9, the circuit layer U ′ is formed on the insulating layer 12 and the at least one circuit line of the first circuit layer 14 is 1 3. Above. At this time, the first mutual circuit 141 and the circuit circuit 141 provided on the protrusion 13 can be used to connect with an electronic component, such as a chip or a chip. At this time, "the protrusions 1 and 3 are elastic", so that the circuit lines M1 of the first circuit layer 14 provided on the protrusions 13 on the same day can facilitate the bonding of the wafer. Spoon: I: In the example, the substrate 11 is a glass substrate. ❿, the insulating layer 1 2 ί (si〇!) ° CSiOx), or nitrogen silicon compounds (s, etc .. The first circuit layer 14 can be sprayed with black square; two milk 2 stone evening S10XNy) coating liquid spraying In the insulating layer 12 or the protrusions containing particles are silver particles, or gold particles, or copper particles, or micro metal & pull system can be manufactured = another circuit board of the present invention will be described in detail with reference to FIGS. 10 to 15. As shown in FIG. 10, a manufacturing method of forming a second circuit bank 15 on a surface 111 of another mine 11 of the present invention is based on a substrate ";; " :: Γ ^^ J, Γ: ... Or: Micro: The metal particles can be silver particles or gold particles, as shown in FIG. 11, and then the substrate insulating layer 12 is covered with the second circuit layer 15. An insulating layer 12 is formed on the reverse 11. After the insulating layer 12 is formed, as shown in FIG. 12, the laser processing is then performed 1237533 j-case number! 1P1.2_L6__year a n Amendment V. Description of the invention (7) (1 a s er z a p) method, or lithographic etching method, in which one protrusion is provided in the insulating layer 1 2 1 and at least one electrical connection hole 1 2 2. In the present example, the 'dog lifting object setting area 1 2 1' is a groove, but the protruding object design may also be an opening. When the protrusion setting area 1 2 1 and the electrical connection hole are formed! After 2 2, as shown in the figure, at least one protrusion j 3 is formed at the protrusion setting area 1. The 1 3 system can inject a polymer or resin 1 3 into the protrusion setting area by an inkjet method. 1 2 1 is formed, and in this embodiment, the object 1 3 is preferably a material with elasticity. After the protrusions 13 are formed, as shown in FIG. 14, the insulating layer forms a first circuit layer 14, and at least one electric 1 4 1 of the first circuit layer 14 is extended on the protrusions 13. In this embodiment, the first electric 5 series can be formed by spraying a coating liquid containing metal particles on 12 or projections 13 by an inkjet method, and the metal particles can be silver particles, particles, or copper. Particles, or particles. At this time, as shown in FIG. 15, the circuit lines 1 4 1 of the first circuit layer 14 on the device 13 can be used to be electrically connected to the unit 16. At this time, since the protrusions 3 can be elastic, when the wafer is bonded to the circuit of the first circuit layer 14 provided on the protrusions 3, the bonding of the wafer can be facilitated. In this embodiment, the electronic component 16 is a wafer, and the flip-chip bonding method is bonded to the first circuit layer 14. Of course, the electronic element can also be a passive element or an active element. In addition, in this embodiment, 11 is a glass substrate. The insulating layer 12 includes an organic material or a material. The inorganic material can be formed of silicon oxide (si 0χ), or nitrogen stone. The embodiment includes 1 21 13 areas; protruding materials, protrusions 12 2 layers on the shape line 14 insulation layer or gold is slightly smaller than the protrusions ^ For this reason, when the line 141 is based on 16 series of substrates, the inorganic material compound 1237533 _ case number 93101286 _ year month day__ 5. Description of the invention (8) (SiNx), or silicon oxynitride (SiOxNy), etc. In summary, as for the circuit board and the manufacturing method thereof of the present invention, since the protrusions can be formed by the inkjet method, and the first circuit layer and the second circuit layer can also be formed by the inkjet method, in other words, That is, there is no need to perform complicated procedures such as a traditional printing method or an etching method. Therefore, the circuit board and the manufacturing method thereof of the present invention can shorten the production time of the circuit board and reduce the production cost. In addition, since the current inkjet technology can already produce line widths of 20 microns or less, the circuit board and its manufacturing method of the present invention can effectively reduce the line width or electrical pads of the circuit lines of the circuit board. size. The above description is exemplary only, and not restrictive. Any equivalent modification or change made without departing from the spirit and scope of the present invention shall be included in the scope of the attached patent application.

第13頁 1237533 _案號93101286_年月日__ 圖式簡單說明 (五)、【圖式簡單說明】 圖1為顯示本發明較佳實施例之一電路板之局部示意 圖。 圖2為顯示圖1所示中A-A線處之剖面圖。 圖3為顯示圖1所示中A-A線處之另一剖面圖。 圖4為顯示本發明較佳實施例之另一電路板之剖面示 意圖。 圖5為顯示本發明較佳實施例之另一電路板中設有晶 片時之剖面不意圖。Page 13 1237533 _Case No. 93101286_Year Month and Day__ Brief Description of the Drawings (V), [Simplified Description of the Drawings] FIG. 1 is a partial schematic view showing a circuit board according to a preferred embodiment of the present invention. FIG. 2 is a cross-sectional view showing the line A-A shown in FIG. 1. FIG. Fig. 3 is another cross-sectional view showing the line A-A shown in Fig. 1. Fig. 4 is a schematic cross-sectional view showing another circuit board according to a preferred embodiment of the present invention. Fig. 5 is a schematic cross-sectional view showing a case where a wafer is provided in another circuit board according to a preferred embodiment of the present invention.

圖6〜圖9係本發明較佳實施例之一電路板製造方法之 步驟說明圖。 圖1 0〜圖1 5係本發明較佳實施例之另一電路板製造方6 to 9 are explanatory diagrams of steps of a method for manufacturing a circuit board according to a preferred embodiment of the present invention. 10 to 15 are another circuit board manufacturing method according to a preferred embodiment of the present invention.

法之 步驟說明圖。 元件 符號說明: 1 電 路板 11 基 板 111 基 板之一 表 面 12 絕 緣層 121 突 起物設 置 區 122 電 連孔 13 突 起物 13’ 樹 脂材料 (突起物) 14 第 一電路 層Illustration of method steps. Component symbol description: 1 Circuit board 11 Base board 111 One of the base boards Surface 12 Insulation layer 121 Projection setting area 122 Electrical connection hole 13 Projection 13 ’Resin material (projection) 14 First circuit layer

第14頁 1237533 _案號 93101286_年月日_修正 圖式簡單說明 141 電路線 15 第二電路層 16 電子元件 第15頁Page 14 1237533 _ Case No. 93101286_ Year Month Day _ Amendment Brief illustration 141 Circuit line 15 Second circuit layer 16 Electronic component Page 15

IIIIII

Claims (1)

1237533 _案號 93101286_年月日_^_ 六、申請專利範圍 1、 一種電路板,包含: 一基板; 一絕緣層,係設置於該基板上,且該絕緣層中係至少設有 一突起物設置區; 至少一突起物,係至少部分設置於該絕緣層之突起物設置 區中; 一第一電路層,係設置於該絕緣層上,該第一電路層之至 少一電路線係延設於該突起物之上;以及 一電子元件,係電性連接於設於該突起物上之該第一電路 層之該電路線。 2、 如申請專利範圍第1項所述之電路板,其中,該基板係 包含一第二電路層,該第二電路層係設置於該基板之一表 面上,該絕緣層係覆蓋該第二電路層。 3、 如申請專利範圍第2項所述之電路板,其中,該絕緣層 中係更至少設有一電連孔,該第一電路層係經由該電連孔 而與該第二電路層電性連結。 4、 如申請專利範圍第1項所述之電路板,其中,該電子元 件係為一晶片,該晶片係以覆晶接合方式接合於該第一電 路層。 5、 如申請專利範圍第1項所述之電路板,其中,該基板係1237533 _ Case No. 93101286_ Year Month Date _ ^ _ VI. Scope of Patent Application 1. A circuit board includes: a substrate; an insulating layer is provided on the substrate, and at least one protrusion is provided in the insulating layer Installation area; at least one protrusion is at least partially provided in the protrusion installation area of the insulating layer; a first circuit layer is provided on the insulation layer, and at least one circuit line of the first circuit layer is extended On the protrusion; and an electronic component, which is electrically connected to the circuit line of the first circuit layer provided on the protrusion. 2. The circuit board according to item 1 of the scope of patent application, wherein the substrate includes a second circuit layer, the second circuit layer is disposed on one surface of the substrate, and the insulating layer covers the second Circuit layer. 3. The circuit board according to item 2 of the scope of patent application, wherein the insulation layer is further provided with at least one electrical connection hole, and the first circuit layer is electrically connected to the second circuit layer through the electrical connection hole. link. 4. The circuit board according to item 1 of the scope of patent application, wherein the electronic component is a wafer, and the wafer is bonded to the first circuit layer in a flip-chip bonding manner. 5. The circuit board according to item 1 of the scope of patent application, wherein the substrate is 第16頁 1237533 _案號 93101286_年月日__ 六、申請專利範圍 玻璃基板。 6、 如申請專利範圍第1項所述之電路板,其中,該絕緣層 係包含有機材料或無機材料。 7、 如申請專利範圍第1項所述之電路板,其中,該絕緣層 係石夕氧化合物、或氮石夕化合物、或氮氧化石夕。Page 16 1237533 _ Case No. 93101286 _ Month and Day __ VI. Scope of patent application Glass substrate. 6. The circuit board according to item 1 of the scope of patent application, wherein the insulating layer comprises an organic material or an inorganic material. 7. The circuit board according to item 1 of the scope of the patent application, wherein the insulating layer is a stone oxide compound, or a nitrogen oxide compound, or a nitrogen oxide oxide. 8、 如申請專利範圍第1項所述之電路板,其中,該突起物 係包含高分子聚合物、或樹脂材料。 9、 如申請專利範圍第1項所述之電路板,其中,該突起物 係具有彈性。 1 0、如申請專利範圍第1項所述之電路板,其中,該絕緣 層之突起物設置區係為一開孔。8. The circuit board according to item 1 of the scope of the patent application, wherein the protrusions include a polymer or a resin material. 9. The circuit board according to item 1 of the scope of patent application, wherein the protrusion is elastic. 10. The circuit board according to item 1 of the scope of application for a patent, wherein the protrusion setting area of the insulating layer is an opening. 1 1、如申請專利範圍第1項所述之電路板,其中,該絕緣 層之突起物設置區係為一凹槽。 12、一種電路板製造方法,包含: 於一基板上形成一絕緣層; 於該絕緣層中形成至少一突起物設置區; 於該絕緣層之突起物設置區之處形成至少一突起物;1 1. The circuit board according to item 1 of the scope of patent application, wherein the protrusion setting area of the insulating layer is a groove. 12. A method for manufacturing a circuit board, comprising: forming an insulating layer on a substrate; forming at least one protrusion setting area in the insulating layer; forming at least one protrusion at the protrusion setting area of the insulating layer; 第17頁 1237533 _案號 93101286_年月日_^_ 六、申請專利範圍 於該絕緣層上形成一第一電路層,並使該第一電路層之至 少一電路線延設於該突起物之上;以及 將一電子元件電性連接於該突起物上之該第一電路層之該 電路線。 1 3、如申請專利範圍第1 2項所述之電路板製造方法,其更 包含:於該基板之一表面上形成一第二電路層,該絕緣層 係覆蓋該第二電路層。 1 4、如申請專利範圍第1 3項所述之電路板製造方法,其 中,於該基板上形成該絕緣層後,於該絕緣層中更形成至 少一電連孔,該第一電路層係經由該電連孔而與該第二電 路層電性連結。 1 5、如申請專利範圍第1 3項所述之電路板製造方法,其 中,該電連孔係利用雷射加工(1 a s e r z a p )方式、或微影 I虫刻方式形成。 1 6、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該突起物設置區係利用雷射加工方式、或微影蝕刻方 式形成。 1 7、如申請專利範圍第1 4項所述之電路板製造方法,其 中,該電連孔係於形成該突起物設置區時同時形成。Page 17 1237533 _Case No. 93101286_ Year Month Date _ ^ _ VI. Scope of patent application: A first circuit layer is formed on the insulating layer, and at least one circuit line of the first circuit layer is extended to the protrusion. Above; and the circuit line electrically connecting an electronic component to the first circuit layer on the protrusion. 1 3. The method for manufacturing a circuit board according to item 12 of the scope of patent application, further comprising: forming a second circuit layer on one surface of the substrate, and the insulating layer covering the second circuit layer. 14. The method for manufacturing a circuit board according to item 13 of the scope of patent application, wherein after the insulating layer is formed on the substrate, at least one electrical connection hole is further formed in the insulating layer. And is electrically connected to the second circuit layer through the electrical connection hole. 15. The method for manufacturing a circuit board according to item 13 of the scope of the patent application, wherein the electrical connection hole is formed by a laser processing (1 a s e r z a p) method or a lithography I insect engraving method. 16. The method for manufacturing a circuit board according to item 12 of the scope of the patent application, wherein the protrusion setting area is formed by a laser processing method or a lithographic etching method. 17. The method for manufacturing a circuit board according to item 14 of the scope of application for a patent, wherein the electrical connection holes are formed at the same time when the protrusion setting area is formed. 第18頁 1237533 _案號 93101286_年月日__ 六、申請專利範圍 1 8、如申請專利範圍第1 2項所述之電路板製造方法,其中 該電子元件係為一晶片,該晶片係以覆晶接合方式接合於 該第一電路層。 1 9、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該第一電路層係利用喷墨方式將一含有金屬微粒之塗 液喷置於該絕緣層或突起物上所形成。Page 18 1237533 _ Case No. 93101286 _ Month and Day __ VI. Patent application scope 1 8. The circuit board manufacturing method described in item 12 of the patent application scope, wherein the electronic component is a wafer and the wafer is Bonded to the first circuit layer by a flip-chip bonding method. 19. The method for manufacturing a circuit board according to item 12 of the scope of the patent application, wherein the first circuit layer is a spray solution containing metal particles sprayed on the insulating layer or protrusions by an inkjet method. form. 2 〇、如申請專利範圍第1 9項所述之電路板製造方法,其 中,該金屬微粒為銀微粒、或金微粒、或銅微粒、或鈀微 粒。 2 1、如申請專利範圍第1 3項所述之電路板製造方法,其 中,該第二電路層係利用噴墨方式將一含有金屬微粒之塗 液喷置於該基板上所形成。20. The method for manufacturing a circuit board according to item 19 of the scope of patent application, wherein the metal particles are silver particles, or gold particles, or copper particles, or palladium particles. 2 1. The method for manufacturing a circuit board according to item 13 of the scope of patent application, wherein the second circuit layer is formed by spraying a coating liquid containing metal particles on the substrate by an inkjet method. 2 2、如申請專利範圍第2 1項所述之電路板製造方法,其 中,該金屬微粒為銀微粒、或金微粒、或銅微粒、或鈀微 粒。 2 3、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該基板係玻璃基板。2 2. The method for manufacturing a circuit board according to item 21 of the scope of the patent application, wherein the metal particles are silver particles, or gold particles, or copper particles, or palladium particles. 2 3. The method for manufacturing a circuit board according to item 12 of the scope of patent application, wherein the substrate is a glass substrate. 第19頁 1237533 _案號 93101286_年月日_^_ 六、申請專利範圍 2 4、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該絕緣層係包含有機材料或無機材料。 2 5、如申請專利範圍第1 2項所述之電路板製造方法,其 中’該絕緣層係^夕氧化合物、或氮石夕化合物、或氮氧化 石夕。 2 6、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該突起物係包含高分子聚合物、或樹脂材料。Page 19 1237533 _ Case No. 93101286 _ year month date __ VI. Patent application scope 2 4. The method for manufacturing a circuit board as described in item 12 of the patent application scope, wherein the insulating layer comprises an organic material or an inorganic material material. 25. The method for manufacturing a circuit board according to item 12 of the scope of the patent application, wherein the insulation layer is an oxygen compound, or a nitrogen oxide compound, or an oxynitride. 26. The method for manufacturing a circuit board according to item 12 of the scope of patent application, wherein the protrusions include a polymer or a resin material. 2 7、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該突起物係具有彈性。 2 8、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該絕緣層之突起物設置區係為一開孔。 2 9、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該絕緣層之突起物設置區係為一凹槽。27. The method for manufacturing a circuit board according to item 12 of the scope of patent application, wherein the protrusion is elastic. 28. The method for manufacturing a circuit board according to item 12 of the scope of the patent application, wherein the protruding area of the insulating layer is an opening. 29. The method for manufacturing a circuit board according to item 12 of the scope of the patent application, wherein the protrusion setting area of the insulating layer is a groove. 3 〇、如申請專利範圍第1 2項所述之電路板製造方法,其 中,該突起物係利用喷墨方式形成。30. The method for manufacturing a circuit board according to item 12 of the scope of patent application, wherein the protrusion is formed by an inkjet method. 第20頁Page 20
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Publication number Priority date Publication date Assignee Title
US8513532B2 (en) 2007-04-18 2013-08-20 Industrial Technology Research Institute Flexible circuit structure with stretchability and method of manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8513532B2 (en) 2007-04-18 2013-08-20 Industrial Technology Research Institute Flexible circuit structure with stretchability and method of manufacturing the same

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