1236797 玖、發明說明： 【發明所屬之技術領域】 本發明提供一種集總元件低通濾波器，尤指一種形成在多層基板上之 集總元件低通濾波器。 【先前技術】 在設計各種不同應用的電路時，低通濾波器是非常廣泛被使用的一種 兀件’常被用來過濾掉訊號的高頻諧波或是一些高頻雜訊。低通濾波器通 ¥以其在通V (passband)的插入損耗（inser^i〇n i〇ss)以及在止帶 (st_an(i)的抑制能力（rejeetiQn)絲示其效能。濾波器在止帶的抑 制能力取決於其魏（OTder)，階數愈高的舰^在止帶的抑制能力有著 忍f的表見然而，愈咼階的漉波器也需要愈多的組成元件，這會導致階 數愈网的;慮波⑤所佔據的電路面積也愈大，並且人損耗也較高。請參 1圖 圖為一習知之三階低通濾波器之典型電路示意圖。P11與pi2 為圖巾之;慮波器之二埠，Ln與U2為二電感，以及⑶為一電容。在 目γ手持無線U的射頻電路設計上，由於對於電路面積大小要求报嚴， θ ίτ之―卩自濾波器因其在濾波效能以及電路面積上取得平衡，故最 常被採用。 Θ斤不之二p域波ϋ在止帶的抑制能力不符合系統設計規格的 1236797 要求日寸’橢圓式（elliptic_type)低通濾波器也常被採用。請參閱圖二。 圖二為一習知之三階橢圓式低通濾波器之典型電路示意圖。P21與P22為圖 二中之濾、波器之二痒，L21與L22為二電感，以及C23為—電容；與圖一 所示之遽波器相較，圖二中之三階橢圓式低通濾波器另包括了二電容⑶ 及C22 ’其分別與電感L21及L22相並連。電容a和C22分別與電感⑵ 和L22相並連所形成的平行電感電容電路（卿叫lc ^助⑴會在止 π内形成-插人損耗響應的凹口（nGtch);而與圖—喊波器她，圖二 的濾波器會具備較好的止帶抑制能力。 請參閱圖三。圖三為_習知之三階低通渡波器以及―習知之三階_ 式低通濾波器之頻特應圖。在圖三中，橫軸代表操作頻率，而縱轴代表 以dB為單位的頻率響應之振幅。咖為圖一所示之習知之三階低通據波 斋之穿透魏（tran—eoeffident)，S212則為®二所示之習知之三階 摊圓式低通紐器之穿透係數。如圖三所示’在三階橢圓式低通渡波器之 止帶中’猶頻率為fe2處，穿透係數S212有_凹口，這表示習知之三階 贿圓式低通濾、波器在止帶的抑制能力要比習知之三階低通遽波器來得好。 同時’由圖二亦可看出穿透係數S212的曲線在變遷帶a—)陡 降的程度較穿透絲sm _線來得顧’喊在低通濾波㈣效能評估 中為一優點。 設計電路時通常希望能剌在止帶有著健的_能力以及在變遷帶 的頻率響應變化較劇之低通濾波器，然而在現今射頻電路設計中，又希望 1236797 此避免如過夕的電路（件數目以及過大的電路面積。因此，在設計較先進 之射巧电路日才’如何設計一既在止帶有足夠之抑制能力而又不需包括太多 弘路元件之低通濾、波器，實乃—件重要而富挑戰性的學問。 【發明内容】 因此本發明之主要目的在於提供—種形成在多層基板上之集總元件低 通渡波ii，兩電❹〗的貞互献_麵元件低通濾波器能在止帶提 供更好之抑制能力，·以改善上述問題。 根據本發明之申請專利範圍，係揭露一種形成在多層基板 (multi-layeredsubstrate)上之集總元件低通渡波器（iumped ei_t w pass filter)。挪成在多層基板上之集總元件低通濾波器包括一第 -電感；-第二電感，以其—端電串連於該第—電感’其中該第—電感與 該第二電狀·係細卿，以及該第—f感與該第二輯之螺旋旋轉 方向相反，因而使得該第—電感與該第二電感間之域為負紅相等於一 第—預定值―第-電容，電並連於該第一電感；一第二電容，電並連於 該第二電感；以及—第三電容’其第—端電連接於地電位以及該第三電容 之第二端電連接於該第二電感用以連接該第一電感之一端。 【實施方式】 1236797 簡而言之，本發明揭露了 -改良式集總元件三P嫌圓式低通濾波器。 凊參閱圖四。圖四為-標示出電感間之互感之三階橢圓式低通濾'波器之示 意圖。圖四中展示了低通濾波器所包含之二埠p4l與p42，二電感L41與 L42 ’二電容C4卜C42與C43，以及二電感L41與L42間的互感（mutual mduCtance) LM4。如眾所知，互感的存在係為_自然物理現像而亦出· 白知之集總70件橢圓式低通濾波器中。互感會影響整個電路的頻率響應， 因此在習知技術巾，總是盡量地避免域的產生。然而，本發明卻主動地 利用-負互絲增進錢元件橢圓式低通濾波⑽解響應。圖五為本發 月之术總讀二橢圓式低通濾波||以及—如圖二所示之傳統三階橢圓式 低通濾波器之鮮響應圖。在圖五中，橫轴代錄作解，而縱軸代表以 dB為早位的鮮響應之振幅。S212為如圖二卿讀統三階_式低通遽 波器之穿透雜，S214職如圖四所示之本發明之三階橢圓式低通濾波器 之穿透係ti：其巾本發明之二p嫌圓式低通濾波器保留並利用了二電感間 之互感’且主動其值為—預定負值。如圖五所示，本發明之低通滤波 器之頻率響應在止帶上有二凹口，本發明之低通濾波制而在止帶有著較 佳之抑制能力；其中凹u發生的位置可依系統規格之需要，經由改變負互 感之值來加以調整。 互感與兩電感的相對距離以及電感的形狀相關。因此，本發明非常適 合以一立體的結構來實現，例如像實現在—多層基板㈤ti-Iayered substrate)上。根據如圖四所示之電路模型，本發明可提供一電路面積極 小而又在止帶上具有優良抑繼力之錢元件低通·ϋ。請參閲圖六。 1236797 圖六為本發明之形成在多層基板上之集總元件低通濾波器之第一實施例之 示思圖。G61為一底層地電位平板。L61與L62為二電感，C61、C62與C63 為一電谷，以及Via61、Via62與Via63為三穿透基板而連接不同層之金屬 連通柱（metal via)。電感L61與電感L62為分別形成在基板之第四層與 第二層上之方形螺旋金屬帶，而電感L61與電感L62之螺旋旋轉方向相反， 因而使得電感L61與電感L62間之互感LM6為負值。電感L61與電感L62 的形狀可被妥當調整，以及/或第三層與第四層間的距離可經適當選擇，以 使得互感LM6之值被調整至一經設計的負值。電感L62透過金屬連通柱 Via61與電感L61相串連。電容C61包含分別形成於該多層基板之第五層上 以及第六層上之二金屬平板，其中該形成於該第五層上之平板透過金屬連 通柱Via62電連接於電感L61之一端，以及該形成於該第六層上之平板透 過金屬連通柱Via61電連接於電感L61之另一端。如此，則電容C61透過 金屬連通柱Via61與Via62電並連於電感L61。電容C62包含分別形成於該 多層基板之第一層上以及第二層上之二金屬平板，其中該形成於該第二層 上之平板透過金屬連通柱Via63電連接於電感L62之一端，以及該形成於 該第一層上之平板透過金屬連通柱Via61電連接於電感L62之另一端。如 此’則電容C62透過金屬連通柱Via61與Via63電並連於電感L62。電容 C63則形成於該多層基板之第一層與底層地電位平板gm之間。圖六中的電 路係相等於圖四中所示之電路，其中電感L61、電感L62、互感LM6、電容 C61、電容C62以及電容C63分別相對應於圖四中之電感L41、電感L42、 互感LM4、電容C41、電容C42以及電容C43，並且圖六所描述之本發明之 濾波器電路之頻率響應可達如圖五中之曲線S214。互感LM6之值係根據一 10 1236797 演算法而決定以使得本發明之低通濾波器之頻率響應在止帶上的抑制能力 能符合一預設之規格。此外，因本發明之濾波器電路可實現在一立體結構 上’故本發明之電路面積能縮減到很小。圖七為圖六所示之電路之側視圖。 圖八為本發明之形成在多層基板上之集總元件低濾波器之第二實施例 之不意圖。G81為一底層地電位平板，G82則為一頂層地電位平板。L81與 L82為二電感，⑽、C82與C83為三電容，以及Via8卜Via82與Via83為 二穿透基板而連接不同層之金屬連通柱。電感L81與電感L82為分別形成 在基板之第四層與第三層上之圓形螺旋金屬帶，而電感L81與電感L82之 螺旋旋轉方向相反，因而使得電感L81與電感L82間之互感LM8為負值。 笔感L81 電感L82的形狀可被妥當調整，以及/或第三層與第四層間的距 離可經適當選擇，以使得互感LM8的值被調整至一經設計的負值。電感L82 透過金屬連通柱Via81與電感L81相串連。電容C81包含分別形成於該多 層基板之第五層上以及第六層上之二金屬平板，其中該形成於該第五層上 之平板透過金屬連通柱Via82電連接於電感L81之一端，以及該形成於該 第六層上之平板透過金屬連通柱Via81電連接於電感L81之另一端。如此， 則電容C81透過金屬連通柱Via81與Via82電並連於電感L81。電容C82包 含分別形成於該多層基板之第一層上以及第二層上之二金屬平板，其中該 形成於該第二層上之平板透過金屬連通柱Via83電連接於電感L82之一 端，以及該形成於該第一層上之平板透過金屬連通柱Via81電連接於電感 L82之另一端。如此，則電容⑶？透過金屬連通柱Via81與^泌3電並連於 電感L82。電容C83由二電容C831與C832組成，其中二電容¢831與C832 11 1236797 係互相亚連’使得電容C83所佔之面積可縮小。電容⑽形成於該多層美 板之第-層與底層地電位平板G81之間，其中該第一層之金屬平板連^ 金屬連通㈣a81。電糊_她_餘ϋ麵層地電位 平板G82之間’其中該第六層之金屬平板亦連接於金屬連通柱咖。圖八-令的電路係相等於圖四中所示之電路，其中電感⑶、電感Μ、互感⑽、· 电谷C81電合C82以及電容C83分別相對應於圖四中之電感L41、電感⑽、 互感LM4、電容C4卜電容C42以及電容⑽，並且圖八所描述之本發明之 濾波器電路之頻率響應可達如圖五中之曲線似“。 鲁 明參閱圖九。圖九為本發明之形成在多層基板上之集總元件低渡波器 之第三實施例之示意圖。观為—底層地電位平板。⑼與L92為二電感， C9卜C92與C93為三電容，以及㈣、v識與⑽為三穿透基板而連 接不同層之金屬連通柱。電感L91與電感⑽為分別形成在基板之第四層 與第三層上之矩形職金屬帶，而電感L91與電感⑽之螺旋旋轉方向不 同’因而使得電感L91與電感L92間之互感⑽為負值。電感⑽透過金# 職通柱V遠與電感L91相串連。電容⑽包含分別形成於該多層基板 之第五層上以及第’、層上之二金屬平板，其巾該形成於該第六層上之平板 透過金屬連通柱Via92電連接於電感L91之—端，以及該形成於該第五層 上之平板透過金屬連通柱Via91電連接於輯L91之另—端。如此，則電 、 容C91透過金屬連通feVia91與Via92電並連於電感Lgi。電容⑽包含分 別形成於該多層基板之第—層上以及第二層上之二金屬平板，其中該形成 於該第二層上之平_過金屬連通柱Via93電連接於電感哪之一端，以 12 1236797 及該形成於該第-層上之平板透過金屬連通柱Via91電連接於電感脱之 另一端。如此，則電容C92透過金屬連_ Via91與化⑽電並連於電感 L92。電容C93則形成於該多層基板之第一層與底層地電位平板啦之間。 如同前述之另兩個實施例，圖九中的電路相等於圖四中所示之電路，其中 電感L9卜電感L92、互感LM9、電容C9卜電容C92以及電容C93分別相 對應於圖四中之電感L4卜電感L42、互感副、電容⑷、電容⑽以及 電容C43，並且圖九所描述之本發明之濾波器電路之頻率響應可達如圖五中 之曲線S214。與圖六所示之電路結構相比，圖九所示之實施例可避免第五 層上之金屬平板與第六層上之其他電路元件間形成寄生柄合（卿沿化 coupling)，進而避免低通濾波器的頻率偏移。 請參閱圖十。圖十為本發明之形成在多層基板上之㈣元件低遽波器 之第四實施例之示意圖。G101為-底層地電位平板。u〇1與L1〇2為二電 感，_、C102與C103為三電容，以及Vial(n、Vial〇2與Vial〇3為三穿 透基板而連接不同層之金屬連通柱。電感Lm與電感應同為形成在基 板之第三層上之八角形螺旋金屬帶，其中電感副2與電感L而㈣連， 而金屬連通柱VialOl通過此二電感相連接處。電感L1〇1與電感之 螺旋旋轉方向不同，因而使得電感L而與電感魔間之互感_為負值。 電谷C101包含分別形成於該多層基板之第四層上以及第五層上之二金屬平 板，其中該形成於該第四層上之平板透過金屬連通柱Vial02電連接於電感 L101之-^ ’以及该形成於該第五層上之平板連接於金屬連通柱。 如此，則電容cioi透過金屬連通柱Vial01與Vial02電並連於電感u〇1。 13 1236797 电合ClG2 ^ 3刀獅成於該多層基板之第—層上以及第二層上之二金屬平 板其中騎成於该第二層上之平板透過金屬連通柱vi测電連接於電感 L102之H及該形成於縣_層上之平板透過金屬連通柱w漏電連 接於電感L102之另一端。如此，則電容⑽透過金屬連通柱仏皿與-Vial03电並連於電感L1〇2。電容α〇3則形成於該多層基板之第一層與底-層地電位平板G101之間。如同前述之三個本發明之實施例，圖十中的電路 亦相等於圖四中所示之電路，其中電感_、電感厦、互感_、電容 C1(U、電谷C102以及電容C103分別相對應於圖四中之電感U1、電m _ 互感LM4、電容C4卜電容C42以及電容C43 :而圖十所描述之本發明之濾 波器電路之解響應亦可達如圖五中之曲線S214。圖十所示之實施例與前 述三個實施例最大之不同在於電感L1〇1和電感u〇2係形成於多層基板之 同一層上’因此電感L1〇1和電感u〇2間之互感麗之值，可經由調整電 感L101和電感L102之螺旋金屬帶寬與間距，以使得_ L刚的值被調整 至-經安當設計的負值。與其他實施例相比，圖十所示之本發明之低通滤、 波器電路所需使用之多層基板之層數較少。 馨 本發明之低通濾波器主動設計並利用兩電感間之負互感以增進低通濾 波器在止帶之抑制能力。本發明之集總元件低通濾波器以實施於一多層陶 瓷基板上為隶佳，例如一低溫共燒陶瓷（l〇w temperature c〇—丨ceramic， ' LTCC)基板，因立體結構可縮減電路所佔據之面積。對以上所舉之各實施 - 例中的電路來說，其所採用之電感之形狀可為矩形螺旋，圓形螺旋或八角 形螺旋。這些電感可形成於立體結構之不只一層之上，以得較大之電感值 14 1236797 或為方便控制存在其間之負互感之值。同樣地，電路戶斤包含的各電容也可 利用立體結構之任意數層來形成，以在較小的面積上獲得較大的電容值。 本發明之集總兀件低通濾波器經實驗證明，在止帶上具有較傳統擴圓式低 通濾波器更為優異之抑制能力，且本發明之集總元件低通濾波器不需外加 額外之電路元件或提高濾波器之階數即可改善止帶之抑制能力。此外，相 . 較於同樣階數之傳統橢圓式低通濾波器，本發明之集總元件低通濾波器在 通帶邊緣亦具有較佳之滾落率（r〇ll-off rate)。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之 均等變化與修飾，皆應屬於本發明專利之涵蓋範圍。 【圖式簡單說明】 圖式之簡單說明 圖一為習知之三階低通濾波器之示意圖。 圖二為習知之三階橢圓式低通濾波器之示意圖。 圖三為習知之三階低通濾波器以及習知之三階橢圓式低通濾波器之頻率響 應圖。 圖四為標示出電制之互感之三階橢圓式低通濾波器之示意圖。 圖五為本發明之集總元件三階橢圓式低通濾波器以及傳統三階橢圓式低通 濾波器之頻率響應圖。 15 1236797 圖六為本發明之集總元件低通滤波器之第一實施例之示意圖。 圖七為圖六之電路之側視圖。 圖八為本發明之集總元件低通濾波器之第二實施例之示意圖。 圖九為本發明之集總元件低通濾波器之第三實施例之示意圖。 圖十為本發明之集總元件低通濾波器之第四實施例之示意圖。 圖式之符號說明 P11，P12, P21，P22, P41, P42, P61，P62, P81，P82, P91, P92, P101, ρι〇2 .埠 Lll, L12, L21, L22, L41, L42, L61, L62, L81, L82, L91, L92, L101, L102 電感 LM4, LM6, LM8, LM9, LM10 互感 C13, C21, C22, C23, C41, C42, C43, C61, C62, C63, C81，C82, C83，C831，C832，C91, C92, C93, C101, C102, C103 電容 G61, G81, G82, G91, G101 地電位平板 Via61, Via62, Via63, Via81, Via82, Via83, Via91, Via92, Via93, VialOl, Vial02, Vial03 金屬連通柱 161236797 发明 Description of the invention: [Technical field to which the invention belongs] The present invention provides a lumped element low-pass filter, particularly a lumped element low-pass filter formed on a multilayer substrate. [Previous technology] When designing circuits for various applications, a low-pass filter is a very widely used element. It is often used to filter out high-frequency harmonics or some high-frequency noise. The low-pass filter is shown by its insertion loss (inser ^ i〇ni〇ss) at the pass band (passband) and its suppression capability (rejeetiQn) at the stop band (st_an (i)). The filter is stopped The suppression ability of the band depends on its OTder. The higher the order of the ship, the better the tolerance of the stop band is. However, the higher the order of the wave filter, the more components it needs. The order is more net; the circuit area occupied by the wave ⑤ is also larger, and the human loss is also higher. Please refer to Figure 1 for a typical circuit diagram of a known third-order low-pass filter. P11 and pi2 are diagrams The two ports of the wave filter, Ln and U2 are two inductors, and ⑶ is a capacitor. In the design of the RF circuit of the handheld wireless U, because of the strict requirements for the circuit area, θ τ The filter is most commonly used because it achieves a balance in filtering performance and circuit area. Θ 不 不二 p-domain wave ϋ The suppression ability in the stop band does not meet the system design specifications 1236797 Requires an elliptic_type (elliptic_type ) Low-pass filters are also often used. See Figure 2. Figure 2 is A typical circuit diagram of a known third-order elliptical low-pass filter. P21 and P22 are the two filters and wave filters in Figure 2, L21 and L22 are the two inductors, and C23 is the capacitor; as shown in Figure 1. Compared with the chirped wave filter, the third-order elliptical low-pass filter in Figure 2 also includes two capacitors ⑶ and C22 ', which are connected in parallel with the inductors L21 and L22, respectively. The capacitors a and C22 are in phase with the inductors ⑵ and L22, respectively The parallel inductor-capacitor circuit formed by the parallel connection (called lc ^ ⑴ will form a notch (nGtch) in the loss response within π; and with the figure-megahertz, her filter of Figure 2 will have Better stopband suppression capability. Please refer to Figure 3. Figure 3 is the frequency response diagram of the _knowledge third-order low-pass wave filter and the _knowledge third-order_ low-pass filter. In Figure 3, the horizontal axis Represents the operating frequency, and the vertical axis represents the amplitude of the frequency response in dB. The coffee is the conventional third-order low-pass tran-eoeffident as shown in Figure 1, and the S212 is ® Ersuo The penetration coefficient of the third-order round-shaped low-pass button shown in the conventional example is shown in Figure 3. 'The third-order elliptical low-pass crossing wave In the stopband of the device, the frequency is still at fe2, and the penetration coefficient S212 has a _ notch, which indicates that the third-order bridging circular low-pass filter and the wave stopper of the conventional third-order low-pass filter are better than the third-order low-pass filter. The wave filter is good. At the same time, it can also be seen from Figure 2 that the curve of the penetration coefficient S212 decreases sharply in the transition zone a), which is better than the penetration of the wire sm _ line. It is an advantage. When designing a circuit, it is usually desirable to have a low-pass filter with a strong _ ability and a low-pass filter with a sharp change in frequency response in the transition zone. However, in today's RF circuit design, 1236797 is also to be avoided. Xi's circuit (number of pieces and excessive circuit area. Therefore, when designing more advanced radio circuits, how to design a low-pass filter and a wave filter that not only have sufficient suppression capability but do not need to include too many Honglu components is really important and rich. Challenging learning. [Summary of the Invention] Therefore, the main purpose of the present invention is to provide a lumped element low-pass crossing wave ii formed on a multilayer substrate. Suppressing ability to improve the above problems. According to the patent application scope of the present invention, a lumped ei_t w pass filter formed on a multi-layered substrate is disclosed. The lumped element low-pass filter formed on the multilayer substrate includes a first inductor; a second inductor, which is electrically connected in series with the first inductor, wherein the first inductor and the second inductor Department of Qingqing, and the sense of f-f is opposite to the spiral rotation direction of the second series, so that the domain between the first and the second inductance is negative red equal to a first-predetermined value-the first capacitance, A second capacitor electrically connected in parallel to the second inductor; and a third capacitor whose first terminal is electrically connected to the ground potential and a second terminal of the third capacitor is electrically connected to The second inductor is used to connect one end of the first inductor. [Embodiment] 1236797 In short, the present invention discloses-an improved lumped element triple P quasi-round low-pass filter.凊 See Figure 4. Figure 4 is a schematic diagram of a third-order elliptical low-pass filter with a mutual inductance between the inductors. Figure 4 shows the two ports p4l and p42, the two inductors L41 and L42, the two capacitors C4, C42 and C43, and the mutual mduCtance LM4 between the two inductors L41 and L42. As we all know, the existence of mutual inductance is _ natural physics appearance, also appears · Bai Zhi's collection of 70 elliptical low-pass filters. Mutual inductance will affect the frequency response of the entire circuit, so in the conventional technology, always avoid the generation of domains as much as possible. However, the present invention actively uses the -negative mutual filament to improve the ellipse low-pass filtering response of the money element. Figure 5 is the fresh response diagram of the elliptical low-pass filter of the second reading of the art of the month and the traditional third-order elliptic low-pass filter shown in Figure 2. In Figure 5, the horizontal axis represents the solution, and the vertical axis represents the amplitude of the fresh response with dB as the early bit. S212 is the penetrating noise of the third-order _-type low-pass chirped wave filter shown in Figure II, and S214 is shown in Figure 4. The penetrating system of the third-order elliptic low-pass filter of the present invention is shown in Figure 4. The second invention p-round low-pass filter retains and uses the mutual inductance between the two inductors', and actively takes its value to be a predetermined negative value. As shown in Figure 5, the frequency response of the low-pass filter of the present invention has two notches in the stop band. The low-pass filtering system of the present invention has better suppression ability in the stop band; the position where the u occurs can be determined according to The needs of system specifications are adjusted by changing the value of negative mutual inductance. Mutual inductance is related to the relative distance between the two inductors and the shape of the inductor. Therefore, the present invention is very suitable for being implemented in a three-dimensional structure, such as being implemented on a multi-layer substrate (ti-Iayered substrate). According to the circuit model shown in Fig. 4, the present invention can provide a low-pass element with a small circuit area and excellent stopping power on the stop band. See Figure 6. 1236797 FIG. 6 is a schematic view of a first embodiment of a lumped element low-pass filter formed on a multilayer substrate according to the present invention. G61 is a bottom ground potential plate. L61 and L62 are two inductors, C61, C62 and C63 are an electric valley, and Via61, Via62 and Via63 are three penetrating substrates that connect metal vias of different layers. Inductor L61 and inductor L62 are square spiral metal strips formed on the fourth and second layers of the substrate, respectively. The spiral rotation directions of inductor L61 and inductor L62 are opposite, so that the mutual inductance LM6 between inductor L61 and inductor L62 is negative. value. The shapes of the inductor L61 and the inductor L62 can be properly adjusted, and / or the distance between the third layer and the fourth layer can be appropriately selected, so that the value of the mutual inductance LM6 is adjusted to a designed negative value. The inductor L62 is connected in series with the inductor L61 through a metal communication post Via61. The capacitor C61 includes two metal flat plates respectively formed on the fifth layer and the sixth layer of the multilayer substrate, wherein the flat plate formed on the fifth layer is electrically connected to one end of the inductor L61 through a metal communication post Via62, and the The flat plate formed on the sixth layer is electrically connected to the other end of the inductor L61 through a metal communication post Via61. In this way, the capacitor C61 is electrically connected to the inductor L61 through the metal communication posts Via61 and Via62. The capacitor C62 includes two metal flat plates respectively formed on the first layer and the second layer of the multilayer substrate, wherein the flat plate formed on the second layer is electrically connected to one end of the inductor L62 through a metal communication post Via63, and the The flat plate formed on the first layer is electrically connected to the other end of the inductor L62 through the metal communication post Via61. In this case, the capacitor C62 is electrically connected to the inductor L62 through the vias Via61 and Via63. The capacitor C63 is formed between the first layer of the multilayer substrate and the ground plane gm of the bottom layer. The circuit in Figure 6 is equivalent to the circuit shown in Figure 4, where inductor L61, inductor L62, mutual inductor LM6, capacitor C61, capacitor C62, and capacitor C63 correspond to inductor L41, inductor L42, and mutual inductor LM4 in Figure 4, respectively. , The capacitor C41, the capacitor C42, and the capacitor C43, and the frequency response of the filter circuit of the present invention described in FIG. 6 can reach the curve S214 in FIG. The value of the mutual inductance LM6 is determined according to a 10 1236797 algorithm so that the suppression capability of the frequency response of the low-pass filter of the present invention on the stop band can meet a preset specification. In addition, since the filter circuit of the present invention can be realized on a three-dimensional structure, the circuit area of the present invention can be reduced to a small size. FIG. 7 is a side view of the circuit shown in FIG. 6. FIG. 8 is a schematic diagram of a second embodiment of the lumped element low filter formed on a multilayer substrate according to the present invention. G81 is a bottom ground potential plate, and G82 is a top ground potential plate. L81 and L82 are two inductors, ⑽, C82 and C83 are three capacitors, and Via8 and Via82 and Via83 are two penetrating substrates that connect metal communication pillars of different layers. Inductor L81 and inductor L82 are circular spiral metal strips formed on the fourth and third layers of the substrate, respectively. The spiral rotation directions of inductor L81 and inductor L82 are opposite, so that the mutual inductance LM8 between inductor L81 and inductor L82 is Negative value. The shape of the brush L81 inductor L82 can be properly adjusted, and / or the distance between the third layer and the fourth layer can be appropriately selected so that the value of the mutual inductance LM8 is adjusted to a designed negative value. The inductor L82 is connected in series with the inductor L81 through a metal communication post Via81. The capacitor C81 includes two metal flat plates respectively formed on the fifth layer and the sixth layer of the multilayer substrate, wherein the flat plate formed on the fifth layer is electrically connected to one end of the inductor L81 through a metal communication post Via82, and the The flat plate formed on the sixth layer is electrically connected to the other end of the inductor L81 through a metal communication post Via81. In this way, the capacitor C81 is electrically connected to the inductor L81 through the metal communication posts Via81 and Via82. The capacitor C82 includes two metal flat plates respectively formed on the first layer and the second layer of the multilayer substrate, wherein the flat plate formed on the second layer is electrically connected to one end of the inductor L82 through a metal communication post Via83, and the The flat plate formed on the first layer is electrically connected to the other end of the inductor L82 through a metal connecting post Via81. So, the capacitor ⑶? Via81 and ^ 3 are electrically connected through a metal connecting post and connected to the inductor L82. The capacitor C83 is composed of two capacitors C831 and C832, of which the two capacitors ¢ 831 and C832 11 1236797 are sub-connected to each other 'so that the area occupied by the capacitor C83 can be reduced. The capacitor ⑽ is formed between the first layer of the multi-layered US board and the ground potential flat plate G81 of the bottom layer, wherein the metal plate of the first layer is connected to the metal connection ㈣a81. Electric paste_her_ 余 ϋsurface layer ground potential ‘Between flat plates G82’, where the sixth flat metal plate is also connected to the metal connecting pillar coffee. Figure 8-Ling's circuit is equivalent to the circuit shown in Figure 4, where inductor ⑶, inductor M, mutual inductance ⑽, electric valley C81, electric coupling C82, and capacitor C83 respectively correspond to the inductance L41 and inductance 图 in Figure 4. , Mutual inductance LM4, capacitor C4, capacitor C42, and capacitor ⑽, and the frequency response of the filter circuit of the present invention described in Fig. 8 can reach the curve shown in Fig. 5 ". Lu Ming refers to Fig. 9. Fig. 9 shows the present invention. The schematic diagram of the third embodiment of the lumped element low-wavelet device formed on a multilayer substrate. The view is-the bottom ground potential plate. ⑼ and L92 are two inductors, C9, C92 and C93 are three capacitors, and ㈣, v It is a metal penetrating column with three layers penetrating the substrate and connecting different layers. Inductor L91 and inductor ⑽ are rectangular metal strips formed on the fourth and third layers of the substrate, respectively, and the spiral rotation of inductor L91 and inductor ⑽ The direction is different, so that the mutual inductance 电感 between inductor L91 and inductor L92 is negative. The inductor ⑽ is connected in series with inductor L91 through a gold post V. The capacitor ⑽ includes a fifth layer formed on the multilayer substrate and First, the second gold The flat plate, which is formed on the sixth layer, is electrically connected to the end of the inductor L91 through the metal communication column Via92, and the flat plate formed on the fifth layer is electrically connected to the series L91 through the metal communication column Via91. The other end. In this way, the capacitor and capacitor C91 are electrically connected to the inductor Lgi through feVia91 and Via92 through the metal. The capacitor ⑽ includes two metal flat plates formed on the first layer and the second layer of the multilayer substrate, respectively. The flat_via metal connecting post Via93 formed on the second layer is electrically connected to which end of the inductor, and 12 1236797 and the plate formed on the first layer are electrically connected to the other end of the inductor through the metal connecting post Via91. In this way, the capacitor C92 is connected via the metal via Via91 to the capacitor and connected to the inductor L92. The capacitor C93 is formed between the first layer of the multilayer substrate and the ground plane of the bottom layer. As in the other two embodiments described above, The circuit in Figure 9 is equivalent to the circuit shown in Figure 4, where the inductor L9, inductor L92, mutual inductor LM9, capacitor C9, capacitor C92, and capacitor C93 correspond to the inductor L4, inductor L42, and mutual inductor in Figure 4, respectively. , Capacitor ⑷, capacitor ⑽, and capacitor C43, and the frequency response of the filter circuit of the present invention described in Fig. 9 can reach the curve S214 in Fig. 5. Compared with the circuit structure shown in Fig. 6, Fig. 9 shows The embodiment can avoid parasitic coupling between the metal flat plate on the fifth layer and other circuit elements on the sixth layer, thereby avoiding the frequency offset of the low-pass filter. Please refer to FIG. 10. Ten is a schematic diagram of the fourth embodiment of the low-frequency wave device of chirped element formed on a multi-layer substrate of the present invention. G101 is-the ground plane of the bottom layer. U〇1 and L102 are two inductors, _, C102 and C103 are Three capacitors, and Vial (n, Vial〇2, and Vial〇3 are three penetrating substrates that connect metal communication pillars of different layers. The inductor Lm and the electric induction are both octagonal spiral metal strips formed on the third layer of the substrate, wherein the inductor pair 2 is connected to the inductor L, and the metal communication post VialOl is connected through these two inductors. The spiral rotation direction of the inductor L101 is different from that of the inductor, so that the mutual inductance _ between the inductor L and the inductor is negative. Electric Valley C101 includes two metal flat plates formed on the fourth layer and the fifth layer of the multilayer substrate, respectively, wherein the flat plate formed on the fourth layer is electrically connected to the inductor L101 through a metal communication pillar Vial02-^ ' And the flat plate formed on the fifth layer is connected to the metal communication pillar. In this way, the capacitor cioi is electrically connected to the inductor u〇1 through the metal communication posts Vial01 and Vial02. 13 1236797 Electron ClG2 ^ 3 knife lions are formed on the first layer and the second metal plate of the multi-layer substrate. Among them, the plate formed on the second layer is electrically connected to the inductor L102 through a metal connecting post vi. H and the flat plate formed on the county layer are leaky connected to the other end of the inductor L102 through a metal communication post w. In this way, the capacitor 电 is electrically connected to -Vial03 through the metal communication column 仏 and connected to the inductor L102. The capacitor α03 is formed between the first layer and the bottom-layer ground potential flat plate G101 of the multilayer substrate. As in the aforementioned three embodiments of the present invention, the circuit in FIG. 10 is also equivalent to the circuit shown in FIG. 4, where the inductor_, inductor_shaft, mutual inductor_, capacitor C1 (U, valley C102, and capacitor C103 are respectively Corresponding to the inductor U1, the electric m_ mutual inductance LM4, the capacitor C4, the capacitor C42, and the capacitor C43 in FIG. 4: The solution response of the filter circuit of the present invention described in FIG. 10 can also reach the curve S214 in FIG. 5. The biggest difference between the embodiment shown in FIG. 10 and the previous three embodiments is that the inductor L101 and the inductor u02 are formed on the same layer of the multilayer substrate. Therefore, the mutual inductance between the inductor L10 and the inductor u0 The value can be adjusted by adjusting the spiral metal bandwidth and spacing of the inductor L101 and the inductor L102, so that the value of _ L just can be adjusted to a negative value designed by An-Dang. Compared with other embodiments, the original shown in FIG. 10 The low-pass filter and wave filter circuit of the invention require fewer layers of multilayer substrates. Xin The low-pass filter of the present invention actively designs and uses the negative mutual inductance between two inductors to improve the suppression of the low-pass filter in the stop band. Capability. The lumped component low-pass filter of the present invention It is better to implement it on a multilayer ceramic substrate, such as a low temperature co-fired ceramic (l0w temperature ceramic) substrate, which can reduce the area occupied by the circuit due to the three-dimensional structure. For the circuits in the examples, the shape of the inductor used can be rectangular spiral, circular spiral or octagonal spiral. These inductors can be formed on more than one layer of the three-dimensional structure to obtain a larger inductance value. 14 1236797 or to facilitate the control of the value of the negative mutual inductance. Similarly, the capacitors included in the circuit user can also be formed using any number of layers of the three-dimensional structure to obtain a larger capacitance value in a smaller area. The lumped element low-pass filter of the present invention has been proved by experiments that it has better suppression capability than the traditional rounded low-pass filter in the stopband, and the lumped element low-pass filter of the present invention does not need to be added The additional circuit components or increasing the order of the filter can improve the suppression ability of the stop band. In addition, compared with the traditional elliptical low-pass filter of the same order, the lumped component low-pass filter of the present invention It also has a better roll-off rate at the edge of the passband. The above description is only a preferred embodiment of the present invention. Any equal changes and modifications made in accordance with the scope of the patent application of the present invention should be applied. It belongs to the scope of the patent of the present invention. [Simplified description of the diagram] Brief description of the diagram Figure 1 is a schematic diagram of a conventional third-order low-pass filter. Figure 2 is a schematic diagram of a conventional third-order elliptical low-pass filter. The third is the frequency response diagram of the conventional third-order low-pass filter and the conventional third-order elliptical low-pass filter. Figure 4 is a schematic diagram of the third-order elliptic low-pass filter showing the mutual inductance of the electrical system. Frequency response diagrams of the lumped element third-order elliptic low-pass filter and the traditional third-order elliptic low-pass filter of the present invention. 15 1236797 FIG. 6 is a schematic diagram of the first embodiment of the lumped component low-pass filter of the present invention. FIG. 7 is a side view of the circuit of FIG. 6. FIG. 8 is a schematic diagram of a second embodiment of a lumped component low-pass filter according to the present invention. FIG. 9 is a schematic diagram of a third embodiment of a lumped component low-pass filter according to the present invention. FIG. 10 is a schematic diagram of a fourth embodiment of a lumped component low-pass filter according to the present invention. Symbols in the drawings P11, P12, P21, P22, P41, P42, P61, P62, P81, P82, P91, P92, P101, ρι〇2. Ports Lll, L12, L21, L22, L41, L42, L61, L62, L81, L82, L91, L92, L101, L102 Inductors LM4, LM6, LM8, LM9, LM10 Mutual inductance C13, C21, C22, C23, C41, C42, C43, C61, C62, C63, C81, C82, C83, C831, C832, C91, C92, C93, C101, C102, C103 Capacitor G61, G81, G82, G91, G101 Ground potential plate Via61, Via62, Via63, Via81, Via82, Via83, Via91, Via92, Via93, VialOl, Vial02, Vial03 Metal connecting post 16