TWI236768B - Low noise multi chip image sensor package - Google Patents

Low noise multi chip image sensor package Download PDF

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Publication number
TWI236768B
TWI236768B TW93132007A TW93132007A TWI236768B TW I236768 B TWI236768 B TW I236768B TW 93132007 A TW93132007 A TW 93132007A TW 93132007 A TW93132007 A TW 93132007A TW I236768 B TWI236768 B TW I236768B
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Taiwan
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chip
image sensing
low
image sensor
noise multi
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TW93132007A
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Chinese (zh)
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TW200614493A (en
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Yeong-Ching Chao
John Lu
Yau-Rung Li
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Chipmos Technologies Inc
Chipmos Technologies Bermuda
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Abstract

A low noise multi chip image sensor package includes a transplant substrate, an image sensor chip, a semiconductor chip and an electrically shielding layer. The image sensor chip has a sensing surface and a back surface. A plurality of bumps are formed on the periphery of the sensing surface. The bumps connect traces of the transplant substrate. The semiconductor chip has an active surface and a passive surface. A plurality of bond pads are formed on the active surface. The passive surface of the semiconductor chip disposes the back surface of the image sensor chip. The electrically shielding layer is disposed between the image sensor chip and the semiconductor chip to reduce cross-talk between the semiconductor chip and the image sensor chip.

Description

1236768 五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種多晶片影像感測器構造,特別係 有關於一種低雜訊多晶片影像感測器構造。 【先前技術】 隨著科技的發展,愈來愈多的個人化手攜式電子產 品,例如手機及個人數位助理(PDA)等,會將影像感測器 與原有之功能整合,以提昇其功能,影像感測器(丨mage sensor )係為將光學影像信號轉換成電子訊號,以供顯示 或儲存用之半導體元件,當電子產品在使用時,影像感測 器可能會受到一些不需要的額外能量的干擾,此額外能量 即疋所明的雜δίΐ ( η o i s e ) ’雜§fl的干擾,通常都會造成訊 號的失真,其來源包括來自系統外部與系統本身。 為整合多個晶片於一影像感測器構造,一種習知之影 像感測器構造,如我國專利公告第556965號「影像感測器 堆登裝置」所揭示者’請參閱第1圖,該影像感測器係包 含一透光玻璃10、一影像感測晶片2〇,一基板3〇及一積體 電路40,該透光玻璃10設有複數個訊號輸出端丨丨與訊^輸 ^端12,該影像感測晶片2〇係電連接至該透光玻璃1〇之訊 號輸入端12,該基板30係具有一第一表面31與一第二表面 3=,戎透光玻璃1〇之訊號輸出端丨丨係電連接至該基板3〇之 第一表面31,該積體電路4〇係電連接至該基板3〇之第二表 面3_2,讜影像感測器2〇與該積體電路4〇係利用該基板3〇之 j t表面32電連接至一印刷電路板50,然而該影像感測器 、該積體電路40之間係無任何可屏蔽之元件,當該積體1236768 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a multi-chip image sensor structure, and particularly relates to a low-noise multi-chip image sensor structure. [Previous technology] With the development of technology, more and more personalized hand-held electronic products, such as mobile phones and personal digital assistants (PDAs), will integrate image sensors with original functions to enhance their functions. Function, image sensor (丨 mage sensor) is a semiconductor element that converts optical image signals into electronic signals for display or storage. When electronic products are in use, the image sensor may be subject to some unwanted Interference of extra energy. This extra energy is the interference of δoδ (η oise) 'mis§fl, which usually causes signal distortion, and its sources include the outside of the system and the system itself. In order to integrate multiple chips into an image sensor structure, a conventional image sensor structure is disclosed in China Patent Publication No. 556965 “Image Sensor Stacking Device”. Please refer to FIG. 1 for the image. The sensor system includes a transparent glass 10, an image sensing chip 20, a substrate 30, and an integrated circuit 40. The transparent glass 10 is provided with a plurality of signal output terminals and a signal input terminal. 12, the image sensing chip 20 is electrically connected to the signal input terminal 12 of the transparent glass 10, and the substrate 30 has a first surface 31 and a second surface 3 =, the transparent glass 10 The signal output terminal is electrically connected to the first surface 31 of the substrate 30, and the integrated circuit 40 is electrically connected to the second surface 3_2 of the substrate 30. The image sensor 20 and the integrated circuit The circuit 40 is electrically connected to a printed circuit board 50 by using the jt surface 32 of the substrate 30. However, there is no shieldable element between the image sensor and the integrated circuit 40. When the integrated circuit 40

第7頁 1236768 五、發明說明(2) 電路4 0運作時產生之頻率,尤其是在高頻時,會影響該影 像感測器20擷取影像或將光學影像信號轉換成電子訊號之 運作。 【發明内容】 本發明之主要目的係在於提供一種低雜訊多晶片影像 感測器構造,其係利用一電性屏蔽層設於一影像感測晶片 與一半導體晶片之間,以形成屏蔽效應(shielding ef f ect iveness),降低雜訊,使得該半導體晶片運作時產 生之頻率不會影響到該影像感測晶片擷取影像或將光學影 像信號轉換成電子訊號之運作。 依本發明之低雜訊多晶片影像感測器構造,其係主要 包含一透光基板、一影像感測晶片、一半導體晶片及一電 性屏蔽層’該透光基板係具有一接合面,複數個導電線路 係形成於該接合面,該影像感測晶片係具有一感測面及一 背面’該感測面係具有一感測區,複數個凸塊形成於該感 測面周邊,該些凸塊係連接該些導電線路,該半導體晶片 係具有一主動面及一非主動面,該主動面係形成有複數個 銲塾’該些銲墊係與該些導電線路電性連接,該半導體晶 片之非主動面係設於該影像感測晶片之背面,該電性屏蔽 層係没於該影像感測晶片與該半導體晶片之間,以減低該 半導體晶片與該影像感測晶片之串音(cr〇ss_talk)。 【實施方式] 參閱所附圖式,本發明將列舉以下之實施例說明。 依本發明之第一具體實施例,請參閱第2圖,一種低Page 7 1236768 V. Description of the invention (2) The frequency generated by the circuit 40 during operation, especially at high frequencies, will affect the operation of the image sensor 20 to capture images or convert optical image signals into electronic signals. [Summary of the Invention] The main object of the present invention is to provide a low-noise multi-chip image sensor structure, which is provided between an image sensing chip and a semiconductor wafer using an electrical shielding layer to form a shielding effect. (Shielding ef fectiveness), reduce noise, so that the frequency generated during the operation of the semiconductor chip will not affect the operation of the image sensing chip to capture images or convert optical image signals into electronic signals. The low-noise multi-chip image sensor structure according to the present invention mainly includes a light-transmitting substrate, an image-sensing chip, a semiconductor wafer, and an electrical shielding layer. The light-transmitting substrate has a joint surface, A plurality of conductive lines are formed on the joint surface, the image sensing chip has a sensing surface and a back surface, the sensing surface has a sensing area, and a plurality of bumps are formed around the sensing surface. The bumps are connected to the conductive lines. The semiconductor wafer has an active surface and a non-active surface. The active surface is formed with a plurality of welding pads. The pads are electrically connected to the conductive lines. The non-active surface of the semiconductor wafer is disposed on the back of the image sensing wafer, and the electrical shielding layer is not located between the image sensing wafer and the semiconductor wafer to reduce the string between the semiconductor wafer and the image sensing wafer. Tone (cr〇ss_talk). [Embodiment] With reference to the drawings, the present invention will be described by the following embodiments. According to a first embodiment of the present invention, please refer to FIG.

1236768 五、發明說明(3) 雜§fl多晶片影像感測器1 〇 〇之構造,其係主要包含一^透光 基板1 1 0、一影像感測晶片1 2 0、一半導體晶片1 3 0及一電 性屏蔽層1 40,該透光基板1 1 〇係可為一玻璃片,其係具有 一接合面111,複數個導電線路112係形成於該接合面 111,該些導電線路112之外側係連接有複數個銲球1 50, 遠影像感測晶片1 2 0係為一種先感測晶片(〇p t i c a 1 sensing chip)、電荷♦禺合裝置(charge coupled device ’ CCD)、互補式金屬氧化半導體(complementary metal oxide serai conductor,CMOS)或光電二極體 (photodiode ),該影像感測晶片1 20係具有一感測面1 2 1及 一背面1 2 2,該感測面1 2 1係具有一感測區1 2 3,複數個凸 塊1 24形成於該感測面12 1周邊,且不影響到該感測區1 23 搁取影像,該些凸塊1 2 4係連接該透光基板11 〇之導電線路 112,且被一密封膠160包覆;該密封膠160係環繞該感測 區123且不覆蓋至該感測區1 23,使得該感測區1 23與該透 光基板11 0之間形成一密閉空間,該半導體晶片1 30係選自 於一射頻(Radio Frequency,RF)晶片與特殊應用積體電 路(Application Specific Integrated Circuit)晶片之 其中之一,該半導體晶片130係具有一主動面131及一非主 動面132,該主動面131係形成有複數個銲墊133,並以複 數個銲線170連接該些銲墊1 33與該透光基板110冬導電線 路112,使得該些銲墊133與該些導電線路112電性連接, 且依該些導電線路11 2、該影像感測晶片1 20與談半導體晶 片130之設計,該些銲墊133係可同時與該些凸塊124與該1236768 V. Description of the invention (3) Miscellaneous §fl Multi-chip image sensor 1000 structure, which mainly includes a light-transmitting substrate 1 1 0, an image-sensing chip 1 2 0, and a semiconductor wafer 1 3 0 and an electrical shielding layer 1 40, the transparent substrate 1 10 may be a glass sheet having a bonding surface 111, and a plurality of conductive lines 112 are formed on the bonding surface 111, and the conductive lines 112 The outer side is connected with a plurality of solder balls 150, and the far-image sensing chip 120 is a first sensing chip (〇ptica 1 sensing chip), a charge coupled device (CCD), and a complementary type A metal oxide semiconductor (complementary metal oxide serai conductor, CMOS) or a photodiode. The image sensing chip 1 20 has a sensing surface 1 2 1 and a back surface 1 2 2. The sensing surface 1 2 Series 1 has a sensing area 1 2 3, and a plurality of bumps 1 24 are formed around the sensing surface 12 1 without affecting the sensing area 1 23. The image is captured, and these bumps 1 2 4 are connected The conductive circuit 112 of the transparent substrate 110 is covered with a sealant 160; the sealant 160 It surrounds the sensing area 123 and does not cover the sensing area 1 23, so that a closed space is formed between the sensing area 1 23 and the transparent substrate 110. The semiconductor wafer 1 30 is selected from a radio frequency ( One of Radio Frequency (RF) chip and Application Specific Integrated Circuit chip, the semiconductor chip 130 has an active surface 131 and a non-active surface 132, and the active surface 131 is formed with a plurality of The bonding pads 133 are connected with the bonding pads 133 and the transparent substrate 110 through the conductive lines 112 by a plurality of bonding wires 170, so that the bonding pads 133 are electrically connected with the conductive lines 112, and according to the conductive Circuit 11 2. The image sensing chip 120 and the design of the semiconductor chip 130. The pads 133 can be simultaneously connected to the bumps 124 and the

第9頁 1236768 五、發明說明(4) 些銲球150電性連接,或只有與該些銲球150電性痒接而不 與該些凸塊1 24電性連接,或只有與該些凸塊124電性連接 而不與該些鲜球150電性連接’而该半導體晶片130之非主 動面1 3 1係設於該影像感測晶片1 2 0之背面1 2 2。 該電性屏蔽層1 40係設於該影像感測晶片1 20與該半導 體晶片1 3 0之間,該電性屏蔽層1 4 0係可為一金屬板或一金 屬蓋體,在本實施例中,該電性屏蔽層140係為一金屬蓋 體,其係具有一平坦部1 41及複數個彎折之延伸部1 42,該 平坦部141係以一第一黏膠層181貼設於該影像咸測蟲片 120之背面122,且該些延伸部142係貼設於該影像感測晶 片1 2 0之側面,該半導體晶片1 3 0係以一第二黏膠層;[8 2貼 設於該平坦部1 4 1之另一面,此外,一封膠體1 9 〇係包覆該 影像感測晶片1 2 0、該半導體晶片1 3 0、該電性屏蔽層1 4〇 與該些銲線1 7 0。 該低雜訊多晶片影像感測器1 〇 〇係利用該電性屏蔽層 1 40設於該影像感測晶片1 20與該半導體晶片i 30之間,以 形成屏蔽效應(shielding effectiveness),降低雜訊, 減低該半導體晶片1 30與該影像感測晶片i 2〇之串音 (cross-talk),使得該半導體晶片130運作時產生之頻率 不會影響到該影像感測晶片1 20擷取影像或將光學影像信 號轉換成電子訊號之運作。 依本發明之第二具體實施例,請參閱第3圖,一種低 雜訊多晶片影像感測器2 〇〇之構造,其係主要包含一透光 基板210、一影像感測晶片220、一半導體晶片2 30及一電Page 9 1236768 V. Description of the invention (4) The solder balls 150 are electrically connected, or are only electrically connected to the solder balls 150 and not electrically connected to the bumps 1 24, or only connected to the bumps. The block 124 is electrically connected without being electrically connected to the fresh balls 150 ′, and the non-active surface 1 3 1 of the semiconductor chip 130 is disposed on the back surface 1 2 2 of the image sensing chip 1 2 0. The electrical shielding layer 140 is disposed between the image sensing chip 120 and the semiconductor wafer 130. The electrical shielding layer 140 may be a metal plate or a metal cover. In this implementation, For example, the electrical shielding layer 140 is a metal cover, which has a flat portion 1 41 and a plurality of bent extension portions 1 42. The flat portion 141 is attached with a first adhesive layer 181. On the back surface 122 of the image detection insect sheet 120, and the extensions 142 are attached to the side of the image sensing chip 120, the semiconductor chip 130 is provided with a second adhesive layer; [8 2 is attached to the other side of the flat portion 1 41. In addition, a piece of colloid 1 90 covers the image sensing wafer 120, the semiconductor wafer 130, the electrical shielding layer 140, and The bonding wires 1 7 0. The low-noise multi-chip image sensor 100 uses the electrical shielding layer 1 40 to be disposed between the image sensing chip 120 and the semiconductor chip i 30 to form a shielding effectiveness and reduce shielding effectiveness. Noise, reducing cross-talk between the semiconductor chip 130 and the image sensing chip i20, so that the frequency generated during the operation of the semiconductor chip 130 will not affect the acquisition of the image sensing chip 120 The operation of converting images or optical image signals into electronic signals. According to a second specific embodiment of the present invention, please refer to FIG. 3, a structure of a low-noise multi-chip image sensor 2000, which mainly includes a light-transmitting substrate 210, an image-sensing chip 220, a Semiconductor wafer 2 30 and a power

第10頁 1236768 五、發明說明(5) ---Page 10 1236768 V. Description of the invention (5) ---

性屏蔽層240,該透光基板2 10係可為一玻璃片,複數個導 電線路211係形成於該透光基板210,該些導電線路211之 外側係連接有複數個銲球25 0,該影像感測晶片22〇係具有 一感測面221及一背面222,該感測面221係具有—感測區 223,複數個凸塊2 24形成於該感測面221周邊,且不影響 到該感測區1 2 3棟取影像,該些凸塊2 2 4係連接該透光基板 210之導電線路212,該半導體晶片230係選自於一射頻 (Radio Frequency,RF)晶片與特殊應用積體電路 (Application Specific Integrated Circuit)晶片之其 中之一 ’該半導體晶片230係具有一主動面231及一非主動 面2 3 2 ’該主動面2 31係形成有複數個鲜塾2 3 3,並以複數 個銲線260連接該些銲墊233與該透光基板210之導電線路 212,使得該些銲墊233與該些導電線路212電性連接,該 半導體晶片230之非主動面231係對應於該影像感測晶片 220之背面22 2,並以一黏膠層270貼合於該電性屏蔽層 240。該電性屏蔽層240係設於該影像感測晶片220與該半 導體晶片230之間,在本實施例中,該電性屏蔽層240係為 以濺鍍方法形成之金屬層,其係包含有金(Au),先預先形 成於該影像感測晶片220之背面222、或預先形成於該半導 體晶片230之非主動面231、或者是為一預型片 (pr e f 〇rm)。在結合該半導體晶片23 0與該影像感測晶片 220之後,該電性屏蔽層240係可包含有矽(Si),而成為一 共晶接合層(eutectic bonding layer)。此外,一封膠體 280係包覆該影像感測晶片220、該半導體晶片230與該些The transparent substrate 240 may be a glass sheet. A plurality of conductive lines 211 are formed on the transparent substrate 210. A plurality of solder balls 250 are connected to the outer side of the conductive lines 211. The image sensing chip 22 has a sensing surface 221 and a back surface 222. The sensing surface 221 has a sensing area 223. A plurality of bumps 2 24 are formed around the sensing surface 221 without affecting the sensing surface 221. The sensing area 1 2 3 takes images, the bumps 2 2 4 are connected to the conductive circuit 212 of the transparent substrate 210, and the semiconductor chip 230 is selected from a radio frequency (RF) chip and special applications One of the application specific integrated circuit chips, 'The semiconductor wafer 230 has an active surface 231 and a non-active surface 2 3 2' The active surface 2 31 is formed with a plurality of fresh 塾 2 3 3, A plurality of bonding wires 260 are used to connect the bonding pads 233 and the conductive lines 212 of the transparent substrate 210 so that the bonding pads 233 are electrically connected to the conductive lines 212. The non-active surface 231 of the semiconductor wafer 230 is Corresponding to the back surface 22 2 of the image sensing chip 220, and An adhesive layer 270 is attached to the electrical shielding layer 240. The electrical shielding layer 240 is disposed between the image sensing wafer 220 and the semiconductor wafer 230. In this embodiment, the electrical shielding layer 240 is a metal layer formed by a sputtering method and includes Gold (Au) is first formed on the back surface 222 of the image sensing chip 220, or the non-active surface 231 of the semiconductor wafer 230, or a preform (preform). After the semiconductor wafer 230 and the image sensing wafer 220 are combined, the electrical shielding layer 240 may include silicon (Si) to become an eutectic bonding layer. In addition, a piece of colloid 280 covers the image sensing chip 220, the semiconductor wafer 230, and the

第11頁 1236768 五、發明說明(6) 鲜線2 6 0。 本發明之保護範圍當視後附之申請專利範圍所界定者 為準,任何熟知此項技藝者,在不脫離本發明之精神和範 圍内所作之任何變化與修改,均屬於本發明之保護範圍。Page 11 1236768 V. Description of the invention (6) Fresh line 2 6 0. The protection scope of the present invention shall be determined by the scope of the appended patent application. Any changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention shall fall within the protection scope of the present invention. .

第12頁 1236768 圖式簡單說明 【圖式簡單說明】 第1圖:中華民國專利公告第55 6965號「影像感測器堆疊 裝置」之截面示意圖; 第2 圖:依本發明之第一具體實施例,一種低雜訊多晶片 影像感測器構造之截面示意圖;及 第3圖:依本發明之第二具體實施例,一種低雜訊多晶片 影像感測器構造之截面示意圖。 元件符號簡單說明 10 透光玻璃 11 訊號輸出端 12 訊號輸入端 20 影像感測晶片 30 基板 31 第一表面 32 第二表面 40 積體電路 50 印刷電路板 100 多晶片影像感測器 110 透光基板 111 接合面 112 導電線路 120 影像感測晶片 121 感測面 122 背面 123 感測區 124 凸塊 130 半導體晶片 131 主動面 132 非主動面 133 銲墊 140 電性屏蔽層 141 平坦部 142 延伸部 150 160 170 鲜球 密封膠 鲜線1236768 on page 12 [Simplified illustration on the drawing] Fig. 1: Schematic cross-sectional view of the Republic of China Patent Publication No. 55 6965 "Image Sensor Stacking Device"; Fig. 2: First implementation of the present invention For example, a schematic cross-sectional view of a low-noise multi-chip image sensor structure; and FIG. 3: a cross-sectional schematic view of a low-noise multi-chip image sensor structure according to a second specific embodiment of the present invention. Simple explanation of component symbols 10 Transparent glass 11 Signal output terminal 12 Signal input terminal 20 Image sensing chip 30 Substrate 31 First surface 32 Second surface 40 Integrated circuit 50 Printed circuit board 100 Multi-chip image sensor 110 Transmissive substrate 111 bonding surface 112 conductive line 120 image sensing chip 121 sensing surface 122 back surface 123 sensing area 124 bump 130 semiconductor wafer 131 active surface 132 non-active surface 133 solder pad 140 electrical shielding layer 141 flat portion 142 extending portion 150 160 170 Fresh Ball Sealant Fresh Line

第13頁 1236768 圖式簡單說明 181 第 — 黏 膠 層 182 第 二 黏 膠層 190 封 膠 體 200 多 晶 片 影 像感 測器 210 透 光 基板 211 導 電 線 路 220 影 像感 測 晶片 221 感 測 面 222 背面 223 感 測 區 224 凸 塊 230 半 導 體 晶 片 231 主 動 面 232 非主動面Page 13 1236768 Brief description of the drawings 181 Section—adhesive layer 182 second adhesive layer 190 sealing compound 200 multi-chip image sensor 210 transparent substrate 211 conductive circuit 220 image sensor chip 221 sensing surface 222 back surface 223 sensor Measurement area 224 Bump 230 Semiconductor wafer 231 Active surface 232 Non-active surface

2 3 3 桿塾 240 電性屏蔽層 2 5 0 銲球 2 6 0 銲線 270黏膠層 280 封膠體2 3 3 Rod 塾 240 Electrical shielding layer 2 5 0 Solder ball 2 6 0 Welding wire 270 Adhesive layer 280 Sealant

第14頁Page 14

Claims (1)

12367681236768 【申請專利範圍】 1、 一種低雜訊多晶片影像感測器構造,包含·· 一透光基板’其係形成有複數個導電線路; 一景> 像感測晶片’其係具有一感測面及一背面,該 測面係具有一感測區,複數個凸塊形成於該感測面周g = 該些凸塊係連接該些導電線路; 一半導體晶片,其係具有一主動面及一非主動面,該 主動面係形成有複數個銲墊,該些銲墊係與該些導電線路 電性連接,該半導體晶片之該非主動面係設於該影像感測 晶片之該背面;及 。 電 I4生屏蔽層(electrically shielding layer),其 係设於遺影像感測晶片與該半導體晶片之間。 2、 如申請專利範圍第丨項所述之低雜訊多晶片影像感測 器構造,其中該電性屏蔽層係為一金屬蓋體,其係具有一 平坦部及複數個彎折之延伸部,該平坦部係貼設於該影像 感測晶片之該背面,該些延伸部係貼設於該影像感測晶片 之側面。 3、 如申請專利範圍第1項所述之低雜訊多晶片影像感測 器構造,其中該電性屏蔽層係為—金屬層,其係形成於該 影像感測晶片之該背面。 4、 如申請專利範圍第3項所述之低雜訊多晶片影像感測 Is構造,其中該金屬層係以濺鍍方法形成於該影像感測晶 片之該背面。[Scope of patent application] 1. A low-noise multi-chip image sensor structure, including a transparent substrate 'which is formed with a plurality of conductive lines; a scene > image sensing chip' which has a sense A measuring surface and a back surface, the measuring surface has a sensing area, and a plurality of bumps are formed around the sensing surface g = the bumps are connected to the conductive lines; a semiconductor wafer has an active surface And an inactive surface, the active surface is formed with a plurality of pads, the pads are electrically connected to the conductive lines, and the inactive surface of the semiconductor chip is disposed on the back surface of the image sensing chip; and. An electrically shielding layer is disposed between the image sensing chip and the semiconductor wafer. 2. The low-noise multi-chip image sensor structure described in item 丨 of the patent application scope, wherein the electrical shielding layer is a metal cover having a flat portion and a plurality of bent extensions The flat portion is attached to the back surface of the image sensing chip, and the extended portions are attached to a side surface of the image sensing chip. 3. The low-noise multi-chip image sensor structure described in item 1 of the patent application scope, wherein the electrical shielding layer is a metal layer, which is formed on the back surface of the image sensing chip. 4. The low-noise multi-chip image sensing Is structure described in item 3 of the scope of the patent application, wherein the metal layer is formed on the back surface of the image sensing wafer by a sputtering method. 1236768 六、申請專利範圍 — 裔構造,其中該電性屏蔽層係為一預型片金屬板。 6、 如申請專利範圍第j項所述之低雜訊多晶片影像感測 器構造,其中該半導體晶片係選自於—射頻(Radi〇 Frequency,RF)晶片與特殊應用積體電路(Appi icati〇n Specific Integrated Circuit)晶片之其中之一。 7、 如申明專利範圍第丨項所述之低雜訊多晶片影像感測 器構造,其另包含一密封膠,其係包覆該些凸塊。 8、 如申凊專利範圍第丨項所述之低雜訊多晶片影像感測 器構造m含複數個銲、線,其係連接該半導體晶片之 该些銲墊與該些導電線路。 二塞:申:專利範圍第8項所述之低雜訊多晶片影像感測 益構^,其另包含一封膠體,其係包覆該些銲線。 3 Μ Ϊ申1Ϊ,犯圍第1項所述之低雜訊多晶片影像感測 I t:道ίί 數個銲球’其係設於該透光基板且連 接该些導電線路。 ^構:申:f 3 t圍第1項所述之低雜訊多晶片影像感測 為構造,其中該電性屏蔽層係包含 12、 如申請專利範圍第j 片:目I丨哭媸、生甘Α弗1或1 1項所迷之低雜訊多晶片影像 感測為構:^,其中該電性屏蔽層 13、 如申請專利範圍^ 匕3有川" ¥ Μ #,i ϋ Z 項所述之低雜訊多晶片影像感測 ,其中该電性屏蔽層係為_ … bonding layer) 〇 Η 第16頁1236768 6. Scope of patent application-structure, wherein the electrical shielding layer is a pre-shaped sheet metal plate. 6. The low-noise multi-chip image sensor structure as described in item j of the scope of the patent application, wherein the semiconductor chip is selected from the group consisting of a Radio Frequency (RF) chip and a special application integrated circuit (Appi icati On Specific Integrated Circuit) chip. 7. The low-noise multi-chip image sensor structure described in item 丨 of the declared patent scope further includes a sealant that covers the bumps. 8. The low-noise multi-chip image sensor structure m, as described in item 丨 of the patent application scope, includes a plurality of bonding wires, which are connected to the pads of the semiconductor wafer and the conductive lines. Second plug: Application: The low-noise multi-chip image sensing structure described in item 8 of the patent scope, which further includes a colloid, which covers the bonding wires. 3 ΜΪ1Ϊ, the low-noise multi-chip image sensing as described in Item 1 It: Dao several solder balls, which are provided on the transparent substrate and connected to the conductive lines. ^ Structure: Application: The low-noise multi-chip image sensing device described in item 1 of f 3 t is a structure, in which the electrical shielding layer contains 12. For example, the jth scope of the patent application: Head I The low-noise multi-chip image sensing of Shenggan Afu 1 or 11 is structured as: ^, where the electrical shielding layer 13, as in the scope of patent application ^ 3 Aikawa " ¥ Μ # , i ϋ Z The low-noise multi-chip image sensing as described in the above item, wherein the electrical shielding layer is _… bonding layer) 〇 16 page 16
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