TWI232552B - Data write-in method of mask read only memory - Google Patents

Data write-in method of mask read only memory Download PDF

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Publication number
TWI232552B
TWI232552B TW92130792A TW92130792A TWI232552B TW I232552 B TWI232552 B TW I232552B TW 92130792 A TW92130792 A TW 92130792A TW 92130792 A TW92130792 A TW 92130792A TW I232552 B TWI232552 B TW I232552B
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Taiwan
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ion implantation
patterned
photoresist layer
memory
patent application
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TW92130792A
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Chinese (zh)
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TW200516719A (en
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Yuan-Wei Jeng
Meng-Yu Pan
You-Jr Jang
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Grace Semiconductor Mfg Corp
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Abstract

A kind of mask ROM (read only memory) that uses different dose of ion implantation to perform data write-in process is disclosed in the present invention. On the semiconductor substrate that has plural gate structures, the mask designed according to the information provided by the customer (user) is used to conduct different dose of ion implantation so as to generate different voltage output values. Different voltage output values are then defined as (00), (01), (10), and (11) for the bit output. Thus, the invention is capable of reducing the memory area required for completing a specific data record so as to decrease the bit cost.

Description

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【發明所屬之技術領域】 本發明係關於一種光罩式唯讀記憶體之資料寫人 、 ,特別是關於一種利用四種不同離子植入量央你:入方式 ♦1〒為位元 (b i t)資料寫入方式的光罩式唯讀記憶體。 【先前技術】 光罩式唯讀記憶體(Mask Read Only Menu^y MR〇M) 為非揮發性記憶體I C的一種,乃是一種在l S I晶片紫造工 程内利用光罩(Mask)規劃記憶資料内容(Program)^ =予 以永久儲存下來的記憶裝置。 其由於不品要寫入動作’整體之電路構成較為單純, 而基本記憶胞亦十分簡單,僅由一個Μ 0 S型電晶體(μ 〇 s Trans is tor)所構成,與能夠隨時改寫記憶情報的記憶體 (Random Access Memory, RAM)相較下,僅為其四分之— 大小,所以就相同大小之晶片而言,MR0M記憶容量約為 RAM之四倍左右’所以十分經濟,因而被廣泛應用於各類 資訊、通訊、消費性電子等電子產品。 而其資料寫入的工程乃是利用依據客戶(使用者)提供 之情報所設計出之光罩製作成,為縮短TAT(Turn Around T i me ),往往常採取晶片製造工程中間來進行規劃工程 (P r 〇 g r a m),但是其缺點是記憶晶胞具有較大之面積,較 不符合經濟要求。 因此,本發明係針對上述之問題,提出一種光罩式唯 讀記憶體之資料寫入工程方法’其不僅可以降低有效的單 元(cell)所需之面積,又可以降低位元成本(bit cost;)與[Technical field to which the invention belongs] The present invention relates to a data writer for a photomask type read-only memory, and in particular, to a method using four different ion implantation volumes: the entry method ♦ 1〒 is a bit ) Mask read-only memory for data writing. [Previous technology] Mask Read Only Menu (YMR0M) is a type of non-volatile memory IC, and it is a plan that uses a mask in the SI wafer purple fabrication process Program data content (Program) ^ = memory device for permanent storage. Because it is not good to write the action, the overall circuit configuration is relatively simple, and the basic memory cell is also very simple. It consists of only one M 0 S-type transistor (μ 〇s Trans is tor), and can rewrite memory information at any time. Compared with Random Access Memory (RAM), it is only a quarter of its size—so for a chip of the same size, the MR0M memory capacity is about four times that of RAM ', so it is very economical and is widely used. It is used in various electronic products such as information, communication, and consumer electronics. The data writing process is made by using a photomask designed based on the information provided by the customer (user). In order to shorten TAT (Turn Around T me), the wafer manufacturing process is often used to plan the project. (P r gram), but its disadvantage is that the memory cell has a larger area, which is less suitable for economic requirements. Therefore, the present invention is directed to the above-mentioned problem, and proposes a data writing engineering method of a photomask type read-only memory, which can not only reduce the area required for an effective cell, but also reduce the bit cost. ;)versus

1232552 五、發明說明(2) 於所需密集度條件下晶粒(d i e )尺寸,來解決上述之問題 〇 【發明内容】 本發明之主要目的,在於提供一種光罩式唯讀記憶體 之資料寫入方法,以達到有效的縮減記憶胞面積之目的。 本發明之另一目的,在於提供一種光罩式唯讀記憶體 之資料寫入方法,以達到於所需密集度條件下有效的減少 晶粒的尺寸。 本發明之再一目的,在於提供一種光罩式唯讀記憶體 之資料寫入方法,以達到有效的降低位元成本之目的。 為達以上之目的,本發明提供一種光罩式唯讀記憶體 之資料寫入方法,其包括有下列步驟:提供一具有數個閘 極結構之半導體基底;形成一圖案化第一光阻層於半導體 基底上,且圖案化第一光阻層係覆蓋閘極結構,而暴露出 第一編碼區;接著以圖案化第一光阻層為一罩幕,對第一 編碼區進行第一離子植入步驟,而後移除該圖案化第一光 阻層;然後在半導體基底上形成一覆蓋,閘極結構與第一編 碼區,而暴露出第二編碼區的圖案化第二光阻層;接著以 圖案化第二光阻層為一罩幕,對第二編碼區進行第二離子 植入步驟,而後移除該圖案化第二光阻層;再於半導體基 底上形成一圖案化第三光阻層,其係覆蓋閘極結構、第一 編碼區與第二編碼區’並暴露出第三編碼區;以圖案化第 三光阻層為一罩幕,對第三編碼區進行第三離子植入步驟 ,而後移除該圖案化第三光阻層;最後在半導體基底上形1232552 V. Description of the invention (2) The size of the die under the required density conditions to solve the above problems. [Summary of the invention] The main purpose of the present invention is to provide a mask type read-only memory data Write method to achieve the purpose of effectively reducing the memory cell area. Another object of the present invention is to provide a data writing method of a mask type read-only memory, so as to effectively reduce the size of crystal grains under a desired density condition. Another object of the present invention is to provide a data writing method of a mask type read-only memory, so as to achieve the purpose of effectively reducing the bit cost. To achieve the above object, the present invention provides a data writing method of a photomask type read-only memory, which includes the following steps: providing a semiconductor substrate having a plurality of gate structures; forming a patterned first photoresist layer And patterning the first photoresist layer on the semiconductor substrate to cover the gate structure to expose the first coding region; and then using the patterned first photoresist layer as a mask to perform the first ionization on the first coding region An implantation step, and then removing the patterned first photoresist layer; then forming a cover, a gate structure and the first coding region on the semiconductor substrate, and exposing the patterned second photoresist layer of the second coding region; Then, using the patterned second photoresist layer as a mask, a second ion implantation step is performed on the second coding region, and then the patterned second photoresist layer is removed; and a patterned third is formed on the semiconductor substrate. Photoresistive layer, which covers the gate structure, the first coding area and the second coding area, and exposes the third coding area; using the patterned third photoresist layer as a screen, the third coding area is subjected to the third Ion implantation step and then remove The patterned third photoresist layer is finally formed on a semiconductor substrate

1232552 五、發明說明(3) 成一覆蓋閘極結構、第一編碼區、第二編碼區、第三編碼 區與暴露出第四編碼區之圖案化第四光阻層;以圖案化第 四光阻層為一罩幕,對第四編碼區進行第四離子植入步驟 ;然後移除圖案化第四光組層,即完成資料寫入。 本發明另外提供一種光罩式唯讀記憶體之資料寫入方 法,其包括有下列步驟: 一具有數個閘極結構之半導體基底; 、 於半導體基底上形成一覆蓋閘極結構,且暴露出第一 編碼區與第四編碼區之圖案化第一光阻層;以圖案化第一 光阻層為一罩幕,進行第一離子植入步驟,而後移除該圖 案化第一光阻層; 接著於半導體基底上形成一圖案化_二光阻層,其中 該圖案化第二光阻層係覆蓋閘極結構與第一編碼區,且暴 露出第二編碼區與第四編碼區;以圖案化第二光阻層為一 罩幕,進行第二離子植入步驟,而後移除圖案化第二光阻 層;再於半導體基底上形成一圖案化第三光阻層,覆蓋閘 極結構、第一編碼區、第二編碼區、第四編碼區,與暴露 出第三編碼區;以圖案化第三光阻層為一罩幕,進行第三 離子植入步驟;最後移除該圖案化第三光阻層,即完成資 料寫入。 茲為使 貴審查委員對本發明(之結構特徵及所達成之 功效更有進一步之瞭解與認識,謹佐以較佳之實施例圖及 配合詳細之說明,說明如後:, 【實施方式】1232552 V. Description of the invention (3) A patterned fourth photoresist layer covering the gate structure, the first coding region, the second coding region, the third coding region, and the fourth coding region is exposed; The resist layer is a mask, and a fourth ion implantation step is performed on the fourth coding region; the patterned fourth light group layer is removed, and data writing is completed. The invention further provides a data writing method of a photomask-type read-only memory, which includes the following steps: a semiconductor substrate having a plurality of gate structures; and forming a gate-covering structure on the semiconductor substrate and exposing Patterning the first photoresist layer in the first and fourth coding regions; using the patterned first photoresist layer as a mask, performing a first ion implantation step, and then removing the patterned first photoresist layer A patterned photoresist layer is formed on the semiconductor substrate, wherein the patterned second photoresist layer covers the gate structure and the first coding region, and exposes the second coding region and the fourth coding region; The patterned second photoresist layer is a mask, and the second ion implantation step is performed, and then the patterned second photoresist layer is removed; and a patterned third photoresist layer is formed on the semiconductor substrate to cover the gate structure. , The first coding region, the second coding region, the fourth coding region, and the third coding region is exposed; using the patterned third photoresist layer as a mask, the third ion implantation step is performed; and finally the pattern is removed The third photoresist layer is completed Data is written. In order to make your review members better understand and understand the structural features and achieved effects of the present invention, I would like to refer to the preferred embodiment diagrams and detailed descriptions as follows: [Implementation Mode]

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1232552 五、發明說明(5) 圖案化第三光阻層30。 然後,於半導體基底1 2上形成一利用如第二(d )圖所 示之第四光罩3 4所形成圖案化第四光阻層36,如第一(d) 圖所示,其中該圖案化第四光阻層3 6覆蓋住閘極結構1 0、 第一編碼區、第二編碼區與第三編碼區,並暴露出第四編 碼區,以圖案化第四光阻層3 6為一植入罩幕,進行第四離 子植入步驟,形成一位於閘極通道1 8的第四離子植入區3 8 ,最後移除圖案化第四光組層3 6,即完成資料的寫入製程 〇 其中,在進行第一離子植入步驟時,其離子植入劑量 可為l.OOE+14/cm2,而所獲得的臨界電壓為2.9Vt,第二離 子植入之劑量為1. 50E+14/cm2,所獲得的臨界電壓為 3· 6Vt,第三離子植入劑量為2. 00 E+14/cm2,所獲得的臨 界電壓為4. 3Vt,而第四離子植入之劑量可取任二個離子 植入量來進行,因此就如第三圖所示隨劑量不同,可以獲 得不同的電壓值,因此就可以依據不同的電壓來設定其依 序代表(0 1 ),( 1 0 ),( 1 1 ),( 0 0 )位元。 其中,當第四離子植入劑量設定為第一離子植入與第 二離子植入劑量合時,可將第四光罩合併設計於第一光罩 與第二光罩,其光罩設計將如第四(a)圖所示之第一光罩 40、第四(b)圖所示之第二光罩42,與第四(c)圖所示之第 三光罩4 4。 因而衍生出第二種資料寫入方式,其係於一具有數個 閘極結構1 0之半導體基底1 2上,形成一圖案化第一光阻層1232552 V. Description of the invention (5) The third photoresist layer 30 is patterned. Then, a patterned fourth photoresist layer 36 is formed on the semiconductor substrate 12 using a fourth photomask 34 as shown in the second (d) diagram, as shown in the first (d) diagram, where the The patterned fourth photoresist layer 36 covers the gate structure 10, the first coding region, the second coding region, and the third coding region, and exposes the fourth coding region to pattern the fourth photoresist layer 36. For an implant mask, a fourth ion implantation step is performed to form a fourth ion implantation region 3 8 located at the gate channel 18, and finally the patterned fourth light group layer 36 is removed to complete the data. The writing process. Among them, during the first ion implantation step, the ion implantation dose can be 1.OOE + 14 / cm2, and the obtained critical voltage is 2.9Vt, and the second ion implantation dose is 1 50E + 14 / cm2, the obtained critical voltage is 3.6Vt, the third ion implantation dose is 2. 00 E + 14 / cm2, the obtained critical voltage is 4.3Vt, and the fourth ion implantation The dose can be taken from any two ion implantation amounts, so as shown in the third figure, different voltage values can be obtained with different doses, so it can be based on different Voltage which is set by the representative sequence (01), (10), (11), (00) bits. When the fourth ion implantation dose is set to be the first ion implantation dose and the second ion implantation dose, the fourth photomask can be combined and designed in the first photomask and the second photomask, and the photomask design will be The first mask 40 shown in the fourth (a), the second mask 42 shown in the fourth (b), and the third mask 44 shown in the fourth (c). Therefore, a second data writing method is derived, which is formed on a semiconductor substrate 12 having a plurality of gate structures 10 to form a patterned first photoresist layer.

1232552 五、發明說明(6) 4 6,如第五(a )圖所示,其中該圖案化第一光阻層4 6係利 用如第四(a )圖所示之第一光罩4 0所形成,且其覆蓋住閘 極結構1 0,並暴露出第一編碼區與第四編碼區,接續以該 圖案化第一光阻層46為一植入罩幕,進行第一離子植入步 驟,形成位於閘極通道1 8之第一離子植入區4 8與第四離子 植入區5 0,然後,移除該圖案化第一光阻層4 6。 再於半導體基底12上形成一第二圖案化光阻層52,如 第五(b )圖所示,其中該第二圖案化光阻層5 2係使用如第 四(b )圖所示之第二光罩4 2所形成,且其覆蓋閘極結構1 0 與第一編碼區,並暴露出第二編碼區與第四編碼區,以圖 案化第二光阻層52為一植入罩幕,進行第二離子植入步驟 ,形成一位於閘極通道1 8的第二離子植入區5 4與加入第二 離子植入劑量的第四離子植入區5 0,移除該圖案化第二光 阻層5 2。 接著,利用如第四(c)圖所示之第三光罩4 4於半導體 基底12上形成圖案化第三光阻層56,同時參考第五(c)圖 所示,且其覆蓋住閘極結構1 0、第一編碼區、第二編碼區 與第四編碼區,並暴露出第三編碼區,以圖案化第三光阻 層5 6為一植入罩幕,進行第三離子植入步驟,形成一位於 閘極通道1 8之第三離子植入區5 8,移除該圖案化第三光阻 層5 6,即完成資料的寫入製程。 綜上所述,本發明係為光罩式唯讀記憶體之資料寫入 工程方法,其係利用離子植入量來設定出不同的電壓值以 作為(0 1 )、( 1 0 )、( 0 0 )與(1 1 )雙位元的貯存方式,其可以1232552 V. Description of the invention (6) 4 6 As shown in the fifth (a) diagram, the patterned first photoresist layer 4 6 uses the first photomask 40 shown in the fourth (a) diagram. It is formed and covers the gate structure 10, and the first coding region and the fourth coding region are exposed, and then the patterned first photoresist layer 46 is used as an implant mask to perform the first ion implantation. In the step, the first ion implantation region 48 and the fourth ion implantation region 50 located in the gate channel 18 are formed, and then the patterned first photoresist layer 46 is removed. Then, a second patterned photoresist layer 52 is formed on the semiconductor substrate 12, as shown in FIG. 5 (b), wherein the second patterned photoresist layer 52 is used as shown in FIG. 4 (b). The second photomask 42 is formed and covers the gate structure 10 and the first coding region, and exposes the second coding region and the fourth coding region. The second photoresist layer 52 is patterned as an implant mask. To perform a second ion implantation step to form a second ion implantation region 54 located in the gate channel 18 and a fourth ion implantation region 50 added with a second ion implantation dose, and remove the patterning Second photoresist layer 5 2. Next, a third photoresist layer 44 as shown in FIG. 4 (c) is used to form a patterned third photoresist layer 56 on the semiconductor substrate 12, while referring to FIG. 5 (c), which covers the gate The pole structure 10, the first coding region, the second coding region and the fourth coding region, and the third coding region is exposed. The patterned third photoresist layer 56 is used as an implant mask for the third ion implantation. In the step, a third ion implantation region 58 is formed in the gate channel 18, and the patterned third photoresist layer 56 is removed to complete the data writing process. In summary, the present invention is a data writing engineering method of a photomask type read-only memory, which uses the ion implantation amount to set different voltage values as (0 1), (1 0), ( 0 0) and (1 1) double-bit storage mode, which can

第10頁 1232552 五、發明說明(7) 縮減整體晶片的面積,降低製程上的成本,更可以加速其 資料的讀取速度。 惟以上所述者,僅為本發明一較佳實施例而已,並非 用來限定本發明實施之範圍,故舉凡依本發明申請專利範 圍所述之形狀、構造、特徵及精神所為之均等變化與修飾 ,均應包括於本發明之申請專利範圍内。 【圖號說明】 1 〇閘極結構 12半導體基底 14第一光罩 1 6圖案化第一光阻層 1 8閘極通道 2 0第一離子植入區 22第二光罩 2 4圖案化第二光阻層 2 6第二離子植入區 28第三光罩 3 0圖案化第三光阻層 3 2第三離子植入區 3 4第四光罩 3 6圖案化第四光阻層 3 8第四離子植入區 40第一光罩 42第二光罩Page 10 1232552 V. Description of the invention (7) Reduce the overall chip area, reduce the cost of the process, and speed up the reading speed of its data. However, the above is only a preferred embodiment of the present invention, and is not intended to limit the scope of implementation of the present invention. Therefore, for example, changes in shape, structure, characteristics, and spirit in accordance with the scope of the patent application for the present invention are equivalent. Modifications should be included in the scope of patent application of the present invention. [Illustration of figure number] 10 gate structure 12 semiconductor substrate 14 first photomask 16 patterned first photoresist layer 1 8 gate channel 2 0 first ion implantation region 22 second photomask 2 4 patterned first Two photoresist layers 2 6 Second ion implantation area 28 Third photomask 3 0 Patterned third photoresist layer 3 2 Third ion implantation area 3 4 Fourth photomask 3 6 Patterned fourth photoresist layer 3 8 Fourth ion implantation region 40 First photomask 42 Second photomask

1232552 五、發明說明(8) 4 4第三光罩 4 6圖案化第一光阻層 4 8第一離子植入區 50第四離子植入區 5 2圖案化第二光阻層 5 4第二離子植入區 5 6圖案化第三光阻層 5 8第三離子植入區1232552 V. Description of the invention (8) 4 4 Third photomask 4 6 Patterned first photoresist layer 4 8 First ion implanted area 50 Fourth ion implanted area 5 2 Patterned second photoresist layer 5 4th Two ion implantation area 5 6 patterned third photoresist layer 5 8 third ion implantation area

第12頁 1232552 圖式簡單說明 第一(a)圖至第一(d)圖分別為本發明使用四個光罩來進行 資料寫入時之各步驟構造剖視圖。 第二(a)圖至苐二(d)圖分別為本發明使用四個光罩來進行 資料寫入時,該四個光罩設計的式樣。 第三圖係為本發明使用不同離子植入劑量下的相對電壓值 變化。 第四(a )圖至第四(c )圖分別為本發明使用三種光罩來進行 資料寫入時之光罩設計式樣。Page 12 1232552 Brief description of the drawings The first (a) to the first (d) diagrams are cross-sectional structural views of each step when the invention uses four photomasks to write data. Figures 2 (a) to 2 (d) are the design patterns of the four photomasks when using the four photomasks to write data according to the present invention. The third graph is the change of the relative voltage under different ion implantation doses of the present invention. The fourth (a) to fourth (c) diagrams are respectively the mask design patterns when the invention uses three kinds of masks for data writing.

第五(a )圖至第五(c )圖分別為本發明使用三個光罩來進行 資料寫入時之各步驟構造剖視圖。Fifth (a) to fifth (c) are cross-sectional views of the steps of the present invention when using three photomasks for data writing.

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Claims (1)

1232552 _案號92130792_年月日__ 六、申請專利範圍 區, 以該圖案化第四光阻層為一罩幕,對該第四編碼區進 行第四離子植入步驟;以及 移除該圖案化第四光組層。 2 ·如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中該第一離子植入之劑量為1. 00 E + 1 4/cra 2〇 3 ·如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中該進行第二離子植入劑量為1. 50 E + 1 4/cm 2〇 4 ·如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中該第三離子植入劑量為2. 00E + 1 4/cm 2〇 5 ·如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中該第四離子植入劑量可為第一雙位 元編碼植入與第二位元編碼植入劑量之和。 6 .如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第一離子植入步驟時,其離子 係植入於閘極通道。 7 .如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第二離子植入步驟時,其離子 係植入於閘極通道。 8 .如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第三離子植入步驟時,其離子1232552 _ Case No. 92130792_ 年月 日 __ VI. In the patent application area, using the patterned fourth photoresist layer as a screen, perform a fourth ion implantation step on the fourth coding area; and remove the Patterning a fourth light group layer. 2 · The data writing method of the photomask type read-only memory as described in item 1 of the scope of the patent application, wherein the dose of the first ion implantation is 1. 00 E + 1 4 / cra 2 0 3 The data writing method of the mask type read-only memory according to item 1 of the patent scope, wherein the second ion implantation dose is 1.50 E + 1 4 / cm 2〇4. The data writing method of the mask type read-only memory according to the above item, wherein the dose of the third ion implantation is 2. 00E + 1 4 / cm 2 0 · The photomask as described in item 1 of the scope of patent application A method for writing data in a read-only memory, wherein the fourth ion implantation dose may be a sum of the first double bit coded implantation and the second bit coded implantation dose. 6. The data writing method of the mask type read-only memory as described in item 1 of the scope of patent application, wherein when the first ion implantation step is performed, the ions are implanted in the gate channel. 7. The data writing method of the mask type read-only memory according to item 1 of the scope of the patent application, wherein when the second ion implantation step is performed, the ions are implanted in the gate channel. 8. The data writing method of the mask type read-only memory as described in item 1 of the scope of patent application, wherein when the third ion implantation step is performed, the ion 第15頁 1232552 _案號 92130792_年月日__ 六、申請專利範圍 係植入於閘極通道。 9 ·如申請專利範圍第1項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第四離子植入步驟時,其離子 係植入於閘極通道。 1 0 · —種光罩式唯讀記憶體之資料寫入方法,其包括下列 步驟: 一半導體基底,其上係有數個閘極結構;Page 15 1232552 _ Case No. 92130792 _ Month and Day __ VI. The scope of patent application is implanted in the gate channel. 9 · The data writing method of the mask type read-only memory as described in item 1 of the patent application scope, wherein when the fourth ion implantation step is performed, the ions are implanted in the gate channel. 1 0 · —A method for writing data in a photomask type read-only memory, which includes the following steps: a semiconductor substrate having a plurality of gate structures thereon; 於該半導體基底上形成一圖案化第一光阻層,其中該 圖案化第一光阻層係覆蓋該閘極結構,並暴露出第一 編碼區與第四編碼區; 以該圖案化第一光阻層為一罩幕,進行第一離子植入 步驟,而後移除該圖案化第一光阻層; 在該半導體基底上形成一圖案化第二光阻層,其中該 圖案化第二光阻層係覆蓋該閘極結構與第一編碼區, 而暴露出第二編碼區與第四編碼區; 以該圖案化第二光阻層為一罩幕,進行第二離子植入 步驟,而後移除該圖案化第二光阻層;Forming a patterned first photoresist layer on the semiconductor substrate, wherein the patterned first photoresist layer covers the gate structure and exposes a first coding region and a fourth coding region; and patterning the first The photoresist layer is a mask, performing a first ion implantation step, and then removing the patterned first photoresist layer; forming a patterned second photoresist layer on the semiconductor substrate, wherein the patterned second light The resist layer covers the gate structure and the first coding region, and exposes the second coding region and the fourth coding region. The patterned second photoresist layer is used as a mask to perform a second ion implantation step, and then Removing the patterned second photoresist layer; 再於該半導體基底上形成一圖案化第三光阻層,其中 該圖案化第三光阻層係覆蓋該閘極結構、第一編碼區 、第二編碼區與第四編碼區’而暴露出第二編碼區, 以該圖案化第三光阻層為一罩幕,進行第三離子植入 步驟;以及 移除該圖案化第三光阻層。 1 1 ·如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資A patterned third photoresist layer is further formed on the semiconductor substrate, wherein the patterned third photoresist layer covers the gate structure, the first coding region, the second coding region, and the fourth coding region and is exposed. The second coding region uses the patterned third photoresist layer as a mask to perform a third ion implantation step; and removes the patterned third photoresist layer. 1 1 · Material of mask type read-only memory as described in item 10 of the scope of patent application 第16頁 1232552 _案號92130792_年月日__ 六、申請專利範圍 料寫入方法,其中該第一離子植入劑量為1. 00 E + 14/cm2。 1 2 ·如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資 料寫入方法,其中該進行第二離子植入劑量為1. 50 E + 1 4 /cm 2〇 1 3 ·如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資 料寫入方法,其中該進行第三離子植入劑量為2. 00E + 1 4/cm 2〇Page 16 1232552 _Case No. 92130792_year month__ Sixth, the scope of patent application material writing method, wherein the first ion implantation dose is 1. 00 E + 14 / cm2. 1 2 · The data writing method of the photomask type read-only memory as described in item 10 of the scope of the patent application, wherein the second ion implantation dose is 1.50 E + 1 4 / cm 2 0 1 3 00E + 1 4 / cm 2〇 The data writing method of the photomask type read-only memory as described in item 10 of the patent application scope, wherein the dose of the third ion implantation is 2. 00E + 1 4 / cm 2〇 1 4 ·如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第一離子植入步驟時,其離子 係植入於閘極通道。 1 5 ·如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第二離子植入步驟時,其離子 係植入於閘極通道。 1 6.如申請專利範圍第1 0項所述之光罩式唯讀記憶體之資 料寫入方法,其中進行第三離子植入步驟時,其離子 係植入於閘極通道。14 · The data writing method of the mask read-only memory as described in item 10 of the scope of patent application, wherein when the first ion implantation step is performed, the ions are implanted in the gate channel. 15 · The data writing method of the photomask type read-only memory as described in item 10 of the scope of patent application, wherein when the second ion implantation step is performed, the ions are implanted in the gate channel. 16. The data writing method of the mask type read-only memory according to item 10 of the scope of the patent application, wherein when the third ion implantation step is performed, the ions are implanted in the gate channel. 第17頁Page 17
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