TWI228284B - Packaging structure for image sensors and wafer-level packaging method thereof - Google Patents

Abstract

This invention discloses a packaging structure for image sensors and wafer-level packaging method, which includes a wafer and a transparent substrate. A plurality of image-sensing units are disposed on the upper surface of wafer while a plurality of transparent substrate units are formed on the lower surface of the transparent base. Each of the transparent substrate units and the image-sensing units is disposed with the corresponding conductor patterns and conducting bump respectively. By utilizing the anisotropic conductive film to bond the transparent substrate and wafer, the corresponding conduct patterns and the conducting bumps on the upper and the lower surfaces are mutually bonded and conducted, and through a sawing process, each of the transparent substrate units and the image-sensing units is diced into a plurality of image sensors. This disclosure uses the conductor pattern on the transparent base units to replace printed circuit board without requiring the operation of wire bonding, which effectively achieves the process simplification and cost reduction and has the advantages of high cleanliness and high yield rate at the same time.

Description

1228284

(1) [Technical Field to which the Invention belongs] The present invention relates to the packaging of image sensing elements, and more particularly, to a packaging and structure of an image sensing element and a wafer-level packaging method thereof. (B). [Previous technology] According to the packaging technology of image sensing devices, it is common to use the technology of directly connecting a chip on board (COB) to achieve the purpose of packaging. The packaging process of COB usually includes die saw, die bond, wire bond, and mold.

However, this COB packaging technology has the disadvantages of complicated wiring process, low yield, easy tilt of the wafer, and complicated overall process. It is gradually being tape carrier package (TCP) and chip on glass. 'COG) and other packaging technologies. Among them, COG packaging refers to a packaging method in which an integrated circuit chip (IC chip) is directly bonded to a glass plate.

Conventional image sensor packaging technologies that use the COG structure, such as China Patent Bulletin No. 4741 00 "Image Sensor Packaging Structure and Packaging Method", are formed on a wafer by forming a plurality of image sensors. An image sensor has a light receiving area and a bottom surface, and a plurality of bonding pads are formed on the outer edge of the light receiving area; then an adhesive is formed around the light receiving area of each image sensor, and then a glass plate is covered. The wafer is attached to the wafer, and then the wafer is cut to form a plurality of image sensor packaging structures. Although the image sensor package structure is a COG structure including an image sensor, a device, and a glass; however, the image signal it senses must be transmitted through a printed circuit board, so the bottom surface of the image sensor must be A printed circuit board is attached,

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V. Description of the invention (2) And the use of a plurality of wire pins to connect to it The effect of setting a protective layer to protect the wire lead process is still not ideal, it is less effective to reduce the production cost, and it is limited. The printed circuit board and these bonding pads, and the feet 'make the patent unable to meet the trend of simplified process for simplified packaging, and the size of the image sensing sealing element is reduced. Therefore, the present invention addresses the above-mentioned problems and proposes a variety of images f ^ = package structure and wafer-level packaging method to effectively overcome these shortcomings.

I. 2). [Contents of the invention] The main purpose of the invention is to provide a method for forming a wafer-level packaging of image sensing elements, by arranging a circuit on the lower surface of a transparent board to correspond to the conductivity on the image sensing wafer. Bumps, without the need to provide a printed board, and through the bonding of anisotropic conductive adhesive to connect the transparent board and the crystal chip without the need to be familiar with wire bonding operations, in order to effectively achieve the simple process and reduce the cost of the effect. Another object of the present invention is to provide a wafer-level packaging method for an image sensing element to provide a small-sized packaging structure.

Another object of the present invention is to provide a crystal-level packaging method of an image sensing element. By bonding a wafer and a transparent substrate before performing $ 2 'to ensure the high cleanliness of the image sensing chip, And it can easily meet the requirements of high repetition rate, and then overcome the problems of conventional wafer contamination and low yield. In order to achieve the above object, the present invention provides a wafer without a plurality of image sensing units on top of the wafer, and provides a transparent substrate.

1228284 Five invention descriptions (3) ^ cheng ^ A plurality of transparent substrate units correspond to the :: lower surface of the transparent substrate unit, and the test is performed early: and the transparent substrate is bonded to the wafer with a conductive adhesive: J Ming ::::: The sensing unit is based on the circuit layout of the mother substrate unit and the pair on each image: to form an electrical connection. The wafer and the transparent substrate are used for a plurality of image sensing elements. The moon substrate is further divided and formed easily: ϊ The detailed description will be given in conjunction with the attached drawings to make it easier to understand the purpose, technical details, characteristics and achievements of the present invention (4), [Embodiment] The present invention is to arrange a circuit board on the lower surface of the transparent plate of the image sensing element to correspond to the conductive bumps on the image sensing chip. Through anisotropic conduction, the junctions conduct the upper and lower corresponding circuit layouts. And conductive bumps, without the need to set a printed circuit board and eliminate the wire bonding process, in order to achieve the purpose of the process & β As shown in the first figure, a cross-sectional view of the structure of a preferred embodiment of the present invention. The packaging structure of the image sensing element includes an image sensing chip 10 and a transparent plate 20. Please refer to FIG. 2 and FIG. Figure 2B is a schematic diagram of the image sensing wafer 10 and the transparent plate 20 respectively. A photosensitive area 12 is provided on the upper surface of the image sensing wafer i 0, and a plurality of conductive bumps 14 are provided on the periphery of the photosensitive area 12 respectively. Connected to the photosensitive region 12, the conductive bump 14 is usually a gold bump, and the transparent plate 20 is disposed above the image sensing wafer 10, and its material is transparent.

Page 7 1228284 V. Description of the invention (4) Often made of glass or transparent plastic, the size of the transparent plate 20 is larger than the image sensor chip 10. The transparent plate 20 is provided with a light transmitting area 26 corresponding to the light sensitive area 12 : A circuit 22 is provided on the lower surface of the transparent plate 20 and on the periphery of the light-transmitting area 26, and the circuit layout 22 is formed in a corresponding relationship with the conductive bumps 14 above and below, wherein the circuit layout 22 includes a plurality of The conductive contacts M, and the conductive contacts 24 are exposed outside the image sensing chip, and are used as the contact points for external output of the image signal; between the image sensing chip and the transparent plate, and are located at the photosensitive area. An anisotropic conductive film (ACF) 30 is provided on the periphery of the area 12 so that the upper and lower corresponding circuit layouts 22 and the conductive bumps 14 are joined to conduct up and down, and the image sensing chip is used. The photosensitive area 1 2 of 1 〇 senses the image, and transmits the sensed image signal to the circuit layout 22 through the conduction of the bump ^ 4 and the anisotropic conductive adhesive 30 to receive it, and then the circuit layout 22 passes the external signal through it. Conductive connection 24 is connected to an external circuit , While the output video signal. Among them, by arranging a circuit layout 22 on the lower surface of the transparent board 20 corresponding to 10 of the conductive bumps on the image sensing chip, the structure of a printed circuit board, which is known to be required, can be eliminated, and conductive through anisotropy. The bonding of the glue 30 to turn on the transparent plate 20 and the image sensing chip 10 does not require a conventional wire bonding operation, which not only effectively achieves the purpose of simplifying the manufacturing process, but also can effectively reduce production costs and material costs. Has the effect of small size. After understanding the packaging structure of the present invention, the steps and the packaging method for manufacturing the packaging structure using wafer-level packaging according to the present invention will be described in detail. Please refer to the second to ninth figures. First, as shown in the third and fourth figures, a wafer 1 and a transparent substrate 2 are provided.

Page 8 1228284 V. Description of the invention (5) Firstly, a plurality of image sensing units 10 ′ arranged in a matrix arrangement are arranged according to the required integrated circuit (1C) layout. Each image sensing unit 10 ′ includes a The photosensitive area 12 and the plurality of conductive bumps 14 on the periphery thereof, and a wider cutting path 16 is reserved; and the material of the transparent substrate 2 is usually glass or transparent plastic, and the transparent substrate 2 is formed of a plurality of transparent substrates The unit 20 corresponds to the image sensing units 10 ′, and each transparent substrate unit 20 is preset with a light-transmitting area 26 corresponding to the light-sensing area 12 below the transparent substrate unit 20, A circuit layout 22 is located on the surface of the light-transmissive region 26, and its circuit wiring corresponds to the conductive bumps 14 on the image sensing unit 10 ′. Next, as shown in the fifth figure, an anisotropic conductive adhesive 30 is formed on the lower surface of each transparent substrate unit 20 along the periphery of the light-transmitting region 26. It is preferable to use an anisotropic conductive tape. Place it on the periphery of the light-transmitting area 26; then use the alignment marks (not shown) provided on the surface of the wafer 1 and the transparent substrate 2 to align the transparent substrate 2 with the upper and lower sides of the wafer 1 As shown in the sixth figure, the transparent substrate 2 is positioned above the wafer, and each transparent substrate sheet = 20, corresponding to each of the image sensing units 10, up and down. At 3 o'clock, at 3 o'clock each transparent substrate unit 20 and the circuit layout 22 on the lower surface correspond to the conductive bumps 14 on each of the image sensing units 10, and form an electrical connection relationship of up and down conduction. After the steps of bonding wafer 1 and transparent substrate 2 are completed, then, as shown in Figure 7A, the units 10, 2, 20 on wafer 1 and transparent substrate 2 are performed as a unit. The method of cutting and slicing is to first turn the wafer j upside down with the I surface facing up, so as to divide the wafer 1 from the lower surface of the wafer 1 and cut the wafer 1 in accordance with the cutting path. Transparent substrate 2 is located

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^ 其 ^ Then, from the upper surface of the transparent substrate 2 to the lower surface, the translucent substrate 2 'is divided to form a plurality of image sensing elements, such as the seventh B = I ,,, L 卩 to complete the packaging process, Each image sensing element includes a structure as shown in FIG. 21, a transparent substrate unit 20 and a transparent substrate unit 20 bonded to it. I U

The P in the step is based on the different needs of the degree of packaging. After completing the cutting step ", it further includes the steps of assembling the thin film circuit and the mirror base. As shown in Figure 8, insert a flexible thin film circuit 40 The conductive contact 24 connected to the transparent substrate unit extends the thin film circuit 40 beyond the transparent substrate unit 20. The thin film circuit 40 is commonly referred to as a golden finger and serves as a medium for signal transmission between the circuit layout μ and external circuits; Or, as shown in the ninth figure = No ', a lens holder 50 with an optical lens 52 on the top is mounted on the transparent substrate unit 20' to complete the entire assembly process.

Therefore, the image sensing element provided by the present invention has a circuit layout corresponding to the conductive bumps on the image sensing chip by arranging a circuit layout on the lower surface of the transparent plate, without the need to provide a printed circuit board, and bonding through an anisotropic conductive adhesive. And the transparent board and the chip are turned on without the need to be familiar with wire bonding operations. Together with the aa round-level packaging method, it not only effectively achieves the purpose of simplifying the process, but also makes the image sensing element have the advantages of simple process. Achieve the substantial economic benefits of low cost and high yield. In addition, the wafer-level packaging method can ensure the high cleanliness of the image sensing chip to overcome the problem of conventional wafer contamination. The above is an explanation of the features of the present invention through the examples, and the purpose is to enable those skilled in the art to understand and implement the contents of the present invention, and not to limit it.

Page 10 1228284 V. Description of the invention (7) The patent scope of the present invention is determined. Therefore, all other equivalent modifications or modifications made without departing from the spirit disclosed by the present invention should still be included in the scope of patent application described below. . Description of drawing number: 1 wafer 10 'image sensing unit 1 4 conductive bump 20' transparent substrate unit 24 conductive contact 4 0 thin film circuit 52 optical lens 1 0 image sensing wafer 12 photosensitive area 2 transparent substrate 2 0 Transparent board 22 Circuit layout 26 Light transmission area 30 Anisotropic conductive adhesive 50 Mirror base

Page 11 1228284 Brief description of the drawings The first figure is a sectional view of the structure of the image sensing element of the present invention. FIG. 2A is a schematic diagram of an image sensing chip of an image sensing element of the present invention. FIG. 2B is a schematic diagram of a transparent plate of the image sensing element of the present invention. The third figure is a schematic diagram of a wafer provided by the present invention. The fourth figure is a schematic diagram of a transparent substrate provided by the present invention. The fifth to ninth figures are not intended for the steps of packaging the image sensing element according to the present invention.

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Claims (1)

1228284 VI. Scope of patent application-1 · A packaging structure of an image sensing element, comprising: an image sensing chip, a photosensitive region is provided on an upper surface thereof, and a plurality of conductive bumps are provided on the periphery of the photosensitive region; A transparent plate is disposed above the image sensing chip, and a circuit layout is provided on the lower surface of the transparent plate and at the periphery corresponding to the photosensitive area, and the circuit layout is formed on the conductive bumps. , The lower circuit relationship; and ~ an anisotropic conductive adhesive, which is arranged on the periphery of the photosensitive area, and the upper and lower corresponding circuit layouts and the conductive bumps are connected to conduct up and down to receive through the circuit layout The image signal sensed by the photosensitive area is output. Exposure 2. According to the package structure of the image sensing element described in item 丨 of the patent application, where 'the circuit layout on the lower surface of the transparent board includes a plurality of conductive contacts' is exposed on the image sensing chip In addition, it is used as a contact for the external output of the image signal. 3. The packaging structure of the image sensing element as described in item 1 of the scope of the patent application, wherein the size of the transparent plate is larger than that of the image sensing chip. 4. The packaging structure of the image sensing element according to item 1 of the scope of the patent application, wherein the circuit layout is further connected to a thin film circuit, and the thin film circuit extends beyond the transparent board as the circuit layout and a News from outside circuit 5 Tiger transmission media. 5. The packaging structure of the image sensing element according to item 1 of the scope of the patent application, wherein the material of the transparent plate is selected from one of glass and transparent plastic. Page 13 1228284 6. Scope of patent application 6. The packaging structure of the image sensing element as described in item 丨 of the scope of patent application, wherein a mirror mount is set on the transparent board. 7 .: A wafer-level packaging method for image sensing elements, including the following steps: providing two wafers and a transparent substrate, a plurality of image sensing units are provided on the upper surface of the wafer, and the transparent substrate A plurality of transparent substrate units are formed corresponding to the image sensing units, wherein a circuit layout is provided on the lower surface of each transparent substrate unit; and the transparent substrate and the Wafer bonding, so that the transparent substrate is positioned above the wafer, and the circuit layout of each transparent substrate unit corresponds to each of the image sensing units to form an electrical connection; and the wafer and The units on the transparent substrate cut the wafer and the transparent substrate as a unit, and divided into a plurality of image sensing elements. 8. The wafer-level packaging method for an image sensing element according to item 7 of the scope of the patent application, wherein each of the image sensing units includes: a photosensitive region; and a plurality of conductive bumps' located in the photosensitive region The periphery is electrically connected to the circuit layout on the transparent substrate through the conductive bumps. 9 · The wafer-level packaging method for an image sensing element as described in item 7 of the scope of patent application, wherein the cutting step is to first cut from the lower surface of the wafer to divide the wafer, and then from the transparent substrate The upper surface is cut to divide the transparent substrate. 10. The wafer-level packaging method of the image sensing element as described in item 7 of the scope of patent application, wherein after the step of cutting is completed, it further includes a step, '1228284 丨 丨 丨 丨 · — 6. Application scope of patent f Connect the -thin film circuit to the outer of the transparent substrate unit, so that the thin m circuit extends to the transmission medium. For the circuit layout and the signal of an external circuit]. For example, the 7th installation method of the 5th patent scope of Shenshen, the force of 6 + t in I, such as the wafer-level sealing of 70 pieces, is envy II! After the steps, a step is further included, in which a single woman and a mirror are seated on the transparent substrate unit. 12. The method for wafer-level encapsulation of an image sensing element as described in item 7 of the scope of patent application, wherein the material of the transparent substrate is selected from one of glass and transparent plastic. ^