TWI241688B - Photosensitive semiconductor device and method for fabrication the same - Google Patents

Photosensitive semiconductor device and method for fabrication the same Download PDF

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Publication number
TWI241688B
TWI241688B TW092124070A TW92124070A TWI241688B TW I241688 B TWI241688 B TW I241688B TW 092124070 A TW092124070 A TW 092124070A TW 92124070 A TW92124070 A TW 92124070A TW I241688 B TWI241688 B TW I241688B
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Taiwan
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light
semiconductor structure
patent application
sensitive
item
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TW092124070A
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Chinese (zh)
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TW200511509A (en
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Chien-Ping Huang
Chih-Ming Huang
Cheng-Hsu Hsiao
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Siliconware Precision Industries Co Ltd
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Abstract

A photosensitive semiconductor device and a method for fabricating the same are proposed, in which a tape carrier with an opening and a photosensitive chip having a plurality of stud bumps formed thereon are provided respectively, and a plurality of conductive elements coated on a first surface of the tape carrier extend inwardly to the opening, wherein the photosensitive chip accommodated within the opening is attached on the conductive elements by the corresponding stud bumps. Then, an encapsulant is formed on an opposite second surface of the tape carrier to encapsulate the opening, and a transparent unit is attached on the first surface of the tape carrier to cover another side of the opening. Finally, a lens holder is mounted on the first surface of the tape carrier, allowing the transparent unit positioned between a lens of the lens holder and the photosensitive chip, thereby providing a thin and low cost photosensitive semiconductor device.

Description

1241688 五、發明說明(1) 【發明所屬之技術領域】 本發明係關於一種光感式半導體結構及其製法,尤指 一種可適用於影像感測器的低成本光感式半導體結構及其 製法。 【先前技術】 隨著電子工業的進步與數位時代的來臨,各式電子產 品已曰漸朝向功效整合之趨勢發展,期能將多樣產品整合 於單一可攜式裝置上,以提升使用者之使用便利,進而突 破原有的空間限制,因此,對於例如電荷藕合元件 (Charge Coupled Device, CCD)或 CMOS感測器(CMOS Sensor )等配置於數位相機、光學掃描器、電腦視訊器(PC Camera)、玩具或指紋辨識器上的各類影像感測器(I m a g e Sensor )而言,如何將其整合於手機或個人數位助理(PDA) 等小體積可攜式裝置上,無疑是下一世代電子工業的挑 戰,特別係對手機等行動通訊裝置而言,其體積與厚度幾 乎每隔一段週期即呈倍數下降,故,如何將前述影像感測 器之半導體晶片封裝於此類小體積裝置上,同時復不致成 為其薄型化趨勢中的發展障礙,顯然為當前封裝技術所面 臨之一大挑戰。 習知上欲封裝此類光感式半導體晶片時,由於顧及此 類晶片需直接進行輻射或光訊號之接收,且亦須避免周遭 灰塵或濕氣進入該晶片周圍而損及其運作效能,故一般均 係如第1 1圖所示,而將此類晶片6 0接置於例如陶瓷 (C e r a m i c )基板(S u b s t r a t e )等習知承載件6 1上,復利用鮮1241688 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a light-sensitive semiconductor structure and a manufacturing method thereof, particularly a low-cost light-sensitive semiconductor structure suitable for an image sensor and a manufacturing method thereof. . [Previous technology] With the advancement of the electronics industry and the advent of the digital age, various electronic products have gradually developed towards the trend of functional integration. It is expected that various products can be integrated on a single portable device to enhance the use of users. Convenient, and then break through the original space constraints. Therefore, for example, Charge Coupled Device (CCD) or CMOS Sensor (CMOS Sensor) is configured in digital cameras, optical scanners, computer cameras (PC Camera) ), Toys, or fingerprint sensors on various types of image sensors (I mage Sensors), how to integrate them into small-sized portable devices such as mobile phones or personal digital assistants (PDAs) is undoubtedly the next generation The challenge of the electronics industry, especially for mobile communication devices such as mobile phones, is that the volume and thickness of the device decrease multiples at almost every interval. Therefore, how to package the semiconductor chip of the image sensor on such a small volume device At the same time, it will not become a development obstacle in its thinning trend, which is obviously one of the major challenges facing the current packaging technology. When it is customary to package such light-sensing semiconductor wafers, because such wafers need to receive radiation or optical signals directly, and they must also avoid the surrounding dust or moisture from entering the chip and impairing its operating performance, Generally, as shown in FIG. 11, such a wafer 60 is connected to a conventional carrier 61 such as a ceramic substrate, and reused fresh

17528矽品.ptd 第7頁 1241688 五、發明說明(2) --- 線62 (Wlre)電性連接該晶片6〇與承載件61,進而以一例 如j學玻璃(optlcal Glass)之透光材料63封蓋於上,形 成一盖子(Lld),以隔絕濕氣並發揮其透光功能,例如美 國專利第5, 0 3 7, 7 7 9號案、第5, 8 6 5, 9 3 5號案、第 ^ 9 2 3,9 5 8唬案,第6,0 34,4 2 9號案與第6,384,4 72號案 等,均揭示了包括陶瓷基座(Ceramic Leadless Chip Carner,CLCC)封裝件與塑膠基座(pUstic Leadless Chip Carrier, PLCC)封裝件在内的類似封裝結構。 因此’當此類影像感測封裝件欲配置成一影像感測模 組(Image Sensor Modul e)以整合於例如手機等可攜式裝 置時,均係如第1 2圖所示,將該封裝件之承載件6丨接置於 一與外界電性連接的膠片64 (Tape)上,復於該膠片64上 配置一具有透鏡66的透鏡座65 (Lens Holder),以組成一 手機用零件’而可整合於手機内部發揮接收光訊號與擷取 影像之功能’然而’如自第1 2圖觀之,可發現該模組中除 了必要的晶片6 0、透光材料6 3與透鏡座6 5之外,顯然復增 加了多餘的厚度與體積,致使該模組佔有空間過大,而成 為手機薄型化發展之一大障礙,諸如該封裝件上之銲線6 2 與承載件6 1設計,均將使該封裝件的尺寸難以縮小,亦使 該透鏡座6 5的高度隨之增高,或使該膠片6 4成為多餘之承 載件,增加了不必要之結構厚度,亟待進一步改良,例如 美國專利第5,8 2 1,5 3 2號案與第6,4 8 3,1 〇 1號案所揭示之影 像感測模組即均有類似之問題。 因此,美國專利第6,5 8 6,8 2 4號案復提出一改良方17528 silicon product.ptd page 7 1241688 V. Description of the invention (2) --- The wire 62 (Wlre) electrically connects the chip 60 and the carrier 61, and then transmits a light such as optical glass (optlcal glass). Material 63 is sealed on to form a lid (Lld) to isolate moisture and exert its light transmission function, such as US Patent No. 5, 0 3 7, 7 7 9 and 5, 8 6 5, 9 3 Case 5, Case No. 9 2 3, 9 5 8, Case No. 6, 0 34, 4 2 9 and Case No. 6,384, 4 72, etc., all revealed the inclusion of a ceramic base (Ceramic Leadless Chip Carner, A similar packaging structure including a CLCC) package and a pUstic Leadless Chip Carrier (PLCC) package. Therefore, when such image sensing packages are to be configured as an image sensor module to be integrated in a portable device such as a mobile phone, the package is shown in Figure 12 The carrier 6 is connected to a film 64 (Tape) electrically connected to the outside, and a lens holder 65 (Lens Holder) with a lens 66 is arranged on the film 64 to form a mobile phone part. It can be integrated in the mobile phone to play the function of receiving light signals and capturing images. However, as seen from Figure 12, it can be found that in addition to the necessary wafers 60, transparent materials 6 3 and lens holders 6 5 In addition, it is obvious that the extra thickness and volume have been increased, causing the module to occupy too much space, which has become a major obstacle to the thin development of mobile phones, such as the design of the welding wire 6 2 and the carrier 6 1 on the package. It will make it difficult to reduce the size of the package, and also increase the height of the lens holder 65, or make the film 64 an unnecessary carrier, increasing unnecessary structural thickness, and further improvement is urgently needed, such as the US patent Cases 5, 8 2 1, 5 3 2 and The disclosed 1 6,4 8 3,1 billion text Movies i.e., have similar problems of image sensing module. Therefore, U.S. Patent No. 6,5 8 6, 8 2 4 proposed an improved method

17528矽品.ptd 第8頁 1241688 五、發明說明(3) 法,其係如第 將光感式晶片 者’復於该晶 而以封裝膠體 經由該透光玻 錫球7 6而與外 前述封裝模組 7 〇佔有之厚度 局空間,仍將 行晶片7 2電性 展趨勢相左, 良率與電性連 制。 基板7 0中開設一孔洞7 1 1 3圖所示’ 以 於 7 2容設於該孔洞71中並以銲線7 3電性連接兩 片7 2之作用表面72 a上接置,透光玻璃74, 7 5包覆形成一封裝件,此設計中該晶片7 2可 璃7 4接收外界光訊號,並藉由該基板7 0上的 界(例如手機零件)電性連接,確可部分縮減 之厚度,惟此一設計僅係縮減了晶片承載件 ,對於銲線7 3佈局上所形成之線弧高度與佈 造成體積上的多餘擴充,再者,以銲線7 3進 連接亦與電子工業上高積集度與高良率之發 其佈線密度非但具有一定之上限,且其佈線 接品質亦不若其他電性連接方式般易於控 •種以 圖所示 開設— 塊 8 la、 中’並 8 2與該 性連接 成形, 連接關 佔有之 導電凸塊 ’係先於 孔洞,復 8 1 b的透 藉該透光 晶片8 3, 該透光片 達至該晶 係;相較 二间,同 美國專利公開號 (Bump)電性 一彈性印刷 製備一表面 光片8 2,以 片8 2上的第 進而藉由該 8 2與印刷電 片8 3、透光 於習知技術 時復可提# 第2 0 0 2/ 0 1 7 1 0 3 1號案即係揭示 連接晶片之封裝模組,如第1 ^ 電路板 80 (Flexible PCB)上 形成有線路7 9之佈局與導電凸 將光感式晶片8 3容設於該孔洞 一凸塊8 1 a電性連接該透光片 透光片8 2上之第二凸塊8 1 b電 路板8 0,並以封裝膠體8 4封裝 片82與印刷電路板80間的電性 ’此設計確可減省銲線線弧戶彳 6亥晶片8 3上的I / 〇密度,充分17528 silicon product.ptd page 8 1241688 V. Description of the invention (3) method, which is the same as the first method of recovering the light-sensitive chip to the crystal and encapsulating the colloid through the transparent glass tin ball 7 6 The thickness of the space occupied by the package module 〇 is still inconsistent with the trend of the electrical development of the chip 720, and the yield and the electrical continuity. A hole 7 1 1 3 is opened in the substrate 70 as shown in the figure, so that the hole 71 is accommodated in the hole 71 and is electrically connected to the two active surfaces 72 a of the 2 with a bonding wire 7 3. The glass 74, 7 5 is covered to form a package. In this design, the chip 7 2 can receive external light signals, and is electrically connected through the boundary (such as a mobile phone part) on the substrate 70. Reduced thickness, but this design only reduces the wafer carrier. The height of the line arc formed on the layout of the bonding wire 7 3 and the cloth cause unnecessary expansion in volume. Furthermore, the connection with the bonding wire 7 3 is also connected with In the electronics industry, with high accumulation and high yield, the wiring density not only has a certain upper limit, but also its wiring quality is not as easy to control as other electrical connection methods. • The kind is opened as shown in the figure. Block 8 la, medium 'Band 8 2 is connected to this property and connected to the conductive bumps possessed by the connection' is preceded by the hole, and the 8 1 b is transmitted through the transparent wafer 8 3, and the transparent sheet reaches the crystal system; At the same time, the same as the US patent publication (Bump) electrical-elastic printing to prepare a surface light sheet 82, The 8th and the 2nd printed printed film 8 on the film 8 3, and the transparent light can be mentioned in the conventional technology ## 2 0 0 2/0 1 7 1 0 3 1 case is to reveal the connection chip For a package module, for example, a circuit board 80 (Flexible PCB) is formed with a layout of lines 7 9 and conductive bumps. A photosensitive chip 8 3 is housed in the hole and a bump 8 1 a is electrically connected to the transparent The second bump 8 1 b on the light-transmitting sheet 8 2 and the circuit board 80, and the electrical properties between the encapsulation gel 8 4 and the encapsulation sheet 82 and the printed circuit board 80 'this design can indeed reduce the welding wire arc I / 〇 density on Toyo 6 Hai wafer 8 3, full

12416881241688

1241688 五、發明說明(5) 彈性電路板8 71241688 V. Description of the invention (5) Flexible circuit board 8 7

Bump),並藉該金質凸塊86接置扒一 (Flenble Circuit B〇ard)的電、一 (Ternnnal),以令該晶片85電性 ^ 87a 上,並使該晶片85可經由該彈性ΐ :至f彈性電路J严 其上方的透光板88接收光訊號;=π板87之孔洞與覆盍於 8 8黏接於該彈性電路板8 7上^在"又计中僅係將該透光片 綠攸佑Α 破叮n夂 而不需於該透光片8 8上進行 線路佈局,確可降低制藉夕占士 +八所π : 成本與難度,惟當其於該晶片 8 5上开/成至貝凸塊8 6時,仍需箱 7…i , 才 W而預先於該晶片8 5之對應銲墊 位置形成至少兩層的UBM結構層,而無法再行降低此部分 =^本,且該彈性電路板87僅係用以作為電性連接之傳導 η貝,其,面上並未佈設有複雜的導電跡線,致使該封裝 件仍需如第1 5圖所示,於完成封裝後藉該彈性電路板8 7之 兩端接置於一硬質印刷電路板89上,並使該晶片85容設於 該硬質印刷電路板89所開設之凹槽89a (N〇tch)中,以令 該晶片85所接收之光訊號可藉該金質凸塊86、彈性電路板 8 7、硬質印刷電路板8 9而傳遞至外界,非但造成多餘的訊 號傳輸路徑而影響電性,且該硬質印刷電路板8 9之材料與 重量亦不適用於講究輕薄短小的手機裝置。 美國專利第6,5 4 8,7 5 9號案所揭示之結構亦與前述技 術極為接近,其差別在於,該結構係如第丨6圖所示將晶片 9 0以導電凸塊9 1接置於一基板9 2導電跡線9 3的突出部9 3 a (T a b ),該突出部9 3 a係突出於該基板9 2之孔洞9 2 a,且該 晶片9 〇係容設於該孔洞9 2 a中,並藉一透光片9 4覆蓋且接 觸該晶片9 0之作用表面9 0 a,惟此一結構最大之缺點在於Bump), and the gold bump 86 is used to connect the Flenble Circuit B0ard and Ternnnal, so that the chip 85 is electrically on 87a, and the chip 85 can pass through the elasticity. ΐ: To the flexible circuit J, the light transmitting plate 88 above it receives the light signal; the hole of the π plate 87 and the cover plate 8 are glued to the elastic circuit board 8 7 ^ " Breaking the light-transmitting film Luyouyou Α without breaking the circuit layout on the light-transmitting film 8 8 can indeed reduce the cost and difficulty of making the borrower + Hachijo π: cost and difficulty. When the wafer 8 5 is opened / formed to the bump 8 86, boxes 7 ... i are still needed, and at least two UBM structure layers are formed in advance at the corresponding pad positions of the wafer 8 5 and cannot be lowered. This part = ^ copy, and the elastic circuit board 87 is only used as a conductive η shell for electrical connection. Its surface is not provided with complex conductive traces, so that the package still needs to be as shown in Figure 15 As shown, after the package is completed, the two ends of the flexible circuit board 87 are connected to a rigid printed circuit board 89, and the chip 85 is accommodated in the rigid printed circuit board 89. In the slot 89a (Notch), the light signal received by the chip 85 can be transmitted to the outside by the gold bump 86, the flexible circuit board 87, and the hard printed circuit board 89, which not only causes unnecessary signals The transmission path affects the electrical properties, and the material and weight of the hard printed circuit board 89 are not suitable for light, thin and short cell phones. The structure disclosed in U.S. Patent No. 6,5 4 8,7 5 9 is also very close to the aforementioned technology. The difference is that the structure connects the wafer 90 to the conductive bump 9 1 as shown in FIG. 6 The protrusion 9 3 a (T ab) is placed on a substrate 9 2 conductive trace 9 3. The protrusion 9 3 a protrudes from the hole 9 2 a of the substrate 92 and the wafer 90 is accommodated in The hole 9 2 a is covered with a light-transmitting sheet 9 4 and contacts the active surface 9 0 a of the wafer 90. However, the biggest disadvantage of this structure is that

17528矽品.ptd 第11頁 1241688 〜 ' ~ ------—______ 五、發明說明(6) 其所使用之承載件為一般習知之陶瓷、^或FR4基板92, 其材料成本、重量與厚度均較前述之美國專利公開號第 2 0 0 2 / 0 0 9 6 7 3 1號案所使用的彈性電路板8 7為f ,更不符人 手機裝置之需求:且該類基板92材料於製造;J較不易 切割’亦將間接導致其量產成本偏高’而無法執行批次之 製造;同時,此一結構係直接將該透光片94貼覆於該晶片 90之作用表面90a上,其目的雖係用以避免濕氣或灰塵侵 入該晶片90之感光區90b,惟該透光片94卻反而可能因其 表面平整度不佳而損及該感光區9 0 b之表面,破壞該感光 式晶片9 0的效能。 綜上所述,可知相關技術發展至今,仍難有一可完全 符合手機等可攜式裝置之需求的封裝技術,以將影像擷取 等功能整合入未來更為薄型化之手機元件中,若根據前述 習知技術分析之’當知若能開發出一種不以基板為承載 件、不以銲線為電性連接方式、同時復無需形成UBM結構 層且無需於透光材料上進行佈線、甚而不致因其封裝而增 加多餘體積的半導體結構,則當可一併解決前述所有問 題,進而令可攜式裝置的元件整合技術邁入新一世代;反 之,若現有封裝技術始終仍無法突破前述瓶頸,則當前電 子工業看似永無止盡的薄型化發展趨勢恐怕亦將有停滯之 虞,而勢難再行改善突破。 因此,如何開發一種可運用於可攜式裝置的光感式半 導體結構及其製法,以降低習知技術之成本、質量與體 積,進而可大幅量產’且無需對其晶片進行多餘之封裝,17528 硅 品 .ptd Page 11 1241688 ~ '~ ---------- ______ 5. Description of the invention (6) The carrier used is a commonly known ceramic, ^ or FR4 substrate 92, and its material cost and weight The thickness of the flexible circuit board 8 7 used in the aforementioned US Patent Publication No. 2 0 2/0 0 9 6 7 3 is f, which is more inconsistent with the requirements of human mobile phone devices: and the substrate 92 material In manufacturing; J is less easy to cut, which will indirectly lead to high production costs and cannot perform batch manufacturing; at the same time, this structure directly pastes the transparent sheet 94 on the active surface 90a of the wafer 90 In the above, although the purpose is to prevent moisture or dust from invading the photosensitive area 90b of the wafer 90, the light-transmitting sheet 94 may instead damage the surface of the photosensitive area 90b due to poor surface flatness. Destroy the efficiency of the photosensitive chip 90. In summary, it is known that until the development of related technologies, it is still difficult to have a packaging technology that can fully meet the needs of portable devices such as mobile phones to integrate functions such as image capture into thinner mobile phone components in the future. The aforementioned conventional technical analysis of 'when it is known if one can develop a method that does not use a substrate as a carrier and does not use a bonding wire as an electrical connection, at the same time, does not need to form a UBM structure layer, and does not require wiring on a light-transmitting material, or even The semiconductor structure that adds extra volume due to its packaging will solve all the problems mentioned above, and then bring the component integration technology of portable devices into a new generation. On the contrary, if the existing packaging technology still cannot break through the aforementioned bottlenecks, Then the current seemingly endless trend of thinning in the electronics industry is likely to stagnate, and it is difficult to improve and break through. Therefore, how to develop a photosensitive semiconductor structure and its manufacturing method that can be applied to portable devices to reduce the cost, quality, and volume of conventional technologies, and then enable mass production ’without the need for extra packaging of its chips.

17528矽品· Ptd 第12頁 1241688 五、發明說明(7) 並避免濕氣損及該晶片,確為封裝研發領域所需迫切面對 的課題。 【發明内容】 因此,本發明之一目的即在於提供一種低成本的光感 式半導體結構及其製法。 本發明之復一目的在於提供一種小體積且質量輕盈的 光感式半導體結構及其製法。 本發明之另一目的在於提供一種可運用於可攜式裝置 的光感式半導體結構及其製法。 本發明之再一目的在於提供一種無需封裝半導體晶片 的光感式半導體結構及其製法。 本發明之又一目的在於提供一種可避免濕氣損及半導 體晶片的光感式半導體結構及其製法。 本發明之且復一目的在於提供一種可穩固定位半導體 晶片的光感式半導體結構及其製法。 本發明之且另一目的在於提供一種無需使用高成本之 基板的光感式半導體結構及其製法。 本發明之且再一目的在於提供一種無需製作高成本之 多層凸塊底部金屬化(UBM)結構層的光感式半導體結構及 其製法。 本發明之且又一目的在於提供一種佈線容易且利於量 產的光感式半導體結構及其製法。 為達前述及其他目的,本發明所提供之光感式半導體 結構,係包括:一膠片載具,係具有一第一表面、相對之17528 Silicon Products · Ptd Page 12 1241688 V. Description of the Invention (7) Avoiding moisture damage and the chip is indeed an urgent issue in the field of package R & D. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a low-cost light-sensing semiconductor structure and a method for manufacturing the same. Another object of the present invention is to provide a light-weight and light-weight semiconductor structure having a small volume and a method for manufacturing the same. Another object of the present invention is to provide a photosensitive semiconductor structure which can be applied to a portable device and a method for manufacturing the same. Still another object of the present invention is to provide a light-sensitive semiconductor structure without manufacturing a semiconductor wafer and a method for manufacturing the same. Still another object of the present invention is to provide a light-sensitive semiconductor structure capable of preventing moisture damage and a semiconductor wafer and a method for manufacturing the same. Another object of the present invention is to provide a photosensitive semiconductor structure capable of stably holding a semiconductor wafer and a method for manufacturing the same. Another object of the present invention is to provide a photosensitive semiconductor structure and a method for manufacturing the same without using a high-cost substrate. Yet another object of the present invention is to provide a light-sensitive semiconductor structure and a method for manufacturing the same without the need to produce a high-cost multilayer bump bottom metallization (UBM) structure layer. Yet another object of the present invention is to provide a light-sensitive semiconductor structure with easy wiring and favorable for mass production, and a method for manufacturing the same. To achieve the foregoing and other objectives, the light-sensitive semiconductor structure provided by the present invention includes a film carrier having a first surface, and

17528矽品.ptd 第13頁 1241688 五、發明說明(8) 第二表面與貫穿該膠片載具的開口 ,且該第一表面上係敷 設有多數延伸至該開口中的導電件;具有一作用表面與一 非作用表面的光感式晶片,該作用表面上係形成有多數個 導電凸塊(S t u d B u m p ),以藉該導電凸塊分別接合於該導 電件上,並令該光感式晶片容設於該膠片載具之開口中; 一透光單元,係接置於該膠片載具之第一表面上以封蓋住 該開口; 一封裝膠體,係包覆於該膠片載具之部分第二表 面上以封蓋住該開口;以及一具有透鏡(L e n s )的透鏡載 具,係接置於該膠片載具之第一表面上,而令該透光單元 位列於該透鏡與該光感式晶片之作用表面間。 本發明所提供之光感式半導體結構之製法,其步驟係 包括:製備一膠片載具,該膠片載具係具有一第一表面、 相對之第二表面與貫穿該膠片載具的開口 ,且該第一表面 上係敷設有多數延伸至該開口中的導電件;製備一光感式 晶片,該光感式晶片係具有一作用表面與一非作用表面; 於該光感式晶片之作用表面上形成多數個導電凸塊(Stud Bump);藉該導電凸塊而將該光感式晶片接合於該膠片載 具之導電件上^以令該光感式晶片容設於該膠片載具之開 口中;於該膠片載具之部分第二表面上包覆一封裝膠體, 以封蓋住該開口;於該膠片載具之第一表面上接置一透光 單元,以封蓋住該開口;以及於該膠片載具之第一表面上 接置一透鏡載具,以令該透光單元位列於該透鏡載具之透 鏡(Lens)與該光感式晶片之作用表面間。 前述導電凸塊係為一藉由銲線(W i r e Β ο n d i n g )技術所17528 硅 品 .ptd Page 13 1241688 V. Description of the invention (8) The second surface and the opening through the film carrier, and the first surface is provided with a plurality of conductive members extending into the opening; it has a function Surface and a non-active surface light-sensitive chip, a plurality of conductive bumps (Stud Bump) are formed on the active surface, so that the conductive bumps are respectively connected to the conductive member, and the light sense is formed. The wafer is accommodated in the opening of the film carrier; a light-transmitting unit is connected to the first surface of the film carrier to cover the opening; a sealing gel is coated on the film carrier A part of the second surface is used to cover the opening; and a lens carrier having a lens (L ens) is connected to the first surface of the film carrier, so that the light transmitting unit is positioned in the Between the lens and the active surface of the photosensitive wafer. The method for manufacturing a light-sensitive semiconductor structure provided by the present invention includes the steps of preparing a film carrier having a first surface, an opposite second surface, and an opening penetrating the film carrier, and The first surface is provided with a plurality of conductive members extending into the opening; a light-sensitive wafer is prepared, and the light-sensitive wafer has an active surface and a non-active surface; on the active surface of the light-sensitive wafer A plurality of conductive bumps (Stud Bump) are formed on the substrate; the light-sensitive wafer is bonded to the conductive member of the film carrier by the conductive bumps ^ so that the light-sensitive chip is accommodated in the film carrier. In the opening; covering a part of the film carrier with a sealing gel to cover the opening; and placing a light transmitting unit on the first surface of the film carrier to cover the opening And placing a lens carrier on the first surface of the film carrier so that the light transmitting unit is positioned between the lens (Lens) of the lens carrier and the active surface of the photosensitive wafer. The aforementioned conductive bumps are made by a wire bonding (W i r e Β ο n d i n g) technology.

17528石夕品.ptd 第14頁 1241688 五、發明說明(8) 成形之金質凸塊,其係將金線銲結於該光感式晶片之銲墊 上,並拉伸該金線而使其斷裂,以快速形成一低成本的球 狀凸塊,並藉操作簡易的膠片自動接合(TAB)之内導腳銲 結技術(I LB ),將該多數個凸塊熱壓接合於其所對應的多 數導電件上。 前述之導電件係為以銅材料所蝕刻而成之内導腳,該 光感式晶片係可藉該導電凸塊而與該内導腳電性連接,進 而藉該膠片載具上之外導腳而電性連接至外界;此外,該 透光單元係為一玻璃片、紅外線濾光片(I R F i 11 e r )、或 一塗佈於該膠片載具上的透光材料層,而該封裝膠體則係 可部份或完全包覆於該光感式晶片之非作用表面上,以密 封該膠片載具之置晶穴。 同時,該光感式晶片之作用表面上係具有一感光區, 其係為一影像感測器(I m a g e S e n s 〇 r ),而可接收經由該透 鏡與透光單元聚焦進入該感光區的光訊號,並於訊號轉換 後經該導電凸塊將該訊號傳送至該膠片載具而至外界;該 光感式晶片亦可為一發光二極體(LED),以發送光訊號而 經該透光單元與該透鏡輸出至外界。 因此,本發明即係藉由前述之膠片載具、以銲線成形 之導電凸塊、與膠片内導腳鲜結技術,而製得一低成本且 薄型化的特殊半導體結構,並可搭配該透鏡載具以配置於 手機等微型可攜式裝置中,進而解決習知結構之成本與體 積過大等問題,充分符合將各式電子元件相互整合於一體 的未來發展趨勢。17528 Shi Xipin.ptd Page 14 1241688 V. Description of the invention (8) The formed gold bumps are bonded with gold wires to the pads of the light-sensitive wafer, and the gold wires are stretched to make them Break to quickly form a low-cost spherical bump, and by the easy-to-use automatic film bonding (TAB) inner guide pin bonding technology (I LB), the plurality of bumps are thermocompression bonded to their corresponding counterparts On most conductive parts. The aforementioned conductive member is an inner guide pin etched from a copper material, and the light-sensitive chip can be electrically connected to the inner guide pin by the conductive bump, and then by the outer guide on the film carrier. The light transmission unit is electrically connected to the outside; in addition, the light transmission unit is a glass sheet, an infrared filter (IRF i 11 er), or a light transmission material layer coated on the film carrier, and the package The colloid can be partially or completely covered on the non-active surface of the photosensitive chip to seal the cavity of the film carrier. At the same time, the light-sensitive chip has a photosensitive area on the active surface, which is an image sensor (Image Sensor), and can receive the light entering the photosensitive area through the lens and the light-transmitting unit. A light signal, and the signal is transmitted to the film carrier to the outside through the conductive bump after the signal is converted; the light-sensitive chip may also be a light-emitting diode (LED) to send the light signal and pass through the The light transmitting unit and the lens are output to the outside. Therefore, the present invention is to produce a low-cost and thin special semiconductor structure by using the aforementioned film carrier, conductive bumps formed by bonding wires, and the technology of in-film guide pins. The lens carrier is arranged in a miniature portable device such as a mobile phone, thereby solving the problems of cost and volume of the conventional structure, which fully meets the future development trend of integrating various electronic components into one.

17528获品.ptd 第15頁 1241688 五、發明說明(10) 【實施方式】 以下係藉由特定的具體實例說明本發明之實施方式, 熟悉此技藝之人士可由本說明書所揭示之内容輕易地瞭解 本發明之其他優點與功效。本發明亦可藉由其他不同的具 體實例加以施行或應用,本說明書中的各項細節亦可基於 不同觀點與應用,在不悖離本發明之精神下進行各種修飾 與變更。 第1 A至1 I圖係本發明較佳實施例之製法流程圖,首 先,係先如第1A圖所示製備一膠片載具10 (Tape Carrier),其係為習知膠片載具式封裝件(Tape Carrier Package, TCP)中所使用之膠片10,該膠片10中央係具有 一置晶穴1 1,且其表面係敷設有多數個内導腳1 2 ( Inner Lead)與外導腳(Outer Lead)(未圖示),該内導腳1 2上係 先預置有一銲錫層13 (Pre-Solder),且該内導腳12係形 成於該置晶穴1 1邊緣且係延伸至該置晶穴1 1中而懸空;接 著,如第1 B圖,製備一光感式晶片2 0,其尺寸係較該膠片 載具1 0之置晶穴1 1為小,且該晶片20係可為一例如CCD或 CMOS感測器之影像感測器,其作用表面2 1上係具有一感光 區2 2,而可用以接收輻射或光訊號;再如第1 C圖所示,於 該晶片20作用表面21周圍之銲墊23 (Bond Pad)位置,以 銲線(W i r e Β ο n d )技術直接形成多數個突出凸塊2 4 ( S t u d Bump),並令該多數個突出凸塊24對應於該膠片載具1 0上 之内導腳1 2位置;復如第1 D圖所示,利用内導腳銲結技術 (Inner Lead Bonding, ILB)而以集體接合(Gang Bond)方17528 得 品 .ptd Page 15 1241688 V. Description of the Invention (10) [Embodiments] The following is a description of specific embodiments of the present invention. Those skilled in the art can easily understand the contents disclosed in this specification. Other advantages and effects of the present invention. The present invention can also be implemented or applied through other different specific examples, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention. 1A to 1I are flowcharts of the manufacturing method of the preferred embodiment of the present invention. First, a film carrier 10 (Tape Carrier) is prepared as shown in FIG. 1A, which is a conventional film carrier package. The film 10 used in the Tape Carrier Package (TCP) has a cavity 1 1 in the center of the film 10, and a plurality of inner guide feet 12 (Inner Lead) and outer guide feet ( Outer Lead (not shown), a solder layer 13 (Pre-Solder) is preset on the inner guide pin 12 and the inner guide pin 12 is formed on the edge of the cavity 1 1 and extends to The crystal cavity 11 is suspended in the cavity; then, as shown in FIG. 1B, a light-sensitive wafer 20 is prepared, the size of which is smaller than that of the crystal cavity 11 of the film carrier 10, and the wafer 20 It can be an image sensor such as a CCD or CMOS sensor, and its active surface 21 has a photosensitive area 22, which can be used to receive radiation or light signals; as shown in Figure 1C, The positions of the bonding pads 23 (bond pads) around the active surface 21 of the wafer 20 directly form a plurality of protruding bumps 2 4 (S tud bumps) by a wire bonding (Wire Β ο nd) technology, and The plurality of protruding bumps 24 correspond to the positions of the inner guide pins 12 on the film carrier 10; as shown in FIG. 1D, the inner guide pin bonding technology (Inner Lead Bonding, ILB) is used to collectively Gang Bond

17528石夕品.ptd 第16頁 1241688 五、發明說明(11) 式將該晶片2 0藉由該多數個突出凸塊2 4分別熱壓接合 (Thermo-compression Bonding)至該多數個内導腳1 2之預 置銲錫1 3上,以令該晶片2 0容設於該置晶穴1 1中並受該多 數内導腳1 2之支撐而懸吊其中,並使該晶片2 0可藉該突出 凸塊2 4而電性連接至該膠片1 〇上表面的内導腳1 2,進而藉 該外導腳電性連接至外界,此時,該晶片2 〇上之感光區2 2 係露出於該置晶穴1 1中央;接著,再如第丨£圖,以一封裝 膠體3 0包覆該晶片2 0之非作用表面2 5周圍而封蓋於該晶片 2 0與該膠片1 〇間,而可定位該晶片2 0,並令該封裝膠體3 0 填覆於該多數個突出凸塊2 4周圍以確保其接合穩固;復如 第1 F圖所示,藉一膠黏劑3 1而將一面積較該置晶穴2 0為大 之透光片3 2黏接於該膠片載具1 〇上,使該透光片3 2封蓋於 該晶片2 0上,以避免該晶片2 0之作用表面2 1外露,並可於 輻射或光訊號進入該晶片2 0之感光區2 2前發揮濾光效果, 同時,由於該透光片3 2之周圍係黏置於該膠片載具! 〇上, 故亦可作為該晶片2 0之水平定位底座,以進一步穩固該晶 片2 0與該多數懸空於置晶穴1 1中的内導腳1 2,其中,該透 光片3 2之材料係可選用任意可透光之材料,而可製成一板 狀的光學玻璃片或一紅外線濾光片(I r F」i t e r )等。 接著,可再如第1 G圖所示,而於膠片載具1 〇上配置一 透鏡座40 (Lens Holder),以令該透鏡座4 0位列於該透光 片3 2上方,並使該透鏡座4 0之螺旋孔4 1 ( T h r e a d i n g Η ο 1 e )正對於違透光片3 2之中央位置,再如圖所示於該膠 片載具10之相對側配置一晶片蓋42 (Chip Cover),以與17528 石 夕 品 .ptd Page 16 1241688 V. Description of the invention (11) The chip 20 is thermo-compression bonded to the plurality of inner guide pins by the plurality of protruding bumps 2 4 respectively. 1 2 of the preset solder 13 so that the chip 20 is housed in the cavity 13 and suspended by the majority of the inner guide pins 12 and the chip 20 can be borrowed The protruding bump 24 is electrically connected to the inner guide pin 12 on the upper surface of the film 10, and then is electrically connected to the outside by the outer guide pin. At this time, the photosensitive region 2 2 on the wafer 20 is Exposed in the center of the cavity 1 1; then, as shown in the figure, a non-active surface 2 5 of the wafer 20 is covered with a sealing gel 30 to cover the wafer 20 and the film 1 〇, and the chip 20 can be positioned, and the encapsulating gel 30 can be filled around the plurality of protruding bumps 24 to ensure that the bonding is stable; as shown in FIG. 1F, borrow an adhesive 3 1 and a transparent sheet 3 2 having a larger area than the cavity 20 is bonded to the film carrier 10, and the transparent sheet 32 is sealed on the wafer 20 to avoid The chip 2 The working surface of 0 is exposed, and it can play a filtering effect before the radiation or light signal enters the photosensitive area of the chip. At the same time, the periphery of the light transmitting sheet is adhered to the film carrier. !! 〇, so it can also be used as the horizontal positioning base of the wafer 20 to further stabilize the wafer 20 and the majority of the inner guide pins 12 suspended in the crystal cavity 11, wherein the light-transmitting sheet 32 The material is selected from any light-transmissive material, and can be made into a plate-shaped optical glass sheet or an infrared filter (I r F ”iter). Then, as shown in FIG. 1G, a lens holder 40 (Lens Holder) can be arranged on the film carrier 10, so that the lens holder 40 is positioned above the transparent sheet 32, and The spiral hole 4 1 (T hreading ο ο 1 e) of the lens holder 40 is directly opposite the central position of the translucent sheet 3 2, and a wafer cover 42 is disposed on the opposite side of the film carrier 10 as shown in the figure ( Chip Cover) with

Π528石夕品.ptd 第17頁 1241688 五、發明說明(12) ' 〜------ 座纖接並密封肖晶片2G,$而保護該晶片2〇之非 作用表面2 5與增進整體握έ日々μ % ^ ^ ^ 44 (Lens)^ ^ ^Λ; 41 # ^ 1 ^ ? f " 螺旋孔41中,以視其與該晶片2°間之焦距 调整而決定其旋入位w , 發明之低成本、低功至 即如帛11圖所示,完成本 構,幻系ί ί 7 Γ +、小體積且質輕的光感式半導體結 植,^可祯传二:配入微型可攜式裝置中的影像感測器模 組,亦可視使用時 切,並可進一步利0 :對遠易於切割之膠片10進行裁 步進行大量的批次製;;膝片載具10易於切割之特性,而同 前述製法中邱·、+、 示,本實施例中所片載具10的上視圖係如第2圖所 聚脂(Polyster)材4t膠片係為一聚醯亞氨(P〇 1 Y m i de )或 在35至70 mm間,/甘所製成之薄型膠片,該膠片之寬度約 置晶穴1 1之尺寸則相"中央係開設有一方形置晶穴1卜該 置晶穴1 1之面積至+所使用之光感式晶片2〇而定,務使該 數内導腳1 2與外導二,大於该晶片2 0之面積,其次,該多 其寬度約在18至35糸以銅箔(Cu 1 )蝕刻加工而成, 7 0 0個I/O接腳,读m間,且其佈線密度最高可達至約 與材料或製造成本:!用之銲線技術為高,而其佈線難度 導腳上係預置有銲:延較覆晶式技術來得低;㈤時’該内 至該置晶穴(Pre-solder),該内導腳12延伸 過短而形成晶片2。:;部12a長度需门經主特別設計’既不可 擾光訊號之傳送Λ置上之困難’同時亦不宜過長以致干Π528 石 夕 品 .ptd Page 17 1241688 V. Description of the invention (12) '~ ------ The seat fiber connects and seals the Shaw chip 2G, and protects the non-active surface 25 of the chip 20 and enhances the whole Hand holding date μ% ^ ^ ^ 44 (Lens) ^ ^ ^ Λ; 41 # ^ 1 ^? F " In the spiral hole 41, the screwing position is determined by the focal distance adjustment between 2 ° and the wafer w The low cost and low power of the invention are as shown in Figure 11 and the constitutive structure is completed. The magic system is ί 7 Γ +, a small and light-weight light-sensitive semiconductor is implanted. The image sensor module in the portable device can also be cut when used, and can be further beneficial. 0: Cut the film 10 that is far easier to cut and perform a large number of batches; The knee carrier 10 is easy to cut As shown in Qiu ·, +, and in the foregoing manufacturing method, the top view of the carrier 10 in this embodiment is a polysterimide (Pt) material of 4t film as shown in FIG. 2 as a polyimide (P 〇1 Y mi de) or between 35 and 70 mm, a thin film made of / gan, the width of the film is about the size of the crystal cavity 1 1 and the size " the central system has a square cavity 1 The area of the crystal cavity 11 is set to + the light-sensitive chip 20 used, so that the number of the inner guide pin 12 and the outer guide 2 is larger than the area of the wafer 20, and secondly, the width is about It is made of copper foil (Cu 1) by etching from 18 to 35 糸, 700 I / O pins, read between m, and its wiring density can reach up to about the material or manufacturing cost :! The wire bonding technology used is high, and the wiring difficulty is preset with soldering on the guide pin: the extension is lower than the flip-chip technology; when the 'inside to the pre-solder', the inner guide pin 12 extends too short to form wafer 2. : The length of the part 12a needs to be specially designed by the host. ‘Non-disturb the transmission of the light signal and the difficulty in placing it’. At the same time, it should not be too long to dry.

1241688 五、發明說明(13) ^ it 晶片20作用表面21上之突出凸塊 二Γ/ ί 質凸塊,惟其材料亦可為其他例 ϋ 凸塊2樣利用鲜線技 術而以一般銲線機(Wire Bonder)製成,其係如第3A圖所 不,先於一以耐尚溫材料製成之毛細管狀接合工具5 〇 (Capillary)中置入一金線51,復藉電子點火(Spark1241688 V. Description of the invention (13) ^ it The protruding bumps on the active surface 21 of the wafer 20 are Γ / ί quality bumps, but the material can also be other examples. The bumps 2 use fresh wire technology and a general wire bonding machine. (Wire Bonder), as shown in Figure 3A, a gold wire 51 is placed in a capillary bonding tool 50 (Capillary) made of high temperature resistant material, and the electronic ignition (Spark)

Discharge)技術而於該金線51末端燒結出一球體52;再如 弟3 B圖’將该球體5 2壓置於該晶片2 〇之預定銲墊2 3上,以 令該球體52受壓變形’並利用超音波焊接(ultras〇nic W e 1 d i n g )技術令其鍀結於該銲墊2 3上;復如第3 C圖,拉舉 該接合工具5 0以令該球體5 2受該金線5 1之拉動而延伸變 形’並出現一圓錐突出部53 (Conical Protrusion);最 後,如第3 D圖,持續拉舉該接合工具5 0而使該金線5 1與該 球體5 2分離斷裂,此時該球體5 2即為一形成於該銲墊2 3上 的導電突出凸塊2 4 ;此外,該突出凸塊2 4由於受到該金線 5 1的拉伸,故其表面將如圖所示具有一殘留突起端5 4 (Wire Tai 1 ),故亦可如第3E圖般於形成所有凸塊24後, 於該晶片2 0上進行一水平壓合(C 〇 i n e d )步驟,以令該多數 凸塊24上均形成一水平接合表面55 (Flatter Top Surface),並令每一凸塊2 4具有均句之高度,其高度或直 徑約可達至7 5 // m之精度。 是故,藉由此一銲線技術,即可藉由簡單之銲線設備 而製成多數凸塊2 4,其量產速度約可達至每秒形成1 2個凸 塊2 4之多,且各凸塊2 4之間距(P i t c h )亦可小於1 0 0 # mDischarge) technology and a spheroid 52 is sintered at the end of the gold wire 51; then, as shown in Figure 3B, the sphere 5 2 is pressed onto the predetermined pad 23 of the wafer 20 to make the sphere 52 under pressure. Deformation 'and use ultrasonic welding (ultrasonic Welding) technology to make it knot on the pad 23; as shown in Figure 3C, pull up the bonding tool 50 to make the sphere 5 2 subject to The gold wire 51 is pulled and deformed and a conical protrusion 53 (Conical Protrusion) appears; finally, as shown in FIG. 3D, the bonding tool 50 is continuously pulled up to make the gold wire 51 and the sphere 5 2 is separated and fractured, at this time, the sphere 5 2 is a conductive protruding bump 2 4 formed on the pad 23; in addition, the protruding bump 2 4 is stretched by the gold wire 51, so it is The surface will have a residual protruding end 5 4 (Wire Tai 1) as shown in the figure, so after all the bumps 24 are formed as shown in FIG. 3E, a horizontal compression bonding (Coined) on the wafer 20 may be performed. ) Step, so that a horizontal bonding surface 55 (Flatter Top Surface) is formed on the plurality of bumps 24, and each bump 24 has a uniform height, its height or The diameter can reach an accuracy of 7 5 // m. Therefore, with this wire bonding technology, most bumps 2 4 can be made by simple wire bonding equipment, and its mass production speed can reach as many as 12 bumps 2 4 per second. And the pitch (P itch) of each bump 2 4 can be less than 1 0 0 # m

17528矽品.Ptd 第19頁 1241688 五、發明說明(14) 達至理想的置產需求與佈局密度,同時,亦不需預先於該 晶片20之銲墊23上形成UBM結構層,也無需於後續步驟中 進行電鑛、微影、钱刻、或迴銲等其他晶圓製程(^ a f e r17528 silicon product. Ptd page 19 1241688 V. Description of the invention (14) To achieve the ideal production requirements and layout density, at the same time, there is no need to form a UBM structure layer on the pad 23 of the chip 20, and In the subsequent steps, other wafer processes such as electricity mining, lithography, money engraving, or reflow (^ afer

Processing),充分解決了銲線或覆晶連接方式的諸多習 知問題。 因此’藉由前述之凸塊形成方法,即可於該晶片2 〇作 用表面2 1之感光區2 2周圍,如第4圖所示形成至少一排位 於该晶片2 0周緣上的突出凸塊2 4,該突出凸塊2 4之位置係 對應於第2圖所示延伸至該膠片1 〇置晶穴丨丨中的多數内導 腳1 2位置’此時即如第1 d圖或第5圖之膠片載具1 〇上視圖 所示,利用内導腳銲結技術(I LB )而以熱壓方式將該突出 凸塊2 4快速壓合於其所對應之内導腳丨2之預置銲錫丨3上, 並令該晶片2 0與該膠片載具} 〇間電性連接。 此外,前述配置於該膠片載具i 〇上以對應於該透光片 3 2上方的透鏡座4 0,係如第6圖所示具有一圓形螺旋孔 4 1,該螺旋孔4 1上所開設之螺紋係對應於該透鏡件4 3上的 外圍螺紋4 5,以令該透鏡件4 3可依該外圍螺紋4 5執跡旋入 該螺旋孔4 1中並調整其透鏡4 4與該晶片2 〇間的相對距离^, 俾使外界輻射或光訊號可穿透該透鏡4 4而聚焦於該晶片2 〇 作用表面2 1上的感光區2 2,進而發揮該光感式晶片2 〇之效 能;使用上可於該透鏡件4 3聚焦定位後固定其位置或以二 膠黏劑予以定位,以免除習知上需以調整螺絲 (Adjustment Screw)不斷調整透鏡44位置之缺失,並可快 速尋得透鏡4 4之最適聚焦位置,大幅減省操作成本,同時Processing), which fully solves many conventional problems of bonding wire or flip-chip connection. Therefore, by using the aforementioned bump formation method, at least one row of protruding bumps located on the periphery of the wafer 20 can be formed around the photosensitive area 22 of the active surface 21 of the wafer 20 as shown in FIG. 4. 2 4, the position of the protruding bump 24 corresponds to the position of most of the inner guide pins 12 extending to the film 10 in the crystal cavity as shown in FIG. 2 at this time, as shown in FIG. 1 or FIG. As shown in the top view of the film carrier 10 in FIG. 5, the protruding bump 2 4 is fast-pressed on the corresponding inner guide leg 2 2 by hot pressing using the inner guide pin welding technology (I LB). Preset solder 3, and electrically connect the chip 20 and the film carrier}. In addition, the aforementioned lens holder 40 arranged on the film carrier i 0 so as to correspond to the light transmitting sheet 32 has a circular spiral hole 41 as shown in FIG. 6. The opened thread corresponds to the peripheral thread 4 5 on the lens element 4 3 so that the lens element 4 3 can be screwed into the spiral hole 41 according to the peripheral thread 4 5 and adjust the lens 4 4 and The relative distance between the wafers 20 allows the external radiation or light signals to penetrate the lens 44 and focus on the photosensitive area 2 2 on the active surface 21 of the wafer 20 to further exert the light-sensitive wafer 2 〇Effectiveness; it can be used to fix the position of the lens element 4 3 after focusing and positioning or to position it with two adhesives, so as to avoid the lack of the need to continuously adjust the position of the lens 44 with an Adjustment Screw and Quickly find the optimal focus position of the lens 4 4 to greatly reduce operating costs, and

1241688 五、發明說明(15) 亦可省去習知上將透鏡件組裝於基板上的多餘步驟,以避 免基板翹曲(Warpage)後連帶改變透鏡焦點等習知問題。 綜上所述,藉由本發明所揭示之光感式半導體結構中 的透鏡4 4、透光片3 2與光感式晶片2 0配置,即可令外界輻 射或光訊號透過該透鏡4 4,並經由該透光片3 2之濾光後而 聚焦於該晶片2 0之作用表面2 1上,該作用表面2 1係可用以 接收電磁輪射(E 1 e c t r 〇 m a g n e t i c R a d i a t i 〇 η )、紅外線幸畐 射(Infrared Radiation)、紫外光(Ultraviolet Light) 或可見光等訊號,以將所接收之訊號轉換成電訊號而藉由 該突出凸塊2 4傳送至該膠片1 〇上的内導腳1 2,復經該内導 腳1 2傳送至其外導腳,進而傳送至外界諸如手機等零件 上;同時,該晶片20除了可為一光接收器(Receiver )外, 亦可為一光發射器(T r a n s m i 11 e r ),例如該晶片2 0可設計 為一發光二極體(Light Emitting Diode, LED),以發出 光訊號’並經該透光片3 2與透鏡4 4而傳送至外界;值得一 提的是’該膠片1 〇上之内導腳丨2的尺寸與配置需如第5圖 之上視圖所示,與該晶片2 〇之感光區2 2保留一適當距離, 以避免該内導腳丨2之前端1 2 a干擾前述光訊號或輻射之接 收或傳送。 因此’藉由本發明之較佳實施例,即知本發明所提出 之半導體結構係藉由膠片載具1 0、銲線成形之突出凸塊 24、與膠片自動接合(Tape Automated Bonding, TAB)之 内導腳銲、结技術,而製得一低成本且薄型化的半導體結 構’遠較其他習知技術更適用於手機等可攜式裝置中;其1241688 V. Description of the invention (15) It is also possible to omit the extra steps of conventionally assembling the lens element on the substrate, so as to avoid the conventional problems such as changing the focus of the lens after the warpage of the substrate. In summary, by disposing the lens 4 4, the light-transmitting sheet 32, and the light-sensitive chip 20 in the light-sensitive semiconductor structure disclosed by the present invention, external radiation or light signals can be transmitted through the lens 4 4. After filtering through the light-transmitting sheet 32, it is focused on the active surface 21 of the wafer 20, and the active surface 21 can be used to receive electromagnetic radiation (E 1 ectr 〇magnetic R adiati 〇η), Infrared Radiation, Ultraviolet Light, or visible light, etc., to convert the received signal into an electrical signal and transmit it through the protruding bump 2 4 to the inner guide pin on the film 10 12. Retransmit the inner guide pin 12 to its outer guide pin, and then to external parts such as mobile phones; meanwhile, the chip 20 can be a light receiver in addition to a light receiver. A transmitter (Transmi 11 er), for example, the chip 20 may be designed as a light emitting diode (LED) to emit a light signal 'and transmitted to the light transmitting sheet 3 2 and the lens 4 4 to Outside; it is worth mentioning that 'the film 1 〇 The size and configuration of the inner guide pin 丨 2 should be as shown in the upper view of FIG. 5, and a proper distance from the photosensitive area 22 of the chip 20 should be reserved to avoid interference with the front end 1 2 a of the inner guide pin 丨 2 Reception or transmission of the aforementioned optical signals or radiation. Therefore, 'with the preferred embodiment of the present invention, it is known that the semiconductor structure proposed by the present invention is formed by a film carrier 10, a protruding bump 24 formed by a bonding wire, and a tape automatic bonding (TAB). Internal guide pin welding and junction technology, and to produce a low-cost and thin semiconductor structure 'is far more suitable for portable devices such as mobile phones than other conventional technologies;

17528 矽品.ptd 第21頁 1241688 五、發明說明(16) 設計一方面係以膠片載具1 0取代習知基板,而可大幅降低 習知結構之成本、重量與厚度,並收批次量產之功效,另 方面亦藉由該突出凸塊2 4與膠片自動接合技術之結合,降 低習知凸塊與電性連接方式之成本與佈線難度,而無需再 於晶片2 0或透光片3 2上形成UBM結構層或進行電鍍迴銲等 製程,可快速完成晶片2 0之電性連接,確為技術上之一大 躍進,此外,由於本發明係直接利用透光片3 2與少量之封 裝膠體3 0定位該晶片2 0,故亦不需再增加多餘的封裝步驟 或封裝承載件,大量降低其佔有體積與耗費成本;再者, 藉由本發明所設計之結構,亦可利用該透光片3 2非接觸地 封蓋住該晶片2 0之作用表面2 1,使其免受濕氣或灰塵侵 蝕,亦不致因透光片3 2之表面接觸而損及晶片2 0之感光區 2 2,同時,亦可藉該大面積的透光片3 2而定位該晶片2 0與 膠片内導腳1 2,令其不致於該置晶穴1 1中偏移。 本發明所揭示之半導體結構與製法除前述圖示之較佳 實施例外,亦可有其他實施方式,例如第7圖所示之本發 明第二實施例剖視圖,其與前述較佳實施例之差異在於該 封裝膠體3 0係完全包覆該晶片2 0之非作用表面2 5,以確保 該突出凸塊2 4與該晶片2 0作用表面2 1之密封效果,此一設 計雖將略為增加該封裝膠體3 0之材料成本,惟由於該晶片 2 0已由該封裝膠體3 0確實包覆,故亦可減省前述晶片蓋4 2 之配置。 第8圖所示即本發明第三實施例之剖視圖,該實施例 係將前述較佳實施例中用以進行濾光的透光片3 2替換成其17528 硅 品 .ptd Page 21 1241688 V. Description of the invention (16) On the one hand, the design is to replace the conventional substrate with a film carrier 10, which can greatly reduce the cost, weight and thickness of the conventional structure, and collect the batch amount. On the other hand, the combination of the protruding bump 24 and the automatic bonding technology of the film also reduces the cost and wiring difficulty of the conventional bump and electrical connection method, without the need for a chip 20 or a transparent sheet. Forming a UBM structure layer on the 2 or performing processes such as electroplating reflow can quickly complete the electrical connection of the wafer 20, which is indeed a great leap forward in technology. In addition, the present invention directly uses the light-transmitting sheet 32 and a small amount The packaging colloid 30 locates the chip 20, so there is no need to add extra packaging steps or packaging carriers, which greatly reduces its occupied volume and cost; furthermore, with the structure designed by the present invention, the The light-transmitting sheet 3 2 covers the active surface 21 of the wafer 20 in a non-contact manner, so as to protect it from moisture or dust, and not to damage the photosensitivity of the wafer 20 due to the surface contact of the light-transmitting sheet 32. District 2 2 At the same time, you can also borrow the large noodles The light-transmitting sheet 32 and the wafer 20 is positioned within the film and the leads 12, as not to make it of the die cavity 11 offset. The semiconductor structure and manufacturing method disclosed in the present invention can be implemented in other ways besides the preferred embodiment shown in the figure. For example, the cross-sectional view of the second embodiment of the present invention shown in FIG. 7 is different from the aforementioned preferred embodiment. The encapsulation gel 30 completely covers the non-active surface 25 of the wafer 20 to ensure the sealing effect of the protruding bump 24 and the active surface 21 of the wafer 20. Although this design will slightly increase the The material cost of the encapsulation gel 30, but since the wafer 20 has been actually covered by the encapsulation gel 30, the configuration of the aforementioned wafer cover 42 can also be reduced. Fig. 8 is a cross-sectional view of a third embodiment of the present invention. This embodiment replaces the light-transmitting sheet 32 used for filtering in the foregoing preferred embodiment with its

17528石夕品.ptd 第22頁 1241688 ^ —_-——--~-- 五、發明說明(17) 他透光材料,例如一透光塑性(T r a n s p a r e n t P 1 a s t i c )材 料或一透光液體(Transparent Liquid),以將其塗佈於該 膠片載具1 〇上且覆蓋住該置晶穴1 1,並於加溫固化後形成 如圖所示之塗佈透光層3 5,亦同樣可發揮濾光之功效。 此外,該透光片3 2除了可接置於該膠片載具1 0上,亦 可與該透鏡座4 0配置成一體,例如第9圖所示之本發明第 四實施例,即係將一透光片3 2預先插置於該透鏡座4 0中, 以於該透鏡座4 0配置於該膠片載具1 0後令該透光片3 2位列 於該晶片2 0作用表面2 1與該透鏡44之間,亦可發揮相同之 功能,此一實施例復可減省將該透光片3 2黏置於該膠片載 具1 0上之步驟,而可再降低本發明之製造成本。 同時,若本發明所使用之光感式晶片2 0尺寸過大,此 時除了可再加大該膠片載具1 〇上之置晶穴1 1尺寸外,亦可 如第1 0圖所示之本發明第五實施例,而於該膠片載具丨〇之 下表面1 0 a上形成内導腳12’以將該晶片2 0接置於該内導 腳1 2上’並藉封裝膠體3 0而將該晶片2 0定位於該膠片載具 1 0之下表面10a’此時’該晶片2 0將無法容設於該置晶穴 11中,而將略為增加該半導體結構之厚度,惟當該半導體 結構所組成之影像感測模組運作時,仍需藉由該置晶穴^ 1 1 之開設’以將透過該透鏡4 4與透光片3 2的光訊號傳送至該 晶片2 〇之作用表面2 1上。 綜上所述,可知本發明所提出之特殊半導體結構與其 製法,確可運用於微型可攜式裝置中,而發揮降低成本、 質量與體積之功效,同時,復可減省習知技術中多餘之元17528 石 夕 品 .ptd Page 22 1241688 ^ —-—————— ~-5. Description of the invention (17) Other transparent materials, such as a transparent plastic (transparent P 1 astic) material or a transparent Liquid (Transparent Liquid), so as to coat it on the film carrier 10 and cover the cavity 1 1, and then heat-curing to form a coated light-transmitting layer 3 5 as shown in the figure. Can also play a role in filtering. In addition, in addition to being placed on the film carrier 10, the light-transmitting sheet 32 can also be configured integrally with the lens holder 40. For example, the fourth embodiment of the present invention shown in FIG. A light transmitting sheet 32 is inserted into the lens holder 40 in advance, so that the lens holder 40 is disposed on the film carrier 10 so that the light transmitting sheet 32 is placed on the active surface 2 of the wafer 2 1 and the lens 44 can also perform the same function. In this embodiment, the step of sticking the light-transmitting sheet 3 2 on the film carrier 10 can be eliminated, and the present invention can be further reduced. manufacturing cost. At the same time, if the size of the light-sensitive wafer 20 used in the present invention is too large, in this case, in addition to increasing the size of the crystal cavity 11 on the film carrier 10, it can also be as shown in FIG. According to the fifth embodiment of the present invention, an inner guide pin 12 ′ is formed on the lower surface 10 a of the film carrier, so that the wafer 20 is placed on the inner guide pin 12, and the encapsulation gel 3 is used. 0 and the wafer 20 is positioned on the lower surface 10a of the film carrier 10. At this time, the wafer 20 cannot be accommodated in the cavity 11, and the thickness of the semiconductor structure will be slightly increased. When the image sensing module composed of the semiconductor structure operates, it is still necessary to transmit the optical signals through the lens 4 4 and the light transmitting sheet 3 2 to the chip 2 through the opening of the crystal cavity ^ 1 1. The effect of 〇 on the surface 21. In summary, it can be seen that the special semiconductor structure and its manufacturing method proposed by the present invention can indeed be used in micro-portable devices, and play a role in reducing cost, quality, and volume. At the same time, it can reduce the excess of conventional technology. Yuan

17528矽品.Ptd 第23頁 1241688 五、發明說明(18) 件而便於量產,並可對其晶片進行充分之保護。 上述實例僅為例示性說明本發明之原理及其功效,而 非用於限制本發明。任何熟習此項技藝之人士均可在不違 背本發明之精神及範疇下,對上述實施例進行修飾與變 化。因此,本發明之權利保護範圍,應如後述之申請專利 範圍所列。17528 silicon product. Ptd page 23 1241688 V. Description of the invention (18) It is convenient for mass production, and its chip can be fully protected. The above examples are merely illustrative to illustrate the principle of the present invention and its effects, and are not intended to limit the present invention. Anyone skilled in the art can modify and change the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application mentioned later.

17528碎品.ptd 第24頁 1241688 圖式簡單說明 【圖式簡早說明】 第1 A至1 I圖係本發明之光感式半導體結構的較佳實施 例之製法流程圖; 第2圖係本發明較佳實施例之膠片載具的上視圖; 第3 A至3 E圖係本發明較佳實施例之突出凸塊的製法流 程圖; 第4圖係形成於晶片上之突出凸塊的位置示意圖; 第5圖係第2圖所示之膠片載具於接合晶片後之上視 圖; 第6圖係本發明較佳實施例的透鏡件與透鏡座之示意 圖; 第7圖係本發明之第二實施例的剖視圖; 第8圖係本發明之第三實施例的剖視圖; 第9圖係本發明之第四實施例的剖視圖; 第1 0圖係本發明之第五實施例的剖視圖; 第1 1圖係習知光感式半導體封裝件的剖視圖; 第1 2圖係第1 1圖所示之半導體封裝件的影像感測模組 剖視圖; 第1 3圖係美國專利第6,5 8 6,8 2 4號案所揭示之封裝件 剖視圖; 第1 4圖係美國專利公開號第2 0 0 2 / 0 1 7 1 0 3 1號案所揭示 之封裝件剖視圖; 第1 5圖係美國專利公開號第2 0 0 2 / 0 0 9 6 7 3 1號案所揭示 之封裝件剖視圖;以及17528 碎 品 .ptd Page 24 1241688 Brief description of the drawings [Simplified description of the drawings] Figures 1 A to 1 I are flowcharts of the manufacturing method of the preferred embodiment of the light-sensitive semiconductor structure of the present invention; Figure 2 is The top view of the film carrier of the preferred embodiment of the present invention; Figures 3 A to 3 E are flowcharts of the method for manufacturing the protruding bumps of the preferred embodiment of the present invention; Figure 4 is a diagram of the protruding bumps formed on the wafer Position diagram; Figure 5 is a top view of the film carrier shown in Figure 2 after bonding the wafer; Figure 6 is a schematic diagram of the lens element and lens holder of the preferred embodiment of the present invention; Figure 7 is a schematic view of the present invention Sectional view of the second embodiment; Figure 8 is a sectional view of a third embodiment of the present invention; Figure 9 is a sectional view of a fourth embodiment of the present invention; Figure 10 is a sectional view of a fifth embodiment of the present invention; Fig. 11 is a cross-sectional view of a conventional light-sensing semiconductor package; Fig. 12 is a cross-sectional view of an image sensing module of the semiconductor package shown in Fig. 11; Fig. 13 is a U.S. Patent No. 6, 5 8 6 A cross-sectional view of the package disclosed in No. 8 2 4; FIG. 14 is a US patent Sectional view of the package disclosed in No. 2 0 0 2/0 1 7 1 0 3 1; Figure 15 is disclosed in U.S. Patent Publication No. 2 0 2 2/0 0 9 6 7 3 1 Sectional view of the package; and

]7528碎品.ptd 第25頁 1241688 圖式簡單說明 第1 6圖係美國專利第6,5 4 8,7 5 9號案所揭示之封裝件 剖視圖。 10 膠 片 載 具 10a 膠 片 下 表 面 11 置 晶 穴 12 内 導 腳 12a 内 導 腳 懸 空 部 13 銲 錫 20 晶 片 21 作 用 表 面 22 感 光 區 23 銲 墊 24 突 出 凸 塊 25 非 作 用 表 面 30 封 裝 膠 體 31 膠 黏 劑 32 透 光 片 40 透 鏡 座 41 螺 旋 孔 42 晶 片 蓋 43 透 鏡 件 44 透 鏡 45 外 緣 螺 紋 50 毛 細 管 狀 接合工具 51 金 線 52 球 體 53 圓 錐 突 出 部 54 突 起 端 55 水 平 接 合 表 面 60 晶 片 61 承 載 件 62 銲 線 63 透 光 材 料 64 膠 片 65 透 鏡 座 66 透 鏡 70 基 板 71 子L 洞 72 晶 片 72a 作 用 表 面 73 銲 線 74 透 光 玻 璃 75 封 裝 膠 體 76 錫 球] 7528 碎 品 .ptd Page 25 1241688 Brief Description of Drawings Figure 16 is a cross-sectional view of the package disclosed in U.S. Patent No. 6,5 4 8,7 5 9. 10 Film carrier 10a Film lower surface 11 Cavity 12 Inner guide pin 12a Inner guide foot suspension 13 Solder 20 Wafer 21 Active surface 22 Photosensitive area 23 Solder pad 24 Protruding bump 25 Non-active surface 30 Encapsulant 31 Adhesive 32 Light transmitting sheet 40 Lens holder 41 Spiral hole 42 Wafer cover 43 Lens piece 44 Lens 45 Outer thread 50 Capillary bonding tool 51 Gold wire 52 Sphere 53 Conical protrusion 54 Protruded end 55 Horizontal joint surface 60 Wafer 61 Carrier 62 Welding Line 63 Transparent material 64 Film 65 Lens holder 66 Lens 70 Substrate 71 Sub-hole 72 Wafer 72a Active surface 73 Welding wire 74 Transparent glass 75 Encapsulant 76 Tin ball

17528石夕品.ptd 第26頁 124168817528 Shi Xipin.ptd Page 26 1241688

圖式簡單說明 7 9 線路 80 彈 性印 刷電路板 81a 第 一凸塊 81b 第 二凸 塊 82 透 光片 83 晶 片 84 封 裝膠體 85 晶 片 8 5a 作 用表面 86 金 質凸 塊 87 彈 性電路板 87a 電 性連接端 88 透 光板 89 硬 質印 刷電路板 8 9a 凹 槽 90 晶 片 90a 作 用表面 90b 感 光區 91 凸 塊 92 基板 92a 基板孔洞 93 導 電跡 線 9 3a 突 出部 94 透 光片 17528石夕品.ptd 第27頁Brief description of the drawing 7 9 circuit 80 elastic printed circuit board 81a first bump 81b second bump 82 light-transmitting sheet 83 chip 84 package gel 85 chip 8 5a active surface 86 gold bump 87 elastic circuit board 87a electrical connection End 88 Transparent plate 89 Hard printed circuit board 8 9a Groove 90 Wafer 90a Active surface 90b Photosensitive area 91 Bump 92 Substrate 92a Substrate hole 93 Conductive trace 9 3a Protrusion 94 Translucent sheet 17528 Shi Xipin.ptd 27 page

Claims (1)

1241688 六、申請專利範圍 1. 一種光感式半導體結構,係包括: 膠片載具,係具有一第一表面、相對之第二表面 與貫穿該膠片載具的開口 ,且該第一表面上係敷設有 多數延伸至該開口中的導電件; 光感式晶片,係具有一作用表面與一非作用表 面,且該作用表面上係形成有多數個導電凸塊(Stud Bump),以藉該導電凸塊分別接合於該導電件上,並令 該光感式晶片容設於該膠片載具之開口中, 透光單元,係接置於該膠片載具之第一表面上以 封蓋住該開口; 封裝膠體,係包覆於該膠片載具之部分第二表面 上以封蓋住該開口;以及 透鏡載具,係具有一透鏡(Lens),且接置於該膠 片載具之第一表面上,而令該透光單元位列於該透鏡 與該光感式晶片之作用表面間。 2. 如申請專利範圍第1項之光感式半導體結構,其中,該 導電件係為一内導腳(Inner Lead)。 3. 如申請專利範圍第1項之光感式半導體結構,其中,該 導電件係以銅材料製成。 4. 如申請專利範圍第1項之光感式半導體結構,其中,該 導電凸塊係藉銲線(W i r e Β ο n d i n g )技術而成形。 5. 如申請專利範圍第1項之光感式半導體結構,其中,該 導電凸塊係選自金、鋁、或銅材料之其中一者。 6. 如申請專利範圍第1項之光感式半導體結構,其中,該1241688 VI. Scope of patent application 1. A light-sensitive semiconductor structure includes: a film carrier having a first surface, an opposite second surface, and an opening penetrating the film carrier, and the first surface is A plurality of conductive members extending into the opening are laid; the light-sensitive chip has an active surface and a non-active surface, and a plurality of conductive bumps (Stud Bump) are formed on the active surface so as to use the conductive The bumps are respectively connected to the conductive member, and the light-sensitive chip is accommodated in the opening of the film carrier. The light transmitting unit is connected to the first surface of the film carrier to cover the film carrier. An opening; a packaging gel covering the second surface of the film carrier to cover the opening; and a lens carrier having a lens (lens) connected to the first of the film carrier On the surface, the light-transmitting unit is positioned between the lens and the active surface of the photosensitive wafer. 2. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the conductive member is an inner lead. 3. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the conductive member is made of a copper material. 4. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the conductive bump is formed by a wire bonding (W i r e B ο n d i n g) technology. 5. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the conductive bump is selected from one of gold, aluminum, or copper materials. 6. For example, the light-sensitive semiconductor structure of the scope of patent application, wherein, the 17528石夕品.ptd 第28頁 1241688 六、申請專利範圍 導電凸塊係錯膠片自動接合(T A B )之内導腳鲜結技術 (ILB)而接置於該導電件上。 7. 如申請專利範圍第1項之光感式半導體結構,其中,該 導電凸塊係藉熱壓接合(Thermo-compression Β ο n d i n g )技術而接置於該導電件上。 8. 如申請專利範圍第1項之光感式半導體結構,其中,該 透光單元係為一玻璃片(Glass)。 9. 如申請專利範圍第1項之光感式半導體結構,其中,該 透光單元係為一紅外線滤光片(I R F i 11 e r )。 1 0 .如申請專利範圍第1項之光感式半導體結構,其中,該 透光單元係為一塗佈於該膠片載具上的透光材料層。 1 1.如申請專利範圍第1項之光感式半導體結構,其中,該 封裝膠體係部份包覆於該光感式晶片之非作用表面 上。 1 2 .如申請專利範圍第1項之光感式半導體結構,其中,該 封裝膠體係完全包覆於該光感式晶片之非作用表面 1 3 .如申請專利範圍第1項之光感式半導體結構,其中,該 光感式晶片之作用表面上係具有一感光區。 1 4 .如申請專利範圍第1項之光感式半導體結構,其中,該 光感式晶片係為一影像感測器(I m a g e S e n s 〇 r )。 1 5 .如申請專利範圍第1項之光感式半導體結構,其中,該 光感式晶片係為一發光二極體(LED)。 1 6 .如申請專利範圍第1項之光感式半導體結構,其中,該17528 石 夕 品 .ptd Page 28 1241688 6. Scope of patent application Conductive bumps are the inner guide pin fresh junction technology (ILB) of wrong film automatic joining (T A B) and are placed on the conductive parts. 7. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the conductive bump is connected to the conductive member by a thermo-compression bonding technique. 8. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the light-transmitting unit is a glass. 9. The light-sensitive semiconductor structure according to item 1 of the scope of patent application, wherein the light transmitting unit is an infrared filter (IR F i 11 e r). 10. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the light-transmitting unit is a light-transmitting material layer coated on the film carrier. 1 1. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the encapsulant system is partially covered on the non-active surface of the light-sensitive wafer. 1 2. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the encapsulant system is completely covered on the non-active surface of the light-sensitive wafer 1 3. The light-sensitive semiconductor structure according to item 1 of the patent application scope The semiconductor structure, wherein the photosensitive wafer has a photosensitive area on the active surface. 14. The light-sensing semiconductor structure according to item 1 of the scope of the patent application, wherein the light-sensing chip is an image sensor (I m ag e Sen s 0 r). 15. The light-sensitive semiconductor structure according to item 1 of the scope of patent application, wherein the light-sensitive wafer is a light-emitting diode (LED). 16. The light-sensitive semiconductor structure according to item 1 of the scope of patent application, wherein the 17528石夕品.ptd 第29頁 1241688 六、申請專利範圍 透鏡係為一焦距可調式透鏡。 1 7.如申請專利範圍第1項之光感式半導體結構,其中,該 透鏡係以螺紋接合方式接置於該透鏡載具中,且係可 藉其螺紋接合方式而調整該透鏡之焦距。 1 8.如申請專利範圍第1項之光感式半導體結構,其中,該 透鏡載具中復包括有一介於該透鏡與該光感式晶片間 的透光單元。 1 9 .如申請專利範圍第1項之光感式半導體結構,其中,該 半導體結構復包括一接置於該膠片載具之第二表面上 以包覆該光感式晶片的晶片盖(Chip Cover)。 2 0. —種光感式半導體結構之製法,其步驟係包括: 製備一膠片載具,該膠片載具係具有一第一表 面、相對之第二表面與貫穿該膠片載具的開口 ,且該 第一表面上係敷設有多數延伸至該開口中的導電件; 製備一光感式晶片,該光感式晶片係具有一作用 表面與一非作用表面; 於該光感式晶片之作用表面上形成多數個導電凸 塊(Stud Bump); 錯該導電凸塊而將該光感式晶片接合於該膠片載 具之導電件上,以令該光感式晶片容設於該膠片載具 之開口中; 於該膠片載具之部分第二表面上包覆一封裝膠 體,且於該膠片載具之第一表面上接置一透光單元, 以封蓋住該開口;以及17528 Shi Xipin.ptd Page 29 1241688 6. Scope of Patent Application The lens is a focal length adjustable lens. 1 7. The light-sensing semiconductor structure according to item 1 of the scope of the patent application, wherein the lens is screwed into the lens carrier, and the focal length of the lens can be adjusted by its screwed way. 1 8. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the lens carrier further comprises a light-transmitting unit interposed between the lens and the light-sensitive wafer. 19. The light-sensitive semiconductor structure according to item 1 of the patent application scope, wherein the semiconductor structure further comprises a chip cover (Chip) placed on the second surface of the film carrier to cover the light-sensitive wafer. Cover). 2 0. A method for manufacturing a light-sensitive semiconductor structure, the steps of which include: preparing a film carrier having a first surface, an opposite second surface, and an opening penetrating the film carrier, and The first surface is provided with a plurality of conductive members extending into the opening; a light-sensitive wafer is prepared, and the light-sensitive wafer has an active surface and a non-active surface; on the active surface of the light-sensitive wafer A plurality of conductive bumps (Stud Bump) are formed on the substrate; the light-sensitive wafer is bonded to the conductive member of the film carrier by mistake, so that the light-sensitive chip is accommodated in the film carrier. In the opening; covering a part of the second surface of the film carrier with an encapsulating gel, and placing a light transmitting unit on the first surface of the film carrier to cover the opening; and ]7528碎品.ptd 第30頁 1241688 六、申請專利範圍 於該膠片載具之第一表面上接置一透鏡載具,以 令該透光單元位列於該透鏡載具之透鏡(L e n s )與該光 感式晶片之作用表面間。 2 1 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電件係為一内導腳(Inner Lead)。 2 2 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電件係以銅材料製成。 2 3 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電凸塊係藉銲線(W i r e Β ο n d i n g )技術而成 形。 2 4 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電凸塊係選自金、鋁、或銅材料之其中一 者。 2 5 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電凸塊係藉膠片自動接合(TAB)之内導腳銲結 技術(ILB)而接置於該導電件上。 2 6 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該導電凸塊係藉熱壓接合(Thermo- compression Β ο n d i n g )技術而接置於該導電件上。 2 7.如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該透光單元係為一玻璃片(Glass)。 2 8 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該透光單元係為一紅外線濾光片(I R F i 1 t e r )。 2 9 .如申請專利範圍第2 0項之光感式半導體結構製法,其] 7528 碎 品 .ptd Page 30 1241688 VI. Application for a patent Place a lens carrier on the first surface of the film carrier, so that the light transmitting unit is located in the lens of the lens carrier (L ens ) And the active surface of the photosensitive wafer. 2 1. The method for manufacturing a light-sensing semiconductor structure according to item 20 of the scope of patent application, wherein the conductive member is an inner lead. 2 2. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the conductive member is made of a copper material. 2 3. The method for manufacturing a light-sensing semiconductor structure according to item 20 of the scope of patent application, wherein the conductive bump is formed by a wire bonding technique (W i r e Β ο n d i n g). 24. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the conductive bump is selected from one of gold, aluminum, or copper materials. 25. According to the light-sensitive semiconductor structure manufacturing method of claim 20 in the scope of the patent application, wherein the conductive bump is connected to the conductive member by the inner-lead soldering technology (ILB) of TAB. on. 26. The method of manufacturing a light-sensing semiconductor structure according to item 20 of the patent application scope, wherein the conductive bump is connected to the conductive member by a thermo-compression bonding (Thermo-compression β n d i n g) technology. 2 7. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the light transmitting unit is a glass. 28. The method for manufacturing a light-sensing semiconductor structure according to item 20 of the patent application scope, wherein the light transmitting unit is an infrared filter (IR F i 1 t e r). 2 9. If the light-sensing semiconductor structure manufacturing method of item 20 of the scope of patent application, 17528碎品.ptd 第31頁 1241688 六、申請專利範圍 中,該透光單元係為一塗佈於該膠片載具上的透光材 料層。 3 0 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該封裝膠體係部份包覆於該光感式晶片之非作用 表面上。 3 1.如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該封裝膠體係完全包覆於該光感式晶片之非作用 表面上。 3 2 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該光感式晶片之作用表面上係具有一感光區。 3 3 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中’該光感式晶片係為一影像感測為(I m a g e Sensor) 〇 3 4 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該光感式晶片係為一發光二極體(LED)。 3 5 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該透鏡係為一焦距可調式透鏡。 3 6 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該透鏡係以螺紋接合方式接置於該透鏡載具中, 且係可藉其螺紋接合方式而調整該透鏡之焦距。 3 7 .如申請專利範圍第2 0項之光感式半導體結構製法,其 中,該透鏡載具中復包括有一介於該透鏡與該光感式 晶片間的透光早元。 3 8 .如申請專利範圍第2 0項之光感式半導體結構製法,其17528 碎 品 .ptd Page 31 1241688 6. In the scope of patent application, the light transmission unit is a light transmission material layer coated on the film carrier. 30. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the encapsulant system is partially coated on the non-active surface of the light-sensitive wafer. 3 1. The method of manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the encapsulant system is completely coated on the non-active surface of the light-sensitive wafer. 32. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the scope of the patent application, wherein the active surface of the light-sensitive wafer has a photosensitive area. 3 3. The method of manufacturing a light-sensitive semiconductor structure according to the scope of patent application No. 20, wherein 'the light-sensitive chip is an image sensor (I mage Sensor) 〇 3 4. The light-sensitive semiconductor structure manufacturing method, wherein the light-sensitive wafer is a light-emitting diode (LED). 35. The method of manufacturing a light-sensing semiconductor structure according to item 20 of the scope of patent application, wherein the lens is a focus-adjustable lens. 36. According to the light-sensing semiconductor structure manufacturing method of the scope of applying for patent No. 20, wherein the lens is screwed into the lens carrier, and the lens can be adjusted by its screwed way focal length. 37. The method for manufacturing a light-sensitive semiconductor structure according to item 20 of the patent application scope, wherein the lens carrier includes a light-transmitting early element between the lens and the light-sensitive wafer. 38. If the light-sensitive semiconductor structure manufacturing method of item 20 of the scope of patent application, 17528 矽品.ptd 第32頁 124168817528 Silicone.ptd Page 32 1241688 17528 矽品.ptd 第33頁17528 Silicone.ptd Page 33
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