TW200947666A - Imaging sensor package structure and imaging device using same - Google Patents

Imaging sensor package structure and imaging device using same Download PDF

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Publication number
TW200947666A
TW200947666A TW97116249A TW97116249A TW200947666A TW 200947666 A TW200947666 A TW 200947666A TW 97116249 A TW97116249 A TW 97116249A TW 97116249 A TW97116249 A TW 97116249A TW 200947666 A TW200947666 A TW 200947666A
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Taiwan
Prior art keywords
substrate
image sensor
package structure
sensor package
wafer
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TW97116249A
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Chinese (zh)
Inventor
Chi-Kuei Lee
Ying-Cheng Wu
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Hon Hai Prec Ind Co Ltd
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Priority to TW97116249A priority Critical patent/TW200947666A/en
Publication of TW200947666A publication Critical patent/TW200947666A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The present invention relates to an image sensor chip package structure. The image sensor chip package structure includes a first substrate, an image sensor chip, a processing chip and at least one passive element. The first substrate has a top surface and a bottom surface opposite to the top surface. The image sensor chip is disposed on the top surface and electrically connected to the first substrate. The image sensor chip package structure further includes a second substrate. The processing chip and the at least one passive element are mounted on the second substrate and electrically connected to the second substrate. The bottom surface of the first substrate defines a cavity for receiving the second substrate, the processing chip and the at least one passive element therein.

Description

200947666 •九、發明說明: .【發明所屬之技術領域】 本發明涉及一種影像感測器封裝結構,尤其涉及一種 小型化之影像感測器封裝結構及其應用之成像裝置。 【先前技術】 隨著科技之不斷發展,攜帶式電子裝置如移動電話, 應用日益廣泛,同時也日漸趨向於輕巧、美觀和多功能化, 其中照相功能是近年流行之移動電話之附加功能。應用於 ®移動電話之成像裝置不僅要具有較高之照相性能,其還須 滿足輕薄短小之要求。而影像感測器封裝結構之體積是決 定成像裝置大小之主要因素之一,因此,改善影像感測器 封裝結構將有利於成像裝置小型化。 請參閱圖1,現有之一種影像感測器封裝結構l〇〇a包 括一影像感測器11a、至少一被動元件12a、基板13a。該 影像感測器11a承載於基板13a上並通過打線之方式與基 0板13a電性連接。該被動元件12a繞設於影像感測器11a 周圍且機械性及電性連接於基板13a。 然而,影像感測器封裝結構l〇〇a還需要結合一些具有 影像處理、影像控制等功能性之處理晶片14a來進行影像 處理。於這種情況下,基板13a必須預留一些空間來承載 該處理晶片14a。如此,將加大影像感測器封裝結構100a 之體積。 【發明内容】 有鑒於此,有必要提供一種尺寸小型化之影像感測器 8 200947666 封裝結構及其應用之成像裝置。 :種影像感測器封裝結構,其包括··—第—基板、一 ::感測器、一處理晶片及至少-被動元件。該第-基板 =一:面及一與頂面相對之底面。該影像感測器承載於 ❹ 頂面並與該第一基板電性連接。該影像感測 时封裝結構進-步包括—第二基板。該處理晶片及至少一 ,動70件承載於第二基板上並與該第二基板電性連接。該 ^基板之底面開設有—凹槽’該第二基板,及承载於該 一基板上之處理晶片及至少一被動元件均容置於該 内。 種成像裝置,其包括:—影像感測器封裝結構及一 與影像感測器封裝結構對正設置之鏡頭模組。該影像感測 器封裝結構包括:-第一基板、一影像感測器、一處理晶 片及至少一被動元件。該第一基板包括一頂面及一與頂面 相對之底面。該影像感測器承載於該第一基板之頂面並與 ©該第一基板電性連接。該鏡頭模組包括一鏡筒、一鏡座及 透鏡組。該透鏡組固設於鏡筒内。該鏡筒套設於鏡座内。 該鏡頭模組承載於該影像感測器之頂面上。該影像感測器 封裝結構進一步包括一第二基板,該處理晶片及至少一被 動元件承載於第二基板上並與該第二基板電性連接。該第 一基板之底面開設有一凹槽。該第二基板,及承載於該第 一基板上之處理晶片及至少一被動元件均容置於該凹槽 内。 相較先前技術’該被動元件、處理晶片及第二基板設 9 200947666 ’ 置於由該第一基板之底面開設之凹槽内。從而無需再於第 .一基板上為該被動元件及處理晶片額外預留空間,提高該 影像感測器封裝結構之空間利用率,縮小成像裝置之尺寸。 【實施方式】 以下將結合附圖對本發明作進一步之詳細說明。 請參閱圖2,為本發明之影像感測器封裝結構100,其 包括一影像感測器20、一第一基板10、一處理晶片40、一 第二基板30及至少一被動元件42。 0 該影像感測器 20 可為 CCD ( Charge Coupled Device, 電荷輕合組件感測器)或CMOS ( Complementary Metal Oxide Semiconductor,互補性金屬氧化物感測器),其用於將 影像光訊號轉化為電訊號。該影像感測器20包括一感測區 21與一環繞感測區21之非感測區22。該非感測區22上設 置有複數第一晶片焊墊202。 該第一基板10可由玻璃纖維、強化塑膠或陶瓷等材質 ©所製成,該第一基板10包括一頂面11及一與頂面11相對 之底面12。該影像感測器20承載於該第一基板10之頂面 11中心位置上。該第一基板10之周緣對應該影像感測器 20上之複數第一晶片焊墊202設置有複數第一基板焊墊 112。該影像感測器封裝結構100還進一步包括多條第一引 線114,該多條第一引線114是由黃金等抗氧化、導電佳之 材料製成,其一端與影像感測器20之第一晶片焊墊202固 定連接,另一端則與第一基板焊墊112電性連接,以使影 像感測器20之訊號通過多條第一引線114傳遞至第一基板 200947666 * 10。該第一基板10之底面12開設有一凹槽,本實施方式 .中,該凹槽為階梯狀結構,該階梯狀結構之凹槽包括第一 容置部24及一第二容置部26,該第一容置部24與第二容 置部26相連通且第一容置部24之尺寸大於該第二容置部 26之尺寸,而於兩者相接處形成一臺階面242。該臺階面 242上設有複數電連接點(圖未示)。 實際應用中,該影像感測器20也可用覆晶形式、内引 腳貼合、自動載帶貼合、倒貼封裝或熱壓合連接方式機械 性及電性連接於基板10。並不限於本實施方式。 該處理晶片40用於進行影像處理,該處理晶片40可 為影像處理晶片、控制晶片或記憶體等一些功能性晶片。 該處理晶片40上設置有複數第二晶片焊墊402。 該第二基板30可由玻璃纖維、強化塑膠或陶瓷等材質 所製成,該第二基板30包括一承載面31。該承載面31用 於承載該處理晶片40及複數被動元件42。該處理晶片40 U用於處理該影像感測器20感測之訊號。第二基板30對應 該處理晶片40之第二晶片焊墊402設置有複數第二基板焊 墊302。該影像感測器封裝結構100還進一步包括多條第二 引線404,該多條第二引線404是由黃金等抗氧化、導電佳 之材料製成,其一端與處理晶片40之第二晶片焊墊402固 定連接,另一端則與第二基板焊墊302電性連接,以使處 理晶片40之訊號通過多條第二引線404傳遞至第二基板 30。優選地,該影像感測器封裝結構100進一步一封膠50, 該封膠50由環氧樹脂(Encapsulation epoxy)材料做成, 11 200947666 •該封膠50用於密封該處理晶片40、第二晶片焊墊404、第 •二基板焊墊302及多條第二引線404,以防止處理晶片40、 第二晶片焊墊404、第二基板焊墊302及多條第二引線404 與空氣接觸發生氧化。 實際應用中,該處理晶片40也可採用表面貼裝技術、 覆晶形式、内引腳貼合、自動載帶貼合、倒貼封裝或熱壓 合連接方式,使該處理晶片40與該第二基板30機械性及 電性導通’並不限於本實施方式。 ® 該至少一被動元件42設置於該第二基板30之承載面 31上且與該第二基板30電性連接。該至少一被動元件42 環繞該處理晶片30設置,用以改善影像感測訊號傳輸品質 之元件,其可是電感元件、電容元件或者電阻元件。 該第二基板30之承載面31之周緣設置有複數焊點 304。該第二基板30通過承載面31上之複數焊點304通過 表面貼裝技術(SMT)機械性及電性連接於第一基板20之 φ臺階面242之複數電連接點上。該第二基板30容置於該第 一容置部24,該處理晶片40及至少一被動元件42容置於 第二容置部26内。優選地,該影像感測器封裝結構100進 一步包括一向異性導電膠(ACA或ACF),該第二基板30 之複數焊點304通過該各向異性導電膠機械性及電性連接 至第一基板10之臺階面242之複數電連接點上。使該第一 基板10與第二基板30之間電性導通。該焊點304可是球 柵陣列(Ball Grid Array,BGA)、無引線晶片載體(Leadless Chip Carrier,LCC)或引線框(Leadframe)。 12 200947666 * 實際應用中,該第一基板10之底面12開設之凹槽也 , 可只包括一容置部,該被動元件42、處理晶片40及第二基 板30均容置於該容置部内,並不限於本實施方式。 工作時,該影像感測器20將感測到之光訊號轉化為電 訊號,並將該電訊號傳輸至第一基板10,傳輸至第一基板 10之訊號再傳輸至第二基板30,經第二基板30上之處理 晶片40及至少一被動元件42做進一步之訊號處理。 請參閱圖3,為使用上述實施方式之影像感測器封裝結 構100之成像裝置200,其包括影像感測器封裝結構100、 一與該影像感測器封裝結構100對正設置之鏡頭模組70及 膠體60。 該鏡頭模組70與該影像感測器20對正設置,該鏡頭 模組70包括鏡筒72、鏡座74及透鏡組76。該鏡座74具 有一鏡座頂部741、一鏡座底部742及連接鏡座頂部741 與鏡座底部742之鏡座肩部743。該透鏡組76固設於鏡筒 Q 72内,該鏡筒72套設於鏡座頂部741内。該鏡座肩部743 包括一與影像感測器20相對之肩部底面744,該鏡座底部 742包括一底端面745。 該膠體60塗佈於鏡座底部742之底端面745上,該鏡 頭模組70通過該塗佈於鏡座底部742之底端面745上之膠 體60固設於該第一基板10之頂面11上。該膠體60為熱 固膠、紫外線固化膠、熱溶膠、矽溶膠或雙面膠中之一種。 本實施方式中,該成像裝置200還包括一透光元件 80。該透光元件80為一紅外濾光片,用於對光線進行過濾。 13 200947666 * 該透光元件80通過該膠體60固設於該鏡座肩部743之肩 • 部底面744上。該膠體70與透光元件80形成對該影像感 測器20無塵密封封裝,用於保護該影像感測器20。實際應 用中,該透光元件80也可為玻璃或其他透光材料,並不限 於本實施方式。 該被動元件、處理晶片及第二基板設置於由該第一基 板之底面開設之凹槽内。從而無需再於第一基板上為該被 動元件及處理晶片額外預留空間,提高該影像感測器封裝 〇 結構之空間利用率,縮小成像裝置之尺寸。 綜上所述,本發明確已符合發明專利之要件,遂依法 提出專利申請。惟,以上所述者僅為本發明之較佳實施方 式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案 技藝之人士援依本發明之精神所作之等效修飾或變化,皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 © 圖1係一種現有之影像感測器封裝結構之剖面示意圖; 圖2係本發明之影像感測器封裝結構剖面示意圖; 圖3係採用了本發明之影像感測器封裝結構之成像裝 置剖面示意圖。 【主要元件符號說明】 影像感測器封裝結構 100a、100 影像感測器 11a、20 12a、42 被動元件 200947666 * 基板 13a • 處理晶片 14a、40 第一基板 10 第二基板 30 感測區 21 非感測區 22 第一晶片焊墊 202 ❹ 頂面 11 底面 12 第一基板焊墊 112 第一引線 114 第一容置部 24 第二容置部 26 臺階面 242 第二晶片焊墊 402 〇 承載面 31 第二基板焊墊 302 第二引線 404 封膠 50 焊點 304 成像裝置 200 鏡頭模組 70 膠體 60 鏡闾 72 15 200947666 λ鏡座 74 透鏡組 76 鏡座頂部 741 鏡座底部 742 鏡座肩部 743 肩部底面 744 底端面 745 透光元件 80 ❹ ❹ 16BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor package structure, and more particularly to a miniaturized image sensor package structure and an image forming apparatus therefor. [Prior Art] With the continuous development of technology, portable electronic devices such as mobile phones have become more and more widely used, and at the same time, they are becoming lighter, more beautiful, and more multifunctional, and the camera function is an additional function of the popular mobile phone in recent years. The imaging device applied to the ® mobile phone not only has to have high photographic performance, but also needs to meet the requirements of lightness, thinness and shortness. The volume of the image sensor package structure is one of the main factors determining the size of the imaging device. Therefore, improving the image sensor package structure will facilitate the miniaturization of the imaging device. Referring to FIG. 1, a conventional image sensor package structure 10a includes an image sensor 11a, at least one passive component 12a, and a substrate 13a. The image sensor 11a is carried on the substrate 13a and electrically connected to the base plate 13a by wire bonding. The passive component 12a is wound around the image sensor 11a and mechanically and electrically connected to the substrate 13a. However, the image sensor package structure 10a also needs to combine some processing wafers 14a having image processing, image control and the like to perform image processing. In this case, the substrate 13a must reserve some space for carrying the handle wafer 14a. As such, the volume of the image sensor package structure 100a will be increased. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide a size sensor that is miniaturized. The imaging device and its application imaging device. An image sensor package structure includes a substrate, a sensor, a processing chip, and at least a passive component. The first substrate=one: a surface and a bottom surface opposite to the top surface. The image sensor is carried on the top surface of the crucible and electrically connected to the first substrate. The image sensing package structure further includes a second substrate. The processing wafer and the at least one movable member are carried on the second substrate and electrically connected to the second substrate. The bottom surface of the substrate is provided with a recess, the second substrate, and the processing wafer and the at least one passive component carried on the substrate are accommodated therein. The imaging device comprises: an image sensor package structure and a lens module disposed in alignment with the image sensor package structure. The image sensor package structure comprises: a first substrate, an image sensor, a processing wafer and at least one passive component. The first substrate includes a top surface and a bottom surface opposite to the top surface. The image sensor is carried on a top surface of the first substrate and electrically connected to the first substrate. The lens module includes a lens barrel, a lens holder and a lens group. The lens group is fixed in the lens barrel. The lens barrel is sleeved in the lens holder. The lens module is carried on a top surface of the image sensor. The image sensor package structure further includes a second substrate, and the processing chip and the at least one driven component are carried on the second substrate and electrically connected to the second substrate. A groove is formed in a bottom surface of the first substrate. The second substrate, and the processing wafer and the at least one passive component carried on the first substrate are accommodated in the recess. The passive component, the processing wafer, and the second substrate are placed in recesses formed by the bottom surface of the first substrate as compared to the prior art. Therefore, there is no need to additionally reserve space for the passive component and the processing chip on the first substrate, thereby improving the space utilization ratio of the image sensor package structure and reducing the size of the imaging device. [Embodiment] Hereinafter, the present invention will be further described in detail with reference to the accompanying drawings. Referring to FIG. 2, an image sensor package structure 100 of the present invention includes an image sensor 20, a first substrate 10, a processing wafer 40, a second substrate 30, and at least one passive component 42. The image sensor 20 can be a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor), which is used to convert the image optical signal into Telecommunications signal. The image sensor 20 includes a sensing area 21 and a non-sensing area 22 surrounding the sensing area 21. A plurality of first wafer pads 202 are disposed on the non-sensing region 22. The first substrate 10 can be made of a material such as glass fiber, reinforced plastic or ceramic. The first substrate 10 includes a top surface 11 and a bottom surface 12 opposite to the top surface 11. The image sensor 20 is carried at a central position of the top surface 11 of the first substrate 10. A plurality of first substrate pads 112 are disposed on the periphery of the first substrate 10 corresponding to the plurality of first wafer pads 202 on the image sensor 20. The image sensor package structure 100 further includes a plurality of first leads 114 made of a material such as gold and the like which is resistant to oxidation and conductivity, and having one end and the first chip of the image sensor 20 The pad 202 is fixedly connected, and the other end is electrically connected to the first substrate pad 112, so that the signal of the image sensor 20 is transmitted to the first substrate 200947666*10 through the plurality of first leads 114. The bottom surface 12 of the first substrate 10 defines a recess. In the embodiment, the recess is a stepped structure, and the recess of the stepped structure includes a first receiving portion 24 and a second receiving portion 26. The first accommodating portion 24 communicates with the second accommodating portion 26 and the first accommodating portion 24 has a larger size than the second accommodating portion 26, and a stepped surface 242 is formed at the junction of the two. The step surface 242 is provided with a plurality of electrical connection points (not shown). In practical applications, the image sensor 20 can also be mechanically and electrically connected to the substrate 10 by flip chip bonding, inner pin bonding, automatic tape bonding, flip chip bonding or thermocompression bonding. It is not limited to this embodiment. The processing wafer 40 is used for image processing, and the processing wafer 40 can be some functional wafer such as an image processing wafer, a control wafer or a memory. A plurality of second wafer pads 402 are disposed on the handle wafer 40. The second substrate 30 may be made of a material such as glass fiber, reinforced plastic or ceramic, and the second substrate 30 includes a bearing surface 31. The carrier surface 31 is used to carry the handle wafer 40 and the plurality of passive components 42. The processing chip 40 U is used to process the signal sensed by the image sensor 20. The second substrate 30 is provided with a plurality of second substrate pads 302 corresponding to the second wafer pads 402 of the processing wafer 40. The image sensor package structure 100 further includes a plurality of second leads 404 made of a material that is resistant to oxidation and conductivity, such as gold, and a second wafer pad at one end and the handle wafer 40. The other end is electrically connected to the second substrate pad 302 so that the signal for processing the wafer 40 is transmitted to the second substrate 30 through the plurality of second leads 404. Preferably, the image sensor package structure 100 further comprises a glue 50, the sealant 50 is made of an epoxy resin, 11 200947666. The sealant 50 is used to seal the process wafer 40, the second The wafer pad 404, the second substrate pad 302 and the plurality of second leads 404 prevent the handle wafer 40, the second wafer pad 404, the second substrate pad 302 and the plurality of second leads 404 from coming into contact with the air. Oxidation. In practical applications, the handle wafer 40 can also be surface mount technology, flip chip form, inner pin bond, automatic tape bond, flip chip package or thermocompression bond connection to make the process wafer 40 and the second The mechanical and electrical conduction of the substrate 30 is not limited to the present embodiment. The at least one passive component 42 is disposed on the bearing surface 31 of the second substrate 30 and electrically connected to the second substrate 30. The at least one passive component 42 is disposed around the processing chip 30 for improving the quality of the image sensing signal transmission, which may be an inductive component, a capacitive component or a resistive component. A plurality of solder joints 304 are disposed on the periphery of the bearing surface 31 of the second substrate 30. The second substrate 30 is mechanically and electrically connected to the plurality of electrical connection points of the φ step surface 242 of the first substrate 20 through a plurality of solder joints 304 on the carrying surface 31 by surface mount technology (SMT). The second substrate 30 is received in the first accommodating portion 24, and the processing wafer 40 and the at least one passive component 42 are received in the second accommodating portion 26. Preferably, the image sensor package structure 100 further includes an anisotropic conductive paste (ACA or ACF), and the plurality of solder joints 304 of the second substrate 30 are mechanically and electrically connected to the first substrate through the anisotropic conductive paste. 10 of the step surface 242 of the plurality of electrical connection points. The first substrate 10 and the second substrate 30 are electrically connected to each other. The solder joint 304 can be a Ball Grid Array (BGA), a Leadless Chip Carrier (LCC) or a Lead Frame. 12 200947666 * In a practical application, the recess of the bottom surface 12 of the first substrate 10 may also include a receiving portion, and the passive component 42, the processing chip 40 and the second substrate 30 are accommodated in the receiving portion. It is not limited to this embodiment. In operation, the image sensor 20 converts the sensed optical signal into an electrical signal, and transmits the electrical signal to the first substrate 10, and transmits the signal transmitted to the first substrate 10 to the second substrate 30. The processing wafer 40 on the second substrate 30 and the at least one passive component 42 perform further signal processing. The imaging device 200 of the image sensor package structure 100 of the above embodiment includes an image sensor package structure 100 and a lens module aligned with the image sensor package structure 100. 70 and colloid 60. The lens module 70 is disposed opposite the image sensor 20, and the lens module 70 includes a lens barrel 72, a lens holder 74, and a lens group 76. The lens holder 74 has a lens holder top portion 741, a lens holder bottom portion 742, and a mirror holder shoulder portion 743 that connects the lens holder top portion 741 and the lens holder bottom portion 742. The lens group 76 is fixed in the lens barrel Q 72, and the lens barrel 72 is sleeved in the lens holder top 741. The mirror shoulder 743 includes a shoulder bottom surface 744 opposite the image sensor 20, the lens base bottom 742 including a bottom end surface 745. The colloid 60 is applied to the bottom end surface 745 of the bottom portion 742 of the lens holder. The lens module 70 is fixed to the top surface 11 of the first substrate 10 by the colloid 60 applied to the bottom end surface 745 of the bottom portion 742 of the lens holder. on. The colloid 60 is one of a thermosetting glue, a UV curable gel, a hot melt, a enamel sol or a double sided tape. In the embodiment, the image forming apparatus 200 further includes a light transmissive element 80. The light transmissive element 80 is an infrared filter for filtering light. 13 200947666 * The light transmissive element 80 is fixed to the shoulder bottom surface 744 of the lens holder shoulder 743 by the glue 60. The colloid 70 and the light transmissive element 80 form a dust-free sealed package for the image sensor 20 for protecting the image sensor 20. In practical applications, the light transmissive element 80 may also be glass or other light transmissive material and is not limited to this embodiment. The passive component, the processing wafer, and the second substrate are disposed in a recess formed by a bottom surface of the first substrate. Therefore, there is no need to additionally reserve space for the driven component and the processing chip on the first substrate, thereby improving the space utilization ratio of the image sensor package structure and reducing the size of the imaging device. In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the present invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view showing a conventional image sensor package structure; FIG. 2 is a schematic cross-sectional view showing an image sensor package structure of the present invention; and FIG. 3 is an image sensor using the present invention. A schematic cross-sectional view of an imaging device of a package structure. [Main component symbol description] Image sensor package structure 100a, 100 Image sensor 11a, 20 12a, 42 Passive element 200947666 * Substrate 13a • Process wafer 14a, 40 First substrate 10 Second substrate 30 Sensing area 21 Non Sensing area 22 first wafer pad 202 顶 top surface 11 bottom surface 12 first substrate pad 112 first lead 114 first receiving portion 24 second receiving portion 26 step surface 242 second wafer pad 402 〇 bearing surface 31 Second substrate pad 302 Second lead 404 Sealing 50 Soldering point 304 Imaging device 200 Lens module 70 Colloid 60 Mirror 72 15 200947666 λ Mirror holder 74 Lens group 76 Mirror base 741 Mirror base 742 Mirror shoulder 743 shoulder bottom 744 bottom end 745 light transmitting element 80 ❹ ❹ 16

Claims (1)

200947666 •十、申請專利範園: .1· -種影像感測器封裝結構,其包括:_第—基板、一影 像感測器、-處理晶片及至少一被動元件,該第一基板包 括一頂面及一與頂面相對之底面,該影像感測器承載於該 第一基板之頂面並與該第一基板電性連接,其改進在於: 該影像感測器封裝結構進一步包括一第二基板,該處理晶 片及至少一被動元件承載於第二基板上並與該第二基板電 性連接,該第-基板之底面開設有一凹槽,該第二基板, 及承載於該第二基板上之處理晶片及至少一被動元件均容 置於該凹槽内。 2. 如申請專利範圍第χ項所述之影像感测器封|結構,其 中.該凹槽為階梯狀結構,包括第一容置部及一第二容置 部,該第一容置部與第二容置部相連通且第一容置部之尺 寸大於該第二容置部之尺寸,而於兩者相接處形成一臺階 面,該臺階面上設有複數電連接點,該第二基板包括一用 ❹於承載該處理晶片之承載面,該第二基板之承載面周緣設 置有複數焊點,該第一基板通過承載面上之複數焊點機械 性及電性連接於第一基板之臺階面之複數電連接點上。 3. 如申請專利範圍第1項所述之影像感測器封裝結構,其 :.該影像感測器包括一感測區及環繞感測區之非感測 區,該非感測區上設置有複數第一晶片焊墊,該第一基板 之頂面對應該複數第一晶片焊墊設置有複數第一基板焊 墊,該影像感測器封裝結構還包括多條第一引線,該複數 第一晶片焊墊與該複數第一基板焊墊通過該多條第一引線 17 200947666 對應電性連接。 4.如申請專利範圍第1項所述之影像感測器封裝結構,其 中.該處理晶片上設置有複數第二晶片焊墊 對應該處理晶片之笛_Βϋ 乐泰 第一日日片焊墊設置有複數第二基板焊 :,該影像感測器封裝結構還進一步包括多條第二引線, ,、一端與處理晶片之第二晶片焊㈣定連接,另-端則與 Ο Ο 第二基板焊墊電性連接,以使處理晶片之訊號通過多條第 二引線傳遞至第二基板Q i 一種成像裝置’其包括:-影像感測器封裝結構及-與 影像感測器封震結構對正設置之鏡頭模組,項所述之影像 感:器封裝結構包括:_第一基板、一影像感測器、一處 理晶片及至少一被動元件,該第一基板包括一頂面及一與 頂面相對之底面,該影像感測器承載於該第一基板之頂面 並與該第一基板電性連接,該鏡頭模組包括一鏡筒、一鏡 座及一透鏡組,該透鏡組固設於鏡筒内,該鏡筒套設於鏡 座内’該鏡頭模組承載於該影像感測器之頂面上,其中: 該影像感測器封裝結構進一步包括一第二基板,該處理晶 片及至少一被動元件承載於第二基板上並與該第二基板電 性連接’該第一基板之底面開設有一凹槽,該第二基板, 及承載於該第二基板上之處理晶片 及至少一被動元件均容 置於該凹槽内。 6.如申請專利範圍第5項所述之成像裝置,其中:該鏡座 具有一鏡座頂部、一鏡座底部及連接頂部與鏡座底部之鏡 座肩部’該鏡筒套設於鏡座頂部,該成像裝置還進一步包 18 200947666 括一透光元件及一膠體,該鏡座肩部包括一與影像感測器 相對之肩部底面,該透光元件通過該膠體固設於該鏡座肩 部之肩部底面上。 7.如申請專利範圍第5項所述之成像裝置,苴 :測器封襄結構進一步—_,該封膠用於密封該= 第一晶片焊墊、第二基板焊墊及多條第二引線。 =如申請專利範圍第7項所述之200947666 • Ten, application for patent garden: .1 - an image sensor package structure, comprising: a - substrate, an image sensor, a processing chip and at least one passive component, the first substrate comprises a The image sensor is mounted on the top surface of the first substrate and electrically connected to the first substrate, and the improvement is: the image sensor package structure further includes a first surface a second substrate, the processing chip and the at least one passive component are carried on the second substrate and electrically connected to the second substrate; the bottom surface of the first substrate is provided with a recess, the second substrate, and the second substrate The processing chip and the at least one passive component are accommodated in the recess. 2. The image sensor package structure of the invention of claim 2, wherein the groove is a stepped structure, comprising a first receiving portion and a second receiving portion, the first receiving portion The second accommodating portion is connected to the second accommodating portion, and the size of the first accommodating portion is larger than the size of the second accommodating portion, and a step surface is formed at the junction of the two, and the plurality of electrical connection points are disposed on the step surface. The second substrate includes a bearing surface for carrying the processing wafer, and a plurality of solder joints are disposed on a periphery of the bearing surface of the second substrate, and the first substrate is mechanically and electrically connected to the plurality of solder joints on the bearing surface. A plurality of electrical connection points of the step surface of a substrate. 3. The image sensor package structure according to claim 1, wherein: the image sensor comprises a sensing area and a non-sensing area surrounding the sensing area, and the non-sensing area is provided with a plurality of first die pads, a top surface of the first substrate facing the plurality of first die pads is provided with a plurality of first substrate pads, the image sensor package structure further comprising a plurality of first leads, the plurality first The wafer pad and the plurality of first substrate pads are electrically connected through the plurality of first leads 17 200947666. 4. The image sensor package structure according to claim 1, wherein the processing wafer is provided with a plurality of second wafer pads corresponding to the wafers of the wafers Βϋ 乐 Loctite first day solder pads A plurality of second substrate soldering is provided: the image sensor package structure further includes a plurality of second leads, one end is connected to the second wafer of the processing wafer (four), and the other end is connected to the second substrate The pad is electrically connected so that the signal for processing the chip is transmitted to the second substrate through the plurality of second leads. The imaging device includes: an image sensor package structure and a pair of image sensor sealing structures. The image sensor package structure includes: a first substrate, an image sensor, a processing chip and at least one passive component, the first substrate comprising a top surface and a The image sensor is mounted on the top surface of the first substrate and electrically connected to the first substrate. The lens module includes a lens barrel, a lens holder and a lens group. Fixed in the lens barrel, the The lens module is mounted on the top surface of the image sensor, wherein: the image sensor package structure further comprises a second substrate, the processing chip and the at least one passive component are carried on a second substrate is electrically connected to the second substrate. The bottom surface of the first substrate defines a recess. The second substrate, and the processing chip and the at least one passive component carried on the second substrate are accommodated. Inside the groove. 6. The image forming apparatus according to claim 5, wherein: the lens holder has a lens holder top, a mirror base bottom, and a mirror holder shoulder connecting the top and the bottom of the lens holder. The lens barrel is sleeved on the mirror At the top of the seat, the image forming apparatus further includes 18 200947666 including a light transmitting component and a colloid, the mirror shoulder includes a shoulder bottom surface opposite to the image sensor, and the light transmitting component is fixed to the mirror by the glue On the underside of the shoulder of the shoulder. 7. The image forming apparatus according to claim 5, wherein the detector sealing structure is further configured to seal the = first wafer pad, the second substrate pad, and the plurality of second lead. = as stated in item 7 of the patent application scope 由環氧樹脂材料做成。 中·該封膠Made of epoxy resin material. The sealant 1919
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI458028B (en) * 2009-11-24 2014-10-21 Marvell World Trade Ltd Embedded chip packages

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI458028B (en) * 2009-11-24 2014-10-21 Marvell World Trade Ltd Embedded chip packages

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