TWI223974B - Tiny memory card and method for manufacturing the same - Google Patents

Tiny memory card and method for manufacturing the same Download PDF

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TWI223974B
TWI223974B TW92132650A TW92132650A TWI223974B TW I223974 B TWI223974 B TW I223974B TW 92132650 A TW92132650 A TW 92132650A TW 92132650 A TW92132650 A TW 92132650A TW I223974 B TWI223974 B TW I223974B
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memory card
patent application
item
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TW92132650A
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TW200518643A (en
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Sheng-Tsung Liu
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Advanced Semiconductor Eng
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Abstract

A tiny memory card comprises a chip, a plurality of outer terminals and a polymer passivation layer. A plurality of connection pads are formed on the active surface of the chip. Each outer terminal includes a UBM layer and an Au-plating layer on the connection pads. The polymer passivation layer is formed on the active surface of the chip for steadying the outer terminals. So the memory card has a tiny design.

Description

12239741223974

特別係有關於一種 五、發明說明(1) 【發明所屬之技術領域】 晶圓 本發明係有關於一種記憶卡 級微型記憶卡及其製造方法。 【先前技術】 :知記憶卡係為扁平卡片㈣,例如X"憶卡、 S,Med么記憶卡CF記憶… ίΐίΐ 憶卡外部不需要製作任何銲球 凸塊或引腳。習知之記憶卡係包含有至少一呓 欠 其控制電路、一電路基板及一塑膠外殼,其;該記 制電路係設於該電路基板’胃記憶體晶片係由: ^圓製作形成,並利用基板封裝製程將晶片裝配與 忒電路基板上,之後,再利用一模組組裝步驟將該裝設^ 記憶體晶片之電路基板結合於該塑膠外殼,整體記 厚度與尺寸不容易達到微小化設計,例如以伊 憶:〔幼Pi一 card〕而言,最小的尺寸僅能達=己 X Z5x 1.7min °In particular, the invention relates to a fifth, description of the invention (1) [Technical Field to which the Invention belongs] Wafer The present invention relates to a memory card grade micro memory card and a method for manufacturing the same. [Previous technology]: It is known that the memory card is a flat card, such as X " memory card, S, Med memory card CF memory ... ίΐίΐ There is no need to make any solder ball bumps or pins on the outside of the memory card. A conventional memory card includes at least one control circuit, a circuit substrate, and a plastic case; the written circuit is provided on the circuit substrate. The gastric memory chip is formed by: The substrate packaging process assembles the chip and the circuit board, and then uses a module assembly step to combine the circuit board with the ^ memory chip in the plastic case. The overall thickness and size are not easy to achieve a miniaturized design. For example, Yi Yi: [young Pi-card], the smallest size can only reach = own X Z5x 1.7min °

在美國專利第55 1 4856號中,其先前技術係揭示有一 ,習知記憶卡’其包含有―晶片、_電路基板及—塑膠外 喊,在该電路基板上進行裝設晶片並封膠,之後該電路基 板係翻轉結合至該塑膠外殼之凹穴處,該美國專利第 5 51 4 = 6號係提出一種改進之記憶卡製造方法,該記憶卡 係包含有晶片、基板及樹脂封膠層,該記憶卡用以導接一 讀卡機之外連接端係為該基板之接觸墊,該些接觸墊係設 置於該基板之一表面,在該基板之另一表面係設有半導體In U.S. Patent No. 55 1 4856, the prior art discloses that a conventional memory card includes a "chip, a circuit board, and a plastic shout, and a chip is mounted on the circuit board and sealed." After that, the circuit substrate is flipped and bonded to the cavity of the plastic case. The US Patent No. 5 51 4 = 6 proposes an improved method for manufacturing a memory card. The memory card includes a chip, a substrate and a resin sealing layer. The memory card is used to guide a contact pad of a card reader. The contact pads are connected to the substrate. The contact pads are disposed on one surface of the substrate and a semiconductor is disposed on the other surface of the substrate.

1223974 五、發明說明(2) 晶片及该樹脂封膠層,A制占1223974 V. Description of the invention (2) Wafer and the resin sealing layer, made of A

Ab并^二、X A人 在製程中’該樹脂封膠層係連續延 伸並形成於该包含有多個基板之單元基板〔_ substrate〕上,再切割該樹脂封到 罟於兮萤-A ι» 構件,然而仍需要把個別的晶片放 =:=板無法達到晶片尺寸記憶卡之型態。 型記在於提供一種微型記憶卡,該微 R 由—ϋΒΜ,〔凸塊下金屬層,Under 〕及一鍍金層所組成並設於一晶片之連 上’以省略習知記憶卡之基板與塑膠外殼等構成要 件,達到晶片尺寸記憶卡〔Chip Scale Car cSC〕微 小化尺寸要求。 < 微 一 f發明之次一目的係在於提供一種微型記憶卡,其係 在一晶片之主動表面上形成有複數個外連接端及一高 保護層,該分子保護層係與該些外連接端之鍍金層為共 面,以增進該些外連接端之保護。 、 本發明之再一目的係在於提供一種微型記憶卡,其中 該UBM層係至少包含有一黏著層與一阻障〗,其係與一、 金層構成微型記憶卡之外連接端,該黏著層與該阻障層^ 於一晶片之連接墊與該鍍金層之間,以穩進該鍍金層之、= 合並防止金屬擴散,使得該鍍金層不易由該晶片脫落。" 本發明之另一目的係在於提供一種微型記憶卡之製& 方法,利用晶圓級封裝製程在一晶圓之主動表面製作一= 含有UBM層與鍍金層之複數個外連接端以及一高分子保復^Ab and II. In the manufacturing process, the XA person's resin sealing layer is continuously extended and formed on the unit substrate [_ substrate] containing a plurality of substrates, and then the resin is cut and sealed to the fluorescein-A ι »Components, but still need to put individual chips =: = board can not reach the size of the chip size memory card. The type is to provide a micro memory card, the micro R is composed of-ϋΒΜ, [under the bump metal layer, Under] and a gold-plated layer and is connected to a chip 'to omit the conventional memory card substrate and plastic The housing and other components meet the miniaturization requirements of the Chip Scale Car cSC. < The second purpose of the micro-f invention is to provide a micro memory card, which is formed on the active surface of a chip with a plurality of external connection terminals and a high protection layer, and the molecular protection layer is connected to the external connections. The gold-plated layers of the terminals are coplanar to enhance the protection of the external connection terminals. Another object of the present invention is to provide a micro memory card, wherein the UBM layer includes at least an adhesive layer and a barrier, and the UBM layer and a gold layer form an outer connecting end of the micro memory card, and the adhesive layer And the barrier layer ^ between the connection pad of a wafer and the gold-plated layer to stabilize the gold-plated layer to prevent metal diffusion, so that the gold-plated layer is not easy to fall off the wafer. " Another object of the present invention is to provide a method for manufacturing a micro memory card. A wafer-level packaging process is used to fabricate an active surface of a wafer = a plurality of external connection terminals including a UBM layer and a gold plating layer, and One Polymer Recovery ^

五、發明說明(3) ί數ί ΐ荆沿該晶圓之切割線單體化分離該曰曰曰®,而成為 士里S己憶卡,以達到記憶卡之晶圓級製造,其省略 °己隐卡針對個別晶片之基板封裝步驟與塑膠外殼之模 組組裝步驟。 、 本發明之又一目的係在於提供一種微型記憶卡之製造 方2,其係在一晶圓級封裝製程中,相鄰晶片之連接墊係 在一晶圓之切割線兩側一體相連,以利複數個外連接端之 UBM層與鍍金層之形成。 依本發明之微型記憶卡,其係主要包含有一晶片、複 數個外連接端及一高分子保護層,該晶片係具有一主動表 面及一對應之背面,該主動表面係形成有複數個連接墊及 一保護層,較佳地,該些連接墊在晶圓級封裝製程中係與 一晶圓之切割線連接,並形成於該主動表面之一側邊,每 一外連接端係包含一UBM層〔凸塊下金屬層,Under Bump Metal lurgy〕及一鍍金層,其中該UBM層係以微影顯像技 術覆蓋於對應之該連接墊,該鍍金層係形成於該UBM層 上,較佳地,該UBM層係由一黏著層、一阻障層及一融合 層所組成,並以局部覆蓋至該保護層為較佳,而該高分子 保護層係形成於該晶片之主動表面,該高分子保護層係選 自於防銲層〔solder mask〕、有機保護層〔organic passivation layer〕與感光乾膜〔dry film〕之其中之 一,在其中一具體實施例中,該高分子保護層係與該些外 連接端之鍍金層為共平面。 【實施方式】V. Description of the invention (3) ί 数 ί The ΐ Jing unitized along the cutting line of the wafer and separated it, and became a Siri memory card to achieve wafer-level manufacturing of memory cards, which is omitted ° Hidden card's substrate packaging steps for individual chips and module assembly steps for plastic housings. Another object of the present invention is to provide a manufacturer 2 of a micro memory card, which is in a wafer-level packaging process, and the connection pads of adjacent wafers are integrally connected on both sides of a cutting line of a wafer to The UBM layer and the gold-plated layer are formed on a plurality of external connection ends. The micro memory card according to the present invention mainly includes a chip, a plurality of external connection ends, and a polymer protective layer. The chip has an active surface and a corresponding back surface, and the active surface is formed with a plurality of connection pads. And a protective layer, preferably, the connection pads are connected to a cutting line of a wafer in a wafer-level packaging process, and are formed on one side of the active surface, and each outer connection end includes a UBM Layer [Under Bump Metal lurgy] and a gold-plated layer, wherein the UBM layer is covered by a lithography imaging technology on the corresponding connection pad, and the gold-plated layer is formed on the UBM layer, preferably Ground, the UBM layer is composed of an adhesive layer, a barrier layer and a fusion layer, and it is preferable to partially cover the protective layer, and the polymer protective layer is formed on the active surface of the wafer. The polymer protective layer is selected from one of a solder mask, an organic passivation layer, and a dry film. In one embodiment, the polymer protective layer is Tied to the External connections of the gold plating layer coplanar. [Embodiment]

第7頁 1223974 五、發明說明(4) '— - 參閱所附圖式,本發明將列舉以下之實施例說明。 ^ 依據本發明之一具體實施例,請參閱第1及2圖,一種 微^記憶卡係主要包含有一晶片丨〇、複數個外連接端2〇及· 一高分子保護層30,該晶片丨〇係具有一主動表面丨丨及一對 應之背面1 2,該晶片1 〇係可為半導體、塑膠或玻璃材質, 較佳地’該晶片1 〇係為一種系統單晶片 〔System-On-Chip〕,其係包含有非揮發性記憶體單元與 Input/Output控制單元或解碼單元,其係利用積體電路製 程製作於該主動表面11,其中較常見之非揮發性記憶體單 疋係為快閃記憶體,此外,該主動表面丨丨係形成有複數個 連接墊13及一保護層14,該些連接墊13係利用重分配製程〇 將其設置於該微型記憶卡之該些外連接端2 〇。 本發明之每一外連接端20係包含一UBM層21〔凸塊下 金屬層,Under Bump Metal lurgy〕及一鍍金層22,並且 該UBM層21係形成於該晶片1〇之連接墊13上,其不同於習 知記憶卡之外連接端,將外連接端設置於基板或塑膠外殼 之金屬墊〈圖未繪出〉,其中該UBM層21係以微影顯像技 術圖案化覆蓋於對應之連接墊13上,該鍍金層22係形成於 該UBM層21上,該UBM層21係為一種複合金屬層,其包含有 一黏著層2 11及一阻障層2 1 2,該黏著層2 11係覆蓋於對應❿ 之該些連接墊1 3,該黏著層2 11之材質可以是鈦、鈦鎢合 金、紹或鉻,用以增強與該些連接墊13之結合,依據該些 外連接端20之鍍金層22之顯露面積不同,該黏著層211可 更局部覆蓋至該保護層1 4,以擴大該鍍金層2 2之形成面Page 7 1223974 V. Description of the Invention (4) '--With reference to the attached drawings, the present invention will enumerate the following embodiments. ^ According to a specific embodiment of the present invention, please refer to FIGS. 1 and 2. A micro memory card system mainly includes a chip 丨 0, a plurality of external connection terminals 20, and a polymer protective layer 30. The chip 丨〇 series has an active surface 丨 丨 and a corresponding back surface 12, the chip 1 0 can be a semiconductor, plastic or glass material, preferably 'the chip 1 0 is a system-on-chip ], Which includes a non-volatile memory unit and an Input / Output control unit or a decoding unit. It is fabricated on the active surface 11 by using integrated circuit manufacturing process. Among them, the more common non-volatile memory unit is faster. In addition, a plurality of connection pads 13 and a protective layer 14 are formed on the active surface. The connection pads 13 are arranged on the external connection ends of the micro memory card by a redistribution process. 2 〇. Each of the outer connection ends 20 of the present invention includes a UBM layer 21 [Unbump Metal lurgy] and a gold plating layer 22, and the UBM layer 21 is formed on the connection pad 13 of the wafer 10 It is different from the external connection end of the conventional memory card. The external connection end is arranged on a substrate or a metal pad of a plastic casing (not shown). The UBM layer 21 is patterned and covered with a photolithography technology. On the connection pad 13, the gold-plated layer 22 is formed on the UBM layer 21. The UBM layer 21 is a composite metal layer, which includes an adhesive layer 2 11 and a barrier layer 2 1 2. The adhesive layer 2 11 covers the connection pads 13 corresponding to ❿, and the material of the adhesive layer 2 11 can be titanium, titanium tungsten alloy, Shao or chrome, to enhance the connection with the connection pads 13, according to the external connections The exposed area of the gold-plated layer 22 at the end 20 is different, and the adhesive layer 211 can be more partially covered to the protective layer 14 to expand the formation surface of the gold-plated layer 22.

第8頁 1223974 五、發明說明(5) 積,而該阻障層2 1 2係覆蓋在該黏著層2 1 1上,該阻障層 212之材質可以是鎳飢合金、絡銅合金或錄,用以防止該 鍍金層22金屬擴散至對應連接墊13而損害該晶片1〇,較佳 · 地,該UBM層21更包含有一融合層213,其係形成於該阻障 層212上,該融合層213之材質可以是銅、鈀或金,用以增 進該鍍金層2 2結合於該阻障層2 1 2上,該鍍金層2 2係以電 鍵等方式形成於該UBM層21上,或者該鑛金層22係可形成 於該些連接墊13,並具有一顯露於該晶片主動表面η之表 面,以作為該些外連接端2 〇之導接面,較佳地,該鍍金層 22係使得該些外連接端20擴大且凸起於該晶片1〇之主動表 面11,以供外部電子產品之讀卡連接器導電接觸。 則 而該高分子保護層30係形成於該晶片1〇之主動表面 11 ’用以保護該晶片1 〇且具有防止該些外連接端2 〇過於凸 起而易於脫落之功效,且該高分子保護層3〇係具有複數個 開孔31 ’其係用以顯露該些外連接端2〇之鍍金層22,該高 分子保濩層30係選自於防銲層〔s〇i(ier mask〕、有機保 濩層〔organic passivation layer〕與感光乾膜〔dry film〕之其中之一,在本具體實施例中,該高分子保護層 30係與該些外連接端20之鍍金層22為共平面,或者該鍍金 層22係可較低於該高分子保護層30,該高分子保護層3〇係+ 可有效穩固該些外連接端2 〇。 因此,本發明之微型記憶卡係利用「外連接端2〇係由 一UBM層21及一鍍金層22所組成並直接設於該晶片10之連 接墊1 3上」之結構特徵,以省略習知記憶卡所需之基板與Page 1223974 V. Description of the invention (5), and the barrier layer 2 1 2 is covered on the adhesive layer 2 1 1, and the material of the barrier layer 212 may be nickel alloy, copper alloy or copper alloy. To prevent the metal plating layer 22 from diffusing to the corresponding connection pad 13 and damaging the wafer 10, preferably, the UBM layer 21 further includes a fusion layer 213 formed on the barrier layer 212, the The material of the fusion layer 213 may be copper, palladium, or gold to promote the bonding of the gold-plated layer 22 to the barrier layer 2 1 2. The gold-plated layer 2 2 is formed on the UBM layer 21 by means of electrical bonding. Alternatively, the mineral gold layer 22 may be formed on the connection pads 13 and have a surface exposed on the active surface η of the chip as a conductive surface of the external connection ends 20. Preferably, the gold plating layer The 22 series makes the external connection ends 20 expand and protrude from the active surface 11 of the chip 10 for conductive contact of the card connector of external electronic products. Then, the polymer protection layer 30 is formed on the active surface 11 ′ of the wafer 10 to protect the wafer 10 and has the effect of preventing the external connection ends 20 from being too convex and easy to fall off, and the polymer The protective layer 30 has a plurality of openings 31 ′, which are used to expose the gold-plated layer 22 of the external connection ends 20, and the polymer protective layer 30 is selected from the solder resist layer [s〇i (ier mask ], One of an organic passivation layer and a dry film. In this specific embodiment, the polymer protective layer 30 is a gold-plated layer 22 connected to the external connection ends 20. Coplanar, or the gold-plated layer 22 can be lower than the polymer protective layer 30, and the polymer protective layer 30 can be used to effectively stabilize the external connection terminals 20. Therefore, the micro memory card of the present invention uses "The external connection terminal 20 is composed of a UBM layer 21 and a gold-plated layer 22 and is directly provided on the connection pad 13 of the chip 10", in order to omit the substrate and

第9頁 1223974 五、發明說明(6)Page 9 1223974 V. Description of the invention (6)

塑cti=r成「要件,該微型記憶卡係W “=t、e,cri:$jcsc〕,其尺寸係能達到15χ15χ 尺寸記憶卡達到7卡微小化之功效,所謂「晶片 點五倍,其係為‘:2卡之尺寸不大於該晶片10面積之-一 、為本發明之微型記憶卡所能達到之功效之 制招:二li用以局限本發明之構件型態,因為該晶片1 0在 ",用習知薄化與蝕刻技術而使得該晶片1 〇尺寸產 、、。、並且該微型記憶卡之製造方法可運用晶圓級封裝 程,以省略習知記憶卡針對個別晶片之基板 膠外殼之模組組裝步驟,其詳細如后。 一關於上述微型記憶卡之製造方法,第3圖至第6圖係繪 不在製程中所使用晶圓之局部截面示意圖,請參閱第3 圖,首先,提供有一晶圓5〇,該晶圓50係包含有複數個一 體連,如上所述之晶片i 〇以及在該些晶片i 〇之間之切割線 51,母一 μ片10係具有一主動表面丨丨及一對應之背面12 , 每一晶片1 0之主動表面1丨係形成有複數個連接墊丨3及一保 護層1 4,在本實施例中,在晶圓級封裝之製程中,相鄰晶 片1 0之該些連接墊1 3配置位置係與該晶圓5 〇之切割線5丨相 連接而形成於對應主動表面11之一側邊,該保護層14係顯 露兩相鄰不同晶片1 〇之該些連接墊丨3 ;然後,請參閱第4 圖,利用濺鍍〔sputtering〕等方法在該晶圓5〇上主動表 面1 1形成該黏著層2 1 1、該阻障層2 1 2及該融合層2 1 3,並 可選擇性配合微影成像〔photolithography〕與餘刻技 術,將該黏著層2 11、該阻障層21 2及該融合層2 1 3蝕刻成Plastic cti = r becomes "required, this micro memory card is W" = t, e, cri: $ jcsc], its size can reach 15x15χ size memory card to achieve the effect of miniaturization of 7 cards, the so-called "chip point five times, It is': the size of 2 cards is not larger than 10 areas of the chip-one, the function of the micro memory card of the present invention: two li is used to limit the component type of the present invention, because the chip 10 In ", the conventional thinning and etching technology is used to make the wafer 10 size, and the manufacturing method of the micro memory card can use the wafer level packaging process to omit the conventional memory card for individual The steps for assembling the module of the substrate and the shell of the wafer are detailed as follows. Regarding the manufacturing method of the above micro memory card, Figs. 3 to 6 are schematic diagrams of partial cross-sections of wafers not used in the manufacturing process, please refer to the 3 Figures. First, a wafer 50 is provided. The wafer 50 includes a plurality of integrated wafers, as described above, the wafer i 0 and the cutting lines 51 between the wafers i 0, and a mother piece 10 Has an active surface and a corresponding back 12. The active surface 1 of each chip 10 is formed with a plurality of connection pads 3 and a protective layer 14. In this embodiment, in a wafer-level packaging process, the adjacent chips 10 should The connection positions of the connection pads 13 are connected to the cutting line 5 丨 of the wafer 50, and are formed on one side of the corresponding active surface 11. The protective layer 14 exposes these connections of two adjacent different wafers 10. Pad 丨 3; then, referring to FIG. 4, using sputtering and other methods to form the adhesive layer 2 1 1, the barrier layer 2 1 2 and the fusion layer on the active surface 11 of the wafer 50. 2 1 3, and optionally cooperate with photolithography and post-etching technology to etch the adhesive layer 2 11, the barrier layer 21 2 and the fusion layer 2 1 3

第10頁 1223974 五、發明說明(7) 上述複數個覆蓋於對應連接墊13之UBM層21,或者,該ϋΒΜ 層21亦可在該鍍金層22形成之後,以該鍍金層22為罩幕 〔mask〕將該UBM層21以蝕刻等方式形成墊狀,〔圖未緣 出〕;之後’請參閱第5圖,利用旋塗〔s p i n coating〕、乾膜貼附或印刷技術在該晶圓5〇之該些主動 表面11形成該高分子保護層30,該高分子保護層3〇係具有 複數個開孔3 1,該些開孔3 1係對應於該些連接墊丨3,以顯 露該些UBM層21 ;之後Page 10 1223974 V. Description of the invention (7) The plurality of UBM layers 21 covering the corresponding connection pads 13, or the 或者 BM layer 21 may also be formed with the gold-plated layer 22 as a cover [ mask] The UBM layer 21 is formed into a pad shape by etching or the like, [not shown in the figure]; afterwards, 'refer to FIG. 5 and use spin coating, dry film attachment or printing technology on the wafer 5 The active surfaces 11 form the polymer protective layer 30. The polymer protective layer 30 has a plurality of openings 31, and the openings 31 correspond to the connection pads 3 to expose the Some UBM layers 21; after

該鍍金層22形成於該UBM層21上,在本實施例中,該晶圓 50之切割線51係電性導接該些連接墊13,其可作為該些金 金層22之電鍍連接線,較佳地,在形成該鍍金層22後可爭 施一平坦化研磨步驟,以使該高分子保護層3〇與該些鍍4 層22共平面;最|,沿該些切割線51單體化分離該晶圓 5〇丄以在晶圓級型態製造出上述如第j及2圖所示之微型奇 :“本發明其省略習知記憶卡針對個別晶片之基板封弟 膠:卜殼之模組組裝步驟’較佳地,在單艘化分截 些連接Μ# 極處理或電鍍’以在$The gold plating layer 22 is formed on the UBM layer 21. In this embodiment, the cutting lines 51 of the wafer 50 are electrically connected to the connection pads 13, which can be used as the electroplated connection lines of the gold gold layers 22. Preferably, after the gold-plated layer 22 is formed, a planarization grinding step may be applied to make the polymer protective layer 30 and the 4 plated layers 22 coplanar; most |, along the cutting lines 51 single Separate the wafer 50 ° in size to manufacture the above-mentioned miniature chip as shown in Figures j and 2 at the wafer level: "In the present invention, the conventional memory card is omitted to seal the substrate of individual wafers: Bu The module assembly steps of the shell 'preferably, connect the M # electrode processing or plating in a single vessel to

~太路ί或该UBM層21之顯露表面形成一抗蝕保護膜。 A m 之保δ隻範圍當視後附之申請專利範圍所界定;ί 2所知此項技藝者’在不脫離本發明之精神“ 壬何變化與修改,均屬於本發明之保護範圍。~ Tailu or the exposed surface of the UBM layer 21 forms a resist protection film. The scope of the guarantee δ of A m is only defined by the scope of the attached patent application; 2 It is known to the person skilled in the art that any changes and modifications that do not depart from the spirit of the present invention belong to the protection scope of the present invention.

1223974 圖式簡單說明 【圖式簡單說明】 第1 圖 • 依 本 發 明 之一 具體實施 例, 一種微 型 記 憶 卡 之 截 面 示 意 圖; 第2 圖 : 依 本 發 明 之一 具體實施 例, 一種微 型 記 憶 卡 之 具 有 外 連 接端 之表面示 意圖 丨;及 第3至6 圖 依 本發 明 之微 型記憶卡 之襲 ί造方法 , 用 以 製 造 該 微 型 記 憶卡 之晶圓於 製程中之截 面 不 意 圖 〇 元件 符 號 簡 單 說 明 ! 10 晶 片 11 主動表面 12 背 面 13 連 接 墊14 保護層 20 外 連 接 端 21 UBM層 22 鍍 金 層 211 黏 著 層 212 阻障層 213 融 合層 30 南 分 子 保 護 層 31 開孔 50 晶 圓 51 切割線1223974 Brief description of the drawings [Simplified description of the drawings] FIG. 1 • A schematic cross-sectional view of a micro memory card according to a specific embodiment of the present invention; FIG. 2: A micro memory card according to a specific embodiment of the present invention Schematic diagram of the surface with external connection ends; and Figures 3 to 6 according to the micro memory card manufacturing method of the present invention, the cross-section of the wafer used to manufacture the micro memory card in the manufacturing process is not intended. Component symbols are simply explained ! 10 Chip 11 Active surface 12 Back 13 Connection pad 14 Protective layer 20 Outer connection end 21 UBM layer 22 Gold plating layer 211 Adhesive layer 212 Barrier layer 213 Fusion layer 30 South molecular protective layer 31 Opening hole 50 Wafer 51 Cutting line

第12頁Page 12

Claims (1)

1223974 六、申請專利範圍 【申請專利範圍】 1、 一種微型記憶卡,包含·· 一晶片,其係具有一主動表面及一對應之背面,該 動表面係形成有複數個連接墊及一保護層; 複數個外連接端,每一外連接端係包含一 UBM層〔凸 塊下金屬層,Under Bump Metallurgy〕及一錄金層, 其中該UBM層係覆蓋於對應之連接墊,該鍍金層係 於該UBM層;及 乂 南分子保護層’其係形成於該晶片之主動表面。 2、 如申請專利範圍第1項所述之微型記憶卡,其中該高 分子保護層係與該鍍金層為共平面。 ^同 其中該些 其中該些 其中該 其中該 其中該高 3、 如申請專利範圍第1項所述之微型記憶卡 UBM層係局部覆蓋至該晶片之保護層。 4、 如申請專利範圍第1項所述之微型記憶卡 外連接端係設於該晶片之主動表面之一側邊 5、 如申請專利範圍第1項所述之微型記憶卡 UBM層係包含有一黏著層及一阻障層。 6、 如申請專利範圍第5項所述之微型記憶卡 ϋΒΜ層係另包含有一融合層。 7、 如申請專利範圍第1項所述之微型記憶卡.穴τ软肉 分子保護層係選自於防銲層、有機保護層與感光乾膜之 其中之一。 8、 如申請專利範圍第1項所述之微型記憶卡,其中該晶 片係包含有非揮發性記憶體單元與控制單元。1223974 VI. Scope of patent application [Scope of patent application] 1. A micro memory card, including a chip, which has an active surface and a corresponding back surface, the moving surface is formed with a plurality of connection pads and a protective layer ; A plurality of external connection terminals, each of which includes a UBM layer (under bump metal layer, Under Bump Metallurgy) and a gold recording layer, wherein the UBM layer covers the corresponding connection pad, the gold plating layer is On the UBM layer; and onan molecular protective layer 'which is formed on the active surface of the wafer. 2. The micro memory card according to item 1 of the scope of patent application, wherein the polymer protective layer is coplanar with the gold-plated layer. ^ Some of which, which of which, which of which, which of which is high 3. The micro memory card UBM layer as described in item 1 of the scope of patent application is partially covered to the protective layer of the chip. 4. The external connection end of the micro memory card described in item 1 of the scope of patent application is located on one side of the active surface of the chip 5. The UBM layer of the micro memory card described in item 1 of the scope of patent application contains a Adhesive layer and a barrier layer. 6. The micro memory card described in item 5 of the patent application, the BM layer further includes a fusion layer. 7. The micro memory card according to item 1 of the scope of patent application. Cavity τ soft meat The molecular protective layer is selected from one of a solder resist layer, an organic protective layer, and a photosensitive dry film. 8. The micro memory card according to item 1 of the scope of patent application, wherein the chip system includes a non-volatile memory unit and a control unit. 第13頁 1223974Page 13 1223974 9捏!請專利範圍第8項所述之微型記憶卡,其中該非 揮發性兄憶體單元係為快閃記憶體。 1〇微=2利範圍第8項所^之微型記憶卡,其中該 11 1 ί Ϊ卡之尺寸係不大於該晶片面積之一點五倍。 11、一種微型記憶卡之製造方法,包含: 提供一晶圓,該晶圓係包含有複數個晶片以及在該 ,晶片之間之切割線,每一晶片係具有一主動表面及 一對應之背面,該主動表面係形成有複數個連接墊及 一保護層; 形成一UBM層〔凸塊下金屬層,Under Bump Metal lurgy〕於該些晶片之主動表面,該UBM層係圖案 化覆蓋於對應之連接墊; 形成一高分子保護層於該晶片之主動表面,該高分 子保護層係具有複數個開孔,該些開孔係對應於該些 連接墊; 形成一鍍金層於該UBM層;及 沿該些切割線單體化分離該晶圓。 1 2、如申請專利範圍第11項所述之微型記憶卡之製造方 法,其中該高分子保護層係與該锻金層為共平面。9 pinch! The micro memory card according to item 8 of the patent, wherein the non-volatile memory unit is a flash memory. 10 micro = 2 micro memory card as described in the eighth item, wherein the size of the 11 1 Ϊ card is not more than five times the area of the chip. 11. A method for manufacturing a micro memory card, comprising: providing a wafer, the wafer system comprising a plurality of wafers and a cutting line between the wafers, each wafer having an active surface and a corresponding back surface The active surface is formed with a plurality of connection pads and a protective layer; a UBM layer (under bump metal layer, Under Bump Metal lurgy) is formed on the active surfaces of the wafers, and the UBM layer is patterned to cover the corresponding surface. A connection pad; forming a polymer protection layer on the active surface of the wafer, the polymer protection layer having a plurality of openings corresponding to the connection pads; forming a gold plating layer on the UBM layer; and The wafer is singulated along the dicing lines. 1 2. The method of manufacturing a micro memory card according to item 11 of the scope of the patent application, wherein the polymer protective layer and the forged gold layer are coplanar. 1 3、如申請專利範圍第11項所述之微型記憶卡之製造方 法,其中在提供晶圓之步驟中,相鄰晶片之該些連接 墊係相互連接。 1 4、如申請專利範圍第丨1或1 3項所述之微型記憶卡之製 造方法,其中在形成該UBM層之步驟中’在相鄰晶片之1 3. The method of manufacturing a micro memory card according to item 11 of the scope of patent application, wherein in the step of providing the wafer, the connection pads of adjacent wafers are connected to each other. 14. The method for manufacturing a micro memory card according to item 1 or item 13 of the scope of patent application, wherein in the step of forming the UBM layer, 1223974 六、申請專利範圍 連接墊上之UBM層係相互連接。 1 5、如申請專利範圍第π項所述之微型記憶卡之製造方 法’其中該些UBM層係局部覆蓋至該晶片之保護層。 1 6、如申請專利範圍第1丨項所述之微型記憶卡之製造方 法’其中該UBM層係包含有一黏著層及一阻障層。 1 7、如申請專利範圍第1 6項所述之微型記憶卡之製造方 法,其中該UBM層係另包含有一融合層。 1 8、如申請專利範圍第11項所述之微型記憶卡之製造方 法’其中該高分子保護層係選自於防銲層、有機保護 層與感光乾膜之其中之一。 ' 1 9、如申請專利範圍第丨丨項所述之微型記憶卡之製造方 法’其中該晶片係包含有非揮發性記憶體單元與控 單元。 、王市J 2〇、如申請專利範圍第19項所述之微型記憶卡之製造 法,其中該非揮發性記憶體單元係為快閃記憶體。w 21、一種微型記憶卡,包含: ' 一晶片,其係具有一主動表面及一對應之背面,該 主動表面係形成有複數個連接墊及一保護層; ^ 複數個外連接端,每一外連接端係包含一 其係形成於該些連接塾上;及 一高分子保護層,係形成於該晶片之主動表面。 22二如申請專利範圍第21項所述之微型記憶卡,。 高分子保護層係與該鍍金層為共平面。 、中該 23、如申請專利範圍第21項所述之微型記愔 愿卞,其中該 ^3974 六、申請專利範圍 些外連接端係設於該晶片之主動表面之一側邊。 2 4、如申請專利範圍第21項所述之微型記憶卡,其中該 高分子保護層係選自於防銲層、有機保護層與感光乾 膜之其中之*。 25、 如申請專利範圍第21項所述之微型記憶卡,其中該 曰曰曰片係包含有非揮發性記憶體單元與控制單元。 26、 如申請專利範圍第25項所述之微型記憶卡,其中該 非揮發性記憶體單元係為快閃記憶體。 27、 一種微型記憶卡之製造方法,包含·· 提供一晶圓,該晶圓係包含有複數個晶片以及在該 些晶片之間之切割線,每一晶片係具有一主動表面及 一對應之背面,該主動表面係形成有複數個連接墊及 一保護層; 形成一高分子保護層於該晶片之主動表面,該高分 子保護層係具有複數個開孔,對應於該些連接墊; 形成一鑛金層於該些連接墊上;及 沿該些切割線單體化分離該晶圓。 2 8、如申請專利範圍第2 7項所述之微型記憶卡之製造方 法’其中該兩分子保護層係與沒鍵金層為共平面。 2 9、如申請專利範圍第2 7項所述之微型記憶卡之製造方 法,其中在提供晶圓之步驟中,相鄰晶片之該些連接 墊係相互連接。 3 0、如申請專利範圍第2 7項所述之微型記憶卡之製造方 法’其中該高分子保護層係選自於防銲層、有機保護1223974 VI. Scope of patent application The UBM layers on the connection pads are connected to each other. 15. The method for manufacturing a micro memory card according to item π of the scope of patent application, wherein the UBM layers are partially covered to the protective layer of the chip. 16. The method for manufacturing a micro memory card according to item 1 丨 in the scope of the patent application, wherein the UBM layer includes an adhesive layer and a barrier layer. 17. The method for manufacturing a micro memory card according to item 16 of the scope of patent application, wherein the UBM layer further comprises a fusion layer. 18. The method for manufacturing a micro memory card according to item 11 of the scope of the patent application, wherein the polymer protective layer is selected from one of a solder resist layer, an organic protective layer, and a photosensitive dry film. '1 9. The method for manufacturing a micro memory card as described in item 丨 丨 of the patent application range', wherein the chip includes a non-volatile memory unit and a control unit. Wangshi J20. The method for manufacturing a micro memory card as described in item 19 of the scope of patent application, wherein the non-volatile memory unit is a flash memory. w 21. A micro memory card comprising: 'a chip having an active surface and a corresponding back surface, the active surface is formed with a plurality of connection pads and a protective layer; ^ a plurality of external connection terminals, each The outer connection end includes a connection layer formed on the connection pads; and a polymer protection layer formed on the active surface of the chip. 22 2. A micro memory card as described in item 21 of the scope of patent application. The polymer protective layer is coplanar with the gold-plated layer. Zhongzhong 23. The miniature notebook as described in item 21 of the scope of patent application, where ^ 3974 VI. Scope of patent application The external connection terminals are located on one side of the active surface of the chip. 24. The micro memory card according to item 21 of the patent application scope, wherein the polymer protective layer is selected from the group consisting of a solder resist layer, an organic protective layer, and a photosensitive dry film *. 25. The micro memory card according to item 21 of the scope of the patent application, wherein the tablet system includes a non-volatile memory unit and a control unit. 26. The micro memory card as described in item 25 of the patent application scope, wherein the non-volatile memory unit is a flash memory. 27. A method for manufacturing a micro memory card, comprising: providing a wafer, the wafer system comprising a plurality of wafers and a cutting line between the wafers, each wafer having an active surface and a corresponding On the back side, the active surface is formed with a plurality of connection pads and a protective layer; a polymer protective layer is formed on the active surface of the wafer, and the polymer protective layer has a plurality of openings corresponding to the connection pads; A layer of mineral gold is on the connection pads; and the wafer is singulated separately along the cutting lines. 28. The method of manufacturing a micro memory card as described in item 27 of the scope of the patent application, wherein the two molecular protective layers are coplanar with the non-bonded gold layer. 29. The method for manufacturing a micro memory card according to item 27 of the scope of patent application, wherein in the step of providing the wafer, the connection pads of adjacent wafers are connected to each other. 30. The method for manufacturing a micro memory card as described in item 27 of the scope of the patent application, wherein the polymer protective layer is selected from a solder resist layer and an organic protection layer. 第16頁 1223974 六、申請專利範圍 層與感光乾膜之其中之一。 3 1、如申請專利範圍第27項所述之微型記憶卡之製造方 法,其中該晶片係包含有非揮發性記憶體單元與控制 單元。 3 2、如申請專利範圍第3 1項所述之微型記憶卡之製造方 法,其中該非揮發性記憶體單元係為快閃記憶體。Page 16 1223974 6. Scope of patent application One of the layer and photosensitive dry film. 3 1. The method of manufacturing a micro memory card as described in item 27 of the scope of patent application, wherein the chip includes a non-volatile memory unit and a control unit. 3 2. The method for manufacturing a micro memory card as described in item 31 of the scope of patent application, wherein the non-volatile memory unit is a flash memory.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI385582B (en) * 2005-02-28 2013-02-11 Renesas Electronics Corp An adapter for a memory card and a memory card
TWI394235B (en) * 2008-04-24 2013-04-21 Unimicron Technology Corp Package substrate and method for fabricating the same
TWI402755B (en) * 2005-02-07 2013-07-21 Sandisk Corp Secure memory card with life cycle phases
TWI405129B (en) * 2005-11-14 2013-08-11 Tyco Electronics France Sas Smart card body, smart card and manufacturing process for same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI402755B (en) * 2005-02-07 2013-07-21 Sandisk Corp Secure memory card with life cycle phases
TWI385582B (en) * 2005-02-28 2013-02-11 Renesas Electronics Corp An adapter for a memory card and a memory card
TWI405129B (en) * 2005-11-14 2013-08-11 Tyco Electronics France Sas Smart card body, smart card and manufacturing process for same
TWI394235B (en) * 2008-04-24 2013-04-21 Unimicron Technology Corp Package substrate and method for fabricating the same

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