TWI220777B - Package process of image sensor chip - Google Patents

Package process of image sensor chip Download PDF

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Publication number
TWI220777B
TWI220777B TW92118933A TW92118933A TWI220777B TW I220777 B TWI220777 B TW I220777B TW 92118933 A TW92118933 A TW 92118933A TW 92118933 A TW92118933 A TW 92118933A TW I220777 B TWI220777 B TW I220777B
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Taiwan
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wafer
image sensing
chip
scope
packaging process
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TW92118933A
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Chinese (zh)
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TW200503174A (en
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Tz-Shiang Huang
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Ampak Technology Inc
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Abstract

The present invention discloses a package process of image sensor chip. A molding process is mainly used for sealing the package process of image sensor chip. Compared to the package process of image sensor chip in the prior art, the design not only effectively reduces the manufacturing cost, but also increases the efficiency and stability of the image sensor during operation. In addition, the design of the present invention can simplify the package process of image sensor chip. Therefore, the design of the present invention can provide a package process of image sensor chip, which is more efficient and reliable than that of the prior art.

Description

五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種晶片封 種影像感測晶片的封裝製程。1衣耘,特別是有關於一 【先前技術】 i、 電子封裝製程的目的在赋予 構,使其能發揮穩定的功能賦元件-套組織架 的配角之一。辜會卜,.±止於積體電路製程技術 了物二化學;;技術的範圍涵蓋敍,其應用 彳L·子、機械、材料、電機··· 金屬、陶瓷、高分子等各弋久祥的 ⑪,也使用了 ,開發積體電路封裴技術:重要性不=f微電子層次中 程技術或微電子相關技術,故世界各國莫;路製 求得技術領先地位。在矽、砷化鎵或壓電材料 口 : j 由薄膜製程技術所製作的積體電路元件之':猎 結構亦極脆弱’因而須將其包裝以防止外力或=去: 破壞,進而避免物理性質的破壞與化學性的二’:、 確保訊號與能量的傳遞,使其發揮正常且精確二:曰: ”於砰化鎵或I電材料等元件的電性功能更必二由二 至表現之。因&,積體電路封裝即在建立元件的保 功能表現,其始於晶片製程完成I,封裝製程更包 架設計及晶片的黏結固冑、電路連線、結構封膠鱼‘肱 之結合、系統組合以至於產品完成之間的所有浐,版 的在於提供承載與結構保護的功能以保護I c事 ”目 性質的破壞或化學性質的侵触;提供能量的傳遞 1220777 五、發明說明(2) 1的訊號分佈;避免訊號延遲的產生,影響系統的運作; 提供優良的散熱途徑。 封裝是以建立各層級間介面結合(Interc〇nnecti〇n 為基礎的技術,其製程技術以五個不同層級區分:第零 = = 晶片層級介面結合),其在於晶片上的電路設計與 ^ ,第一層級(單晶片或多晶片模組),其係為將晶片 ,,於殼體中並完成電路及密封保護的製程,此亦稱為模 、、且(M〇dule )或晶片層級封裝(Chip-level packages )、 绝ΐ二層級(印刷電路板,PCB ),其係為將第一層級封 衷元成的元件組合於電路卡上的製程;第三層級(母板 站ίΐ將數個電路版組合於主機板(Board)上成為次系 1成^丄!四層'級(電子產品),其係將數個次系統組 電…(⑽)的製程。在第-層級和 常係‘銲線7區分相當模糊,其所使用的關鍵技術通 ’、”、A、、、、 σ (Wlre B〇nding )、捲帶式自動接合( 厂二:二—一,TAB)和覆晶接合(F1ip Chip /層、、及封裝。隨著產品設計的需求使用者目 媸$外二積體電路元件不論在内部的功能設計、会且人处 的元件尺寸、封裝型態、插腳數目、腳距;; 二類可装技術等都有顯著的變化。若依材料的“V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a packaging process for a wafer sealing image sensing chip. 1 clothing, in particular, related to a [previous technology] i. The purpose of the electronic packaging process is to give the structure, so that it can play a stable function. Gu Huibu ,. ± stops at the integrated circuit process technology of the second physical chemistry; the scope of the technology covers Syria, its application 彳 L · zi, machinery, materials, motors ... metal, ceramics, polymers, etc. for a long time Xiang Xun also used to develop integrated circuit sealing technology: importance is not equal to f microelectronics level medium-range technology or microelectronics related technology, so countries around the world can not; road system to obtain technological leadership. At the mouth of silicon, gallium arsenide or piezoelectric materials: j of the integrated circuit components made by the thin film process technology: the hunting structure is also extremely fragile, so it must be packaged to prevent external forces or = go: damage, and then physical The destruction of nature and the chemical nature of the two ':, to ensure the transmission of signals and energy, so that it can play normal and accurate 2: said: "The electrical functions of components such as gallium gallium or I electrical materials must be two to two. Because of & integrated circuit packaging is to establish the guaranteed performance of components, it begins with the completion of the wafer process I, the packaging process is more package design and chip bonding, circuit connection, structural sealing glue The combination of the combination of the system and even the completion of the product, the version is to provide the function of carrying and structural protection to protect the I c "thing" destruction or chemical interference; provide energy transfer 1220777 V. Description of the invention (2) The signal distribution of 1; avoid the generation of signal delay and affect the operation of the system; provide excellent heat dissipation methods. Packaging is based on the establishment of inter-level interface bonding (IntercOnnecti〇n-based technology, its process technology is divided into five different levels: the zeroth = = chip-level interface combination), which lies in the circuit design on the chip and ^, The first level (single-chip or multi-chip module) is a process of placing a chip in a case and completing the circuit and sealing protection. This is also called mold, and (mold) or chip-level packaging. (Chip-level packages), absolutely second-tier (printed circuit board, PCB), which is a process of combining the components of the first-level sealed element on the circuit card; the third-level (motherboard station Each circuit board is combined on the motherboard to become a sub-system 10% ^ 丄! Four-tier 'level (electronic products), which is a process of grouping several sub-systems into electrical power ... (⑽). Department 'Welding line 7 is quite vague, the key technologies used are', ', A ,,,, σ (Wlre Bonding), tape-and-reel automatic splicing (Plant 2: 2: 1, TAB) and cover Crystal bonding (F1ip Chip / layer, and packaging. With the needs of product design The user's eyes are that the external two integrated circuit components have significant changes regardless of the internal functional design, the size of the components, the package type, the number of pins, and the pitch of the people; The second type of mountable technology has significant changes. According to the "

Plastic Package ί Μ1"。〜以“60 與塑膠封裝( & g ),若依元件與電路版結合方式分_, 口刀”腳插入型(Pin — Techrough-Hole PTH ;也稱之為Plastic Package Μ1 ". ~ With "60 and plastic packaging (& g), if divided according to the combination of components and circuit board _, mouth knife" pin insertion type (Pin — Techrough-Hole PTH; also known as

122077V 五、發明說明(3) _ 插件型),與表面黏122077V V. Description of the invention (3) _ Plug-in type)

)兩大類;若依引腳 UAUrface Mount Device ;SMD 雙邊引腳、四邊引腳:二f態劃分則可以分為單邊引腳、 對影像感測曰曰片;;^ $引腳等四種引腳分佈型態。 降低諸如濕氣,盘如何可以在封裝之後,有效的 效率與穩定度產;、; =對:影像感測晶片在操作時的 程中需要非常小心的重:曰笛疋整個影像感測晶片封裝製 像感測晶片封裝製= ; 一圖係-根據習知技藝的影 的影像感測晶片圭”ϋ圖。f ”一圖’在習知技藝 步額〇所示。上HW/ 一般係先提供一導線架,如 上逑的導線架至少包含一晶片座,盥旄奴 Ξ封C配置架位於上述晶片座的周圍。接著,進行- 愈導:座。1= process) ’以一塑封材料填入晶片座 7二土 之間,並形成一外模於上述導線架之一表面 ,〆驟12 0所示。然後如步驟13 〇所示,進行一晶片貼 合製程,在每-晶片座上貼合-影像感測晶片。接;二貼 ί 線製程(wire bonding),步驟140,以藉由複數 條導線”接影像感;則晶片與上㈣導線配置座。最 後,進打一嵌入(embedding)製程來形成一透明上叢於% 像感測晶片之上方,參見步驟150,其主要係藉由將盖一於: ===嵌於上述的外模,以密封上述的影像感測晶片於導 ,而,在上述習知技藝的影像感測晶片封裝製程中卻 存在著許多的問題。首先,由於最後密封的時候,所使用 的透明上蓋疋光學玻璃’所以’1述的封裝製程將會因為) Two categories; if the pins are UAUrface Mount Device; SMD bilateral pins and quad pins: The two f states can be divided into single-sided pins, image sensing films; ^ $ pin and other four types Pin distribution pattern. To reduce such as moisture, how can the disc be produced with effective efficiency and stability after packaging ;,; = Yes: The image sensor chip needs to be very careful during the operation process: the whole image sensor chip package Image sensor chip packaging system =; a picture system-according to the image of the conventional technology of the image sensor chip "figure. F" a picture 'is shown in the conventional arts step 〇. The upper HW / is generally provided with a lead frame. For example, the upper lead frame includes at least one wafer holder, and the mounting bracket C is located around the wafer holder. Next, proceed-Healing Guide: Block. 1 = process) ′ Fill a chip holder 7 between two soils with a plastic sealing material, and form an outer mold on one surface of the lead frame, as shown in step 120. Then, as shown in step 130, a wafer bonding process is performed, and an image-sensing wafer is bonded on each wafer holder. Wire bonding (wire bonding), step 140, to connect the image sense through a plurality of wires; then the chip and the upper wire are arranged. Finally, an embedding process is performed to form a transparent layer. Bundled above the% image sensing chip, refer to step 150, which is mainly carried out by inserting a cover on: === embedded in the above-mentioned outer mold to seal the above-mentioned image sensing chip on the guide. However, there are many problems in the process of packaging the image sensing chip of the known technology. First, because the transparent cover used in the final sealing is an optical glass, the packaging process described in '1 will be because

五、發明說明(4) 昂造價,使得整體成本隨之提昇,進而 面:士ίϋ ΐ測晶片封震製程的商業競爭力。另1 學破璃(透明上蓋)的裝製私中’由於係使用一光 〜做法技盆, 合技術來密封影像感測晶片,此 。更嚴重ί?,影像感測晶片周圍沒有濕氣的存在 在操2的:i:的::微=降低上述影像感測晶片 « 封裝製程所得到的光學元件:ΐ::技藝的影像感測晶片 與穩定性。 疋件通*無法達到優良的操作效率 線架種用來將影像感測晶片密封於導 晶片之上,以、=Γί入一液態的透明材料於影像感測 達1上述被封影像感測晶片目的。鈇而,上 在注:透明材料的過程中產生細罐泡 ===步驟之後,上述的細小氣泡將很難= 1,移除。上述的細小氣泡與表面不平整的現象合 ΐΐίϊΐ射’進而對影像感測晶片的影像感測品質造: # i=此隧著科技演進人們對於影像感測的光學元件 益提昇,如何提供—種可靠的影像感測晶片封裝 裟私已疋一項重要的課題。 【發明内容】 赛於上述之發明老景巾’習矣口技藝在影像感測晶片封V. Explanation of the invention (4) The high cost makes the overall cost increase accordingly, and then the following aspects: Shi Liϋ Predict the commercial competitiveness of the wafer sealing process. The other one is learning to make glass (transparent cover). It ’s because of the use of a light, a method, and a technology to seal the image sensor chip. More seriously, there is no moisture around the image sensor chip: i :::: micro = lowering the above image sensor chip «Packaging process obtained optical components: ΐ :: technical image sensing Chip and stability. It is not possible to achieve excellent operating efficiency. Wire racks are used to seal the image sensing wafer on the guide wafer, and a liquid transparent material is inserted into the image sensor to achieve the above-mentioned sealed image sensing wafer. purpose. However, above Note: After the process of producing transparent cans in the transparent material === step, the above-mentioned fine bubbles will be difficult to remove = 1. The above small bubbles are combined with the phenomenon of uneven surface to further enhance the image sensing quality of the image sensing chip: # i = This is the evolution of science and technology. People have improved the optical components of image sensing. Reliable image sensing chip packaging has become an important issue. [Summary of the Invention] The above-mentioned invention of the old scene towel ’is used to seal the image sensor chip.

第8頁 1220777Page 8 1220777

問題’本發明之主要目的在於提 製程,其中上述的影像感測晶片 製程(molding process)來形成 的外模(housing)與透明上蓋, 裝製程方面所產 供一種影像感測 封裝製程可藉由 影像感測晶片封 進而簡化封裝製 本發明之再 ,藉由塑封製程 效的防止濕氣與 響。因此,根據 測晶片可以比習 好的影像感測品 計,上述影像感 的塑封材料來密 像感測晶片封裝 的成本。 生的種種 晶片封褒 使用塑封 裝結構中 程。 目的為提供一種 來形成封 細小微粒 本發明的 知技藝的 質與穩定 測晶片封 封影像感 製程可以 裝結構中 對影像感 影像感測 影像感測 度。更好 裝製程可 測晶片。 有效降低 影像感測晶 透明上蓋, 測晶片造成 晶片封裝製 晶片在操作 的是,根據 以使用一種 因此,根據 影像感測晶 片封裝製程 進而可以有 不欲見的影 程之影像感 時展現出更 本發明的設 非光學玻璃 本發明的影 片封裝製程 _ 根 片封裝 片承載 表面上 封製程 上述影 構不僅 可以有 濕氣或 據以上所 製程。上 元件的步 的步驟; 以密封上 像感測晶 可以有效 效的防止 細小微粒 述之目 述的影 的,本發明 像感測晶片 驟;形成一外模於 進行一 述的晶 片封裝 的降低 在上述 之類的 晶片貼合製 片於晶片承 製程所形成 影像感測晶 影像感測晶 干擾源。所 封裝製程 上述晶片 程的步驟 載元件上 的影像感 片封裝製 片封裝結 以,根據 種影像感測晶 包含提供一晶 承載元件之一 ; 及進行一塑 的步驟。藉由 測晶片封裝結 程的成本,更 構中出現諸如 本發明的影像Problem 'The main purpose of the present invention is to improve the manufacturing process, in which the above-mentioned housing and transparent cover formed by the above-mentioned image sensing wafer process (molding process), and an image sensing packaging process produced by the assembly process can be achieved by The image-sensing chip package further simplifies the packaging process of the present invention, and prevents moisture and noise through the plastic packaging process. Therefore, according to the measurement chip, the cost of the image sensor chip package can be closely compared with the conventional image sensor. Various kinds of wafers are sealed using plastic packaging structure in the middle. The purpose is to provide a method for forming sealed fine particles. The quality and stability of the know-how of the present invention The chip sealing image sensing process can be installed in a structure for image sensing image sensing image sensing degree. Better assembly process can measure the chip. Effectively reduce the transparent cover of the image sensing crystal. The chip is used to operate the chip packaging. The operation of the chip is based on the use of one type. Therefore, according to the image sensing chip packaging process, an undesired image can be displayed. The non-optical glass of the present invention The film encapsulation process of the present invention _ The encapsulation process of the root sheet encapsulation sheet bearing surface The above-mentioned shadow structure can not only have moisture or the above process. Steps for mounting the element; Sealing the image sensor crystal can effectively prevent the shadow of the fine particles described in the present invention, the image sensor chip is formed; forming an outer mold for the reduction of the chip package described above An image sensor crystal image sensor crystal interference source is formed on a wafer such as the above by laminating and manufacturing the wafer. The packaging process includes the steps of the above-mentioned wafer process, the image sensor chip package on the carrier element, and the chip package junction to provide one of the carrier element according to the image sensing crystal; and a step of performing a plastic process. By measuring the cost of the chip packaging process, images such as the present invention appear in the structure

1220777 五、發明說明(6) 感測晶片封裝製程可以使影像感測晶片發揮其應有的效能 ,並可大幅提昇產業上的競爭力。 【實施方式] +本發明的一些實施例會詳細描述如下。然而,除了詳 細爲述外’本發明還可以廣泛地在其他的實施例施行,且 本發明的範圍不受限定,其以之後的專利範圍為準。 再者,在本說明書中,各元件的不同部分並沒有依照 ::繪圖。某些尺度與其他相關尺度相比已經被誇張,以 楗供更清楚的描述和本發明的理解。 。上ίϊ:二較佳實施例為一種影像感測晶片封裝製程 曰片Κ ί 封裝製程至少包含下列步驟··提供一 :片承”件;形成一組外模於上述 進订一晶片貼合製程以接合一戟70 1千之上, ;及進行—塑封製程以密封上載元件上 根據本實施例,上述的晶於士述的外模之中。 座’與複數個導線配置座。上述的J 包含-晶片 的晶片座周圍。上述形成外模的牛、七人座係位於上述 元件之-表面上形成-外模的步t =在上述晶片承載 繞在上述晶片座之外侧,與以絕 的外模係圍 座與導線配置座之間的步驟。上.材科真充於上述的晶片 製程或是其他習知技藝中的方法^的外模可以是藉由塑封 在將晶片貼合至晶片座之後,更勺人成根據本實施例, 其係以複數條導線分別電性連奸上、έ、、電性連結的步驟, 配置座。在上述的塑封製程中,述的晶片至上述的導線 係以一透明的塑封材料將 第10胃 1220777 五、發明說明(7) 上述的晶片密封於上述的外模之間。 本發明之另一較佳實施例為一種影像感測晶片封裝製 程。第二圖係一根據本實施例之影像感測晶片封裝製程的 流程圖。參考第二圖,首先,提供一晶片承載元件,如步 驟2 1 0所示。上述的晶片承載元件至少包含一晶片座,與 複數個導線配置座位於上述晶片座的周圍。上述的晶片承 載元件可以是導線架,主機板,陶瓷板,或是其他的承栽 疋件。接下來,進行一形成外模的步驟,如步驟22〇所示 。上述形成外模的步驟主要包含填充絕緣材料於上述的晶 片座與導線配置座之間,與形成一外模於上述晶片承載元 件之一表面上’其中上述的外模係位於上述導線配置座的 外緣。上述形成外模的步驟可以是藉由一塑封製程,或是 其他習知技藝者所熟知的技術來完成。上述的晶片承載元 ,與外模可形成一開放空間,使得在後續的步驟中可以將 晶片置入上述的開放空間中。 人制敍,失目 隹艰成上述的外模之後,進行一晶片貝j 二=目& = y步驟23〇。上述的晶片貼合製程可以是應用 主1Γ —貼合技術來完成。在上述晶片貼合製程中,1220777 V. Description of the invention (6) The sensor chip packaging process can enable the image sensor chip to exert its due performance and greatly enhance the competitiveness in the industry. [Embodiment] + Some embodiments of the present invention will be described in detail as follows. However, in addition to the details, the present invention can be widely implemented in other embodiments, and the scope of the present invention is not limited, and the scope of the following patents shall prevail. Moreover, in this description, different parts of each element are not drawn according to ::. Certain dimensions have been exaggerated compared to other related dimensions for a clearer description and understanding of the invention. . Upper ϊ: Two preferred embodiments are an image sensing chip packaging process called chip Κ The packaging process includes at least the following steps: · Provide one: a chip holder; form a set of outer molds to order a wafer bonding process described above In order to join one thousand halberds over one thousand; and perform a plastic packaging process to seal the uploading element. According to this embodiment, the above-mentioned crystals are in the external mold described above. The seat is arranged with a plurality of wires. The above-mentioned J The periphery of the wafer holder including the -wafer. The above-mentioned forming of the outer mold and the seven-seater seat are located on the surface of the above-mentioned component. The step of forming the outer mold is t = the wafer is wound around the outside of the wafer holder, and The outer mold is the step between the enclosure and the wire configuration base. The material can be filled in the above-mentioned wafer process or other known methods. The outer mold can be plastic-sealed to attach the wafer to the wafer. After the holder, according to this embodiment, it is configured by a plurality of wires to be electrically connected, connected, and electrically connected, and the holder is configured. In the above-mentioned plastic packaging process, the chip described above to the above-mentioned The lead is made of a transparent plastic sealing material The tenth stomach 1220777 V. Description of the invention (7) The above-mentioned chip is sealed between the above-mentioned outer molds. Another preferred embodiment of the present invention is an image sensing chip packaging process. The second figure is based on this implementation The flow chart of the example of the image sensing chip packaging process. Referring to the second figure, first, a wafer carrier component is provided, as shown in step 2 10. The above wafer carrier component includes at least a wafer holder and a plurality of wire arrangement seats. It is located around the wafer holder. The above-mentioned wafer carrying element may be a lead frame, a main board, a ceramic plate, or other supporting elements. Next, a step of forming an outer mold is performed, as shown in step 22. The above step of forming an outer mold mainly includes filling an insulating material between the above-mentioned wafer holder and the wire arrangement base, and forming an outer mold on one surface of the wafer carrier element, wherein the above-mentioned outer mold is located on the above-mentioned wire arrangement base. Outer edge. The above steps of forming the outer mold can be accomplished by a plastic packaging process or other techniques well known to those skilled in the art. An open space can be formed with the outer mold, so that the wafer can be placed in the above open space in the subsequent steps. After the man-made description, the first mold is lost, and one wafer is used. ; = yStep 23〇. The above wafer bonding process can be completed by applying the main 1Γ-bonding technology. In the above wafer bonding process,

’、、 一晶片座上分別貼附一影像威測a K 。μ、+、 影像感測日日日片包rn計-乂像H片上述¥ 述影像感測晶片之! Jd,上:的焊墊係位於』 K 、制之主動£域。接著,進行打線(wire :n要1广:、“如步驟240所示。在上述的打線製程中, 與上述的導導線來連接上述影像感測晶片之焊鸯′, And a wafer affixed with an image Wei Ke a K respectively. μ, +, image sensing day-to-day film package rn meter-乂 image H film mentioned above ¥ image sensor chip described above! Jd, top: The pads are located in the active zone of K, the control. Next, wire bonding is performed (wire: n is required to be 1:, as shown in step 240. In the above-mentioned wire bonding process, the welding wire of the image sensing chip is connected to the above-mentioned conducting wire.

1220777 五 發明說明(8) 驟25。最:示’Λ一述透二的塑封材料來進行-塑封製程,如步 上述由外㈣封製程係將—透明的塑封材料填入 田π模興導線架所形,^ ^ ^ 上述外模與晶片承載座所带β Μ„4 2甲進而達到密封 述的塑封製程中孫i /成的開放二間之中的效果。上 中進行。 ’、 八空度約為—76〇 mmHg以下的環境 的影像感測晶,;ί:::::看出根據本實施例 裝製程之間的差異=藝中的影像感測晶片封 程中,普遍# # ffi泰S α技π的影像感測晶片封裝製 τ 過係使用一透明光學玻璃以嵌入 像感測晶片於導線架之上…:,入的方式來密封影 中存在著諸如因為使用光學玻璃 感測晶片由於無法處於一個完全真# 裝後的衫像 來此-影像感測晶片極可能境、進而造成將 無法達到其最佳的效能 1度或細小微粒的影響而 反觀在本實施例中,因為係採用一塑封材 學:璃’戶斤以’根據本實施例的設計可以大幅降低影= ..^ ^ ^ — 很骤本實施例的設計,由 於係在-南真空度的環境下進行—塑封製帛 $ 明的塑封材料將影像感測晶片密封於晶片承載元件之:透 所以據本實施例的晶片封褒製裎可以完全避象 感測的封裝結構中仍有可能殘餘的濕氣,冑而可:: 到較尚層級的防濕效果,確保此—影像感測晶片可1220777 5 Description of the invention (8) Step 25. The most: Show 'Λ one through two plastic packaging materials to carry out-plastic packaging process, as described above by the outer sealing process system-transparent plastic packaging material filled in Tian π mold Xing lead frame shape, ^ ^ ^ the above external mold And β Μ „4 2 A carried by the wafer carrier further achieves the effect of sealing the open two rooms in the plastic molding process described above. The upper and middle processes are performed. Image sensing of the environment; ί ::::: See the difference between the manufacturing processes according to this embodiment = image sensing in the art. In the sealing process of the wafer, the image ## ffi 泰 S α 技 π The test chip package system uses a transparent optical glass to embed the image sensor chip on the lead frame ...: There is a way to seal the image, such as because the optical glass sensor chip cannot be used in a completely true # Here comes the shirt after installation-the image sensor chip is extremely likely to cause the best performance of 1 degree or the effect of fine particles. In contrast, in this embodiment, a plastic packaging material is used: glass The design of 'households' according to this embodiment can greatly Reduce the shadow = .. ^ ^ ^ — It is very simple. The design of this embodiment is carried out under the environment of the South vacuum degree. The plastic sealing material is plastic-sealed. The image-sensing chip is sealed to the wafer carrier: transparent Therefore, the chip encapsulation system according to this embodiment can completely avoid the possible residual moisture in the package structure of image sensing, so that: to a higher level of moisture-proof effect, ensure this—image sensing chip can

1220777 五、發明說明(9) 濕氣的影響,以完全發揮影像感測晶片應有之效能。 再者,經過本實施例的影像感測晶片封裝製程之德, 由於在影像感測晶片的週遭係充滿著透明塑 ,此-影像感測晶片在操料更可以避免如習知 2 可能發生之因為細小微粒的干擾而產生雜訊 現象。因此,經過本實施例的影像感測晶片 = ,更可以發揮高效率與高穩定度之特質。 業胱甲力 另一方面’相較於另-習知技藝,以注入液態透明材 封j像感測晶片的方法,由於本發明係使用塑封製 m影ΐ感測晶片,所以’根據本發明的封裝製程可 以有效的避免省知技藝中所產生的諸多弊病。 的設計,如同習知該項技藝者的認知,塑封製程大致上^ 先將固態的塑封材料放入禱模巾, ” = ΐ化,以填滿由外模與晶片承載元件所 件上…。根據本發明的=製 ί在:if述影像感測晶片的過程中不會如上述習知技藝 整的封裝表面。所α,根=元成後可以得到-平 因素之影響,•而可以维平整度之類的干擾 感測晶m #上述衫像感測晶片應有之影像 Τ σ ' i ~ #發明揭露了—種影像感測晶片封裝 1220777 五、發明說明(10) 製転。上述影像感測晶片封裝製程包含下 至少包含一晶片座與複數個位於晶片座二:·提供一 之晶片承載座,形成一外模於上述晶片‘載:=:二座 上,進行一晶片貼合製程以貼合一影 ^之一表面 晶片座’進行一打線製程以電性連接上二;:☆ t =線配置座’與進行一塑封製程以使心=二 來松封上述影像感測晶片於上述的晶片承載元 ^ 本發明的設計中,由於在上述影像感測晶片周圍為透 封材料所充滿]所以,根據本發明的影像感測晶片不會發 生因為諸如濕氣或細小微粒之類的干擾而降低影 = 片在使用日夺之效率與穩定[另—$自,由於本發明的= 計係以塑封製程來密封影像感測晶片於晶片承载元件上°, 所以’上述的影像感測晶片不會發生諸如因為封裝結構中 的細小氣泡或是封裝表面的平整度之類的因素而損^其應 有的影像感測品質。此外,相較於習知技藝中所使用的影 像感測晶片封裝製程,由於本發明中並非使用光學玻璃來 密封影像感測晶片於晶片座之上,而是改以塑封材料來密 封上述的影像感測晶片。所以,本發明的設計可以有效的 降低影像感測晶片在封裝方面之成本。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之申請專利範圍;凡其它未脫離本發明所揭示之 精神下所元成之專效改變或修飾’均應包含在下述之申請 專利範園内。1220777 V. Description of the invention (9) The influence of moisture to fully exert the performance of the image sensor chip. Furthermore, after the virtue of the image sensing chip packaging process of this embodiment, since the periphery of the image sensing chip is filled with transparent plastic, this-the image sensing chip can be avoided in the handling of materials, which may occur as known 2 Noise is caused by the interference of fine particles. Therefore, after the image sensor chip of this embodiment =, the characteristics of high efficiency and high stability can be further exerted. On the other hand, compared with the other-known technique, the method of encapsulating a j-image sensor wafer with a liquid transparent material is used. Since the present invention uses a plastic package to make a m-image sensor wafer, so according to the present invention, The packaging process can effectively avoid many disadvantages in the provincial know-how. The design of the plastic packaging is similar to the knowledge of those skilled in the art. The plastic packaging process is roughly ^ first put solid plastic packaging materials into the prayer towel, '' = ΐ, to fill the parts made of the outer mold and the wafer carrying components ... According to the invention, the manufacturing process will not: in the process of describing the image sensing chip, the package surface will not be as well-known as the above-mentioned conventional techniques. Therefore, after the root is formed, the influence of the flat factor can be obtained, and it can be maintained Interference sensing crystals such as flatness m # The above-mentioned image of the shirt image sensing chip T σ 'i ~ # The invention discloses a kind of image sensing chip package 1220777 V. Description of the invention (10) Manufacturing. The above image The sensing chip packaging process includes at least one wafer holder and a plurality of wafer holders. Two wafer holders are provided to form an external mold on the wafer. The carrier: =: two holders, and a wafer bonding process is performed. Use a surface chip holder that fits a shadow ^ to perform a wire-making process to electrically connect the two ;: ☆ t = wire configuration seat 'and perform a plastic packaging process to make the heart = two to loosely seal the image sensing chip on The above-mentioned wafer carrying element ^ design of the present invention Since the surrounding of the above-mentioned image sensing wafer is filled with a transparent sealing material], the image sensing wafer according to the present invention does not reduce the shadow due to interference such as moisture or fine particles. Efficiency and stability [Other— $ Since the == system of the present invention uses a plastic packaging process to seal the image sensing wafer on the wafer carrier element, so the image sensing wafer described above does not occur such as because of the small size in the package structure. Factors such as air bubbles or flatness of the package surface detract from its proper image sensing quality. In addition, compared to the image sensing chip packaging process used in the conventional art, since optical is not used in the present invention Glass is used to seal the image sensing wafer on the wafer holder, but the above-mentioned image sensing wafer is sealed with a plastic sealing material. Therefore, the design of the present invention can effectively reduce the packaging cost of the image sensing wafer. The description is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent application of the present invention; all other things without departing from the spirit disclosed by the present invention All the specific changes or modifications' shall be included in the patent application parks mentioned below.

第14頁 1220777 圖式簡單說明 【圖式簡單說明】 本發明之上述目的與優點,將以下列的實施例以及圖 示,做詳細說明如下,其中: 第一圖係一根據習知技藝的影像感測晶片塑封製程之 流程圖;及 第二圖係一根據本發明的影像感測晶片塑封製程之流 程圖。 【主要部分之代表符號】 110 提供導線架的步驟 120 進行塑封製程的步驟 130 進行晶片貼合製程的步驟 140 進行打線製程的步驟 150 進行透明上蓋嵌入製程的步驟 210 提供晶片承載元件的步驟 22 0 形成外模的步驟 230 進行晶片貼合製程的步驟 240 進行打線製程的步驟 250 進行塑封製程的步驟Page 1212777 Brief description of the drawings [Simplified description of the drawings] The above-mentioned objects and advantages of the present invention will be described in detail with the following embodiments and diagrams, where: The first picture is an image according to the known art A flowchart of the plastic packaging process of the sensing chip; and the second figure is a flowchart of the plastic packaging process of the image sensing chip according to the present invention. [Representative symbols of main parts] 110 Steps for providing lead frame 120 Steps for plastic packaging process 130 Steps for wafer bonding process 140 Steps for wire bonding process 150 Steps for transparent cover embedding process 210 Steps for providing wafer carrier components 22 0 Step of forming an outer mold 230 Step of performing a wafer bonding process 240 Step of performing a wire bonding process 250 Step of performing a plastic packaging process

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Claims (1)

uzu/ / / 六、申請專利範圍 1 · 一種影像感測晶片封姑制 裝製程包含: 、氣程,上述之影像感測晶片封 提供一晶片承載元件; 形成一外模於該晶片承 進行一晶片貼合萝 ^ 一面上; 片承載元件之上;及乂以貼合一影像感測晶片於該晶 載元:::塑封製程,以密封該影像感測晶片於該晶片承 2. 如申請專利範圍第1項之影像威測B H 該晶片承載元件更包含:〜像H日片封裝製程,其中 至少一晶片座;與 之周^數個導線配置座,該等導線配置座係位於該晶片作 3, 塑如丄請Λ利範圍第1項之影像感測晶片封裝製程,其中 用一透明塑封材料來填入該外模與該晶片 心件所形成之一開放空間中’以密封該影像感 4·如申請專利範圍第2項之影像感測 進行晶片貼合製程之前,更包含一以 晶片座與該等導線配置座之間的步驟uzu // / 6. Patent application scope 1 · An image sensing wafer package manufacturing process includes:, air range, the above-mentioned image sensing wafer package provides a wafer carrying element; forming an outer mold on the wafer bearing to carry out a The wafer is bonded on one side; on the wafer carrier element; and on the wafer carrier, an image sensing wafer is bonded ::: a plastic packaging process to seal the image sensing wafer on the wafer carrier 2. If applied The image bearing test BH of the first item of the patent scope The wafer carrier element further includes: ~ H-chip packaging process, at least one of which is a wafer holder; and a plurality of wire arrangement seats, which are located on the wafer Operation 3, please use the image sensing chip packaging process of item 1 in the above range, in which a transparent plastic sealing material is used to fill an open space formed by the outer mold and the wafer core piece to seal the image Sense 4: Before performing the wafer bonding process, such as the image sensing in item 2 of the patent application scope, the method further includes a step between the wafer holder and the wire arrangement holder. 晶片封裝製程,在該 一絕緣材料填充於該 5;如申請專利範圍第2項之影像感測晶片封裝製程,其中 該外模係位於該等導線配置座之周圍。 、^ ’、 6·如申請專利範圍第2項之影像感測晶片封裝製程,在進 行該塑封製程之前更包含一進行打線製程之步驟,其中該In the chip packaging process, the insulating material is filled in the 5; for example, the image sensing chip packaging process in the second patent application scope, wherein the outer mold is located around the wire arrangement bases. , ^ ′, 6 · If the image sensing chip packaging process of item 2 of the patent application scope, before performing the plastic packaging process, it further includes a step of performing a wire bonding process, wherein the 1220777 六、申請專利範圍 打線製程係形成複數條導線以電性連接誃与 該等導線配置座。 μ衫像感測晶片與 7.如申請專利範圍第1項之影像感測晶片 該晶片承載元件係一導線架。 裝製程’其中 t Λ申請專利11 ®第1 ’之影像感測晶片封裝贺於 該晶片承載元件係一陶瓷板。 ί裴製耘,其中 述之影像感測晶片封 9· 一種影像感測晶片封裝製程 裝製程包含: 提供一晶片承載元件,其中該晶片承 一晶片座與複數個導線配置座; 牛至父包含 形成一外模於該晶片承載元件之一表面上. 片座-晶片貼合製程’卩貼合一影像感測晶片於該晶 接兮fV線製帛’該打線製程係以複數條導線電性連 接該〜像感測晶片與該等導線配置座;及 封續’該塑封製程係以一透明塑封材料密 封該〜像感測晶片於該晶片承載元件之上。 _ 10·如申請專利範圍第9項之影像感測晶片封裝製鞋,其 中邊外模係位於該等導線配置座之周圍。 、 11 ·、=申請專利範圍第9項之影像感測晶片封裝製程,在 該進行曰日片貼合製程之前,更包含一以一絕緣材料填充於 該晶片座與該等導線配置座之間的步驟。 12·如申请專利範圍第9項之影像感測晶片封裝製程,其 中該形成外模的步驟更包含_塑封製程。1220777 VI. Scope of patent application The wire-forming process is to form a plurality of wires for electrically connecting them to the wire arrangement seat. μ-shirt image sensor chip and 7. Image sensor chip as described in the first item of the patent application. The chip carrier element is a lead frame. In the manufacturing process, the image sensing chip package in which t Λ is applied for patent 11 ® No. 1 ′ is conceived. The chip carrier element is a ceramic plate. Pei Zhiyun, the image sensing chip package described in 9. · An image sensing chip package manufacturing process includes: providing a wafer carrying element, wherein the wafer carries a wafer base and a plurality of wire arrangement bases; the oregano father comprises forming an The outer mold is on one surface of the wafer carrier element. The chip holder-wafer bonding process '卩 attaches an image sensing chip to the crystallized fV line 线' The wire-forming process is electrically connected to the wire with a plurality of wires ~ The image sensing chip and the conductive wire arrangement seat; and the encapsulation process, the plastic packaging process is sealed with a transparent plastic encapsulation material ~ the image sensing chip is on the wafer carrying element. _10. If the image sensing chip package shoe of item 9 of the patent application scope, the outer mold is located around these wire arrangement bases. , 11 ·, = The image sensing chip packaging process of the 9th scope of the patent application, before the Japanese-Japanese film bonding process is performed, it further includes an insulating material filled between the chip holder and the wire arrangement bases. A step of. 12. If the image-sensing chip packaging process of item 9 of the scope of patent application, the step of forming the outer mold further includes a plastic packaging process. 第17頁 1220777 六、申請專利範圍 1 3 ·如申請專利範圍 ____ 第9 中該塑封製程係於-以度之二 14. 如申 中該晶片 1 5. 如申 中該晶片 16. 如申 中該晶片 17· —種 裝製程包 提供 一晶片座 清專利範圍 承載元件係 請專利範圍 承載元件係 請專利範圍 承載元件係 影像感測晶 含: 一晶片承載 與複數個導 進行一第一塑封 件之一表面上; 第9項之影像感測晶片封裝製程,其 —導線架。 第9項之影像感測晶片封裝製程,其 一陶瓷板。 第9項之影像感測晶片封裝製程,其 一主機板。 片封裝製程,上述之影像感測晶片封 元件’其中該晶片承載元件至少包含 線配置座; 製学王’以形成一外模於該晶片承載元 進行 片座之上 進行 接該影像 進行 封材料密 18· 如申 中該外模 19·如申 一晶片貼合製程, 以貼合一影像感測晶片於該晶 一打線製程 感測晶片與 一第二塑封 封該影像感 请專利範圍 係位於該等 请專利範圍 ▲該打線製程係以複數條導線電性連 该等導線配置座;及 製程,該第二塑封製程係以一透明塑 J曰日片於該晶片承載元件之上。 =1 7項之影像感測晶片封裝製程,其 導線配置座之周圍。 第1 7項之影像感測晶片封裝製程,在 該進行晶片貼合製程之 該晶片座與該等導線 更己3 一以一絕緣材料填充於 20. *申請專利範圍之間的步驟。 中該第二塑封製程係 項之影像感測晶片封裴製程,其 進行。 、;真空度約為-760 mmHg之環境下 21·如申請專利範圍第;| 7 5 、 中該晶片承載元件係一導線=影像感測晶片封襞製程,其 22·如申請專利範圍第17頊:旦 中該晶片承載元件係一陶瓷^ ^像感測晶片封裝製程,其 2 3·如申請專利範圍第1 7頊之旦,你、 中該晶片承載元件係一主機板了象感測晶片封裝製程,其Page 17 1220777 VI. Scope of patent application 1 3 · If the scope of patent application is ____ The plastic packaging process in the 9th is-to the second degree 14. If the chip is claimed 1 5. If the chip is claimed 16. If the application The wafer 17 · — a package package provides a wafer holder. The patent scope of the carrier element is requested. The patent scope of the carrier element is requested. The patent scope of the carrier element is the image sensor. One of the components is on the surface; the image sensing chip packaging process of item 9, which is a lead frame. The image sensing chip packaging process of item 9 is a ceramic plate. The image sensing chip packaging process of item 9 is a motherboard. In the chip packaging process, the above-mentioned image-sensing wafer sealing element 'wherein the wafer carrier element includes at least a line configuration seat; the King of Science' forms an external mold on the wafer carrier element and performs the chip sealing on the wafer seat Secret 18 · As the application of the outer mold 19 · Rushen a wafer bonding process, to attach an image sensing wafer to the wafer and a wire manufacturing process to sense the wafer and a second plastic encapsulation. The scope of this image sensing patent is located at The scope of these patents ▲ The wire bonding process is to electrically connect the wire configuration bases with a plurality of wires; and the process, the second plastic packaging process is to use a transparent plastic J-chip on the wafer carrier element. = 1 The image sensing chip packaging process of 7 items, the wires are arranged around the seat. The image sensing chip packaging process of item 17 is the step between filling the scope of the patent application with an insulating material between the chip holder and the wires during the wafer bonding process. The image-sensing wafer sealing process of the second molding process is carried out. In the environment with a vacuum degree of about -760 mmHg 21 · As in the scope of patent application; | 7 5, The wafer carrier element is a wire = image sensing wafer sealing process, and 22 · as in the scope of patent application scope 17顼: Once the chip carrier element is a ceramic ^ ^ image sensor chip packaging process, the 2 ·· If the scope of the patent application is 17th, the chip carrier element is a motherboard image sensing Chip packaging process, which 第19頁Page 19
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