TW595274B - Circuit device - Google Patents

Circuit device Download PDF

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Publication number
TW595274B
TW595274B TW092122459A TW92122459A TW595274B TW 595274 B TW595274 B TW 595274B TW 092122459 A TW092122459 A TW 092122459A TW 92122459 A TW92122459 A TW 92122459A TW 595274 B TW595274 B TW 595274B
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Taiwan
Prior art keywords
circuit
mentioned
conductive pattern
conductive
pattern
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TW092122459A
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Chinese (zh)
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TW200410604A (en
Inventor
Eiju Maehara
Hiroyuki Tamura
Atsushi Kato
Atsushi Nakano
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Sanyo Electric Co
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The present invention provides a circuit device (10), in which a complicated electrical circuit is installed, and the electrical connection thereof is easy, wherein first circuit element (13) is mounted to conductive pattern (12A) which is formed on the top layer of conductive pattern (12) constituting a multilayered wiring. Second circuit element (14) and connector (15) are mounted on the fourth conductive pattern (12D) being the lowest layer of the conductive pattern and exposing from the back surface of the device. Thus providing a circuit device having more circuit elements is feasible. Furthermore, mounting connector (15) on the back surface of the device makes the electrical connection with external circuit easy to carry out.

Description

玖、發明說明： 【發明所屬之技術領域】 本發明係關於一種雷敗驻 電路讀s… 尤指關於在樹脂封合的 包格衣置月面’女叙有鱼外 件的電路裝置。 -外^性連接的連接器及電路元 【先前技術】 f +以在’因為裝設於電子機器的電路裝置係使用於 電話、可攜式電腦等，故電路壯 ’、 、仃動 儿, 故迅路I置之結構需小型化、每刑▲ 化、輕量化。若以作為電路裝 二i 般的半導體裝置而言，最近衣置為例，就— P,, 取近已開發出所謂CSP(Chip Size c age’晶片尺寸封裝體） 的晶片纺Γςρ々& 兵曰日片尺寸相同 、、 、或者尺寸稍大於晶片的‘ - 利文獻υ。 日日片的CSP(例如··茶考專 板，：5圖係表示採用玻璃環氧樹脂基板1。1作為支承基 且尺寸稍微大於晶片的CSP1 環氧樹脂基板1〇1上安……5兄明在玻璃 文衣包日日體晶片T之實例。 _ ::玻，氧樹脂基…表面，形成有第1電極· 第1背：：：極1〇2B及晶片鲜塾1〇3,且在背面形成有 穿孔；H '極105八及第2背面電極_。並且，透過貫 性 使上迷弟1電極_與第】背面電極電 電性，隶垃述弟2電極聰與上述第2背面電極職 生連接。此外，在晶片銲墊103 的杂a喊 口饮丄4殊露（bare) 曰曰月丑曰曰片T ’而電晶體的射極與第1電極102A係以 屬細線1〇4連接’電晶體的基極與第2電極_係以 314944 5 595274 :::線104連接。再者，以覆蓋電晶體 氧樹脂基板1〇1上設置樹脂層。 " 雖然上述CSP 1 00係採用玻璃 和晶片級以”…# 樹脂基板101，然而 勹、、及CSP部不同，其具有從晶 背面電榀1ΜΔ 片T延伸至外部連接用 柽105Α、105Β的結構簡單並 點。 干1传以廉價製造的優 兹參考第6圖，上述cspi。。等元件係安裳於安襄美 而構成一個模組。安裝基板ps 太甘主 陈i CSP之外， =、、表日面及背面還安裝有内設半導體元件的電路裝置 曰曰片電阻CR及晶片電容器CC。並且， 容奘I η。士猎由形成於 女袅基板PS表面及背面的導電路， 柯、查拉 # 7谷甩路兀件形成電 f連接。猎此構造，得以形成安裝於 八—a名 J X v式、OA(辦 a至動化’ 0fflce Outomation)等機器中的模組。 【發明内容】 '、 I利文獻1 曰本特開2001-3 391 51號公報（第！頁、第工圖） 發明所欲解決之t爭弱 回 · 然而，如習知例的結構中，在構成I右 再X 一有—個功能的模 組時，會導致整體尺寸變大。因而產生難 雜以令内設該模組 之電子機器達成小型化及輕量化的問題。具體而言，以習 知例的結構形成上述模組時，會產生尺寸形成數 八、， 1— 丁 方之問題。 此外’因為安裝基板PS的兩面皆固接有電路元件， 所以也會產生難以對主機板等的基板進行連接的問題。 314944 6 本發明係有^藍卜+、 、 述問碭而開發者，本發明的主要曰 :::方“疋供一種藉由在電路裝置背面露出的導電圖案上安 =路元件或連接器’而構成具有模組功能的小型電路^ 本發明電路裝晋& 4 士 m , 、寸欲為具備··至少一層導電圖宰· 固接於上述導電圖案 α案， 路元件及上述導命圖安件；及被覆上述第1電 面霖出的上、… 承整體的封合樹脂，並且在背< 出的上述導電圖案上連接連接哭。 圖案此裝置的ϋ徵為具備:至少-層導電 第1電路元件及上述二電::件;及被覆上述 且具備固接於在上Ρ /士 y卞'支承整體的封合樹脂，並 第2電路元件。^衣置背面露出之上述導電圖案的 並且，本發明電路裝置係 士歸 括··至少兩層導雷 有封衣肢，该封裝體包 — 圖案，·與形成為上述悬t屌遒干 , 弟1電極電性連接 _ 、取上層¥電圖案之謂 及上述導電圖宰电路兀件；將上述第1電路元件 導電圖案，且從位於背面之卜/树月曰，及形成為最下層 極，並且上述第2 + 心封合樹脂面露出的第2電 路元件安裝用電極所妾。。文衣用的電極、第2電 路元件，且藉著由最 女衣有連接器與第2電 I田取上層延伸 配線而構成所1 取下層而設置的貫穿孔、 【實施方式】I的電路或系統電路。 314944 7 595274 热芬考第1圖，說明本發 圖(A)係電路裝置10的俯視s，：衣置10的結構。第1 八 ]爾視圖，弟1圖（B)係1钊郝同丄 發明電路裝置1〇# ，、d視圖。本 係具備·至少一層導電圖案12八至12η· 固接於導電圖幸〗？ Λ AA — a主1 2D， 元件13及導：岡安電路元件13;及被覆第1電路 成在-面： 八以支承整體的封合樹脂16,而構 成在…出的導電圖構 此構造。 史设口口 U下，砰述 t第1圖（B)，選擇導電圖案12的材料時， 卜接材的附著性、搭接性、電鑛性。就材料而言二 =為主材料的導電落、以⑽)為主材料的導= =:一)等合金構成的導㈣。因此，形成有 二= 12Α、第2導電圖案12Β、第3導電圖案 “ 蛉电圖案12D組成的4層多層配線結構。各導 電圖案12係透過連接機構2〇(接觸孔或貫穿孔）形成電性 連接。並且，各導電圖案12係藉著樹脂層η積層。 运2 \積層。並且’藉由貫穿樹脂層2丨的貫穿孔上形成的 電鍍膜，形成有電性連接第2導電圖案12B與第3導電圖 案12C的連接機構20。 說明上述多層導電圖帛12的具體結構。第2導電圖案讀 咖與第3導電圖帛12C係藉著厚度^瓜左右的樹脂 然後，以樹脂層21被覆第2導電圖案]2β與第3導 電圖案12C。藉由在被覆第2導電圖案UB的樹脂層21 上。又置貝牙孔且形成電鐘銅，可形成第1導電圖案12Α。 此外，藉由在被覆第3導電圖案12C的樹脂層21上設置 314944 595274 =穿孔並形成電鍍銅，可形成第4導電圖案12d。繼之， 第4導電圖案12D除了作為端子18而露出的部位外，复 餘部位皆以樹脂皮膜1 7被覆。 ’、 多可弟1圖（A)，端子18係由被覆電路裝置背面 之樹脂皮膜17露出的第4導電圖案12D所構成。在此月， ,:在電路裝置10之一側邊的端子18A係與作為外部連 之弟1連接器15A電性連接。排列在端子HA之相對 故的端子18B則與連接外部的第2連接器15 端子1 8C係沿菩另一、真 < 里 另故5又置，且該端子的使用方式有許多 腦二如·▼在對内設的半導體元件(尤其，記憶體、微電 ㈣寫入·讀取時使用。此外，端子-係設^ ==以外的部位’以該端子的制方法來說，例如·可 祆一形成於内部的電路或系統時使用。 該第1電路元件13包括有電晶體 等半導體元件、晶片雷衮哭、日μ C日曰片 芒戶疮 片电谷。。日日片電阻等被動元件。此外， 厗度乓厚，則亦可安裝cSP、 的半導髀ϋ $ Α寺面朝下（faced〇Wn) 阻二再者，也可採用感應器( — tor)或熱敏電 .阻（thermistor)等。第1電路元 /飞…破电 木12Α,且由封合樹 ^ . 復以面朝下方式安裝的第1 电70 1 3 A係藉著金屬細線1 4盥A他欣Ί f &说明. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a type of circuit that reads s ... especially to a circuit device with a fish external part in a resin-sealed bag-coat on the moon's surface. -Externally-connected connectors and circuit elements [prior art] f + to 'because the circuit equipment installed in electronic equipment is used in telephones, portable computers, etc., the circuit is strong,' Therefore, the structure of Xunlu I needs to be miniaturized, each sentence reduced, and lightened. In the case of a semiconductor device like a circuit-mounted device, the most recent installation is taken as an example. Take —P ,, to get close to the wafer spinning that has developed a so-called CSP (Chip Size c age 'chip size package). Bing Yue said that the size of the Japanese film is the same, or, or the size is slightly larger than the wafer. CSP of Japanese and Japanese films (for example, tea test board, 5: The picture shows the CSP1 epoxy resin substrate 101, which uses glass epoxy substrate 1.1 as a support base and is slightly larger than the wafer ... 5 Xiong Ming ’s example of a solar wafer T in a glass jacket. _ :: Glass, oxyresin-based ... The first electrode is formed on the surface. The first back ::: electrode 102B and wafer freshness 103, and A hole is formed on the back surface; H ′ pole 105 and the second back surface electrode _. Furthermore, the upper back electrode 1 and the second back surface electrode are electrically conductive through continuity, and the second back electrode and the second back surface are described below. The electrode is connected to the student. In addition, the sip of the chip pad 103 is called a sip sip, and the emitter of the transistor and the first electrode 102A belong to the thin line 1 〇4 The base of the transistor is connected to the second electrode 314944 5 595274 ::: line 104. Furthermore, a resin layer is provided to cover the transistor oxygen resin substrate 101. " Although the above CSP 1 The 00 series uses glass and wafer-level resin substrate 101. However, the 勹, 及, and CSP sections are different. They have a 1MΔ sheet T from the back of the crystal. The structure extending to the external connection 柽 105A and 105B is simple and easy to use. The first pass is cheaply manufactured. Refer to Figure 6 and the above cspi ... The components are made by Ansang and Anxiangmei to form a module. Mounting substrate ps Taigan Master Chen i In addition to CSP, circuit devices with built-in semiconductor elements are installed on the front and back of the chip, and the chip resistor CR and chip capacitor CC are installed. Also, the capacity I η is formed by the hunter. The conducting circuit on the front and back of the son-in-law's substrate PS, Ke, Chala # 7 Valley roads to form electrical connections. By hunting this structure, it can be installed and installed on the eight-name JX v-type, OA '0fflce Outomation) and other modules. [Summary of the invention]', Lee Lee 1 Japanese Patent Publication No. 2001-3 391 No. 51 (p.!, P. Drawing) The contention of t · However, as in the structure of the conventional example, when I, X, and X each have a function module, it will cause the overall size to increase. Therefore, it is difficult to make the electronic equipment with the module small. And weight reduction. Specifically, the above-mentioned structure is formed by a conventional example. When a module is used, it may cause a problem of several dimensions. In addition, since circuit elements are fixedly attached to both sides of the mounting substrate PS, it may also cause a problem that it is difficult to connect a substrate such as a motherboard. 314944 6 The present invention is developed by the developers, developers, and developers of the present invention. The main description of the present invention is ::: Fang "provides a circuit element or connector on a conductive pattern exposed on the back of a circuit device. 'And constitute a small circuit with a module function ^ The circuit assembly of the present invention is 4 mils, and it is necessary to have ... at least one layer of conductive pattern, fixed to the above-mentioned conductive pattern α, a circuit element, and the above-mentioned life guide. Figure mounting parts; and the entire sealing resin covering the first electric surface, and the whole, and connected to the conductive pattern on the back < The characteristics of this device are: at least-one layer of conductive first circuit element and the above-mentioned two electricity :: pieces; and a sealing resin covering the above and provided with being fixed to the support of the upper P / 士 ', and the first 2 circuit components. ^ The above conductive pattern is exposed on the back of the clothing set, and the circuit device of the present invention includes at least two layers of guides with a sealing limb, the package body includes a pattern, and is formed as the above-mentioned hanging t, The first electrode is electrically connected _, the upper layer is called the electric pattern and the above conductive pattern is used to block the circuit components; the above first circuit element is conductively patterned, and it is formed from the back of the tree / tree month, and formed as the lowest layer In addition, the second circuit element mounting electrode exposed on the surface of the second + core sealing resin is exposed. . The electrode for the clothing, the second circuit element, and the uppermost extension wiring of the second electric field with the connector and the second electric field to form a through-hole provided by the lower layer. [Embodiment] I circuit Or system circuits. 314944 7 595274 Figure 1 of Refinkau, which illustrates the top view s of the circuit device 10 of the present invention: the structure of the clothing unit 10. The eighteenth view, the first figure (B) is a view of the invention of the circuit device 10 #, d. This department has at least one layer of conductive pattern 12-8 to 12η. Λ AA — a main 1 2D, element 13 and guide: Gang'an circuit element 13; and covering the first circuit formed on the-surface: Eight to support the entire sealing resin 16, and constituted by the conductive pattern of this structure. Below Shishekou U, the first figure (B) is described. When the material of the conductive pattern 12 is selected, the adhesion, overlap, and electrical minerality of the bonding material. As far as the material is concerned, two = conductive fall of the main material, ⑽) of the main material = =: a), and other alloys. Therefore, a four-layer multilayer wiring structure composed of two = 12A, a second conductive pattern 12B, and a third conductive pattern "electron pattern 12D." Each conductive pattern 12 is electrically formed through the connection mechanism 20 (contact hole or through hole). In addition, each conductive pattern 12 is laminated by a resin layer η. 2 is laminated. And a second conductive pattern 12B is electrically connected through a plating film formed on a through hole penetrating the resin layer 2 丨. Connection mechanism 20 with the third conductive pattern 12C. The specific structure of the above-mentioned multi-layer conductive pattern 说明 12 will be described. The second conductive pattern reading and the third conductive pattern C12C are made of a resin having a thickness of about 瓜 and then a resin layer 21 Covering the second conductive pattern] 2β and the third conductive pattern 12C. By covering the resin layer 21 of the second conductive pattern UB. A bayonet hole is formed and a bell copper is formed to form the first conductive pattern 12A. In addition, The fourth conductive pattern 12d can be formed by providing 314944 595274 = perforation and forming electroplated copper on the resin layer 21 covering the third conductive pattern 12C. Next, the fourth conductive pattern 12D is in addition to the portion exposed as the terminal 18, The remaining parts are Resin film 17 is covered. ', Duke 1 (A), terminal 18 is composed of the fourth conductive pattern 12D exposed by resin film 17 on the back of the circuit device. In this month,: in circuit device 10 The terminal 18A on one side is electrically connected to the external connector 1A 15A. The terminal 18B arranged opposite to the terminal HA is connected to the external second connector 15 and the terminal 1 8C is along the other. True < 5 is set again, and there are many ways to use this terminal, such as: ▼ Used when writing or reading built-in semiconductor components (especially memory, microelectronics). In addition, the terminal -Settings ^ == other than the part 'According to the manufacturing method of this terminal, for example, it can be used when an internal circuit or system is formed. The first circuit element 13 includes a semiconductor element such as a transistor, and a chip mine. Weeping, day μ C, day and night, a mango sore tablet, electric valley, and other passive components. In addition, if the thickness of the table is thick, you can also install cSP, a semiconducting device. faced〇Wn) Resistance can also be used. Inductor (— tor) or thermistor can also be used. ), Etc. The first circuit element / fly ... breaks the bakelite 12A, and is sealed by the seal tree ^. The first electrical 70 1 3 A is installed by the metal wire 1 4 &

電性i車技 V 〜 一具他乐1導電圖案12A 連接。又，弟1電路元件13b 電容哭等曰片兩钍 木用晶片電阻或晶片 件，二二：用為第1電路元件別的晶片零 牛為了要抑制封合樹脂丨6的 例如··可採用厚度薄於金屬細線二：採用小型的結構。 頁邙的結構。此外，藉 3】4944 9 由採用厚度薄於封合樹脂 _ 13，得以入干 的元件作為第1電踗_ μ 行从令電路裝置1〇整 电路7L件 第2 -体的厚度變薄。 电路7L件14係安裝 面，並可採用與上述第，電路：:¥電圖案如的露出 於第2電路元件14 :件13相同種類的元件。由 較大型的元件。具雜而二二Γ6被覆’故可操用比 樹脂封合的封裝體作為第:較大的…容器、 厚的元件安裝於電路裝置北兀14。因此，藉由將較 14’可令封合樹*16的厚戶^;面以作為第2電路元件i 封合樹脂U係被覆著電路^ ^弟2/路凡件H。 電圖案12。就封合樹脂16來。6至屬細線19及導 塑性樹脂。又，本 + 6 ’可採用熱固性樹脂或熱 入 丰發明電路择 人…、 承整體。亦即，為 ' 係利用封合樹脂16支 各導電圖案二//:絲置的薄型化及圖案的微細化， 口示以的谷度係形成 度’理想的狀態是形心。至3 7以下之較薄的厚 圖案12乃藉由封人 _之厚度。並且’導電 了。树月曰1 6的剛性支承整體。 著封合樹脂丨6支承且且 口此，從藉# ^ , /、有女衣基板功能的電路F罟1 η北 面，露出多個由導電圖案12形成的端子18，路二置二？ 元件14及連接器15係固定在端子18上 电 合樹脂16構成的電路裝置”面係為平坦面，=: 易㈣用黏接劑固接於安裝基板或框體内壁。传“ 第1連接杰1 5 Α係安裳於電路裝 附近，具有與外部進行m A 月面的側邊部Electrical i car technology V ~ a 12A connection with a Tara 1 conductive pattern. In addition, the circuit component 13b of the first circuit element 13b is used for chip resistors or chip pieces of two cypresses. 22: It is used for the first circuit element and other chips. In order to suppress the sealing resin, for example, 6 can be used. Thinner than thin metal wires 2: Small structure. The structure of the page. In addition, 3] 4944 9 uses the thinner component than the sealing resin _ 13 to make it dry. As the first electric line, the circuit device 10 completes the circuit 7L and the thickness of the second body is reduced. The circuit 7L member 14 is a mounting surface, and the same kind of components as the above-mentioned circuit :: ¥ electrical pattern are exposed on the second circuit element 14: element 13 may be used. By larger components. It has a heterogeneous and two Γ6 coating ’, so it can be used as the first: larger ... container, thicker component mounted on the circuit device Beiwu 14 than the resin-sealed package. Therefore, the thickness of the sealing tree * 16 can be made thicker than 14 ', and the surface is used as the second circuit element i. The sealing resin U is used to cover the circuit ^ ^ 2 / Road Fan H. Electric pattern 12. Here comes the sealing resin 16. 6 to the thin line 19 and plastic resin. In addition, this + 6 ′ can use thermosetting resin or thermally invented circuits to select people ..., and support the whole. In other words, it is the center of the ideal state of the formation degree of the valley degree based on the fact that 16 conductive resins of the sealing resin are used to reduce the thickness of the wires and the pattern is finer. Thinner and thicker patterns 12 to 37 are made by sealing the thickness of _. And ‘conducted. Shuyue said that the rigid support of the whole is 16. Supporting sealing resin 丨 6 and saying this, from the north side of the circuit F 罟 1 η having the function of a women's clothing substrate, a plurality of terminals 18 formed by the conductive pattern 12 are exposed. The component 14 and the connector 15 are fixed to the terminal 18 with a circuit device made of an electric resin 16. The surface is a flat surface. =: Easy to fix to the mounting substrate or the inner wall of the frame with an adhesive. Pass "First connection Jay 1 5 Α series An Chang is near the circuit installation, and has a side part that carries the m A moon surface with the outside.

、 丁电丨生連接的功能。自第1連接哭！ 5 A 導出的導線係固接於端子 口口, Ding Dian connection function. Cry since the first connection! 5 A lead wire is fixed to the terminal opening

A糟以進仃弟1連接器15A 314944 10 兵柒子1 8 A的電性連接。此外，由第i連接器丨5 A的兩端 =出固接用的導線，藉由令該導線固接於端子18D，可令 第1連接裔1 5 A固接於電路元件1 〇的背面。 立第2連接器1 5B係固接於第1連接器1 5A對面的側邊 P附近，並經由導線而與多個端子丨8B形成電性連接。复 餘部位的構造則與上述第1連接器15A相同。 /、 此外’上述第1連接器15A及第2連接器15B亦可 ，於電路裝置10之側邊部以外的部位，再者，亦可在電路 j置1〇背面安裝數量為兩個之外的連接器15。再者，在 女衣兩個連接器丨5 A、丨5B的情況下，亦可將連接器1 $ 裝於相對邊之外的邊。 在此二說明第1連接器15A及第2連接器15B的具體 使用—例。藉由將第1連接器15A與其他控制部電性連接， 將第2連接器' ⑽與⑶挪等控制部連接，可將電路裝 〇使用為CD_RW的控制模組。因此，可依據自其他控 制部輸入的電性信號，透過第2連接器別進行CD_Rw =寫入及讀取的指示。再者，自⑶_請等媒體讀 5虎可經由第1連接器以傳至外部。 二置’：明關於連接器15A_ 的您卞太A ^ 的俯視圖，第2圖（B)係由第2圖（A) 的則號f向觀察電路裝置1〇的側面圖。 出導線22A弟、’圖（B) ’在第1連接器15A兩端的下部導 連接：15A ’亚將導線22A固接於端子，藉以令第i 固接於電路裝置⑺的背面。因此，端子18D 314944 11 係由上述第4導電圖案12D構成，而形成沒有通過電性信 =的虛擬（dummy)導電圖案。排列在電路裝置】〇 一側邊而 露出的各端子18A，則透過帛1連接器15A下面具有的導 泉B >及等知接材，而形成電性連接。並且’各導線 22B在弟i連接器内部環繞而與端子^仆導通。端子〖π 具有作為電路裝置1〇外部之輸出輸入端子的功能。第2 連m的構造係與上述第i連接器相同。 严考弟3圖’說明第1導電圖案12A的結構。第3圖彳 (A )係電路裝置1 〇的立| ^ Λ,, 的視圖，第3圖（Β)係第3圖⑷之a- in的俯視圖，表不電路裝置1()具備的第工導電圖案 •路ί=3圖⑻’第1導電圖案12A形成有安裝第1 - 。亥圖之中央部以點線所包圍 在形成於島上的第i導電 …路元件13A’其係 又，以勺門干々 案上以面朝上之方式固接。 又，以包圍電路元件13 之方式，利用第1導電圖案12A 6又有格接鲜墊。並且，透過 線部，連接第i電路元件13广圖* 12A所構成的配 連接機構20。 彼此間、第1電路元件！3與 在沒有形成微細配線 12A ^ ^ ^ r ° 、邛位，可利用第1導電圖案 12A形成見幅的圖帛， 包口木 俨而士，彤士 — A 作為、",L通較大電流的配線。具 把而5，形成見幅的第！導電圖案12 从 地電位或電源的圖宰。 1作為連接接 12A h - W ^ ^ 者，在形成寬幅的第1導電圖安 12A上δ又置矩陣狀的開 私α木 且攸忒開d部23露出樹 314944 12 595274 月曰層2 1。一般而言，樹肖匕网 心間的黏接力係 12材料之金屬與樹脂的黏接力。因“於作為導電圖案 從開口部2 3露出，得以令樹脂層2 i 令樹脂層21 的其他樹脂材料（例如：封人 /、復忒樹脂層21 口知W日1 6或導電祐暖 因此得以提昇電路裝置i 〇 土 、）站接， 在寬幅的導電圖案12A上設置 =方式’ 12A的側面露出，並使封合樹脂16等二？導電圖案 的側面接觸。因此，可提 3 電圖案12 的黏接強度。 徒〜圖案以與封合樹脂16 又，寬幅的圖案及形成盥1 於第2導電圖案12B 墓：、4 口部23,亦可設置 ... 及弟導電圖案UC。因此，蕻出/ 第2導電圖案及第3導 口此错由在 包圖木上5又置開口部23，可佶抖匕 層21與導電圖案^的黏接強度提升。 使樹月曰 接：，說明關於在各層導電圖案12上設置開口部η 的/、他優點。猎由在各層導 開口部，可調整μ 上以適虽的比例設置 J正V包圖案12的殘留率。且 ^ 第1導電圖案12A盘帛+ ° 5 ^ ^ ^ 1A is connected to the connector 1A 15A 314944 10 The electrical connection of the soldier 1 8 A. In addition, from both ends of the i-th connector 丨 5 A = a wire for fixing, and by fixing the wire to the terminal 18D, the first connection sub 1 5 A can be fixed to the back of the circuit element 1 〇 . The second vertical connector 15B is fixedly connected to the vicinity of the side P opposite to the first connector 15A, and is electrically connected to a plurality of terminals 丨 8B through a wire. The structure of the remaining portions is the same as that of the first connector 15A. / 、 In addition, the above-mentioned first connector 15A and second connector 15B may be located at positions other than the side portion of the circuit device 10, and may be installed on the back of the circuit j. Connector 15. Furthermore, in the case of two connectors 丨 5 A and 丨 5B in women's clothing, the connector 1 $ can also be installed on the side other than the opposite side. Specific examples of the first connector 15A and the second connector 15B will be described here. By electrically connecting the first connector 15A to other control units, and connecting the second connector '⑽ to control units such as CDN, the circuit can be installed as a control module of CD_RW. Therefore, according to the electrical signals input from other control sections, the CD_Rw = write and read instructions can be performed through the second connector. Moreover, please read from the media, etc. 5 Tigers can be transmitted to the outside through the first connector. Two sets ’: A plan view of your connector AA ^, which is about the connector 15A_, and FIG. 2 (B) is a side view of the circuit device 10 viewed from the rule f of FIG. 2 (A). The lead 22A is drawn out, and "Fig. (B)" is connected to the lower part of both ends of the first connector 15A: 15A 'is used to fix the lead 22A to the terminal so that the i-th part is fixed to the back of the circuit device ⑺. Therefore, the terminal 18D 314944 11 is composed of the above-mentioned fourth conductive pattern 12D, and a dummy conductive pattern is formed without passing electrical signals. Arranged in the circuit device] 〇 Each terminal 18A exposed on one side is electrically connected through a conductive spring B > and the like provided under the 帛 1 connector 15A. And each lead 22B is looped inside the connector i and is connected to the terminal ^. The terminal [π] functions as an input / output terminal external to the circuit device 10. The structure of the second connector m is the same as that of the i-th connector. The rigorous test figure 3 'illustrates the structure of the first conductive pattern 12A. Fig. 3 (A) is a view of the circuit device 1 〇 | ^ Λ ,, and Fig. 3 (B) is a plan view of a-in in Fig. 3, showing the first工 conductive pattern • 路 ί = 3 图 ⑻'The first conductive pattern 12A is formed with the first mounting pattern-. The central part of the chart is surrounded by dotted lines on the i-th conductive ... road element 13A 'formed on the island, which is fixed by facing up on the scoop door. In addition, the first conductive pattern 12A 6 is used to surround the circuit element 13 with a fresh pad. Further, a connection mechanism 20 constituted by the i-th circuit element 13 as shown in FIG. 12A is connected through the wire portion. Between each other, the first circuit element! 3 and 12A ^ ^ ^ r ° where no fine wiring is formed, the first conductive pattern 12A can be used to form a large-scale picture, Baokou Mulai Shi, Tong Shi — A as, ", L High-current wiring. With the 5th, form the first! The conductive pattern 12 is cut from the ground potential or the power source. 1 as the connection 12A h-W ^ ^, on the first conductive pattern Ann 12A forming a wide width, δ is arranged in a matrix-like form of a α-wood and the d-section 23 is exposed to a tree 314944 12 595274 month layer 2 1. Generally speaking, the adhesion force between the cores of tree dagger nets is the adhesion force between metal and resin of 12 materials. "As the conductive pattern is exposed from the opening 2 3, the resin layer 2 i can be made of other resin materials of the resin layer 21 (for example: sealing / reinforcement of the resin layer 21. W 16 or conductive warmth. It is possible to improve the circuit device i 〇 soil,) station, set the side of the wide conductive pattern 12A = mode '12A exposed, and make the sealing resin 16 and other two? Conductive pattern side contact. Therefore, 3 electric The adhesion strength of the pattern 12. The pattern and the sealing resin 16 are also used, and the wide pattern and the toilet 1 are formed in the second conductive pattern 12B tomb: 4, the mouth 23, and the conductive pattern can also be provided ... UC. Therefore, if the second conductive pattern and the third conductive port are pushed out, the opening portion 23 is placed on the top of the wooden package 5 to increase the bonding strength between the dagger layer 21 and the conductive pattern ^. The following describes the advantages of providing the openings η in the conductive patterns 12 of each layer. The remaining ratio of the J + V package pattern 12 can be adjusted at a suitable ratio on the conductive openings of each layer. And ^ the first conductive pattern 12A plate 帛 + ° 5 ^ ^ ^ 1

”弟4導電圖案12D 殘留率，得以使被覆l N私度的 上述兩者的樹脂皮膜1 7厚度一致。此 外，藉由將第2導雷R安度致此 V屯圖案12B與第3導電圖案u 相同程度的殘留率，得以枯、士孕l + 口木凋正為 侍以使被覆上述兩者的樹脂層21厚度 一致0 & 機^ / 2 V電圖案12B及第3導電圖帛12C係藉著連 ”°形成電性連接，而主要乃形成配線部。 絲麥考第4圖’以說明第4導電圖案12D的構造。第 Π 314944 595274 4圖（A)係電路裝置1 〇的 之“，線的俯視圖。視圖…圖剛第鄉) 第2:參考第4圖(Β)，第4導電圖案⑽係形成有安褒 二子㈣元―件，及連接器15的端子U與配線部。又，各 而子1 8係藉著第4導電圖^ ^ ^ ^ ^ ^ ^ ^ ° 所構成的配線部或連接 2構，而與電路裝置10内部所構成的電路連接。端子ΐδΑ :端子⑽係排列於電路裝置i。的—側邊， 露出。此外，如該圖所示，當端子“A或二 具有多數個時’也可排成兩行以上。端子 传 列在電路裝置10的一側邊， 係排 部的半導體元件。此外，端子A I貝枓寫入内 北 而子1 8E係形成於電路庐罟！ n :面之側邊部以外的部位。該端…用以確二:於 側邊部以外的^ 而子Μ亦可設置於 i卜的口^，而且亦可不排列地設置。 以下，綜合敘述本發明的特徵。 -::來二半導體封裝體係安裝於印 ，上’故不會在封装的外部安震任何元件。例* .:广 裝體的背面形成外部連接 僅在封 (βγα、”^ Ρ連接用电極，例如：球柵陣列構穿 (BGA)，在为面形成電極的部位沒有 菁名 器。此乃因為上述元件凡牛或連接 板之故。 件係精者鲜劑等安裝材料而安裝於基 另-方面’本裳置並非固接於安裳基 身t可用以作為安装基板的半導體封裝體。雖二ΐ! 係扣所採用之導電圖案的戶數 、衣體 曰數而形成不同的厚度，但是整 314944 14 595274 體上約形成1毫米以下的薄型板狀體。若 部連接電極上設置銲劑等焊# # ^的外 ^寻斗接材，則亦可形成薄型的 =:!:，如第1圖(B)所示，以背面作為表面，而且將 :面使用’將第2電路元件14或連接器15連接 ;4女裝面上而形成模組。 換吕之，本發明乃利用以下列舉 的電路或系統。 件而構成所期望 ⑴經模塑的第丨電路元件13、最上層導電圖案以 其形成的電極、載接（land)部、搭接銲墊等。 _ =)由最:層第4導電圖案12D構成的外部連接電極、配 " 及安I於其上的第2電路元件14。 — (3) ,又置於最下層及最上層導電圖案間的至少—層。 (4) 形成於各導電圖案12間的貫穿孔。 日" (5) 设置於最下層之外部連接電極的連接器b。 因厚度較薄，且無導線架使其平面面積變小 成超小型的封裝體，故可使崔 構 们…⑨ 爾“、0A機器達成小· 二里化。又，連接器係為這些機器 鋏一船如ς 』文衣铖構。雖 …、般如5咖><5咖、1〇(：111><4請、厚度為〇 5毫 封裝體，按一般的想法應會產生翹起的問題 為 是以::成於背面的鲜劑等安裝，而是以連接器：薄板;^ 機構寺來安裝，所以可在麵起的狀態下安裝。因此，亦可 防止銲劑等之龜裂。 ^ σ 9龜之’說明關於開口部23形成島狀的帛】導電圖案 12A。以下稱為網目（mesh)圖案。如第3圖⑷所示，該網 314944 15 595274 目圖案原本的用意，係為了要使第 道兩 κ昂1蛉電圖案12A至第4 冷电圖案1 2D及將此等形成一體 1的封5树脂1 ό形成實質 上王面均勻而設置的虛擬圖案。 妙n 电極本身雖可形成島狀， …、、而由於施加於其上的電壓係為 合為⑦動狀態，故該虛擬圖案 會產生電容。此外，要將這此 w日 > 包極固疋在不浮動的狀態， '、而/、有接觸孔。形成該網目圖宰 又在各層或設於重疊 的下層及上層時，這些設成相 且 ^ a U电位的接觸孔只要至少一 個部位即足夠。而且，葬签 稭者開口部23使上層與下声 黏接，得以提升封裝體的密接性 曰、设曰< 亦目士的也 Γ生又，如第3圖（B)所示， 亦具有圖案較大且流通更大雷治 .s 大电，瓜的電極功能。再者，由於 各層的網目圖案係固定於例如 万、 ^ ^ 接地（ground)電位，所以， 不έ產生寄生電容。此外，+ & 错由抑制該開口部23的尺寸， 亦可具有遮蔽（shield)效應。 [發明的效果] 本發明可具有以下所示之效果。 在具有安裝於導電圖案12之第】電路 裝置1 0背面，安裝用以作為 勺电路《 哭M 為與外部連接之連接端子的連接 ;因此’不必增加電路裝置10整體的平面尺寸g 可容易地藉著連接器15與外部形成電性連接面尺寸，即 再者，在内設半導體元件 … 件寺弟1電路元件13，日曰丄 形成多層之導電圖案12的+ 且具有 狄 电路兀件10背面，安妒箓〇 & 路元件14,因此，可提供小型且具有複雜電路電 裝置。具體而言’本發明電 、。鼻的電路 成約3cmx3⑽。 路衣置1G的平面尺寸係、得以形 314944 16 595274 又，藉由將導電圖案12形成多層，可在裝置内部形成 更複雜的電路’故可構成具有一個系統模組的電路裝置 1〇。例如··可構成具有控制CD_WRf硬體功能的電路裝 此外，由於電路裝置10係藉由封合樹脂16支承整體 而不需如習知例之安裝基板的支承基板，&電路袭= 得以形成薄型。 L圚式間單說明】The residual rate of the conductive pattern 12D of the younger brother 4 makes the thickness of the resin film 17 covering the above two layers uniform. In addition, the second conductive pattern RB is caused to make the Vtun pattern 12B and the third conductive pattern uniform. The pattern u has the same degree of residual rate, so that the dry and sterilized l + mouthwood are serving to make the thickness of the resin layer 21 covering the above two uniform 0 & machine ^ / 2 V electric pattern 12B and the third conductive pattern 帛The 12C system forms an electrical connection through the connection, and mainly forms a wiring section. FIG. 4 of Simacco illustrates the structure of the fourth conductive pattern 12D. No. 314944 595274 Fig. 4 (A) is a top view of the circuit device 10, and the view is shown in the figure ... Figure 2: Township) Fig. 2: Referring to Fig. 4 (B), the fourth conductive pattern ⑽ is formed with an anchor. Two sub-units—pieces, and terminals U and wiring sections of connector 15. Also, each of the eighteenth is a wiring section or connection structure composed of a fourth conductive pattern ^ ^ ^ ^ ^ ^ ^ ^ °. It is connected to a circuit formed inside the circuit device 10. The terminal ΐδA: the terminal ⑽ is arranged at the side of the circuit device i. And is exposed. In addition, as shown in the figure, when the terminal "A or two has a plurality of terminals" Can also be lined up in more than two lines. The terminals are arranged on one side of the circuit device 10, and are semiconductor elements in the row. In addition, the terminals A and I are written in the north, and the sub 1E is formed in the circuit. n: Parts other than the side of the surface. This end ... is used to confirm the second: outside the side part ^ and the sub-M can also be placed in the mouth of the ibu, and can also be arranged without alignment. Hereinafter, features of the present invention will be comprehensively described. -:: Lai Er semiconductor packaging system is mounted on the printed circuit board, so it will not shake any components outside the package. Example * .: The external connection is formed only on the back of the package body. The connection electrodes (βγα, "^ P" are used for connection, for example: ball grid array structure (BGA). It is because of the above components such as cows or connection boards. The components are mounted on the base with the mounting materials such as freshener, etc.-This is not a semiconductor package that is fixed to the base of Ansang and can be used as a mounting substrate. .Although the thickness of the conductive pattern used by the button is different, the thickness of the body is different, but the entire 314944 14 595274 body is formed into a thin plate-like body of less than 1 mm. Welding flux and other welding # # ^ outer ^ hunting bucket can also form a thin == !!:, as shown in Figure 1 (B), with the back surface as the surface, and using the: surface to 'the second circuit Components 14 or connectors 15 are connected; 4 modules are formed on the surface of the women. In other words, the present invention utilizes the circuits or systems listed below. The components constitute the desired circuit components 13, which are molded. Electrodes, land portions, bonding pads, etc. formed by the upper conductive pattern _ =) The external connection electrode composed of the 4th conductive pattern 12D on the topmost layer, and the second circuit element 14 disposed thereon.-(3) is placed between the bottommost and topmost conductive patterns. (4) A through hole formed between the conductive patterns 12. (5) A connector b provided on the outermost connection electrode of the lowermost layer. The thickness is thin and there is no lead frame to make it flat. The area is reduced to an ultra-small package, so that Cui Gou ... ⑨ 尔, 0A machines can be reduced in size. In addition, the connector is a structure for these machines. Although ..., like 5 coffees < 5 coffees, 1〇 (: 111 > < 4 please, package with thickness of 05m, according to the general idea, the problem that should arise is: :: 成Fresheners are installed on the back, but are connected by connectors: thin plate; ^ mechanism temple, so it can be installed in the state from the surface. Therefore, cracks such as solder can also be prevented. ^ Σ 9 turtle's description About the opening 23, an island-shaped 帛] conductive pattern 12A is hereinafter referred to as a mesh pattern. As shown in FIG. 3 (b), the original purpose of the mesh 314944 15 595274 mesh pattern was to make the second two κ The Ang 1 electric pattern 12A to the 4th cold electric pattern 1 2D and the sealing 5 resin 1 forming the same 1 form a virtual pattern that is substantially uniformly arranged on the king surface. Although the electrodes themselves can form island shapes, …, And because the voltage applied to it is in a pulsating state, capacitance will be generated in the virtual pattern. In addition, it is necessary to keep these bags in a non-floating state, ', and / 、 There are contact holes. When forming the mesh map, these layers are set at each layer or at the overlapping lower and upper layers. And the contact hole of ^ a U potential is enough as long as at least one part. In addition, the opening 23 of the funeral straw makes the upper layer adhere to the lower sound, which can improve the tightness of the package. Γ 生 Also, as shown in Figure 3 (B), it also has a larger pattern and a larger flow of lightning. S large electricity, the function of the electrode. Furthermore, because the mesh pattern of each layer is fixed to, for example, 10,000, ^ ^ Ground potential, so that parasitic capacitance is not generated. In addition, + & wrong reason to suppress the size of the opening 23 can also have a shield effect. [Effects of the invention] The present invention can have the following The circuit device 10 is mounted on the back of the circuit device 10 provided with the conductive pattern 12, and is used as a scoop circuit. "M M is for connection with external connection terminals; therefore, it is not necessary to increase the overall plane size of the circuit device 10." g It is easy to form the size of the electrical connection surface with the outside through the connector 15, that is, furthermore, the internal semiconductor element is installed ... the circuit element 1 of the temple 1 is formed by a multi-layered conductive pattern 12+ Circuit 10 on the back, Ann 箓 0 & circuit element 14, so can provide a small and complex electrical device. Specifically, the present invention. The electrical circuit of the nose is about 3cmx3 衣. The shape 314944 16 595274. By forming the conductive pattern 12 in multiple layers, more complicated circuits can be formed inside the device. Therefore, a circuit device 10 having a system module can be configured. For example, it can be configured to have a hardware function of controlling CD_WRf In addition, since the circuit device 10 supports the whole by the sealing resin 16 and does not require a supporting substrate such as a conventional mounting substrate, the circuit board can be made thin. L-style room single note]

第1圖（A)係說明本發明電路裝置之俯視廣 乐1圖（B)係說明本發明電路裝置之剖視圖 :2圖(A)係說明本發明電路裴置之俯視圖 第2圖(B)係說明本發明電路裝置之剖視圖 第3圖（A)係說明本發明電路裳置之剖視圖 第3圖（B)係說明本發明電路裳置之俯視圖 10 電路裝置 13A、13B第1電路元件 15A、15B連接器 17 樹脂皮膜 1 9、1 0 4 金屬細線 至12D導電圖案 14 第1電路元件 16 封合樹脂 1 8 A至〗8 E端子 2〇 連接機構 Μ 314944 1 4圖⑷係說明本發明電路裝置之剖視圖 2 4圖（B)係說明本發明電路裝置之俯視圖 弟5圖係說明習知電路裝置的剖視圖。 第6圖係說明習知電路裝置的剖視圖。 595274Figure 1 (A) is a plan view illustrating the circuit device of the present invention. Guangle 1 Figure (B) is a cross-sectional view illustrating the circuit device of the present invention: Figure 2 (A) is a plan view illustrating the circuit of the present invention. Figure 2 (B) FIG. 3 is a cross-sectional view illustrating a circuit device of the present invention. FIG. 3 (A) is a cross-sectional view illustrating a circuit device of the present invention. FIG. 3 (B) is a plan view illustrating a circuit device of the present invention. 10 Circuit device 13A, 13B First circuit element 15A, 15B connector 17 Resin coating 1 9, 1 0 4 Metal thin wire to 12D conductive pattern 14 First circuit element 16 Sealing resin 1 8 A to 8 E terminal 20 Connection mechanism M 314944 1 4 Figure illustrates the circuit of the present invention Sectional view of the device Figure 2B (B) is a plan view illustrating a circuit device of the present invention. Figure 5 is a sectional view illustrating a conventional circuit device. Fig. 6 is a cross-sectional view illustrating a conventional circuit device. 595274

21 、 106 樹脂層 22Α、22Β 導線 23 開口部 100 CSP(晶片尺寸封裝體） 101 玻璃壞氧樹脂基板 102Α 第1電極 102B 第2電極 103 晶片銲墊 105A 第1背面電極 105Β 第2背面電極 110 電路裝置 PS 安裝基板 CR 晶片電阻 Τ 電晶體晶片 ΤΗ 貫穿子L 18 31494421, 106 Resin layers 22A, 22B Leads 23 Openings 100 CSP (wafer size package) 101 Glass aerobic resin substrate 102A First electrode 102B Second electrode 103 Wafer pad 105A First back electrode 105B Second back electrode 110 Circuit Device PS Mounting substrate CR Chip resistor T Transistor wafer TΗ Through-hole L 18 314944

Claims (1)

595274 拾、申請專利範固·· 1· -種：：裝置，其具備： '’· ^笔圖案’·固接於上述導電圄宏β 路元件；及被覆……… 呤电圖案的第1電 承整體的封合樹脂^弟1电路70件及上述導電圖案以支 器。並且在背面露出的上述導電圖案上連接有連接 其中，上述連接器 其中，上述連接器 其中，在上述導電 其中，上述導電圖 2. 如申請專利範圍第i項之電路裝置 係設置於上述電路裝置的周邊部。 3. :::專利範圍第1項之電路裝置 係s又置於對面的側邊。 4. 如申請專利範圍第i項之 圖案的背面安袭第2電路元件。 5·如申請專利範圍第i項之 案係形成多層，在最 ^ ，、，上述導電圖 1電路元件，且在旧:、上述導電圖案上安裝上述第 接器。 ¥ ^的上述導電圖案上連接上述連 6·如申請專利範圍第i項之電路穿置 路兀件係為電晶體、二極體 片、—上述第1電 阻、樹脂封合封 c日曰片電容器、晶片電 钌凌體、感應器或埶敏帝 如申請專利範圍第4項之 ：。 路元件係為電晶體、二極# W /、中，上述第2電 阻、樹脂密封封裝體、^献晶片電容器、晶片電 如申έ月專利範圍第1項之電路壯蓄廿 衣置，其中，利用上述導 314944 19 7 電圖案構成固接上述第】+ 以構成電路或系統。'路兀件的輝墊及配線部，藉 9·種電路裝置，其特徵為具備·· 至少一層導電圖案,· 路元件;及被覆上述第4 =述導電圖案的第1電 承整體的封合樹脂， 兀及上述導電圖案以支 並且具備固接於在上述電b 圖案第2電路元件。 …面路出之上述導電 1()·如申請專利範圍第9項之電路裝 、 . 路元件係為利用全屬 "，、，上述第1電 半導體元件及^ 述導電圖案電性連接的 上述封合樹脂。 上述日曰片零件的厚度係薄於 "·如申請專利範圍第9項之電路裝 路元件及上述第2電路元件係為㈣、二弟^ 曰片…。、曰曰片電阻、樹脂封合封襞 敏電阻。 五感應裔或熱 12.如申請專利範圍第9項之電路 # 裝置的周邊部，安妒盥上、f : /、，在上述電路 哭，且在上m 電圖案電性連接的連接 。。且在上述連接器所包圍的區域 件。 直上述弟2電路元 a如申請專利範圍第9項之電路裳置，其中，上述導 案係形成多層，在最上層的 " ^ ^ 圖案安裝上述笫1 电路元件，且在最下層的上述導 路元件。 …圖案安裳上述第2電 3]4944 20 1 4·如申請專利範圍第9項兩 電圖案構成固接上述第卜破置其中’利用上述導 的銲墊及配線部，_ I %件及上述第2電路元件 稭以構成電路或系統。 種电路裝置，具備有封 ^ f /1、6 M t t體，该封裝體包括： 至夕兩層導電圖案；與 、… 之第1電極電性連接、電：：述最上層導電圖案 元件及上述導電圖案封合成：=二上t述第1電路 及形成為最下層之導恭、、月曰， 封合樹脂面露出的第2 = _，且從位於背面之上述， 並且上述第2 7么 電路元件安裳用“、由連接器安裝用的電極、第2 2電路元件，且葬英 J女忒有連接口口與弟 穿孔、配線 日 取上層延伸至最下層而設置的貫 16二4:所期望的電路或系統電路。 •士申％專利乾圍第15 雷路开杜总& 、包路裝置，其中，上述第2 阻或電解電容器。¥…牛、晶片電容器、晶片電 17.如申請專利範圍第 電路農置，其中，就項或弟15項中任一項之 有複數^狀Μ 、 ^ 一層導電路而言，可設置形成 令？夂数島狀開口部的安 ^ 、真與t 、電圖木，且错由上述開口部來固 接一邊樹脂與另一邊樹脂。 1 8 ·如申請專利範圍筐 述島狀門 之電路裝置，其中，形成有上 …’ 口邛的導電圖案係重疊地形成於上層或下 兩者之電性上係固定在相同電位。 1 9 ·如申請專利範圍筮 圍弟17項之電路裝置，其中，形成有上 314944 21 595274 述島狀開口部的導電圖案係整個複數層形成空的區 域，且與固定該導電圖案的樹脂層一體形成實質上全面 均勻的膜厚。 22 314944595274 Fanggu, applying for a patent ... 1 kinds :: device, which is provided with: '' ^ pen pattern '' fixed to the above-mentioned conductive 圄 macro β circuit element; and the first covering ...... Seventy-seven pieces of circuit-sealed resin and electric circuit and the above-mentioned conductive patterns are used as supporters. And the connection is connected to the conductive pattern exposed on the back, among the above-mentioned connectors, among the above-mentioned connectors, among the above-mentioned conductive, the above-mentioned conductive figure 2. The circuit device such as item i in the scope of patent application is provided on the above-mentioned circuit device Peripheral part. 3. ::: The circuit device of item 1 of the patent scope is placed on the opposite side. 4. If the back of the pattern in item i of the patent application is applied, the second circuit element is mounted on the back. 5. If the item i in the scope of the application for a patent is formed in multiple layers, the circuit element of the above-mentioned conductive figure 1 is installed at the most, and the above-mentioned connector is installed on the old conductive pattern. ¥ ^ is connected to the above conductive pattern. If the circuit penetrating element of item i in the scope of patent application is a transistor, a diode chip, the above-mentioned first resistor, a resin-sealed c-chip Capacitor, chip electric ruthenium corpuscle, inductor or Mi Mindi, such as in the scope of patent application No. 4: The circuit components are transistors, diodes # W /, medium, the above-mentioned second resistor, resin-sealed package, chip capacitors, and chip capacitors as described in the first item of the patent scope of the circuit, including: , Using the above-mentioned guide 314944 19 7 electrical pattern to form a fixed connection above] + to form a circuit or system. The circuit board has 9 types of circuit devices, which are characterized by having at least one layer of conductive pattern, and a circuit element; and a first electrical conductor covering the entirety of the above-mentioned 4th conductive pattern. The resin is supported by the conductive pattern and includes a second circuit element fixedly connected to the electrical b pattern. ... the above-mentioned conductive 1 () on the surface of the circuit, such as the circuit installation of item 9 of the scope of the patent application. The circuit components are all electrically connected using the above-mentioned first electrical semiconductor component and the conductive pattern described above. The sealing resin. The thickness of the aforementioned Japanese and Japanese film parts is thinner than " · For example, the circuit mounting element of the 9th patent application scope and the above-mentioned second circuit element are ㈣, second brother…. , Said chip resistors, resin sealed 襞 sensitive resistors. Five senses or heat 12. If the circuit of the patent application No. 9 of the device # peripheral part of the device, An Jishang, f: /, cry on the above circuit, and electrically connect the electrical pattern on the m. . And in the area enclosed by the connector. Straight to the second circuit element a is the circuit configuration of item 9 in the scope of the patent application, wherein the above-mentioned guide is formed in multiple layers, and the above-mentioned 笫 1 circuit element is mounted on the " ^ ^ pattern on the top layer, and the above-mentioned on the bottom layer Guide element. … Patterns Ansang 2nd above 3] 4944 20 1 4 · If the scope of the patent application is the ninth, the two electrical patterns constitute a fixed connection to the above-mentioned one. 'Using the above-mentioned conductive pads and wiring parts, _ I% pieces and The second circuit element described above constitutes a circuit or a system. A circuit device is provided with a package ^ f / 1, 6 M tt, the package includes: two layers of conductive patterns; electrical connection with the first electrode of, electrical :: the uppermost conductive pattern element and The above conductive pattern is encapsulated: = 2, t, the first circuit, and the bottom layer of the conductor, and the month, the sealing resin surface is exposed at 2 = _, and from the above located on the back, and the above 2 7 For circuit components Ansang, "Electrode for connector installation, 2nd 2nd circuit element, and the son-in-law of Jieying J has a connection opening and a perforation. The wiring layer is taken from the upper layer to the bottom layer. 4: Desired circuit or system circuit. • Shishen Patent Patent No. 15 Thunder Road Kaito & Circuit Packing Device, in which the above second resistance or electrolytic capacitor. ¥ ... New Zealand, chip capacitors, chip capacitors 17. In the case of the patent application for circuit farms, where there is a plurality of conductive circuits in one or more of the 15 items, it is possible to provide a security device that forms an order-like island opening. ^, True and t, telegram, and mistakenly mentioned above To fix the resin on one side and the resin on the other side. 1 8 · As described in the scope of the patent application, the circuit device of the island-shaped door, in which the conductive pattern with the upper ... 'mouth is formed on the upper layer or the lower layer is overlapped. In nature, it is fixed at the same potential. 1 9 · For example, the circuit device of the 17th item of the scope of the patent application, in which the conductive pattern formed with the island-shaped openings on the 314944 21 595274 mentioned above forms an empty area in a plurality of layers, and Integrate with the resin layer to which the conductive pattern is fixed to form a substantially uniform and uniform film thickness. 22 314944
TW092122459A 2002-12-03 2003-08-15 Circuit device TW595274B (en)

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JP2006173489A (en) * 2004-12-17 2006-06-29 Tokai Rika Co Ltd Electronic component mounting structure
JP2008053319A (en) * 2006-08-22 2008-03-06 Nec Electronics Corp Semiconductor device
JP4958526B2 (en) * 2006-11-30 2012-06-20 三洋電機株式会社 Circuit device and circuit module
JP4948160B2 (en) * 2006-12-29 2012-06-06 三洋電機株式会社 Circuit module
JP4975655B2 (en) * 2007-02-01 2012-07-11 日本特殊陶業株式会社 Wiring board, semiconductor package
CN102577643B (en) * 2009-09-16 2015-11-25 株式会社村田制作所 Module having built-in electronic parts
TWI795644B (en) * 2020-06-02 2023-03-11 大陸商上海兆芯集成電路有限公司 Electronic assembly

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US6562660B1 (en) * 2000-03-08 2003-05-13 Sanyo Electric Co., Ltd. Method of manufacturing the circuit device and circuit device
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CN1505459A (en) 2004-06-16
JP2004186362A (en) 2004-07-02

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