TW200410604A - Circuit device - Google Patents

Circuit device Download PDF

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Publication number
TW200410604A
TW200410604A TW092122459A TW92122459A TW200410604A TW 200410604 A TW200410604 A TW 200410604A TW 092122459 A TW092122459 A TW 092122459A TW 92122459 A TW92122459 A TW 92122459A TW 200410604 A TW200410604 A TW 200410604A
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Taiwan
Prior art keywords
circuit
conductive pattern
patent application
pattern
circuit device
Prior art date
Application number
TW092122459A
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Chinese (zh)
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TW595274B (en
Inventor
Eiju Maehara
Hiroyuki Tamura
Atsushi Kato
Atsushi Nakano
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Sanyo Electric Co
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Publication of TW200410604A publication Critical patent/TW200410604A/en
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Publication of TW595274B publication Critical patent/TW595274B/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The present invention provides a circuit device (10), in which a complicated electrical circuit is installed, and the electrical connection thereof is easy, wherein first circuit element (13) is mounted to conductive pattern (12A) which is formed on the top layer of conductive pattern (12) coustituing a multilayered wiring. Second circuit element (14) and connector (15) are mounted on the fourth conductive pattern (12D) being the lowest layer of the conductive pattern and exposing from the back surface of the device. Thus providing a circuit device having more circuit elements is feasible. Furthermore, mounting counector (15) on the back surface of the device makes the electrical connection with external circuit easy to carry out.

Description

ZUU4IU0U4 坎、發明說明： 【叙明所屬之技術領域】 本發明係關於一種電路梦 件的電路裝置。 °p电性連接的連接器及電路5 【先前技術】ZUU4IU0U4 The invention description: [Technical field to which the disclosure belongs] The present invention relates to a circuit device of a circuit dream device. ° p electrical connector and circuit 5 [prior art]

以往，因為裝設於雷 J 電話、可攜式電腦等，故電路：：電路裝置係使用於行輩 化、輕量化。若以作A + 衣置之結構需小型化、薄3 般的半導體裝置而言 置為例，就-In the past, because it was installed in a Thunder J phone, a portable computer, etc., the circuit: The circuit device was used for modernization and lightweight. As an example, let ’s consider a semiconductor device that needs to be miniaturized and thin as the structure of an A + garment.

Package ^ a , F ^ 、已開發出所謂 CSP(Chip Size g日日片尺寸封裝體）的電踗驻罢rt B u 的晶片級CSP、或者尺寸 f置’ 曰片尺寸相同 利文獻υ。 稍大方；晶月的cSP(例如：參考肩 板，：且5尺圖：=用破璃環氧樹糧101作為支承基 寸稍被大於晶片的CSP1 on ^ lL 環氧樹脂基板m上安曰雕0。在此，說明在玻璃 ^ 女衣包晶體晶片丁之實例。 在该破璃環氧樹脂基板 _、第2電極_ :表面，形成有第1電極 第1背面帝極1ΓΚΛ S曰片#塾】03 ’且在背面形成有 穿孔ΤΗ φ 及第2背面電極105Β。益且，透過貫 性二妾:吏上述第】電…與第1背面電極祕電 電=接ίΓ2?極_與上述第2背面電極】㈣ 的電晶㉟曰月丁纟曰曰月辉塾】〇3上固接上述裸露（㈣ 全严έ . 电日日肢的射極與第1電極1 02Α係以 孟屬細線】〇4連接，電晶體的基極與第2電極謂係以 314944 200410604 :屬細線1〇4連接。再者1覆蓋電晶體晶片τ ， 續環氧樹脂基板1 0 1上設置樹脂層i 〇6。 雖然上述CSP 1 00係採用玻璃環氣 和晶Η 4 衣虱树月曰基板101，然而 曰片級CSP卻不同，其具有從晶月 t Φ 片丁 I伸至外部連接用 包極105Α、105Β的結構簡單並得 點。 平I侍以廉價製造的優 茲|考第6圖，上述CSP1 〇〇等亓| 〜 PS ^ ^ 、兀件係女裝於安裝基 反PS而構成一個模組。安裝基板ps上 太甘士 。于、J L b JP之夕卜， 仕具表面及背面還安裝有内設半導 又牛v月豆兀件的電路裝置 υ、晶片電阻CR及晶片電容器CC。並日—1 安梦其b 且’錯由形成於 1基板PS表面及为面的導電路， 性遠妞 —, 7 σ毛路元件形成電 f連接。糟此構造，得以形成安裝於 公宮6 例如攜帶式、OA(辦 至自動化’ Office 〇utomati〇n)等機器中的模组。 【發明内容】 、、’、 曰本特開20〇1 -339 1 5 1號公報（第}頁、 ^1/斤欲解決之锞顴 圖） 然而，如習知例的結構中，在構 組時，會導致整體尺寸變大。因而產：難有—個功能的模 口叩座生難以令内許 之電子機器達成小型化及輕量化的問題。具：^旲、’且 知例的結構形成上述模組時，合產 八g，以習 方m題。 4生尺切成數十公分平 所二外广安裝基板Ps的兩面皆固接有電路元件， 所从也會產生難以對主機板等的基板進行連接的問題。 314944 U0U4 本發明係有鑑於上述 的在於提供-種藉由在開發者，本發明的主要目 裳電路元件或連接器而2置背面露出的導電圖案上安 置。 冓成具有板組功能的小型電路裝 磨決課韻之手段 本發明電路裝置的特徵為具備 固接於上述導電圖案的第層W圖木’ 路元件及上述導電圖案以支:敕:’及被覆上述第1電 面露出的上述導電圖案上連接=器樹脂，並且在以 圖案；固接於上述的特徵為具備：至少-層導電 、令兒圖案的第1 φ 第1電路元件及上述導電圖安弟1电路兀件，·及被覆上述 且具備固接於在上述 ^ =支承整體的封合樹脂，並 第2電路元件。 电&置背面露出之上述導電圖案的 並且，本發明電路 括：至少兩層導電圖備有封裝體’該封裝體包 及上述導電圖案封::二:广將上述第】電路元件’ 導電圖案，且從位於背面之子合樹脂’·及形成為最下層 極，並且上述第2電極係 ^合樹脂面露出的第2電 路元件安裝用# 接态安裝用的電極、第？泰 衣用屯極所構成，而分 矛-电 路兀件’且藉著由最上層 ^有連接器與第2電 配線而構成所期望的 I下層而設置的貫穿孔、 【實施方式】 九兒路。 3 Η 944 200410604 么么茶考第1圖，說明本發明壯 圖⑷係電路裳置10的俯視圖 衣置1〇的結構。第！ 發明電路裝置1〇係具備:至少一舞二⑺)係其剖視圖。本 固接於導電圖案12A ^曰導電圖案12A至如； 勺弟1電路元件13 · 元件13及導電圖案】 午及被復弟1 %袼 成在背面露出的導支承I體的封合樹脂16，^ 此構造。圖案12D上連接連接器。以下，祥= 焊接=^圖叫’選擇導電圖案12的材料時，可考 以_u)::性、搭接性、電鑛性。就材料而言，可操慮 的導”，⑽為主材料的導， 或者由鐵-鎳（Fe_Ni)等合金 h μ 由第……八、第2導電圖 12C及第4導電圖案12D組成的4 * W圖案 電圖案12係透過連接機 ;二：：、線結構。各導 連接。並且，各_案^==孔）形成電性 說明上述多層導電5安1?树月曰層21積層。 夕層圖案12的具體結構。 咖與第3導電圖案12C係藉著厚度 弟圖案 層h積層。並且，藉由貫穿樹脂層21的;^ =月旨 Γ膜，形成有電性連接第2導電圖案】-與第3= 案12C的連接機構2〇。 ―电圖 =後’以樹脂層2】被覆第2導電圖案】 上電:置案：。藉由在被覆第2導電圖案】— 貝牙孔且形成電鑛銅，可形成第I導電圖宰】… 此外’秸由在被覆第3導電圓案]2C的樹脂層上設置 314944 200410604 貫穿孔並形成電鍍銅’可形成第 第4導電圖案㈣除了作為端子18而::120。繼之， 餘部位皆以樹脂皮膜〗7被覆。 路出的部位外’其 兹參考第1圖（A)，端子！ 8扦士分劳 i*r'由被後電路梦番 之樹脂皮膜η露出的第4__加::月面 排列在電路裝置!。之一側邊的端子18A係與：為^ 接部之第i連接器15A電性連接。排列在端 』 邊的端子刚則與連接外部的第2連接 之相對 端子18C係沿著另一邊i 連接。又， 政叹置，且該端子的使用方式有許多 種，例如··可在對内設的半 - 飞有斤夕 腦）進行資料寫入.讀取時使 ^ '月立 ^ ^ 用此外’端子1 8Ε係設置於 週政部以外的部位，以兮 、 ..,^ ϋ而子的使用方法來說，例如：可 在杈查形成於内部的電政/ 7书路或糸統時使用。 该弟1電路元件13幻4丄 箄车墓蝴-从 匕括有電晶體、二極體、1C晶片 寻+導體兀件、晶片電衮 芒戸 °°、曰日片電阻等被動元件。此外， 右厚度增厚，則亦可安妒 沾少 、Ρ、BGA等面朝下（facedown) 的+導體元件。再者，也、 阻⑽ennistor)等。f 用感應器（―叫或熱敏電 安Ί。Λ 笔路元件1 3係固接於第1導電圖 术~ ，且由封合樹脂1 雷政_从，1 Λ〆 b破覆。以面朝下方式安裝的第1 兒路兀件13A係籍著今戶Package ^ a, F ^, has developed the so-called CSP (Chip Size g Japanese-Japanese-chip-size package), the chip-level CSP of rt B u, or the size f ′ is the same as the chip size. Slightly generous; Jingyue's cSP (for example: reference shoulder plate: and 5-foot figure: = using broken glass epoxy tree grain 101 as the support base, slightly larger than the wafer's CSP1 on ^ lL epoxy resin substrate m Carved 0. Here, an example of crystal wafers on a glass bag is explained. On the surface of the broken glass epoxy substrate_, the second electrode_: a surface is formed with a first electrode, a first back surface, and a pole 1ΓΚΛ SΛ 片 #塾] 03 ', and a perforation TΗ φ and a second back electrode 105B are formed on the back surface. Moreover, through the second continuity: the above mentioned electricity] and the first back electrode secret electricity = connected to the 2nd electrode_ and the above mentioned first 2 the back electrode] ㈣ ㉟ ㉟ ㉟ 纟 纟 纟 纟 曰 曰 塾 塾 塾 塾 塾 塾] 〇3 is fixed to the above bare (㈣ All strict. The emitter of the solar limb and the first electrode 1 02 Α is a thin line 〇〇4 connection, the base of the transistor and the second electrode is said to be connected by 314944 200410604: is a thin line 104. Furthermore, 1 covers the transistor wafer τ, and a resin layer i is provided on the epoxy resin substrate 101. 6. Although the above-mentioned CSP 1 00 series uses glass ring gas and crystal maggots, the substrate is 101, but the chip-level CSP is different. The structure extending from the crystal moon t Φ sheet D to the external connection poles 105A and 105B is simple and attractive. Ping I is a low-cost product made by you | Consider Figure 6, CSP1 〇〇 等 亓 | ~ PS ^ ^, The pieces are made of women's clothing on the base PS to form a module. The mounting substrate ps is too ganshi. Yu, JL b JP, and the surface and back of the official equipment are also equipped with built-in semiconductors and cattle. The circuit device υ, chip resistance CR, and chip capacitor CC of the vulgar component. And -1 An Mengqi b and 'wrong cause formed on the surface of the 1 substrate PS and a conductive circuit, far from the girl —, 7 σ The hair element forms an electrical f connection. With this structure, it is possible to form a module installed in a public palace 6 such as a portable, OA (Office to Office 'Office 〇utomati〇n) and other machines. [Summary of the Invention] ,,,,,, Japanese Patent Laid-Open No. 20001-339 1 51 (p.}, ^ 1 / pound figure to be solved) However, as in the structure of the conventional example, the overall size will change when it is assembled. Large. Therefore, it is difficult to have a functional die mouth. It is difficult for the internal electronic device to achieve miniaturization and light weight. When the known structure is used to form the above-mentioned module, a total of eight grams are produced, and the problem m is used. The four-foot ruler is cut into tens of centimeters. There are circuit elements, so it is difficult to connect the substrates of the motherboard and the like. 314944 U0U4 The present invention is in view of the above. It is to provide a kind of circuit element or connection of the present invention. 2 and placed on the conductive pattern exposed on the back. The method for forming a small circuit assembly with a board group function to determine the rhyme of the present invention is characterized in that the circuit device of the present invention is provided with a first layer of a W-shaped circuit element fixed to the above-mentioned conductive pattern and the above-mentioned conductive pattern to support: 敕: 'and The conductive pattern exposed on the first electrical surface is connected to a connector resin, and is patterned; and fixed to the above-mentioned feature is provided with a first φ first circuit element with at least -layer conductivity and a ring pattern and the above-mentioned conductivity The circuit component of FIG. 1 and the second circuit element are covered with the above-mentioned sealing resin and fixed to the entire support. The above-mentioned conductive pattern exposed on the back of the electric & and the circuit of the present invention includes: at least two layers of conductive patterns are provided with a package 'the package body package and the above conductive pattern seal :: 2: the general circuit component of the above] conductive Pattern, and is formed from the bottom resin on the back side and the bottom electrode, and the second circuit element mounting electrode for the second electrode system and the exposed surface of the bonding resin. Taiyi is made of tun poles, and is divided into spear-circuit elements, and has a through hole provided by the uppermost layer with a connector and a second electrical wiring to form a desired lower layer. [Embodiment] Jiuer road. 3 Figure 944 200410604 Figure 1 of the Moda Tea Examination, which illustrates the top view of the circuit design 10 of the present invention. Number! The invention circuit device 10 is provided with at least one dance and two dances) and is a sectional view thereof. The conductive pattern 12A is fixedly connected to the conductive pattern 12A, such as the conductive pattern 12A, the circuit element 13, the element 13 and the conductive pattern. Afternoon and the compound 1% is formed into the sealing resin 16 of the conductive support I exposed on the back. , ^ This construct. A connector is connected to the pattern 12D. In the following, Xiang = Welding = ^ Picture called ’When selecting the material of the conductive pattern 12, you can consider _u) :: nature, overlap property, electro-minerality. As far as materials are concerned, the "conductable guide", ⑽ is the guide of the main material, or is composed of alloys such as iron-nickel (Fe_Ni) h μ consisting of the eighth, second conductive patterns 12C, and the fourth conductive pattern 12D. The 4 * W pattern electrical pattern 12 is through the connection machine; 2 ::, line structure. Each conductor is connected. And, each case ^ == hole) to form the electrical description of the above-mentioned multi-layer conductive 5A 1? Tree month layer 21 laminated The specific structure of the evening layer pattern 12. The first conductive pattern 12C and the third conductive pattern 12C are laminated by the thickness pattern layer h. Furthermore, the ^ = Yueyi Γ film penetrating the resin layer 21 forms an electrical connection second [Conductive pattern]-Connection mechanism 20 with 3 = Case 12C. ―Electrical diagram = Post 'with resin layer 2】 Cover the 2nd conductive pattern] Power on: Set up :. By covering the 2nd conductive pattern] — Beiya holes and the formation of electric mineral copper can form the first conductive pattern] ... In addition, 'the straw is provided on the resin layer covering the 3rd conductive case] 2C 314944 200410604 through-holes and forming electroplated copper can form the fourth The conductive pattern ㈣ is used as the terminal 18 and :: 120. Then, the remaining parts are covered with a resin film 7. Hereby refer to Figure 1 (A), the terminal! The 8th plus minus i * r 'is exposed by the resin film η of the rear circuit dream fan. The 4th _ plus :: moon surface is arranged on the circuit device! The terminal 18A on the side is electrically connected to: the i-th connector 15A of the connection portion. The terminal arranged on the side is just connected to the opposite terminal 18C on the second connection to the outside. , Zheng Zhengzhi, and there are many ways to use this terminal, for example, you can write data to the built-in half-flyer, and use ^ '月 立 ^ ^ In addition' when reading Terminal 1 8E is installed outside of the Ministry of Political Affairs. In terms of the use of Xi, .., ^, for example, it can be used when checking the internal electricity / 7-line circuit or system. This brother 1 circuit element 13 magic 4 丄 箄 car tomb butterfly-from the dagger includes the transistor, diode, 1C chip search + conductor element, chip electrical 衮 ° °, Japanese chip resistance and other passive components. In addition, if the thickness of the right side is increased, face-down + conductor elements such as P, BGA, etc. can also be installed. Furthermore, it can also prevent ennistor. F Inductor (―Called or thermally sensitive. Λ The pen circuit element 1 3 is fixed to the first conductive pattern ~, and it is covered by the sealing resin 1 雷 政 _ 从, 1 Λ 破 b is covered. Face to face The first child road piece 13A installed in the following way is from this household

# 拉 ''蜀 '、、田線14與其他第i導電圖案12A 兒性連接。又，第丨 杂六。。〜, 毛略凡件]3B可採用晶片電阻或晶片 兒谷斋等晶片零件。伟& 杜. 用為第〗電路元件13B的晶片零 件5為了要抑制封合樹 , 6的厚度，可採用小型的結構。 例如：可採用厚度薄於 至屬細線1 9頂部的結構。此外，藉 314944 由採用厚度薄於封人樹p h 13，得以令、壯口 的元件作為第1電路元件 第2衣置10整体的厚度變薄。 $ 2 %路元件 面’並可採用與上述第電:於第4導電圖案120的露出 於第2電路元杜，/、 兀件1 3相同種類的元件。由 較大型的元件。且心被封合樹脂16被覆’故可採用比 樹脂封合的封裝體：為。第Γ=電容較大的…容器、 厚的元件安裝於電路 ；^件14。因此’糟由將較 14，可令封人桝& , < Χ 的背面以作為第2電路元件 7玎。树脂1 ό的厚戶巷 丁 封合樹脂16係被覆著；路元广匕2電路元件14。 電圖案12。就封合樹脂 兀U、金屬細線19及導 塑性樹脂。又，本發明…採用熱固性樹脂或熱 承整體。亦即，為了 包、置1〇係利用封合樹脂16支 各導電圖案的…置的缚型化及圖案的微細化， 曰]乂子度係形成5〇 5 度’理想的狀態是形成10至以70…下之較薄的厚 圖案12乃藉由封合樹 # m之厚度。並且’導電 著封合樹脂16支承且^的剛性支承整體。因此，從藉 面，露出多個由導電 :功此的電路裝置10背 兀件14及連接器15 ，而第2電路 固疋在端子1 8上。a 土 5樹脂16構成的電路裝置1〇下面係為平i0 ，因為由封 易地利用黏接劑固接於 ”'、~~面，故得以容 第1連接器15ACM體内壁。 加女裝於電路裝置1 〇北 附近，具有與外部進行泰 θ面的側邊部# 拉 '' 舒 '、, 田 线 14 and other i-th conductive patterns 12A are child-connected. Again, the sixth miscellaneous. . ~, Mao slightly ordinary parts] 3B can use chip resistors or chip parts such as chips. Wei & Du. The chip component 5 used as the circuit element 13B may have a small structure in order to suppress the thickness of the seal tree 6. For example, a structure thinner than the top of the thin line 19 can be used. In addition, by using 314944, which is thinner than the seal tree p h 13, it is possible to reduce the thickness of the robust component as the first circuit component and the overall thickness of the second garment unit 10. The $ 2% circuit element surface 'can use the same kind of element as the above-mentioned first electric: exposed on the second circuit element of the fourth conductive pattern 120, and the element 13. By larger components. Further, since the core sealing resin 16 is coated ', a package sealed with a resin can be used: Yes. No. Γ = large capacitance ... container, thick components are mounted on the circuit; Therefore, it is worse than 14, and the back of the seal 桝 & < X can be used as the second circuit element 7 玎. Resin 1 of Houhu Lane D. Sealing resin 16 is covered; Lu Yuanguang 2 Circuit element 14. Electric pattern 12. For example, the resin U, the metal thin wires 19, and the plastic resin are sealed. Further, the present invention ... uses a thermosetting resin or a heat sink as a whole. That is, in order to wrap and place 10 series of sealing patterns and finer patterns using 16 sealing resins of each of the conductive patterns, it is said that the degree system is formed at 505 degrees. The ideal state is to form 10 The thinner thick pattern 12 up to 70 ... is by sealing the thickness of the tree #m. Furthermore, the conductive resin is rigidly supported by the sealing resin 16 as a whole. Therefore, from the borrowed surface, a plurality of conductive members 14 and connectors 15 are exposed, and the second circuit is fixed to the terminal 18. a The circuit device 10 made of soil 5 resin 16 is flat i0. Because it is easily fixed to the "", ~~ face by an adhesive, it can accommodate the inner wall of the first connector 15ACM. In the vicinity of the circuit device 10 North, there is a side portion that carries a Thai θ plane with the outside

導出的導線係固接於坤 連接的功此。自弟1連接器]5AThe exported wire is fixed to the function of the Kun connection. Self-brother 1 connector] 5A

、…δΑ，藉以進行第1連接器15A 314944 10 200410604 ^而子1 8A的電性連接。此外，ά冑1連接器15A的兩端 導出固接用的導線，藉由令該導線固接於端子丨，可入 弟1連接為1 5 A固接於電路元件1 〇的背面。 立苐2連接器15B係固接於第1連接器15A對面的側邊 4附近’亚經由導線而與多個端子} 8B形成電性連接。苴 餘部位的構造則與上述第丨連接器15A相同。 ，、 此外，上述第1連接器15A及第2連接器15B亦可 妾方、电路裝置1 〇之側邊部以外的部位，再 ^ m 1 n ^」仕罨路 、 月面安裝數量為兩個之外的連接器i 5。再者， 安裝兩個遠接哭 1ςΔ 在 -5Α、15Β的情況下，亦可將連接器15安 #於相對邊之外的邊。 女 在此，說明第1連接器丨5 Α及第2 使用例。夢由蔣楚】* 逆接的15B的具體 9 、 連接器15A與其他控制部電性連接， 、 、接器15B與CD-RW等控制部連接， 制部輸入的電性乐 依據自其他控 之寫入^ f彳5喊’透過第2連接器⑽進行cd_rw 二：項取的指示。再者，自⑶挪等媒體讀取的传 唬可經由第1w j /〇 罘1連接益1 5 A傳至外部。 9圖（=^2圖’說明關於連接器W的安裝結構。第 一（）知笔路裝置10的俯視圖，第2ΕηΒ0ώ~ 的箭號方向㈣^t α $ 2圖(B)係由《2圖⑷ ^门喊祭電路裝置1〇的側面圖。 出導第2圖⑻’在第1連接器15“端的下部導 連：=並將導線繼接於端子⑽，藉以令第】 5A固接於電路裝置】。的背面。因此，端子⑽, ... δΑ, for the first connector 15A 314944 10 200410604 ^ and the electrical connection of the child 1 8A. In addition, both ends of the connector 15A are led out for fixing, and the lead can be fixed to the terminal 丨, so that the 1 can be connected to 15 A and fixed to the back of the circuit element 10. The riser 2 connector 15B is fixedly connected to the plurality of terminals} 8B via wires in the vicinity of the side 4 near the first connector 15A, and is electrically connected.余 The rest of the structure is the same as the above-mentioned connector 15A. In addition, the above-mentioned first connector 15A and second connector 15B can also be square and other parts of the side of the circuit device 10, and ^ m 1 n ^ "Shifang Road, the number of moon installations is two Of the connector i 5. In addition, if two remote connections are installed, in the case of -5A and 15B, the connector 15 can be installed on the side other than the opposite side. Female Here, the first connector 5A and the second use example will be described. Dream by Jiang Chu] * The specifics of the reversed 15B 9, the connector 15A is electrically connected to other control sections, and the connector 15B is connected to control sections such as CD-RW. The electrical music input by the production department is based on other controls Write ^ f 彳 5 and shout 'Cd_rw through the 2nd connector 二 2: Instruction to take. In addition, bluffs read from media such as CDN can be transmitted to the outside via the 1w j / 〇 罘 1 connection Yi 15 A. Figure 9 (= ^ 2 Figure 'illustrates the mounting structure of the connector W. The first () top view of the pen-way device 10, the arrow direction of the second ΕηΒ0ώ ~ ㈣t α $ 2 Figure (B) is composed of "2 Figure ⑷ ^ Side view of the door shouting circuit device 10. Figure 2 shows the bottom of the first connector 15 'end of the first connector: = and the wire is connected to terminal ⑽, so that] 5A fixed connection For the circuit device]. Therefore, terminal ⑽

IJ 314944 200410604 t述第4導電圖fl2D構成’而形成沒有通過電好 號的虛擬（dummy)導電圖案。排列在電: :出的各端子，則透過第1連接…面具有:： ::::銲劑等焊接材’而形成電性連接。並且，= 且有連接器内部環繞而與端子i8F導通。端子哪 ::乍為策路裝置10外部之輸出輸入端子的功能。第2 連接為15的構造係與上述第i連接器相同。 芩考第3圖’說明第i導電圖案12八的 (A)係電路裝置1〇的 系J圖 △ 1 aa j視圖弟3圖（B)係第3圖（a)之a A線的俯視圖，表示電 ）之- 12A。 -路衣置10具備的第i導電圖案 /考弟3圖(B)’苐1導電圖案12A形成有安，第 電路元件13的鮮墊與配線部。該圖之中央部以有 的區域係表示半導體元件所屬之第、 7所匕圍 在形成於島上的第i p I路兀件13A，其係 又，W勺円+ ¥电圖案上以面朝上之方式固接。 k圍笔路元件ΠΑ之方式，利用第丨 设有搭接料。並且，°木 線部，連接第！電路元件13彼此；:第二所^ 連接機構20。 弟1毛路兀件13與 在沒有形成微細配線部的部位， + 1 2 A形成寬幅的圖宰 ¥电圖术 體而言，形成j二用以作為流通較大電流的配線。具 /力乂見1¾的乐]導雷安 地電位或電源的圖案。 。木 ϋ用以作為連接接 Ί ^ Α 卞 者’在形成寬幅的第1墓命同安 12Α上設置矩陣狀的開口部” W …W囫案 d ,且伙泫開口部23露出樹 314944 ]2 200410604 脂層21。一般而言，樹脂間的黏接力係大於作為導電圖案 1 2材料之金屬與樹脂的黏接力。因此，藉由令樹脂層u 從開口部23露出，得以令樹脂層21與被覆該樹脂層η 的其他樹脂材料（例如··封合樹脂丨6或導電被膜丨乃黏接， 因此得以提昇電路裝置1 〇的可靠性。再者，利用此方式， 在寬幅的導電圖案12A上設置開σ部23，得以使導電圖案 12Α的侧面露出，並使封合樹脂16等樹脂與導電圖案u 的側面接觸。因此，可提升導電圖案12Α與封合樹脂16 的黏接強度。 又見巾田的圖案及形成與其上的開口冑Μ，亦 於第2導電圖案12Β及第3導電圖案12C。因此由又 第2導電圖案及第3導電圖案上設置開口部2 ;= 層21與導電圖t 12的黏接強度提升。 使树月曰 接者’說明關於在各層導電圖案12上設置開 的其他優點。藉由在各層 開口部，可調整導：:安圖案2上以適當的比例設置 、兒圖木12的殘留率。具體而言， 第1導電圖案12A盍笛/措由將 A ”弟4導電圖案12D調整為相 殘留率，得以使被環h、七二+ J私度的 復上逑兩者的樹脂皮膜丨7厚度一 外，藉由將第2導φ 致此 。洛 圖案12Β與第3導電圖案uc調敕 邊率，仔以使被覆上述兩者的樹脂層IJ 314944 200410604 describes the fourth conductive pattern fl2D structure 'to form a dummy conductive pattern that does not pass an electrical sign. Each of the terminals arranged in the electric :: is electrically connected through the first connection ... surface having a soldering material such as :::: flux. In addition, = and the connector is surrounded by the inside of the connector and is electrically connected to the terminal i8F. Terminals :: This is the function of the input / output terminals external to the routing device 10. The structure of the second connection of 15 is the same as that of the i-th connector. Examination of Fig. 3 'Illustration of the (A) series circuit device 10 of the i-th conductive pattern 12 and 8 J △ 1 aa j view 3 (B) is a plan view of line a A of FIG. 3 (a) , Means electricity)-12A. -The i-th conductive pattern / copier 3 (B) '考 1 conductive pattern 12A provided in the road suit 10 is formed with a pad and a wiring portion of the second circuit element 13. The central part of the figure shows the area where the semiconductor device belongs, and the 7th dagger is surrounded by the ip I road element 13A formed on the island. Way fixed. The method of k surrounding the pen circuit element ΠΑ utilizes an overlap material. And ° wood line part, connect the first! The circuit elements 13 are connected to each other: a second connection mechanism 20. Brother 1 The furrow member 13 and the area where the fine wiring part is not formed, + 1 2 A forms a wide map. ¥ Electrocardiography For the body, j 2 is used as a wiring that flows a large current. With the force / see the music of 1¾] to guide the ground potential or power pattern. . The wooden cymbals are used as connection joints ^ Α 卞 卞 'to set up a matrix-like openings on the first tomb of Tongming 12A which formed a wide width "W… W 囫 case d, and the openings 23 of the gangs exposed the tree 314944] 2 200410604 Fat layer 21. In general, the adhesion force between resins is greater than the adhesion force between metal as a material for conductive pattern 12 and resin. Therefore, by exposing resin layer u from opening 23, resin layer 21 and Other resin materials covering the resin layer η (for example, sealing resin 6 or conductive film 丨 are adhered, so the reliability of the circuit device 10 can be improved. Furthermore, in this way, a wide conductive pattern The opening σ portion 23 is provided on 12A, so that the side of the conductive pattern 12A is exposed, and the resin such as the sealing resin 16 is in contact with the side of the conductive pattern u. Therefore, the adhesion strength between the conductive pattern 12A and the sealing resin 16 can be improved. See also the pattern of the towel field and the opening formed thereon, and also on the second conductive pattern 12B and the third conductive pattern 12C. Therefore, the opening 2 is provided on the second conductive pattern and the third conductive pattern; = layer 21 Adhesive strength with conductive pattern t 12 Ascension. Make the tree and the moon say "the other advantages about the opening of the conductive pattern 12 in each layer. By opening in each layer, you can adjust the guide: Ann pattern 2 at an appropriate ratio. Residual rate. Specifically, the first conductive pattern 12A can be adjusted to the phase residual rate by adjusting the conductive pattern 12D of the first conductive pattern 12D, so that the ring h, the seventy two + J degree can be restored. The thickness of the resin film is the same as the thickness of the 7th. The second lead φ is caused by this. The Luo pattern 12B and the third conductive pattern uc adjust the edge ratio so that the resin layer covering the above two is covered.

一致。 ’十I 又’系2導電圖案12Β及第3導電圖案12c 接機構2 〇形成電性連接 曰 ^ 逆接而主要乃形成配線部。 茲參考第4 @ 圖，以說明第4導電圖案]2D的構造。第 314944 200410604 4圖（A)係電路裝置1 〇的剖禎圄 m見圖，乐4圖⑺）係第4圖（Α) 之A-A，線的俯視圖。 再參考第4圖（B)，第 ^。¥包圖案12D係形成有安裝 弟2電路元件丨4及連接界 山 安口口 15的令而子18與配線部。又，各Consistent. "Ten I and" are the two conductive patterns 12B and the third conductive pattern 12c. The connection mechanism 2 forms an electrical connection. ^ Reverse connection mainly forms a wiring portion. Reference is made to Figure 4 @ to illustrate the structure of the fourth conductive pattern] 2D. Fig. 314944 200410604 Fig. 4 (A) is a cross-sectional view of the circuit device 10 (see Fig. Le 4), which is a plan view of line A-A of Fig. 4 (A). Refer again to Figure 4 (B), ^. The package pattern 12D is formed with a mounting element 2 circuit element 4 and a connection boundary mountain Ankou 15 and an order 18 and a wiring portion. And each

令而子1 8係藉著第4導電圖幸丨2D t 兒㈡木1213所構成的配線部或連接 機構，而與電路裝置1 〇内部 ·Lingerzi 18 is connected to the circuit device 1 internally through the wiring part or connection mechanism composed of 2D t ㈡ 子 木 1213.

n^ 卩所構成的電路連接。端子18A 及鳊子18B係排列於電路裝置 赢.. 側邊，且在背面從 树脂皮膜η露出。此外，如嗲 ^ 1〇 如該圖所不，當端子18Λ或端 子1 8Β具有多數個時，也可 ^ ^ ^ 了排成兩仃以上。端子18C係排 列在電路裝置1 0的一側邊，名士 廿 J政在此，其係用以將資料窵入内 部的半導體元件。此外，端子 内 „ . . . , . ^ L 8E仏形成於電路裝置1〇 月面之側邊部以外的部位。哆 °玄^子18E乃用以確認形成於 内部之電路的動作或特性箄 取、 又竹Γ生寺。又，上述端子i 8亦可 側邊部以外的部位，而且亦 ϋ 夂 了不排列地設置。 以下，综合敘述本發明的特徵。 η—般來說’半導體封裝體係安裝於印刷基板等安μ 板上，故不會在封裝的外部安裝任何元件。例如 = =的背面形成外部連接用電極，例如： 、 (:GA:，在背面形成電極的部位沒有安裝電路元件二 為。此乃因為上述元件俜茲芏作叫卜 又逆接 板之故。 件“者峨安裝材料而安裝於基 另一方面’本裝置並非固接於安裝基板的裝置 身係可用以作為安裝A柘沾*⑽ 具本 衣&扳的+導體封裝體。 係按所採用之導電圖宰的尽私^ …、本封裝體 力層數而形成不同的厚度，但是鼓 314944 14 200410604 沁成1 ^:未以下的薄型板 * 部遠接帝 且右在位於背面的外 BGA。然而，… 干接材，則亦可形成薄型的 … 弟圖（B)所示，以背面作為表面，而 其作為安裝面使用，將第2 …，且將 村乐z兒路兀件i 4或 於該安裝面上而形成模組。 戈連接⑼連接 的」本發明乃利用以下列舉的元件而構成所期- 的電路或系統。 冉取尸/1期望 (1)經模塑的第i電路 JLy # A 取上層導電圖案12A及由 /、形成的電極、載接〇and)部、搭接銲墊等。 (:由最：層第4導電圖案⑽構成的外部連接電極、配 β 、及安裝於其上的第2電路元件14。 _ (3) 設置於最下層及最上層導電圖案間的至少一層配線。 (4) 形成於各導電圖案12間的貫穿孔。 曰、'7 (5) 设置於最下層之外部連接電極的連接器^ 5。n ^ 卩 circuit connection. The terminals 18A and 18B are arranged on the circuit device. The side is exposed from the resin film η on the back side. In addition, as 嗲 ^ 10, as shown in the figure, when the terminal 18Λ or the terminal 18B has a plurality, it can also be arranged in two or more lines ^ ^ ^. The terminal 18C is arranged on one side of the circuit device 10, and here is a famous person, who is a semiconductor device for inserting data into the inside. In addition, „..,. ^ L 8E inside the terminal is formed at a part other than the side of the 10-side surface of the circuit device. 哆 ° 玄 ^ 子 18E is used to confirm the operation or characteristics of the circuit formed inside. The terminal i 8 can also be placed in positions other than the side portions and arranged in a non-aligned manner. Hereinafter, the characteristics of the present invention will be described in a comprehensive manner. Η—Generally, a semiconductor package The system is mounted on a printed circuit board such as a printed circuit board, so no components are mounted on the outside of the package. For example, an external connection electrode is formed on the back surface of = =, for example:, (: GA :, no circuit is installed on the back surface where the electrode is formed The second component is. This is because the above-mentioned components are called “bu” and “reverse connection plate”. “The installation material is installed on the base. On the other hand, this device is not fixed to the mounting substrate. The device body can be used as A + conductor + conductor package with a jacket & is installed. It is formed with different thicknesses according to the conductive pattern used…, the thickness of the package ’s physical layer, but the drum 314944 14 200410604 Qincheng 1 ^: not following The thin plate * is connected to the outer part BGA on the far side and the right side is on the back side. However, ... the dry-welding material can also form a thin ... As shown in the figure (B), the back side is used as the surface and it is used as the mounting surface. The second…, and the village music z Erlu Wu i 4 or module on the mounting surface to form a module. 戈 连接 ⑼CONNECTED "The present invention is to use the components listed below to form the desired circuit or system (1) Take the corpse / 1 Expectation (1) The molded i-th circuit JLy # A takes the upper conductive pattern 12A and the electrode formed by /, the carrier, and the bonding pad. (: The external connection electrode composed of the fourth conductive pattern ⑽ on the uppermost layer, the distribution β, and the second circuit element 14 mounted thereon. _ (3) At least one layer of wiring provided between the lowermost and uppermost conductive patterns (4) A through hole formed between each of the conductive patterns 12. That is, '7 (5) A connector provided at the outermost electrode of the lowermost layer ^ 5.

因厚度較薄，且盔導後牟栋盆巫二：I …、V、、呆木便具+面面積變小，而可 =超小型的封裝體，故可使攜帶用機器、〇Α機器達成小 坦化、輕量化。又，連接器係為這些機器的安裝機構。雖 然-般如5cmx 5⑽、10cmx 4cm、厚度為〇 5冑米的薄型 封裝體，按一般的想法應會產生翹起的問題，但是因為不 是以形成於背面的銲劑等.安裝，A是以連接器或薄板保持 機構等來安裝，所以可在翹起的狀態下安裝。因此，亦可 防止銲劑等之龜裂。 繼之，說明關於開口部23形成島狀的第}導電圖案 ]2A。以下稱為網目（mesh)圖案。如第3圖（a)所示，該網 314944 200410604 目圖案原本的用意，係為τ I系 丁為了要使乐1導電圖t 12A至第4 導電圖案12D及將此等形，一妒 小成版的封合樹脂丨6形 上全面均勾而設置的虛擬圖案。電極本身雖可形成島狀、， 然而由於施加於其上的電壓係為 會產生電容。此外，要將这此^動狀恶’故該虛擬圖案 將仏些毛極固定在不浮動的狀態， ’、鬲具有接觸孔。形成該網目圖案且μ 的下層及上層時，這此1成相^°又在°層或設於重疊 ▲ ^ 二。又成相同電位的接觸孔只要至少一 •個部位即足夠。而且，藉著開口部 ^ 黏接，；?曰L7趄4私壯邮 層Μ下層的樹月旨 :接⑻4升封1體的密接性。又，如第3^_卜 亦具有圖案較大且流通更大電流的電極功* 各層的網目®案係固定於例 "者，由於 接地（gr0Und)電位，所以也 不s產生可生電容。此外，藉由抑制誃 立 亦可具有遮蔽（shield)效應。 °〆幵口 ^ 23的尺寸， [發明的效果] 本發明可具有以下所示之效果。 在具有安裝於導電圖案12之 # W 1 π ^ ^ ^ , 兒路元件13的電路 置10月面，女裝用以作為與外部連接之連接 器]5,因此，不必增加電路裝置1〇敕~ 、接而子的連接 可容易地藉著連接器15 的平面尺寸，即 Γ °P形成電性連接。 再者，在内設半導體元件 形成多層之導電圖案12的電路元弟二=件-且具有 路元件14,因此，可提供小^ 月 *裳弟2電 裝置。具體而言，本發 置、：雜電路結構的電路 成約3⑽X3cm。 衣置1〇的平面尺寸係得以形 3J4944 16 200410604 +又，藉由將導電圖案12形成多層，可在裝置内部形成 4的電路’故可構成具有一個系統模組的電路裝置 例如：可構成具有控制CD-WR等硬體功能的電路裝 置1 0。 於兒路裝置1 0係藉由封合樹脂1 6支承整體 乂曰而士白知例之安裝基板的支承基板，故電路裝置1 0 得以形成薄型。 【圖式簡單說明】 Z 1圖（A)係說明本發明電路裝置之俯視圖。 :1圖（B)係說明本發明電路裝置之剖視圖。 $ 2圖⑷係說明本發明電路裝置之俯視圖。 第2圖（B)係說明本發帝 μ 4七月包路裝置之剖視圖。 Γ圖（Α)係說明本發明電路裝置之剖視圖。 =圖剛說明本發明電路裝置之俯視圖。 弟4圖（Α)係說明本發 斤/ η 月兒路裝置之剖視圖。 弟4圖（Β)係說明本發 # c门/ 乃兒路裝置之俯視圖。 弟5圖係說明習知電 — i略衣置的剖視圖。 第6圖係說明習知電 展置的剖視圖。 10 電路裝置 13A、13B第1電路元件 15A、15B連接器 17 樹脂皮膜 1 9、] 〇 4 金屬細線 12八至12D導電圖案 14 第2電路元件 1 6 封合樹脂 18A至18E端子 2〇 ^ 連接機構 314944 17 200410604 21 、 106 樹脂層 22Α 、 22Β 導線 23 開口部 100 CSP(晶片尺寸封裝體） 101 玻璃環氧樹脂基板 102Α 第1電極 102B 第2電極 103 晶片銲墊 105A 第1背面電極 105Β 第2背面電極 110 電路裝置 PS 安裝基板 CR 晶片電阻 Τ 電晶體晶片 ΤΗ 貫穿孔Because the thickness is thin and the helmet guides Mu Dongpen Wu II: I…, V, and dumb ware + surface area becomes smaller, and can be an ultra-small package, so it can be used for portable machines and 〇Α machines Achieve small candid and lightweight. The connector is a mounting mechanism for these devices. Although a thin package such as 5cmx 5mm, 10cmx 4cm, and a thickness of 0.05m should generally raise the problem, but it is not a solder formed on the back surface, etc. Installation, A is to connect It can be mounted in a tilted state because it is mounted with a holder or a thin plate holding mechanism. Therefore, it is also possible to prevent cracking of the flux and the like. Next, a description will be given of the} th conductive pattern] 2A in which the opening 23 is formed in an island shape. This is hereinafter referred to as a mesh pattern. As shown in Figure 3 (a), the original intention of the net 314944 200410604 mesh pattern was τ I. In order to make Le 1 conductive pattern t 12A to 4D conductive pattern 12D and this shape, it is jealous. The finished sealing resin is a virtual pattern that is uniformly arranged on all 6 shapes. Although the electrodes themselves can be island-shaped, capacitance is generated due to the voltage applied to the electrodes. In addition, it is necessary to fix these hairy poles in a non-floating state in order to keep the movement pattern evil, and the holes have contact holes. When the mesh pattern is formed and the lower and upper layers of μ are formed, these phases form ^ ° and are in the ° layer or are set to overlap ▲ ^ 2. It is sufficient that at least one part of the contact hole has the same potential again. In addition, through the opening ^ adhesion, said the L7 趄 4 private mail layer M below the tree moon purpose: to connect the 4 liter seal 1 body tightness. In addition, for example, the third electrode also has a larger pattern and a larger current flowing through the electrode. * The mesh mesh of each layer is fixed to the example. Since the ground (gr0Und) potential is used, no generateable capacitance is generated. . In addition, it can also have a shield effect by suppressing standing. The size of the mouth ^ 23, [Effect of the invention] The present invention can have the effects shown below. The circuit with # W 1 π ^ ^ ^ installed on the conductive pattern 12 and the child circuit element 13 is placed on the October surface, and the women's clothing is used as a connector for external connection] 5. Therefore, it is not necessary to add a circuit device 1〇 敕The connection of ~ and the next can be easily formed by the planar size of the connector 15, that is, Γ ° P. In addition, the second element of the circuit that forms a multilayered conductive pattern 12 with a built-in semiconductor element and has a circuit element 14 can therefore provide a small * shangdi 2 electric device. Specifically, the circuit of the present invention: a circuit with a heterogeneous circuit structure is approximately 3⑽X3cm. The plane size of the clothes set 10 can be shaped 3J4944 16 200410604 + Furthermore, by forming the conductive pattern 12 into multiple layers, 4 circuits can be formed inside the device. Therefore, a circuit device having a system module can be formed. For example, a circuit device having a system module can be formed. Circuit device 10 for controlling hardware functions such as CD-WR. The Yuer device 10 is a support substrate that supports the whole by a sealing resin 16. The mounting substrate is a known mounting substrate, so the circuit device 10 can be made thin. [Brief description of the drawings] Z 1 (A) is a top view illustrating the circuit device of the present invention. : 1 (B) is a sectional view illustrating a circuit device of the present invention. Figure 2 is a top view illustrating the circuit device of the present invention. Fig. 2 (B) is a cross-sectional view illustrating the July 4th road device of the present invention. Γ diagram (A) is a cross-sectional view illustrating a circuit device of the present invention. The figure just illustrates a top view of the circuit device of the present invention. Figure 4 (A) is a cross-sectional view illustrating the device of the present invention. Figure 4 (B) is a top view illustrating the device #c 门 / 内尔 路 装置. Figure 5 is a cross-sectional view illustrating the conventional electric — i slightly set. Fig. 6 is a cross-sectional view illustrating a conventional electrical installation. 10 Circuit device 13A, 13B 1st circuit element 15A, 15B connector 17 Resin coating 1 9]] 〇4 Metal thin wire 12 8 to 12D conductive pattern 14 2nd circuit element 1 6 Sealing resin 18A to 18E terminal 2 2 Connection Mechanism 314944 17 200410604 21, 106 Resin layers 22A, 22B Lead 23 Opening 100 CSP (Chip size package) 101 Glass epoxy substrate 102A First electrode 102B Second electrode 103 Wafer pad 105A First back electrode 105B Second 2 Back electrode 110 Circuit device PS Mounting substrate CR Chip resistor T Transistor wafer T through hole

18 31494418 314944

Claims (1)

200410604 拾、申請專利範圍： 1. 一種電路裝置，其具備： 至少一層導電圖案；固接於上述導電圖案的第1電 路元件；及被覆上述第1電路元件及上述導電圖案以支 承整體的封合樹脂， 並且在背面露出的上述導電圖案上連接有連接 器。 2. 如申請專利範圍第1項之電路裝置，其中，上述連接器 係設置於上述電路裝置的周邊部。 3·如申請專利範圍第1項之電路裝置，其中，上述連接器 係設置於對面的側邊。 4.如申請專利範圍第1項之電路裝置，其中，在上述導電 圖案的背面安裝第2電路元件。 5·如申請專利範圍第1項之電路裝置，其中，上述導電圖 案係形成多層，在最上層的上述導電圖案上安裝上述第 1電路元件，且在最下層的上述導電圖案上連接上述連 接器。 6. 如申請專利範圍第1項之電路裝置，其中，上述第1電 路元件係為電晶體、二極體、1C、晶片電容器、晶片電 阻、樹脂封合封裝體、感應器或熱敏電阻。 7. 如申請專利範圍第4項之電路裝置，其中，上述第2電 路元件係為電晶體、二極體、1C、晶片電容器、晶片電 阻、樹脂密封封裝體、感應器或熱敏電阻。 8. 如申請專利範圍第1項之電路裝置，其中，利用上述導 3]4944 ^410604 兒圖案構成固接上述第丨電路元件的 以構成電路或系、统。 墊及配線部，藉 種甩路裝置，其特徵為具備： 至少一層導電圖案；固接於上述導杂 路元件圖案的第1電 ，及被復上述第1電路元件及 承整體的封合樹脂， Μ電圖案以支 備固接於在上述電路背面露出 口木乐2電路元件。 于电 1〇·如申請專利範圍第9項之電路裝置，其中 + 路凡件係為利用金屬細線與上述導電圖安广弟1電 半導體元件及w零件，且上述;連接的 上述封合樹脂。 7件的厚度係薄於 11. 如申請專利範圍第9項之電路裝置，其中，汾 路元件及上述第2带故-处/ 处弟1電 晶片電容哭二 件係為電晶體、二極體、IC、 敏電阻。BB '阻、樹脂封合封褒體、感應器或熱 12. 如申請專利範圍第9項之電路裝置，其 裝置的周邊部，安裝與上处電路 哭，日名h、+、4 ^ ^圖案電性連接的連拉 °。在述連接器所包圍的區域配置上.f » 接 件。 匕3配置上述弟2電路元 】3.如申請專利範圍第9項之電路其中，上口 案係形成多層，在最上届沾l ^電圖 在取上層的上述導 電路元件，且在最下層的上述 ：:公第! 路元件。 口木女衣上逑弟2電 3 ^944 20 14:申請專利範圍第9項之 甩圖案構成固接上逑第1泰 、’其中’利用上述導 的銲墊及配線部， 路凡件及上述第2電路元件 猎W構成電 5·-種電路裝置，具備有 或乐統。 至少兩層導電圖案;愈二？封裝體包括·· 之第1電極電性連接的第、I二成為上述最上層導電圖案 元件及上述導電圖案封入2路元件；將上述第1電路 及形成為最下層之^泰—體的封合樹脂； 封合樹脂面露出的# ♦电圖案’且從位於背面之上述讀 乐2電極， 並且上述第2電極係 電路元件安裝用電極所構成連:八器安裝用的電極、" 2電路元件，且藉著由田 而刀別安裝有連接器與第 穿孔、配線而構成所二上層：伸至最下層而設置的貫 16·如申請專利範圍f 15工 电路或系統電路。 電路元件係為封裝的半項導？路裝置，其中，上述第2 阻或電解電容器。 、兀件、晶片電容器、晶片電 17·如申請專利範圍第工項 ί 電路裝置，其中，就至Ν 項或第15項中任一項之 有複數島狀開口部的道1層導電路而言，可設置形成 接—邊樹脂i另一、真 > 電圖案5且藉由上述開口部來固 1〇 ^ ^ ，、乃一邊樹脂。 • σ申請專利範圍帛17項之 述島狀開〇部的導、〜路破置，其中，形成有上 層，且兩者之m圖案係重疊地形成於上層或下 19.如申請專利範圍第二固定在相同電位。 員之電路裝置，其中，形成有上 314944 21 200410604 述島狀開口部的導電圖案係整個複數層形成空的區 域，且與固定該導電圖案的樹脂層一體形成實質上全面 均勻的膜厚。200410604 Patent application scope: 1. A circuit device comprising: at least one layer of conductive pattern; a first circuit element fixedly connected to the conductive pattern; and a seal that covers the first circuit element and the conductive pattern to support the whole Resin, and a connector is connected to the conductive pattern exposed on the back surface. 2. The circuit device according to item 1 of the patent application scope, wherein the connector is provided at a peripheral portion of the circuit device. 3. The circuit device according to item 1 of the patent application scope, wherein the above-mentioned connector is provided on the opposite side. 4. The circuit device according to item 1 of the patent application scope, wherein a second circuit element is mounted on the back surface of the conductive pattern. 5. The circuit device according to item 1 of the scope of patent application, wherein the conductive pattern is formed in multiple layers, the first circuit element is mounted on the conductive pattern in the uppermost layer, and the connector is connected to the conductive pattern in the lowermost layer . 6. The circuit device according to item 1 of the scope of patent application, wherein the first circuit element is a transistor, a diode, a 1C, a chip capacitor, a chip resistor, a resin-sealed package, an inductor, or a thermistor. 7. The circuit device according to item 4 of the scope of patent application, wherein the second circuit element is a transistor, a diode, a 1C, a chip capacitor, a chip resistor, a resin-sealed package, an inductor, or a thermistor. 8. For the circuit device of the first item of the scope of patent application, in which the above-mentioned circuit pattern is used to form a circuit or a system that is fixedly connected to the above-mentioned circuit element. The pad and the wiring part are provided with a road-stripping device, which is characterized by comprising: at least one layer of a conductive pattern; a first electric circuit fixedly connected to the above-mentioned miscellaneous circuit element pattern; and a sealing resin coated on the first circuit element and the entire body. The M electrical pattern is fixedly connected to the Mule 2 circuit element exposed on the back of the circuit for support. Yu Dao 10. If the circuit device of item 9 of the scope of the patent application, + Lu Fan components are the use of thin metal wires and the above-mentioned conductive pattern An Guangdi 1 electric semiconductor elements and w parts, and the above; the above sealing resin connected . The thickness of 7 pieces is thinner than 11. For the circuit device of item 9 in the scope of patent application, among them, the Fen Lu component and the second band mentioned above-Chu / Chu Di 1 electric chip capacitor cry two pieces are transistor, diode Body, IC, and thermistor. BB 'resistance, resin sealing, sealing body, sensor or heat 12. If the circuit device of the scope of patent application No. 9, the peripheral part of the device, the installation and upper circuit cry, the day name h, +, 4 ^ ^ The electrical connection of the pattern is pulled in degrees °. Arrange .f »connectors on the area surrounded by the connector. [3] Configure the above 2 circuit elements] 3. If the circuit of the 9th scope of the patent application is applied, the upper case is formed in multiple layers, and in the last session, the electric circuit element is taken from the above-mentioned conductive circuit element at the upper layer, and at the lowest layer. Of the above :: public first! Road components.口 木 女 衣 上 逑 弟 2 Electric 3 ^ 944 20 14: The pattern of the 9th patent application scope is composed of a fixed connection. The first Thai and 'wherein' uses the above-mentioned conductive pads and wiring, Lu Fan and The above-mentioned second circuit element W constitutes an electric 5 · -type circuit device, and is provided with or integrated. At least two layers of conductive patterns; more than two? The package includes: the first and second electrodes electrically connected to the first electrode to become the uppermost conductive pattern element and the conductive pattern enclosed in the two-way element; the first circuit and the lowermost layer of the Thai-body seal The resin is exposed on the surface of the sealing resin. The electric pattern is located on the back side of the above-mentioned reading Le 2 electrode, and the second electrode is a circuit element mounting electrode. The electrode is used for mounting eight devices. &Quot; 2 Circuit components, and the second upper layer is formed by the connector and the first perforation and wiring installed by Tian Erdao. It extends to the lowest layer and is provided in the 16th, such as the scope of patent application f 15 circuit or system circuit. Is the circuit component a semiconductor of the package? Circuit device, wherein the above-mentioned second resistance or electrolytic capacitor. 17. Components, chip capacitors, chip electronics 17. If the circuit scope of the patent application is Item ί, the circuit device is a one-layer conducting circuit with a plurality of island-shaped openings in any one of item N or item 15. In other words, it is possible to provide a resin that forms the edge-to-edge resin i, the true > electric pattern 5 and fixes it through the above-mentioned openings, and it is a one-sided resin. • σ application patent scope 帛 17 of the island-shaped opening section of the guide, ~ road is broken, of which, the upper layer is formed, and the m pattern of the two is formed on the upper layer or the lower layer in an overlapping manner. Two are fixed at the same potential. In the circuit device for a worker, the conductive pattern formed with the island-shaped openings described above 314944 21 200410604 forms an empty area over a plurality of layers, and integrally forms a substantially uniform film thickness with the resin layer fixing the conductive pattern. 314944314944
TW092122459A 2002-12-03 2003-08-15 Circuit device TW595274B (en)

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JP2006173489A (en) * 2004-12-17 2006-06-29 Tokai Rika Co Ltd Electronic component mounting structure
JP2008053319A (en) * 2006-08-22 2008-03-06 Nec Electronics Corp Semiconductor device
JP4958526B2 (en) * 2006-11-30 2012-06-20 三洋電機株式会社 Circuit device and circuit module
JP4948160B2 (en) * 2006-12-29 2012-06-06 三洋電機株式会社 Circuit module
JP4975655B2 (en) * 2007-02-01 2012-07-11 日本特殊陶業株式会社 Wiring board, semiconductor package
WO2011034137A1 (en) * 2009-09-16 2011-03-24 株式会社村田製作所 Module with built-in electronic component
TWI795644B (en) * 2020-06-02 2023-03-11 大陸商上海兆芯集成電路有限公司 Electronic assembly

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KR970001891B1 (en) * 1991-02-08 1997-02-18 가부시키가이샤 도시바 Semiconductor device and method for manufacturing the same
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JP3866777B2 (en) * 1994-08-29 2007-01-10 富士通株式会社 Semiconductor device and manufacturing method thereof
JP2001077232A (en) * 1999-09-06 2001-03-23 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
US6562660B1 (en) * 2000-03-08 2003-05-13 Sanyo Electric Co., Ltd. Method of manufacturing the circuit device and circuit device
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