594117 狄、發明說明： 【發明所屬之技術領域】 本發明係有關於一種液晶顯示裝置及其製造方法， 特別係關於一種液晶顯示裝置’其可在一液晶顯示面板 (以下稱A LCD面板”）之接墊被以玻璃上設晶片（⑶g)方 法來連接於-外部驅動積體電路時，防止該等接塾或連 接於該#接墊料路被隸；及—種製造料液晶顯示 裝置的方法。 t 先前 在今日之資訊化社會中，由於資訊傳輸媒體及各種 電子顯不裝置被廣泛使用於產業裝置及家用器材，故電 子顯示裝置乃愈形重要。該等電子顯示裝置爱被不斷地 改良，俾能具有新的適當功能以滿足資料社會的各種需 求0 15 一般而言，電子顯示裝置會將各種片段的資訊顯示 並傳送給利用該等資訊的使用者。即是，該電子顯示裝 置會將由電子裝f輸出的電資訊信號，轉化成可被使用 者以眼睛來辨識的光資訊信號。 該等電子顯示裝置係分為一種發光式顯示裝置及一 20 種非發光式顯示裝置，該發光式顯示裝置會經由其發光 現象來顯示光資訊信號，而非發光式顯示裝置則經由其 反射，散射或干涉現象來顯示光資訊信號。該發光顯示 裝置乃包括陰極射線管（CRT)、電漿顯示面板（pdp)、發 光二極體（LED)及電致發光顯示器（ELD)等。該等發光顯 5 594117 示裝置係被稱為主動式顯示裝置。又，非發光顯示裝置 則被稱為被動式顯示裝置，乃包括液晶顯示裝置（匕⑶）， 電化學顯不器（ECD)，及電泳影像顯示器（EPID)等。 該CRT長久以來已被使用於電視或電腦的螢幕來作 5為顯示裝置，因為其具有高品質及低製造成本。但是， 該CRT亦具有一些缺點，例如較重、體積大、及高耗電等。 近來，對新電子顯示裝置的需求大為增加，例如具 有絕佳特性·的平板式顯示裝置，其既薄且輕，低驅動電 壓又低耗電量。該等平板顯示裝置可依據快速發展中的 10半導體技術來被製成。 在該平板式裝置中，一 LCD裝置已被廣泛地使用於各 種電子裝置，因為該LCD裝置具有較薄厚度、低耗電量 及接近KCRT的高顯示品質。又，該LCD裝置可在一低驅 動電壓下來操作，且能被容易地製造，因此該LCD裝置 15乃被普通地使用於各種電子裝置。 該LCD裝置一般係被分為一種透射式LCD裝置，一種 反射式LCD裝置，友一種反射透射式LCD裝置。該透射式 LCD裝置係使用外部光源來顯示資訊而反射式[CD裝置 則利用自然光來顯示資訊。該反射透射式LCD裝置以透 2〇射模式來操作時，係使用該顯示裝置之一内建光源，而 在至内或一外部光源不存在的暗處來顯示影像；當其以 反射模式操作時，係在高度外部照明下藉反射外部入射 光而來顯示影像。 【發^明内容】 594117 第1圖為一立體示意圖，示出一傳統之LCD裝置的 LCD面板；第2圖為一平面圖示出一傳統之lcd面板，及 連接於該LCD面板而用來將之驅動的積體電路；第3圖為 一剖視圖示出該傳統LCD面板之一薄膜電晶體及一接墊 5 區。 請參閱第1、2圖，一 LCD裝置具有一 LCD面板130可 供顯示影像，及驅動積體電路137與138可產生影像信號。 該LCD面板130包含一第一基材1〇〇，一第二基材1〇2 對設於該第一基材100，及一液晶114被注入於第一基材 10 1〇〇與第二基材102之間。 有許多的閘極線104與資料線1〇6會呈矩陣狀設在該 第一基材100上，而像元電極1〇8及薄膜電晶體（TFT)等係 被設在該等閘極線104與資料線1〇6的交叉點處。有一遽 色片112及一透明共同電極11〇會被設在第二基材i〇2 15上。該濾色片1丨2乃含有紅、綠、藍（R、G、B)像元，而 能在光通過該像元時顯示預定顏色。又，偏振板（未示出） 會被設在該第一與_第二基材100與1〇2的外側，而可依據 該液晶的定向來保持所透射之光的方向。 該薄膜電晶體（TFT) 109具有一閘極電極15設在第一 2〇基材100上，一閘絕緣層25設在該閘極電極15與第一電極 100上’一主動圖案3〇設在該閘絕緣層25上而對應於閘極 電極15’ 一電阻接觸層圖案35設在該主動圖案3〇上，而 源極電極40與汲極電極45係設在該電阻接觸圖案35上， 如第3圖所示。一鈍化層75會被設在第一基材1〇〇上設有 7 594117 該TFTl 09之處。该鈍化層75係由一無機材料或有機材料 所製成。一接觸孔80會被設來貫穿該鈍化層乃而曝露該 汲極電極45。又，接觸孔等（未示出）亦會被設來貫穿該純 化層75而曝露在一接墊區中之閘極端子與汲極端子。 5 該閘極電極15係連接於閘極線104,而該源極電極40 則連接於資料線106。該汲極電極45係連接於像元電極 108。故，當一掃描電壓經由該閘極線1〇4來施加於閘極 電極15時，一通過該資料線1〇6的信號電壓則會經由該主 動圖案30，而從源極電極4〇施加於汲極電極45。當該信 10號電壓被施於沒極電極45時，有一電位差會產生於該第 二基材102的共同電極110與連接於該汲極電極牦的像元 電極108之間。嗣，被注入於該像元電極1〇8與共同電極 110之間的液晶114之分子排列將會改變，故該液晶114的 透光率即會變化。因此，該TFT1〇9乃形成一可供操作該 15 LCD面板130之像元的切換裝置。 此外，第一接墊133與第二接墊134係被設在該lcD 面板13 0上，如第2®所示。該第一接墊133係由閘極線1〇4 伸出，而第二接墊134則由資料線106伸出。該第一接塾 133係連接於可產生該掃描電壓的第一積體電路137，而 20第二接墊134則連接於產生該信號電壓的第二積體電路 138。因此，由該第一積體電路137所產生的掃描電壓會 經由第一接塾133施加於閘極線1〇4，而由第二積體電路 138所產生的信號電壓則會經由第二接墊134來施加於資 料線106。此時，各種不同的方法乃可用來將第一接塾133 594117 連接於該第一積體電路137，或將第二接墊134連接於第 二積體電路138。通常，會有可供連接該等接墊的凸體等 被ό又在ό亥荨整合電路的電極上，而可利用該等凸體來將 接墊連接於積體電路。 5 一般而言，帶式自動連結（TAB)法會被用來將該等接594117 D. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly to a liquid crystal display device 'which can be a liquid crystal display panel (hereinafter referred to as A LCD panel). When the pads are connected to the external drive integrated circuit by using a chip on glass (CDg) method, the connection or the connection to the # 接 垫料 路 被 uliu is prevented; and a kind of manufacturing liquid crystal display device In the information society of today, electronic display devices are becoming more and more important as information transmission media and various electronic display devices are widely used in industrial devices and household appliances. These electronic display devices are constantly being loved. Improved to have new and appropriate functions to meet the various needs of the data society. 0 15 In general, an electronic display device displays and transmits various pieces of information to users who use the information. That is, the electronic display device The electronic information signal output by the electronic device f is converted into an optical information signal that can be recognized by a user's eyes. The device is divided into a light-emitting display device and a kind of 20 non-light-emitting display devices. The light-emitting display device displays an optical information signal through its light-emitting phenomenon, while the non-light-emitting display device uses its reflection, scattering, or interference phenomenon. To display light information signals. The light-emitting display device includes a cathode ray tube (CRT), a plasma display panel (pdp), a light-emitting diode (LED), and an electroluminescent display (ELD). The light-emitting display 5 594117 The display device is called an active display device, and the non-light-emitting display device is called a passive display device, which includes a liquid crystal display (DCD), an electrochemical display (ECD), and an electrophoretic image display (EPID). ) Etc. The CRT has been used for 5 years as a display device for TV or computer screens because it has high quality and low manufacturing cost. However, the CRT also has some disadvantages, such as being heavier, bulkier, and High power consumption, etc. Recently, the demand for new electronic display devices has greatly increased, such as flat-panel display devices with excellent characteristics, which are thin and light, and have low driving power. Low power consumption. These flat panel display devices can be made according to the rapidly developing 10 semiconductor technology. In the flat panel device, an LCD device has been widely used in various electronic devices because the LCD device It has a thin thickness, low power consumption, and high display quality close to KCRT. In addition, the LCD device can be operated at a low driving voltage and can be easily manufactured. Therefore, the LCD device 15 is generally used in various Electronic device. The LCD device is generally divided into a transmissive LCD device, a reflective LCD device, and a reflective transmissive LCD device. The transmissive LCD device uses an external light source to display information and the reflective [CD device is Use natural light to display information. When the reflective transmissive LCD device is operated in transmissive mode, it uses one of the built-in light sources of the display device to display the image in a dark place where no internal or external light source exists; When operating in reflective mode, it displays images by reflecting externally incident light under highly external lighting. [Contents] 594117 Figure 1 is a three-dimensional schematic diagram showing an LCD panel of a conventional LCD device. Figure 2 is a plan view showing a conventional LCD panel and connected to the LCD panel for use. The integrated circuit driven by it; FIG. 3 is a cross-sectional view showing a thin film transistor and a pad 5 area of the conventional LCD panel. Referring to FIGS. 1 and 2, an LCD device has an LCD panel 130 for displaying images, and driving integrated circuits 137 and 138 can generate image signals. The LCD panel 130 includes a first substrate 100, a second substrate 100 paired with the first substrate 100, and a liquid crystal 114 injected into the first substrate 10 100 and a second substrate. Between the substrates 102. Many gate lines 104 and data lines 106 are arranged in a matrix on the first substrate 100, and pixel electrodes 108 and thin film transistors (TFTs) are provided on the gates. At the intersection of line 104 and data line 106. A color chip 112 and a transparent common electrode 110 are disposed on the second substrate 102. The color filters 1 and 2 contain red, green, and blue (R, G, B) pixels, and can display a predetermined color when light passes through the pixels. In addition, a polarizing plate (not shown) is provided on the outside of the first and second substrates 100 and 102, and the direction of the transmitted light can be maintained according to the orientation of the liquid crystal. The thin film transistor (TFT) 109 has a gate electrode 15 provided on the first 20 substrate 100, a gate insulating layer 25 provided on the gate electrode 15 and the first electrode 100, and an active pattern 30. On the gate insulation layer 25, a resistive contact layer pattern 35 corresponding to the gate electrode 15 'is provided on the active pattern 30, and the source electrode 40 and the drain electrode 45 are provided on the resistive contact pattern 35. As shown in Figure 3. A passivation layer 75 is provided on the first substrate 100 where the TFT 107 is provided. The passivation layer 75 is made of an inorganic material or an organic material. A contact hole 80 is provided to penetrate the passivation layer and expose the drain electrode 45. In addition, contact holes and the like (not shown) are also provided to penetrate the purification layer 75 and expose the gate and drain terminals in a pad area. 5 The gate electrode 15 is connected to the gate line 104, and the source electrode 40 is connected to the data line 106. The drain electrode 45 is connected to the pixel electrode 108. Therefore, when a scanning voltage is applied to the gate electrode 15 through the gate line 104, a signal voltage passing through the data line 106 is applied from the source electrode 40 through the active pattern 30.于 Draw 极 electrode 45. When the signal No. 10 is applied to the electrode electrode 45, a potential difference is generated between the common electrode 110 of the second substrate 102 and the pixel electrode 108 connected to the drain electrode 牦. Alas, the molecular arrangement of the liquid crystal 114 injected between the pixel electrode 108 and the common electrode 110 will change, so the light transmittance of the liquid crystal 114 will change. Therefore, the TFT 1009 forms a switching device for operating the pixels of the 15 LCD panel 130. In addition, the first pad 133 and the second pad 134 are disposed on the LCD panel 130, as shown in FIG. 2®. The first pad 133 is extended from the gate line 104 and the second pad 134 is extended from the data line 106. The first connection 133 is connected to the first integrated circuit 137 that can generate the scanning voltage, and the second connection pad 134 is connected to the second integrated circuit 138 that generates the signal voltage. Therefore, the scanning voltage generated by the first integrated circuit 137 is applied to the gate line 104 through the first connection 133, and the signal voltage generated by the second integrated circuit 138 is connected through the second connection. The pad 134 is applied to the data line 106. At this time, various methods can be used to connect the first connector 133 594117 to the first integrated circuit 137, or to connect the second connector 134 to the second integrated circuit 138. Generally, there are convex bodies for connecting the pads, etc., which are connected to the electrodes of the integrated circuit, and the convex bodies can be used to connect the pads to the integrated circuit. 5 In general, the TAB method is used to connect
墊連接於積體電路。依據該TAB法，在一具有金屬線路的 薄膜被固接於該LCD面板，且該積體電路之一電極被使 用凸體來連接之後，一固接於該電極之TAB封裝體的導線 將會被固接於該LCD面板。即是，在將該積體電路固設 10 於該LCD面板的外側之後，該積體電路的電極以及該lcd 面板的電極將會被利用該設有金屬線路的薄膜來電連 接。The pad is connected to the integrated circuit. According to the TAB method, after a thin film having a metal circuit is fixed to the LCD panel, and one of the electrodes of the integrated circuit is connected using a convex body, a wire of a TAB package fixed to the electrode will be It is fixed to this LCD panel. That is, after the integrated circuit is fixed on the outside of the LCD panel, the electrodes of the integrated circuit and the electrodes of the LCD panel will be electrically connected by the thin film provided with the metal wiring.
又，一玻璃上設晶片（COG)法亦可取代該TAB法，而 來將一驅動積體電路連接於一 LCD面板。依據該COG 15 法，該驅動積體電路會直接被設在該LCD面板上，該積 體電路係僅利用凸體（或爆點）及一異向性導電膜（ACF)來 固接於該LCD面板之基材，而沒有使用該TAB法中的薄 膜。 第4圖為一剖視圖示出一種可將一積體電路連接於 20 一 LCD裝置的傳統COG方法。 請參閱第4圖，有一 ACF樹脂153會被設在一基材180 上而對應於一LCD面板的接墊181等。嗣，有一其上設有 凸體144的積體電路140會被以一熱壓縮法來固設於該基 材180上。因此，散佈於該ACF樹脂153中的導電球154等 9 會被該等凸體144與接墊181所壓著，而使包封該等導電 球154之一絕緣層（未示出）破開。故，該積體電路ι4〇之一 電極將會與該LCD面板的接墊181電連接。然後，該積體 電路140會被加熱，以使該由於被壓縮處理而已軟化之 5 ACF樹脂153硬化，俾固接該積體電路14〇與該基材18〇的 接墊181。 該COG法乃被廣泛使用·於較小或中等尺寸的面板，而來 加強有關外部衝擊或振動之車輛產品的耐用性，因為其較 TAB法更簡單易行，且該LCD面板在該LCD裝置中的面積比 10 會增加。 但是，在該COG法中，該等接墊及與之連接的線路 專，在水分或化學品等污染物滲入連接於該積體電路之 凸體的接墊曝露部份時，將會向於該等污染物與接墊或 線路之間的電化學反應，而可能被腐蝕或發生短路。又 15若該等相鄰接墊之間的電位差太大，則該等接墊或連接 於接墊的線路會更容易腐蝕。 本發明即用來·解決上述之問題，其主要目的係為提 供一種LCD裝置，而能在一;lcd面板之接墊被連接於驅動 積體電路時，防止該等接墊及與之連接的線路被腐蝕。 20 本發明之另一目的係為提供一種製造LCD裝置的方 法，特別適用於其LCD面板之接墊連接於驅動積體電路 時，能防止接墊或所連接之線路被腐蝕的乙(：：1)裝置者。 為達到本發明之上述目的，所提供的1^(：1：)裝置乃包含 一基材，一像兀陣列設在該基材的顯示區域上，多個接 10 594117 墊叹在鑪基材的非顯示區上，及一積體電路設在該基材 之該非顯示區上，而電連接於該等接墊來產生可操作該 像元陣列的彳§號。導電的阻隔層會被設在連接於該積體 電路之各接塾的周邊部份，而與該各接塾分開。該各導 5電阻隔層會藉由該積體電路的内部接點，而具有與該各 接墊相等的電位。 又，為達成本發明之目的，乃提供一種lCD裝置，包 含一基材，一像元陣列設在該基材之顯示區上。一積體 電路叹在該基材之一非顯示區上，可產生供操作該像元 10電極的信號，多個輸出接墊連接於多數第一線路的端 邛該等第一線路係由該顯示區延伸至非顯示區，並電 連接於該積體電路的一部份，及多個輸入接墊連接於多 數第二線路的端部，該等第二線路係被設在該基材的非 顯示區上，並電連接於該積體電路的另一部份。在上述 15 [CD裝置中，與該各接墊分開的導電阻隔層，會被設在 各連接於該積體電路之輸入接塾的周邊部份上。該導電 阻隔層會藉由該積體電路的内部接點，而具有與各輸入 接塾相等的電位。 又，為達到本發明之目的，乃提供一 LCD裝置，其包 2〇含一第一基材具有一像元陣列係含有多數像元而呈矩陣 狀設在該第一基材的中央部份，多個第一接墊設在第一 基材的第一周邊部份上而可施一第一信號於該等像元， 及多個第二接墊設在該第一基材的第二周邊部份上而可 施一第二信號於該等像元；一第二基材設有一濾色片對 11 一第基材的中央部份，一液晶層設在該第一基材與 第一基材之間，第—積體電路係以COG法來與前述第一In addition, a glass-on-chip (COG) method can also replace the TAB method to connect a driver integrated circuit to an LCD panel. According to the COG 15 method, the driving integrated circuit is directly provided on the LCD panel. The integrated circuit is only fixed to the LCD by using a convex body (or a burst point) and an anisotropic conductive film (ACF). The substrate of the LCD panel does not use the thin film in the TAB method. FIG. 4 is a cross-sectional view showing a conventional COG method for connecting an integrated circuit to a 20-LCD device. Referring to FIG. 4, an ACF resin 153 is disposed on a substrate 180 and corresponds to a pad 181 of an LCD panel. Alas, an integrated circuit 140 having a convex body 144 thereon is fixed to the substrate 180 by a thermal compression method. Therefore, the conductive balls 154 and the like 9 dispersed in the ACF resin 153 are pressed by the convex bodies 144 and the pads 181, so that an insulating layer (not shown) encapsulating the conductive balls 154 is broken. . Therefore, one of the electrodes of the integrated circuit ι40 will be electrically connected to the pad 181 of the LCD panel. Then, the integrated circuit 140 is heated to harden the 5 ACF resin 153 which has been softened by the compression treatment, and the bonding pad 181 of the integrated circuit 14 and the substrate 18 is fixed. The COG method is widely used in small or medium-sized panels to enhance the durability of vehicle products related to external shock or vibration, because it is simpler and easier to implement than the TAB method, and the LCD panel is used in the LCD device. The area ratio of 10 will increase. However, in the COG method, these pads and the lines connected to them will be exposed to pollutants such as moisture or chemicals when they penetrate the exposed portions of the pads connected to the integrated circuit of the integrated circuit. The electrochemical reaction between these pollutants and pads or wiring may cause corrosion or short circuit. 15 If the potential difference between the adjacent pads is too large, the pads or the lines connected to the pads will be more easily corroded. The present invention is used to solve the above-mentioned problems. Its main purpose is to provide an LCD device that can prevent the pads and the connected pads when the pads of the LCD panel are connected to the driving integrated circuit. The wiring is corroded. 20 Another object of the present invention is to provide a method for manufacturing an LCD device, which is particularly suitable for preventing the pads or connected lines from being corroded when the pads of the LCD panel are connected to a driving integrated circuit (:: 1) Installer. In order to achieve the above-mentioned object of the present invention, the provided 1 ^ (: 1 :) device includes a substrate, and an array is arranged on the display area of the substrate. A plurality of 10 594117 pads are sighed on the furnace substrate. The non-display area and a integrated circuit are disposed on the non-display area of the substrate, and are electrically connected to the pads to generate a 彳 § number that can operate the pixel array. A conductive barrier layer is provided at a peripheral portion of each connection connected to the integrated circuit, and is separated from each connection. The conductive 5 resistance barriers have the same potential as the pads through the internal contacts of the integrated circuit. In addition, in order to achieve the purpose of the present invention, an LCD device is provided, which includes a substrate, and a pixel array is disposed on a display area of the substrate. An integrated circuit is sighed on a non-display area of the substrate, and can generate signals for operating the 10-electrode of the pixel. Multiple output pads are connected to the terminals of most first lines. The display area extends to the non-display area, and is electrically connected to a part of the integrated circuit, and a plurality of input pads are connected to the ends of most of the second circuits, and the second circuits are provided on the substrate. The non-display area is electrically connected to another part of the integrated circuit. In the above-mentioned 15 [CD device, a conductive barrier separated from each pad is provided on the peripheral portion of each input connector connected to the integrated circuit. The conductive barrier layer has the potential equal to each input connection through the internal contacts of the integrated circuit. In addition, in order to achieve the purpose of the present invention, an LCD device is provided. The LCD device includes a first substrate with a pixel array and a plurality of pixels, and is arranged in a matrix at the center of the first substrate. A plurality of first pads are disposed on the first peripheral portion of the first substrate to apply a first signal to the picture elements, and a plurality of second pads are disposed on the second substrate of the first substrate A second signal can be applied to the pixels on the peripheral portion; a second substrate is provided with a color filter pair 11; a central portion of the first substrate; a liquid crystal layer is disposed on the first substrate and the first substrate; Between a substrate, the first integrated circuit uses the COG method to communicate with the first
周邊部份上的第—接墊連接，及第二積體電路亦以C0G 5法來與第二周邊部份上的第二接墊連接。與該各第-接 5塾分開的第—阻隔層會被設在連接於第-積體電路之各 第接塾的周邊部份上，而與該各第二接塾分開的萃二 阻隔層則被設在連接於第二積體電路之各第二接塾的周 邊部份上。該各第一阻隔層會具有與各第一接墊相等的 電位，而該各第二阻隔層會具有與各第二接墊相等的電 10 位。 為達成本發明之另一目的，乃提供一種製造液晶顯 示裝置的方法，包含下列步驟：在一基材上製成多數線 路’在該等線路及基材上製成—鈍化層，部份地餘刻該 鈍化層來開放該各線路的接觸區，在前述結構上沈積一 導電層並將之圖案化來形成多數接塾並經由該等接觸 區連接於各線路，又同時在各連接於一外部積體電路之 接墊的周邊部份製-成導電阻隔層，該等導電阻隔層係與 各接墊分開，而具有與該各接墊相等的電位，及將該等 接墊與該外部積體電路連接。 20 依據本發明，具有相等電位的阻隔層會與各接墊分 開’並被設在連接於該積體電路之各接墊的周邊部份 上。該等導電阻隔層係由相同於該等接墊的膜層所製成。 在本發明之一較佳實施例中，該導電阻隔層係被製 成封閉環圈狀。 12 594117 ，依據本發明之一第二較佳實施例，該導電阻隔層係 被製成開放環圈狀，俾可防止茂漏電流產生於一連接該 接墊的線路與一具有相等電位的導電位的導電阻隔層之 間。 5 在本發明之一第三實施例中，導電緩衝層等會被設 在連接於該各接墊之線路的兩側，而由該各接墊與導電 阻隔層突出，以防止該等阻隔層被例如水分或化學品等 污染物所腐蝕。 在本發明之一第四實施例中，該等導電阻隔層係被 10 又在連接於各接墊之各線路的兩側，而與該各接墊分 開因此’藉該積體電路的内部接點，該各接墊與周邊 的導電阻隔層會具有相等的電位。 圖式之簡單說明： 本發明之上述及其它的目的和優點等，將可參閱以 15下之詳細說明並參酌所附圖式而更容易瞭解；其中： 第1圖為一習知LCD裝置之一 LCD面板的立體示意 圖； - 第2圖為一平面圖示出一習知LCD面板與連接於該 LCD面板來將之驅動的積體電路； 20 第3圖為一剖視圖示出該習知LCD面板之一 TFT及一 接墊區； 第4圖為一剖視圖示出一種將積體電路連接於LCD裝 置的習知COG法； 第5圖為本發明之一 LCD裝置的LCD面板之平面圖； 13 594117 第6圖為一平面圖示出本發明第一實施例之一閘極 驅動積體電路的閘極輸入墊部； 第7圖為第6圖中之’’A”部份的剖視圖； 第8A至8D圖為製造本發明第一實施例tLCD裝置的 5 方法之剖視示意圖； 第9圖為一平面圖示出本發明第二實施例之閘極驅 動積體電路的閘極輸入塾部； 第10圖為一平面圖示出本發明第三實施例之閘極驅 動積體電路的閘極輸入墊部；及 + 0 第11圖為一平面圖示出本發明第四實施例之閘極驅 動積體電路的閘極輸入塾部。 L實施方式】 以下，依據本發明較佳實施例之LCD裝置及製造該 LCD裝置的方法，將參照所附圖式來詳細說明。 14 594117 通過該等则像元時，會發出預定的顏色m第 二基材200與乃被設成互相相對，並在液晶被注入其 間之後會互相結合。又，有—偏振板（未示出）可被 該第一與第二基材200與400的外側，而能依據該 固設於 液晶的 5 定向來保持外部光的傳送方向。 一基材200。該第一 份會形成一顯示區 δ亥第一基材400的面積係小於第 基材200與第二基材4〇〇重疊的部 32〇’而在該重疊部份以外的區域，則會形成非顯示區 325。 1〇 在該非顯示區325中，有一第一 COG積體電路（IC)500 的端子（即輸出端子）會連接於接墊268(以下稱為，，第一輸 出接墊’，），該等接墊係連接於閘極線的端部，而該等閘極 線會由該基材200的顯示區320延伸至非顯示區325。該第 一COG IC500係為閘極驅動積體電路。該第一cog IC5〇〇 15的其它端子（即一輸入端子）會經由第一信號線來連接於 一撓性印刷電路（FPC)(未示出）。同時，第一輸入接墊27Q 會連接於該等第一-信號線的端部。 此外，一第二COG IC450的端子（即一輸出端子）會連 接於接墊272(以下稱為，，第二輸出接墊”），該接墊係連接 20於由第一基材200的顯示區320延伸至非顯示區325的資 料線等之端部。該第二C〇G IC450係為資料驅動積體電 路。該第二COGIC450的其它端子（即一輸入端子）係經由 第二信號線等來連接於該FPC。同時，第二輸入接墊274 會連接於該等第二信號線的端部。 15 594117 該等輸入接墊270與274會將由該FPC所產生的信號 傳送至該COG IC450至500，而該等輸出接墊268與272會 將由COG IC450與500所產生的操作信號傳送至設在該顯 示區3 2 0上的像元陣列。 5 一般而言，有許多連接於閘極線與資料線端的輸出 接墊268與272等係呈鋸齒狀排列，因為大量的輸出信號 會令其間距十分狹窄。故，連接於該等輸出接墊268與272 的COG IC450與500之輸出端子，亦會呈鋸齒狀列設。另 一方面，連接於信號線之端部的輸入接墊27〇與274等係 10呈一直線排列，因為較小數量的輸入信號可使其間距比 輸出接墊268與272等更寬。因此，連接於輸入接墊27〇與 274的COG IC450和500之輸入端子係呈直線排列。 至於該等連接於該驅動1C之輸出端子的輸出接塾 268與272等，在相鄰接墊之間的電位差很小。相反地， 15 在連接於該驅動1C之輸入端子的輸入接塾270與274等中 之相鄰接墊間的電位差很大。結果，電子的遷移將會增 加而來腐# 一連接於對應輸入接塾的線路。因此，發明 人乃建議將導電阻隔層設在該等輸入接墊274與27〇的周 邊部份上，俾當該積體電路被固接於該等接墊時，能防 20 止連接於該等輸入接墊270與274的線路被腐#。 第6圖為一平面圖，乃示出本發明第一實施例之一閘 極驅動積體電路的閘極輸入墊部，而第7圖為第6圖中 之”A”部份的剖視圖。 請參閱第6及7圖，有許多的信號線224會被設在第i 16 594117 基材200上，該第一基材200係設有TFTs及像元電極。該 各信號線224會被一閘極絕緣層225及一鈍化層250所覆 層。有多數對應於各信線224的墊接觸孔260等，將會貫 穿該鈍化層250與閘極絕緣層225而來形成。有多數的 5 COG 1C輸入接墊270被設在該鈍化層25 0上。該等COG 1C 輸入接墊270會經由該等接觸孔260來連接於對應信號線 224的端部。 一異向性導電薄膜（ACF)樹脂520會被塗設在輸入接 墊270上。該ACF樹脂520中含有許多的導電球530。 10 當該閘極驅動1C之COG IC500的許多凸體5 10等，被 對準並壓縮於所對應的輸入接墊270上時，介於該等凸體 510與輸入接墊270之間的導電球530將會被壓縮，因此該 COG IC500能與輸入接墊270等互相接觸。 在本發明之該第一實施例中，與該各輸入接墊270分 15 開的導電阻隔層275等，將會被設在連接於該COG IC500 之各輸入接墊270周邊部份上。該導電阻隔層275會具有 與該COG IC500的内部接點一致的電位，該電位係與輸入 接墊270相等。該導電阻隔層275係由與輸入接墊270相同 的料層所製成。通常，由於該等接墊270係由與像元電極 20 相同的料層來製成，故該等導電阻隔層275在一透射式 LCD裝置中會由一透明導電膜來製成，例如銦錫氧化物 (ITO)或銦鋅氧化物（IZO)等。或者，在一反射式LCD裝置 中，該導電阻隔層275會由例如鋁（A1)、鋁合金、銀、銀 合金等之反射金屬膜來製成。 17 594117The first pad connection on the peripheral part and the second integrated circuit are also connected to the second pad on the second peripheral part by the COG 5 method. The first barrier layer separated from each of the first and second terminals is provided on a peripheral portion of each first terminal connected to the first integrated circuit, and the second barrier layer is separated from each of the second terminals. It is arranged on the peripheral part of each second socket connected to the second integrated circuit. Each of the first barrier layers will have a potential equal to that of each of the first pads, and each of the second barrier layers will have an electrical potential equal to that of each of the second pads. In order to achieve another object of the present invention, a method for manufacturing a liquid crystal display device is provided, which includes the following steps: forming a plurality of circuits on a substrate, and forming a passivation layer on the circuits and the substrate, and partially The passivation layer is etched to open the contact areas of the lines. A conductive layer is deposited on the aforementioned structure and patterned to form a plurality of connections and connected to the lines through the contact areas. The peripheral part of the pad of the external integrated circuit is made into a conductive resistance spacer, which is separated from each pad and has a potential equal to that of each pad, and the pads and the external Integrated circuit connection. 20 According to the present invention, a barrier layer having an equal potential is separated from each pad and is provided on a peripheral portion of each pad connected to the integrated circuit. The conductive barrier layers are made of the same film layer as the pads. In a preferred embodiment of the present invention, the conductive barrier layer is formed in a closed loop shape. 12 594117, according to a second preferred embodiment of the present invention, the conductive resistance barrier layer is made into an open loop shape, which can prevent the occurrence of leakage current from a line connecting the pad and a conductive layer having an equal potential. Bits of conductive resistance between the interlayers. 5 In a third embodiment of the present invention, a conductive buffer layer and the like are provided on both sides of a line connected to the pads, and the pads and the conductive resistance barrier layer protrude to prevent the barrier layers. Corroded by contaminants such as moisture or chemicals. In a fourth embodiment of the present invention, the conductive resistance spacers are separated from each of the pads on both sides of each line connected to the pads, and thus are 'connected by the inside of the integrated circuit. At this point, each of the pads and the surrounding conductive barrier layer will have an equal potential. Brief description of the drawings: The above and other objects and advantages of the present invention will be more easily understood by referring to the detailed description of the following 15 and referring to the attached drawings; Among them: FIG. 1 is a conventional LCD device A perspective view of an LCD panel;-Figure 2 is a plan view showing a conventional LCD panel and an integrated circuit connected to the LCD panel to drive it; 20 Figure 3 is a sectional view showing the conventional LCD One of the panels is a TFT and a pad area; FIG. 4 is a cross-sectional view showing a conventional COG method for connecting an integrated circuit to an LCD device; FIG. 5 is a plan view of an LCD panel of an LCD device according to the present invention; 594117 FIG. 6 is a plan view showing a gate input pad portion of a gate driving integrated circuit according to a first embodiment of the present invention; FIG. 7 is a cross-sectional view of a portion “A” in FIG. 6; 8A to 8D are schematic cross-sectional views of 5 methods for manufacturing a tLCD device according to the first embodiment of the present invention; and FIG. 9 is a plan view showing a gate input part of a gate driving integrated circuit according to the second embodiment of the present invention Figure 10 is a plan view showing a gate driver according to a third embodiment of the present invention; Gate input pad part of a dynamic integrated circuit; and + 0 FIG. 11 is a plan view showing a gate input pad of a gate drive integrated circuit of a fourth embodiment of the present invention. The LCD device and the method for manufacturing the LCD device according to the preferred embodiment of the present invention will be described in detail with reference to the attached drawings. 14 594117 When passing through these pixels, a predetermined color m will be emitted. It is arranged to be opposite to each other, and will be combined with each other after the liquid crystal is injected therebetween. Furthermore, there is a-polarizing plate (not shown) can be outside the first and second substrates 200 and 400, and can be fixed according to the fixing The 5 orientation of the liquid crystal is used to maintain the transmission direction of external light. A substrate 200. The first portion will form a display area δ. The area of the first substrate 400 is smaller than that of the second substrate 200 and the second substrate 400. The overlapped portion 32 ′ is formed in a region other than the overlapped portion, and a non-display area 325 is formed. 10 In the non-display area 325, there is a terminal (ie, an output terminal) of the first COG integrated circuit (IC) 500 ) Will be connected to the pad 268 (hereinafter referred to as, the first output pad The pads are connected to the ends of the gate lines, and the gate lines extend from the display area 320 to the non-display area 325 of the substrate 200. The first COG IC500 is a gate driver Integrated circuit. The other terminals of the first cog IC50015 (ie, an input terminal) will be connected to a flexible printed circuit (FPC) (not shown) via a first signal line. At the same time, the first input is connected to The pad 27Q will be connected to the ends of the first-signal lines. In addition, a terminal (ie, an output terminal) of a second COG IC450 will be connected to the pad 272 (hereinafter, the second output pad ") The pad is connected to an end of a data line or the like extending from the display area 320 of the first substrate 200 to the non-display area 325. The second COG IC450 is a data-driven integrated circuit. The other terminals (ie, an input terminal) of the second COGIC 450 are connected to the FPC via a second signal line or the like. At the same time, the second input pad 274 is connected to the ends of the second signal lines. 15 594117 The input pads 270 and 274 will transmit the signals generated by the FPC to the COG IC450 to 500, and the output pads 268 and 272 will transmit the operation signals generated by the COG IC450 and 500 to the The pixel array on the display area 3 2 0. 5 In general, there are many output pads 268 and 272 connected to the gate and data lines, which are arranged in a zigzag manner, because a large number of output signals will make the distance very narrow. Therefore, the output terminals of the COG IC450 and 500 connected to these output pads 268 and 272 will also be arranged in a zigzag pattern. On the other hand, the input pads 27 and 274 connected to the end of the signal line are arranged in a straight line, because a smaller number of input signals can make the pitch wider than the output pads 268 and 272. Therefore, the input terminals of the COG IC 450 and 500 connected to the input pads 27 and 274 are linearly arranged. As for the output connections 268 and 272 connected to the output terminals of the driver 1C, the potential difference between adjacent pads is small. On the contrary, the potential difference between the adjacent pads of the input terminals 270 and 274 etc. connected to the input terminal of the driver 1C is large. As a result, the migration of electrons will increase. A line connected to the corresponding input connection. Therefore, the inventor proposes to set a conductive resistance barrier on the peripheral parts of the input pads 274 and 27. When the integrated circuit is fixed to the pads, it can prevent 20 connections to the pads. Wait for the input pads 270 and 274 to be rotten. FIG. 6 is a plan view showing a gate input pad portion of a gate driving integrated circuit according to a first embodiment of the present invention, and FIG. 7 is a cross-sectional view of a portion “A” in FIG. 6. Please refer to FIGS. 6 and 7, many signal lines 224 are provided on the i 16 594117 substrate 200. The first substrate 200 is provided with TFTs and pixel electrodes. The signal lines 224 are covered by a gate insulating layer 225 and a passivation layer 250. A plurality of pad contact holes 260 and the like corresponding to the letter lines 224 are formed through the passivation layer 250 and the gate insulating layer 225. A plurality of 5 COG 1C input pads 270 are provided on the passivation layer 250. The COG 1C input pads 270 are connected to the ends of the corresponding signal lines 224 through the contact holes 260. An anisotropic conductive film (ACF) resin 520 is coated on the input pad 270. The ACF resin 520 includes a plurality of conductive balls 530. 10 When the gate drives the many convex bodies 5 of the COG IC500 of 1C, etc., are aligned and compressed on the corresponding input pads 270, the conduction between the convex bodies 510 and the input pads 270 The ball 530 will be compressed, so the COG IC 500 can contact the input pad 270 and the like. In the first embodiment of the present invention, a conductive resistance barrier layer 275 separated from each of the input pads 270 will be provided on a peripheral portion of each of the input pads 270 connected to the COG IC500. The conductive resistance interlayer 275 will have a potential consistent with the internal contacts of the COG IC 500, and the potential is equal to the input pad 270. The conductive barrier layer 275 is made of the same material layer as the input pad 270. Generally, since the pads 270 are made of the same material layer as the pixel electrode 20, the conductive resistance spacers 275 are made of a transparent conductive film, such as indium tin in a transmissive LCD device. Oxide (ITO) or indium zinc oxide (IZO). Alternatively, in a reflective LCD device, the conductive resistance interlayer 275 may be made of a reflective metal film such as aluminum (A1), aluminum alloy, silver, silver alloy, or the like. 17 594117
最好是’該導電阻隔層275係被設成一封閉環圈狀， 如第6圖所示。故，當該COGIC5〇〇與輸入接墊27〇等互相 固接時，包圍該各輸入接墊270周邊之封閉環圈狀的導電 阻隔層275’將會藉由該COGIC500之内部接點540等，而 5具有相對於該各輸入接墊270的電位。因此，當例如水分 或化學品等污染物滲入該接墊部而與該Cog IC500的凸 體接觸時，由於該導電阻隔層275具有相對的電位，故其 所對應的輸入接塾270不會曝現於該等污染物。即是，該 導電阻隔層275會扮演防止該等輸入接墊27〇與連接於輸 10 入接墊270的信號線224被腐蝕的角色。 第8A至8B圖為製造本發明該第一實施例之lcd裝置 的製造方法之剖視圖。第8A至8D圖乃示出一具有底部閘 極結構的薄膜電晶體LCD裝置。Preferably, the conductive resistance spacer 275 is provided in a closed loop shape, as shown in FIG. Therefore, when the COGIC 500 and the input pad 27 are fixedly connected to each other, a closed loop-shaped conductive resistance barrier layer 275 'surrounding the periphery of each input pad 270 will pass through the internal contact 540 of the COGIC 500, etc. And 5 has a potential relative to the input pads 270. Therefore, when contaminants such as moisture or chemicals penetrate into the pad portion and come into contact with the convex body of the Cog IC500, the conductive resistance barrier layer 275 has a relative potential, so its corresponding input connector 270 will not be exposed. These pollutants are present. That is, the conductive resistance spacer 275 plays a role of preventing the input pads 27 and the signal lines 224 connected to the input pads 270 from being corroded. 8A to 8B are sectional views of a manufacturing method of the LCD device according to the first embodiment of the present invention. 8A to 8D show a thin film transistor LCD device having a bottom gate structure.
請參閱第8A圖，一第一金屬層會被沈積在由玻璃或 15陶瓷等非導電材料所製成之一絕緣基材200上，並被以光 微影法來圖案化而形成一閘極線路。該第一金屬層係由 一厚度約500 A的鉻（Cr)層及一厚度約為25〇〇 A的鋁鈥 (Al-Nd)層來製成。該閘極線路包含一閘極線沿一第一方 向由該基材200之一顯示區延伸至一非顯示區，一閘極電 20極215由該閘極線分支形成，並有一閘極端子（未示出）設 在該閘極線之一端部。同時，第一信號線224會沿該第一 方向被設在該基材200的非顯示區域上。該等第一信號線 224會連接於第一 COG IC500的輸入端子（參見第5圖）該 ic係為閘極驅動ic。最好是，該等第一信號線224係由形 18 ^^117 成該閘極線路的金屬層來製成。又，連接於資料驅動IC 之第二COG IC450(見第5圖）的輸入端子之第二信號線等 (未示出），考量線路電阻之故最好亦由該閘極線路的金屬 層來製成。 5 請參閱第8B圖，氮化矽會被以電漿強化之化學氧相 沈積（PECVD)法來在設有閘極線路與第一信號線224之該 基材200的整個表面上，沈積大約45〇〇人的厚度，而形成 一閘極絕緣層225。 一主動層’例如一非結晶矽層，亦會被以PECVd法 10來在該閘極絕緣層225上，沈積大約2〇〇〇 A的厚度。一電Referring to FIG. 8A, a first metal layer is deposited on an insulating substrate 200 made of non-conductive material such as glass or 15 ceramics, and is patterned by photolithography to form a gate electrode. line. The first metal layer is made of a chromium (Cr) layer having a thickness of about 500 A and an aluminum- (Al-Nd) layer having a thickness of about 2500 A. The gate line includes a gate line extending from a display area to a non-display area of the substrate 200 along a first direction. A gate electrode 20 is formed by a branch of the gate line 215 and has a gate terminal. (Not shown) is provided at one end of the gate line. At the same time, the first signal line 224 is disposed on the non-display area of the substrate 200 along the first direction. The first signal lines 224 are connected to the input terminals of the first COG IC500 (see FIG. 5). The ic is a gate drive ic. Preferably, the first signal lines 224 are made of a metal layer formed by the gate lines 18 ^ 117. In addition, the second signal line (not shown) connected to the input terminal of the second COG IC450 (see Fig. 5) of the data driving IC is also preferably provided by the metal layer of the gate line in consideration of the line resistance. production. 5 Please refer to FIG. 8B. Silicon nitride is deposited by plasma enhanced chemical oxygen phase deposition (PECVD) method on the entire surface of the substrate 200 provided with gate lines and first signal lines 224. 4500 person thickness, and a gate insulating layer 225 is formed. An active layer ', such as an amorphous silicon layer, is also deposited on the gate insulating layer 225 by a PECVd method 10 to a thickness of about 2000 A. A power
阻接觸層，例如n+摻雜的非結晶矽層，亦會被以pECVD 法在該主動層上沈積大約5〇〇 A的厚度。此等，該非結晶 石夕層及η摻雜非結晶矽層會在該pecvd設備的同一腔室 中來被厚位沈積。嗣，該電阻接觸層與該主動層會經由 15 光微衫製程來圖案化，而在閘極電極2 15上方的閘極絕 緣層上形成由該非結晶石夕層所構成的主動圖案23〇， 及由該11摻雜非結晶矽層所構成的電阻接觸層圖案 235 ° 20 一第二金屬層，例如鉻（Cr)、鉻鋁（Cr-A1)、或鉻鋁鉻 (Ci* Al-Ci〇等會破以濺錢法來在上述結構之整個表面上 沈積大約15GG至侧人的厚度。騎，該第二金屬層會經 由光微影製程來圖案化，而形成一資料線路。該資料 線路i s f料線乃沿一第二方向由該基材謂的顯示 區延伸至其非顯示區 一源極電極240與一汲極電極245 19 594117 會由該資料線分支伸出，及一汲極端子（未示出）位於該資 料線之一端部。該第二方向係垂直於前述第一方向。故， 乃完成一薄膜電晶體300，其具有閘極電極215、主動圖 案230、電阻接觸層圖案235、源極電極240、汲極電極245 5等。此等’該閘極絕緣層225係被介設於閘極線與資料線 之間，而可阻止兩者接觸。 然後’曝露於源極電極240與汲極電極245之間的電 阻接觸層圖案235會被以反應離子蝕刻（RIE)法來除掉。故 而，有一曝現於該源極與汲極電極240與245之間的主動 10 圖案區，將會形成該TFT300的通道區。 在本實施例中，該主動圖案230與資料線路係使用二 罩幕來製成。但，本案發明人等曾發明以一罩幕來製成 該主動圖案230、電阻接觸層圖案235及資料線路等之方 法，並申請韓國專利第1998_49710號申請案，而將製造該 15具有底部閘極結構的TFT-LCD裝置之罩幕數目減至四 個。使用四個罩幕來製造該TFT-LCD裝置的方法將說明 於下。 - 首先，當依序將該主動層之非結晶矽層與該電阻接 觸層之n+摻雜非結晶矽層沈積在該閘極絕緣層上之後， 2〇有一作為資料線路的第二金屬層會被沈積其上。嗣，在 該第一金屬層上塗設一光阻層之後，該光阻層會被曝光 及顯影來形成一光阻圖案（未示出），其包含一第一部份具 有一第一厚度而位於該TFT的通道部份上，一第二部分具 有一第二厚度大於前述第一厚度，而位於該資料線路部 20 份上，及一第三部份其中該光阻層會被完全去除。然後， 位於該第三部份底下的第二金屬層、電阻接觸層、主動 層，及在第一部份底下的第二金屬層，及該第二部份的 部伤厚度等皆會被蝕掉。結果，由該第二金屬層形成之 5資料線路，由n+摻雜非結晶矽層所形成的電阻接觸層圖 案235，及由非結晶矽層所形成的主動圖案23〇等將會被 同時製成。嗣，剩下的光阻圖案會被除去，因此該主動 圖案230,該電阻接觸層圖案235及包含源極、㈣電極 240與245的資料線路等，皆會同時被使用一光罩來製成。 10 請參閱第8C圖，一用來絕緣該資料線路與像元電極 的鈍化層250，將會被形成於其上已設有τρτ3〇〇的基材 200之整個表面上。該鈍化層25〇係由一無機材料如氮化 矽，或一光敏性有機材料如壓克力樹脂等所製成。若為 反射式或反射/透射式LCD裝置，該鈍化層25〇會由光敏性 15有機材料製成，而有多數的溝紋會被設於該表面上，來 增進該LCD裝置的反射率。 在一可曝現該汲極電極245之一接觸孔255，被以光 微影或曝光/顯影製程來形成而貫穿該鈍化層25〇之後，該 接墊區的閘極絕緣層225會被乾蝕刻除去，而形成墊接觸 20孔260等，其各會分別曝現該閘極端子、資料端子、及信 號線等之端部。 請參閱第8D圖，有一透明導電層例*ΙΤ〇、ιζ〇，或 -反射金屬層例如八卜A1合金、Ag、Ag合金等，會被沈 積於上述結構之整個表面上，並以_光微影製程來圖案 21 594117 化，而形成一像元電極265其會經由該接觸孔來連⑽ TFT的汲極電極245。同時，有許多的第—接塾與第二接 墊會被製成於該等墊接觸孔上。 、 5 該等第-接墊會被分為連接於各閉極端子及該閉極 驅動IC(該第一 C0G IC500)的輸出 丁<第一輸出接墊 第5圖），以及連接於各第一信號線端部與該第一 COGIC500之輸入端子的第一輸入接墊27〇等。 10 該等第二接塾則被分為連接於各資料端子及該資料 驅動叫該第二COG IC45〇)的輸出端子之第二輸出接塾 272(見第5圖），以及連接於各第二信號線端部與該第二 COGIC450之輸入端的第二輸入接墊274等。 15 依據本實施例，當形成該等像元電極265及接墊時， 具有相等電位的第-導電阻隔層275等，將會被形成於連 接該閘極驅動IC之第一 C0G IC的各第—輸入接墊27〇之 周邊部份上，且具有相等電位的第二導電阻隔層等(未示 出）’亦會被形成於連接該資料驅動1(：之各第二輸入接墊 274的週邊部份上。-最好是，該第一與第二導電阻隔層等 皆被設成封閉環圈形狀。 20 在設有像元電極265、接墊270、及導電阻隔層275等 之上述結構的整個表面上製成一第一定向層（未示出）之 後，有一第二基材（未示出）會被對抵於該第一基材2〇〇而 來11 又置該第二基材係包含一濾色片、一共同電極、一 第二定向層、一相位滯延板、及一偏振板等。 當有多數的間隔物（未示出）被置設於第一基材2〇〇與 22 594117 第二基材之間後，一液晶（未示出）會被注入該第一基材 200與第二基材之間的空隙内，而來完成該反射式、透射 式或反射/透射式LCD裝置。 嗣’在一含有導電球之ACF樹脂被設於第一基材2〇〇 5的接墊上後’該閘極與資料驅動1C的凸體將會被以COG 法來壓接於該等接墊上，而完成一 LCD模組。 第9圖為一平面圖，示出本發明第二實施例之一閘極 驅動1C的閘極輸入接墊部。 請參閱第9圖，具有與該各輸入接墊27〇相等電位的 10導電阻隔層276等會被設成開放環圈狀，而可防止連接於 該各輸入接墊270信號線224與導電阻隔層276之間產生 沒漏電流。故，即使有污染物例如水分或化學品等渗入 該接墊部中而接觸該閘極驅動1(：的凸體時，亦可藉該等 導電阻隔層276來防止該等輸入接墊270及與之連接的信 15 號線2 2 4被腐餘。 第10圖為一平面圖，乃示出本發明第三實施例之一 閘極驅動1C的閘極輸入接墊部。 請參閱第10圖，導電緩衝層278會被設在連接於各輸 入接塾270之各仏號線224的兩側上。該等導電緩衝層278 20係由具有與各接墊270相同電位的導電阻隔層277伸出。 因此，即使污染物滲入該等導電阻隔層277内而與該閘極 驅動1C的凸體接觸，則亦會由於該等具有相等電位的導 電緩衝層278，而得避免該導電阻隔層277之腐蝕。 第11圖為一平面圖，乃示出本發明第四實施例之一 23 594117 閘極驅動ic的閘極輸入接塾部。 請參閱第11圖，與該等信號線224分開的導電阻隔層 280會被設在連接於各輸入接墊27〇之信號線224的兩 側。在此情況下，該各輸入接墊27〇與周邊的導電阻隔層 5 280係僅藉該閘極驅動IC的内部接點來形成相同的電 位。故，該等導電阻隔層280將能有效防止該等輸入接墊 270及與之連接的信號線224被腐姓。 於本發明之上述各實施例中，該等導電阻隔層皆被 設在連接於該閘極驅動1C之輸入端子的閘極輸入接墊部 10上。但是，該等具有相同電位之導電阻隔層亦可按照上 述實施例之相同方法，來被設在連接於該資料驅動1(：之 輸入端子的資料輸入接墊部上。且，該等資料驅動1(：亦 能藉COG法以外的其它方法來設置。 依據如上述之本發明，該等具有相同電位之導電阻 15隔層會與該各接墊分開，並被設在連接於該1C之各接墊 的周邊部份上，故可防止該等接墊及連接於該等接墊之 線路’在該1C的凸體與接墊互相固接時，由於污染物而 被腐蝕。 雖本發明之較佳實施例已被說明如上，惟應可瞭解 20 本發明並不受限於該等較佳實施例，仍有各種變化修正 可被專業人士所實施，而令括於下列申請專利範圍之本 發明的精神及範疇内。 【圖式簡單說明】 圖式簡要說明 24 594117 第1圖為一習知LCD裝置之一 LCD面板的立體示意 圖； 第2圖為一平面圖示出一習知LCD面板與連接於該 LCD面板來將之驅動的積體電路； 5 第3圖為一剖視圖示出該習知LCD面板之一 TFT及一 接塾區； 第4圖為一剖視圖示出一種將積體電路連接於lcd裝 ，置的習知COG法； 第5圖為本發明之一 LCD裝置的LCD面板之平面圖； 10 第6圖為一平面圖示出本發明第一實施例之一閘極 驅動積體電路的閘極輸入墊部； 第7圖為第6圖中之’’A”部份的剖視圖； 第8A至8D圖為製造本發明第一實施例之lcd裝置的 方法之剖視示意圖； 15 第9圖為一平面圖示出本發明第二實施例之閘極驅 動積體電路的閘極輸入墊部； 第10圖為一平©圖示出本發明第三實施例之閘極驅 動積體電路的閘極輸入塾部；及 第11圖為一平面圖示出本發明第四實施例之閘極驅 20 動積體電路的閘極輸入墊部。 【圖式之主要元件代表符號表】 15···閘極電極 25…閘絕緣層 30···主動圖案 35…電阻接觸層圖案 25 594117 40…源極電極 45… >及極電極 75···純化層 80,255…接觸孔 100···第一基材 102···第二基材 104···液晶 106…資料線 108···像元電極 109,300."TFT 110···共同電極 112···濾色片 114···液晶 130…LCD面板 133，134···接墊 137，138···驅動積體電路 153,520"，ACF 樹脂 一 140…積體電路 144…凸體 154…導電球 180…基材 181…接墊 200···第一基材 215···閘極電極 224…信號線 225···閘極絕緣層 230···主動圖案 235···電阻接觸層圖案 240···源極電極 245···汲極電極 250…純化層 260…墊接觸孔 265···像元電極 268,272…輸出接墊 270,274…輸入接墊 275,276,277,280—導電阻隔層 278···導電緩衝層 320···顯示區 325···非顯示區 400···第二基材 500,450···(：00 積體電路 510…凸體 530···導電球 540···内部接點 26A resist layer, such as an n + -doped amorphous silicon layer, is also deposited on the active layer by pECVD to a thickness of about 500 A. For this reason, the amorphous stone layer and the n-doped amorphous silicon layer are thickly deposited in the same chamber of the pecvd device. Alas, the resistive contact layer and the active layer are patterned through a 15-light micro-shirt process, and an active pattern 23 composed of the amorphous stone layer is formed on the gate insulating layer above the gate electrode 2 15, And a resistive contact layer pattern composed of the 11-doped amorphous silicon layer 235 ° 20 a second metal layer, such as chromium (Cr), chromium aluminum (Cr-A1), or chromium aluminum aluminum chromium (Ci * Al-Ci 〇 etc. will be used to deposit a thickness of about 15GG on the entire surface of the above structure by the method of splashing money. Riding, the second metal layer will be patterned through a photolithography process to form a data line. This data The line isf line extends from the display area of the substrate to its non-display area along a second direction. A source electrode 240 and a drain electrode 245 19 594117 will protrude from the data line branch and a drain terminal. The daughter (not shown) is located at one end of the data line. The second direction is perpendicular to the aforementioned first direction. Therefore, a thin film transistor 300 is completed, which has a gate electrode 215, an active pattern 230, and a resistive contact layer. Pattern 235, source electrode 240, drain electrode 2455, etc. etc. The gate insulation layer 225 is interposed between the gate line and the data line, and can prevent the two from contacting each other. Then, the resistive contact layer pattern 235 exposed between the source electrode 240 and the drain electrode 245 will be exposed. It is removed by a reactive ion etching (RIE) method. Therefore, an active 10 pattern region exposed between the source and drain electrodes 240 and 245 will form a channel region of the TFT 300. In this embodiment The active pattern 230 and the data line are made using two screens. However, the inventors of this case have invented a method to make the active pattern 230, the resistive contact layer pattern 235, and the data line with one screen, and Apply for Korean Patent No. 1998_49710, and reduce the number of screens for manufacturing the 15 TFT-LCD device with bottom gate structure to four. The method of manufacturing the TFT-LCD device using four screens will be described in -First, after sequentially depositing the amorphous silicon layer of the active layer and the n + doped amorphous silicon layer of the resistive contact layer on the gate insulating layer, a second metal is used as a data line. Layers will be deposited on top of it. After a photoresist layer is coated on the first metal layer, the photoresist layer is exposed and developed to form a photoresist pattern (not shown), which includes a first portion having a first thickness and located on the TFT. On the channel portion, a second portion has a second thickness greater than the aforementioned first thickness, and is located on 20 portions of the data line portion, and a third portion in which the photoresist layer is completely removed. Then, the portion The second metal layer, the resistive contact layer, the active layer under the third part, and the second metal layer under the first part, and the thickness of the wound in the second part will be etched. The 5 data lines formed by the second metal layer, the resistive contact layer pattern 235 formed by the n + doped amorphous silicon layer, and the active pattern 23 formed by the amorphous silicon layer will be made at the same time. . Alas, the remaining photoresist patterns will be removed. Therefore, the active pattern 230, the resistive contact layer pattern 235, and the data lines including the source, rhenium electrodes 240 and 245, etc. will all be made using a photomask at the same time. . 10 Please refer to FIG. 8C, a passivation layer 250 for insulating the data line and the pixel electrode will be formed on the entire surface of the substrate 200 on which τρτ300 has been set. The passivation layer 25 is made of an inorganic material such as silicon nitride or a photosensitive organic material such as acrylic resin. In the case of a reflective or reflective / transmissive LCD device, the passivation layer 25 is made of a photosensitive 15 organic material, and most grooves are provided on the surface to improve the reflectivity of the LCD device. After a contact hole 255 that can expose one of the drain electrodes 245 is formed by the photolithography or exposure / development process and penetrates the passivation layer 25, the gate insulating layer 225 of the pad region is dried. It is removed by etching, and pad contact 20 holes 260 are formed, each of which exposes the ends of the gate electrode terminal, the data terminal, and the signal line. Please refer to Fig. 8D, there is an example of a transparent conductive layer * ΙΤ〇, ιζ〇, or-a reflective metal layer such as Babu A1 alloy, Ag, Ag alloy, etc., will be deposited on the entire surface of the above structure, and _ light The lithography process pattern 21 594117 is formed, and a pixel electrode 265 is formed, which connects the drain electrode 245 of the TFT through the contact hole. At the same time, many first and second pads will be made on the pad contact holes. The 5th pads are divided into output terminals (the first output pad (Figure 5) connected to each closed terminal and the closed-pole driver IC (the first C0G IC500), and connected to each A first input pad 27 of the end of the first signal line and the input terminal of the first COGIC 500, etc. 10 The second connectors are divided into a second output connector 272 (see Figure 5) connected to each data terminal and an output terminal of the data driver called the second COG IC45. A second input pad 274 and the like of the two signal line ends and the input end of the second COGIC 450. 15 According to this embodiment, when the pixel electrodes 265 and pads are formed, first conductive resistance barrier layers 275 and the like having the same potential will be formed in each of the first COG ICs connected to the gate driving IC. —On the peripheral part of the input pad 27, a second conductive resistance barrier layer and the like (not shown) having the same potential will also be formed on the second input pad 274 connected to the data driver 1 (: Peripheral parts.-It is preferable that the first and second conductive barrier layers and the like are set in the shape of a closed loop. 20 The above is provided with a pixel electrode 265, a pad 270, and a conductive barrier layer 275, etc. After a first alignment layer (not shown) is made on the entire surface of the structure, a second substrate (not shown) will be opposed to the first substrate. The two substrates include a color filter, a common electrode, a second alignment layer, a phase retardation plate, a polarizing plate, etc. When a plurality of spacers (not shown) are placed on the first substrate After the material 200 and the second substrate 594117, a liquid crystal (not shown) is injected into the first substrate 200 and the second substrate. The reflective, transmissive, or reflective / transmissive LCD device is completed in the gap between the materials. 嗣 'After an ACF resin containing conductive balls is placed on the pad of the first substrate 2005' The gate and the data-driven 1C convex body will be crimped to these pads by the COG method to complete an LCD module. Figure 9 is a plan view showing a gate according to a second embodiment of the present invention. The gate input pad part of the pole drive 1C. Please refer to FIG. 9. A 10-conductor resistance layer 276 having the same potential as each of the input pads 270 will be formed in an open loop shape, and it can be prevented from being connected to the pad. No leakage current is generated between the signal line 224 of each input pad 270 and the conductive barrier layer 276. Therefore, even if pollutants such as moisture or chemicals penetrate into the pad portion and contact the gate driver 1 (: convex body) At this time, the conductive resistance barrier layer 276 can also be used to prevent the input pads 270 and the signal line 2 2 4 connected to them from being corroded. Figure 10 is a plan view showing the third embodiment of the present invention One example is the gate input pad of the gate driver 1C. Referring to FIG. 10, the conductive buffer layer 278 will It is provided on both sides of each bus line 224 connected to each input terminal 270. The conductive buffer layers 278 to 20 are extended from a conductive resistance barrier layer 277 having the same potential as each of the terminal pads 270. Therefore, even a pollutant Infiltration into the conductive barrier layer 277 and contacting the convex body of the gate drive 1C will also prevent the conductive barrier layer 277 from being corroded due to the conductive buffer layers 278 having the same potential. Figure 11 shows A plan view showing a gate input interface of the gate driving IC 23 594117, which is one of the fourth embodiments of the present invention. Referring to FIG. 11, a conductive resistance barrier layer 280 separated from the signal lines 224 is provided at Connected to both sides of the signal line 224 of each input pad 27. In this case, each of the input pads 27 and the surrounding conductive barrier layer 5 280 form the same potential only by using the internal contacts of the gate driving IC. Therefore, the conductive resistance spacers 280 can effectively prevent the input pads 270 and the signal lines 224 connected thereto from being corrupted. In each of the above embodiments of the present invention, the conductive resistance barriers are provided on the gate input pad portion 10 connected to the input terminal of the gate drive 1C. However, the conductive resistance barriers having the same potential can also be provided on the data input pad portion connected to the input terminal of the data driver 1 (:) according to the same method as the above embodiment. Moreover, the data driver 1 (: can also be set by methods other than the COG method. According to the present invention as described above, the conductive resistance 15 compartments having the same potential will be separated from the pads, and will be set at the connection to the 1C. The peripheral parts of each pad can prevent the pads and the circuits connected to the pads from being corroded due to contaminants when the 1C convex body and the pads are fixed to each other. Although the present invention The preferred embodiments have been described above, but it should be understood that the present invention is not limited to these preferred embodiments, and there are still various changes that can be implemented by professionals, and are included in the scope of the following patent applications Within the spirit and scope of the present invention. [Brief description of the drawings] Brief description of the drawings 24 594117 Figure 1 is a schematic perspective view of an LCD panel of a conventional LCD device; Figure 2 is a plan view showing a conventional LCD Panel and connected to the LCD surface 5 is a cross-sectional view showing a TFT and a connection area of the conventional LCD panel; FIG. 4 is a cross-sectional view showing a integrated circuit connected to an LCD device, FIG. 5 is a plan view of an LCD panel of an LCD device according to the present invention; FIG. 6 is a plan view showing a gate of a gate driving integrated circuit according to a first embodiment of the present invention Input pad section; FIG. 7 is a cross-sectional view of the portion “A” in FIG. 6; FIGS. 8A to 8D are schematic cross-sectional views of a method for manufacturing an LCD device according to the first embodiment of the present invention; A plan view shows the gate input pad portion of the gate drive integrated circuit of the second embodiment of the present invention; FIG. 10 is a flat view showing the gate of the gate drive integrated circuit of the third embodiment of the present invention The input part; and FIG. 11 is a plan view showing the gate input pad part of the gate driver 20 motive power integrated circuit of the fourth embodiment of the present invention. [Key components of the figure represent the symbol table] 15 ··· Gate electrode 25 ... Gate insulating layer 30 ... Active pattern 35 ... Resistive contact layer pattern 25 594117 40 ... Source Electrode 45 ... > Electrode 75 ... Purification layer 80, 255 ... Contact hole 100 ... First substrate 102 ... Second substrate 104 ... Liquid crystal 106 ... Data line 108 ... Pixel electrode 109,300. &Quot; TFT 110 ... Common electrode 112 ... Color filter 114 ... LCD 130 ... LCD panel 133, 134 ... Pad 137, 138 ... Drive integrated circuit 153, 520 ", ACF Resin 140 ... Integrated circuit 144 ... Convex body 154 ... Conductive ball 180 ... Substrate 181 ... Mat 200 ... First substrate 215 ... Gate electrode 224 ... Signal line 225 ... Gate insulation layer 230 ... Active pattern 235 ... Resistive contact layer pattern 240 ... Source electrode 245 ... Drain electrode 250 ... Purification layer 260 ... Pad contact hole 265 ... Pixel electrodes 268, 272 ... Output pads 270, 274 … Input pads 275, 276, 277, 280—conductive resistance barrier layer 278 ... conductive buffer layer 320 ... display area 325 ... non-display area 400 ... second substrate 500, 450 ... (: 00 integrated circuit 510 ... convex Body 530 ... conductive ball 540 ... internal contact 26